MSI MS 7010 REV 10a

5 MS-7010 D C Version 0A 08/19/2003 Update VIA (R) K8T800(8385) / VT8237 Chipset AMD PGA 754 Processor Schematics *AMD PGA 754 Processor *VIA K8T800 / VT8237 Chipset (DDR 400 / AGP 8X / VLink 8X) *Winbond 83697HF-VF LPC I/O *VT6103 PHY 10 / 100 *VT6307 1394A Controler *AC'97 Codec CM9761 Codec *USB 2.0 support (integrated into VT8237) *AGP SLOT * ( 8X ) *PCI SLOT * *DDR DIMM * MS-6741 Ver:0B Option L BOM (with LAN) B K8T800 8237CD 2MB ROM Model Config SMT5010 724 SMT5020 010 DIP 080 Total 814 Orcad Config Title Cover Sheet Page Block Diagram GPIO SPEC AMD K8 -> 754 PGA Socket 4,5,6 Clock Synthesizer System Memory DDR DIMM & D DDR Terminations R & C DDR Damping R & Bypass Cap 10 NB VIA K8T400M(HT) 11,12,13 AGP SLOT 8X 14 SB VT8237 15,16,17 PCI Connectors & & 18 Mini PCI 19 1394a Controller 20 CMI9761 AC97 Codec 21 Audio Connector 22 ATA 66/100/133 23 Front & Rear USB Port 24 VT6103 LAN PHY/ Connector 25 LPC I/O W83697HF & Floppy 26 Hardware monitor/Fan/BIOS 27 Keyboard/Mouse & I/O Ports 28 K8 Vcore power 29 ACPI Power 30 C B Front Panel/Power OK/System power Regulator 31 ERP BOM Function Description Date BULK / Decoupling 32 Power Generation 33 Screw Hole and FMark 34 History 35 Manual Parts 36 A A MS7010M1 cfg7010M1 601-7010-0AS K8T800+VT8237CD With LAN/1394 Micro Star Restricted Secret Title Document Number Rev Cover Sheet MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw 0A MS-7010 Last Revision Date: Tuesday, September 02, 2003 Sheet 35 of Block Diagram AMD K8 DDR Socket 754 D D HyperTransfer A G C VIA AGP 8X /Fast Write DDR * R,G,B,HSYNC,VSYNC VGA Connector K8T400M K8M400 P VLINK Dual ATA 100/133 VIA PCI Bus PCI PCI B PCI IDE Slot ==>ATA66,100,133 *2 MII Interface 10/100 BaseT Lan C B VT8235 VT8237 AC'97 Link 1394a VT8237 S-ATA LPC BUS SATA Connector SUPER I/O W83697HF USB X BUS Onboard AC'97 Codec A A Dual USB 1.1 OHCI /2.0 EHCI Ports ==> Front-Port *2 , Back-Port *2 ROM Floopy Parallel Keyboard Serial Mouse Micro Star Restricted Secret Title Block Diagram Document Number MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw Rev 0A MS-7010 Last Revision Date: Tuesday, September 02, 2003 Sheet 35 of GPIO FUNCTION VT8235 GPIO Function Define Default Function PIN NAME Function define Default Function PIN NAME Pull up / down Function define Pull up / down D D GPO0 (VSUS33) GPO0 SUSLED ( Power LED ) Pull up to 3VDUAL GPI0 (VBAT) GPI0 GPO1/SUSA#(VSUS33) SUSA# 5V_STR Control on S5 Pull up to 3VDUAL GPI1 (VSUS33) GPO2/SUSB#(VSUS33) SUSB# SUSB# GPO3/SUSST1#(VSUS33) SUSST1# SUSST# GPO4/SUSCLK(VSUS33) SUSCLK NA Pull up to 3VDUAL GPO5/CPUSTP# CPUSTP# NA Pull up to VCC3 GPI2/EXTSMI# (VSUS33) GPI3/RING# (VSUS33) GPI4/LID# (VSUS33) GPI5/BATLOW# (VSUS33) GPO6/PCISTP# PCISTP# NA Pull up to VCC3 GPI6/PME# GPO7/SLP# GPO7 NA GPO8/GPI8/IPBIN0 GPI8 NA Pull up to VCC3 GPO9/GPI9/IPBIN1 Pull up to 3VDUAL GPI9 JBAT1 Pull up to VCC3 GPO10/GPI10/IPBRDFR GPI10 NA Pull up to VCC3 GPO11/GPI11/IPBRDCK GPI11 NA Pull up to VCC3 GPO12/GPI12/IPBOUT0 GPI12 NA GPO13/GPI13/IPBOUT1 GPI13 NA GPO14/GPI14/IPBTDFR GPI14 NA Pull up to VCC3 GPO15/GPI15/IPBTDCK Pull up to VCC3 NA Pull up to VBAT GPI1 ATADET0=>Detect IDE1 ATA100/66 Pull up to 3VDUAL EXTSMI# EXTSMI# Pull up to 3VDUAL RING# RING# Pull up to 3VDUAL LID# ATADET1=>Detect IDE2 ATA100/66 Pull up to 3VDUAL BATLOW# NA Pull up to 3VDUAL PCI_PME# Pull up to 3VDUAL GPI7/SMBALRT# GPI7 NA Pull up to 3VDUAL GPI16/INTRUDER# (VBAT) INTRUDER# NA Pull up to VBAT GPI17/CPUMISS CPUMISS NA Pull up to 3VDUAL AOLGP1 THRM# Pull up to 3VDUAL IORDY NA Pull up to VCC3 C B A C GPI15 NA GPO16/SA16/STRAP SA16 LDT Freq Strapping Bit0 GPO17/SA17/STRAP SA17 LDT Freq Strapping Bit1 GPO18/SA18/STRAP SA18 LDT Width (Low=8 Bit) GPO19/SA19/STRAP SA19 Fast Command (Low=Disable) GPO20/GPI20 /ACSDIN2/PCS0#/EI GPI20 NA Pull down to GND GPO21/GPI21/ACSDIN3 /PCS1#/SLPBTN# GPI21 NA Pull down to GND GPO22/GPI22/IOR# GPI22 NA Pull up to VCC3 GPO23/GPI23/IOW# GPI23 NA Pull up to VCC3 GPO24/GPI24/GPIOA GPI24 NA Pull up to VCC3 GPO25/GPI25/GPIOC GPI25 NA Pull up to VCC3 GPO26/GPI26/SMBDT2 (VSUS33) SMBDT2 SMBDATA2/Slave SMBUS Pull up to 3VDUAL GPO27/GPI27/SMBCK2 (VSUS33) SMBCK2 SMBCLK2/Slave SMBUS Pull up to 3VDUAL GPO28/GPI28/ APICD0/APICCS# NA Pull up to VCC3 GPO29/GPI29/ APICD1/APICACK# NA Pull up to VCC3 GPI18/AOLGP1/THRM# GPI19/IORDY PCI Routing GPO30/GPI30/GPIOD GPI30 NA Pull up to VCC3 GPO31/GPI31/GPIOE GPI31 NA Pull up to VCC3 DEVICES INT# IDSEL PCI SLOT INT#A INT#B INT#C INT#D AD16 PCI SLOT INT#B INT#C INT#D INT#A AD17 PCI SLOT INT#C INT#D INT#A INT#B AD18 INT#A AD19 INT#D AD25 PCI SLOT (MEDION 2nd) 1394 REQ#/GNT# PREQ#1 PGNT#1 PREQ#2 PGNT#2 PREQ#3 PGNT#3 PREQ#4 PGNT#4 PREQ#5 PGNT#5 CLOCK PCICLK1 B PCICLK2 PCICLK3 PCICLK4 1394_PCLK A Micro Star Restricted Secret Title Document Number Rev GPIO Spec 0A MS-7010 MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw Last Revision Date: Tuesday, September 02, 2003 Sheet of 35 C404 X_102P VTT_DDR_SUS VDD_12_A VREF routed as 40~50 mils trace wide , Space>25 mils C402 X_102P Bottom Side VDD_25_SUS AE13 D VDD_25_SUS AG12 R76 R85 15RST 15RST MEMZN MEMZP D14 C14 D17 A18 B17 C17 AF16 AG16 AH16 AJ17 MEMRESET_L AG10 MEMVREF1 MEMZN MEMZP Place near CPU in 1" , Routed => 5:10/Trace:Space , Same Length 10 VTT_A4 VTT_A1 VTT_A2 VTT_A3 VTT_B1 VTT_B2 VTT_B3 VTT_B4 VTT_SENSE DDR_VREF DDR_VREF MD63 MD62 MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 MD53 MD52 MD51 MD50 MD49 MD48 MD47 MD46 MD45 MD44 MD43 MD42 MD41 MD40 MD39 MD38 MD37 MD36 MD35 MD34 MD33 MD32 MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0 MD[63 0] C B 10 MEMDM[7 0] MEMDM7 MEMDM6 MEMDM5 MEMDM4 MEMDM3 MEMDM2 MEMDM1 MEMDM0 10 -MDQS[7 0] -MDQS7 -MDQS6 -MDQS5 -MDQS4 -MDQS3 -MDQS2 -MDQS1 -MDQS0 A MEMCKEA MEMCKEB A16 B15 A12 B11 A17 A15 C13 A11 A10 B9 C7 A6 C11 A9 A5 B5 C5 A4 E2 E1 A3 B3 E3 F1 G2 G1 L3 L1 G3 J2 L2 M1 W1 W3 AC1 AC3 W2 Y1 AC2 AD1 AE1 AE3 AG3 AJ4 AE2 AF1 AH3 AJ3 AJ5 AJ6 AJ7 AH9 AG5 AH5 AJ9 AJ10 AH11 AJ11 AH15 AJ15 AG11 AJ12 AJ14 AJ16 MEMDATA63 MEMDATA62 MEMDATA61 MEMDATA60 MEMDATA59 MEMDATA58 MEMDATA57 MEMDATA56 MEMDATA55 MEMDATA54 MEMDATA53 MEMDATA52 MEMDATA51 MEMDATA50 MEMDATA49 MEMDATA48 MEMDATA47 MEMDATA46 MEMDATA45 MEMDATA44 MEMDATA43 MEMDATA42 MEMDATA41 MEMDATA40 MEMDATA39 MEMDATA38 MEMDATA37 MEMDATA36 MEMDATA35 MEMDATA34 MEMDATA33 MEMDATA32 MEMDATA31 MEMDATA30 MEMDATA29 MEMDATA28 MEMDATA27 MEMDATA26 MEMDATA25 MEMDATA24 MEMDATA23 MEMDATA22 MEMDATA21 MEMDATA20 MEMDATA19 MEMDATA18 MEMDATA17 MEMDATA16 MEMDATA15 MEMDATA14 MEMDATA13 MEMDATA12 MEMDATA11 MEMDATA10 MEMDATA9 MEMDATA8 MEMDATA7 MEMDATA6 MEMDATA5 MEMDATA4 MEMDATA3 MEMDATA2 MEMDATA1 MEMDATA0 R1 A13 A7 C2 H1 AA1 AG1 AH7 AH13 T1 A14 A8 D1 J1 AB1 AJ2 AJ8 AJ13 MEMDQS17 MEMDQS16 MEMDQS15 MEMDQS14 MEMDQS13 MEMDQS12 MEMDQS11 MEMDQS10 MEMDQS9 MEMDQS8 MEMDQS7 MEMDQS6 MEMDQS5 MEMDQS4 MEMDQS3 MEMDQS2 MEMDQS1 MEMDQS0 C134 VTT_DDR_SUS U6B MEMCLK_H7 MEMCLK_L7 MEMCLK_H6 MEMCLK_L6 MEMCLK_H5 MEMCLK_L5 MEMCLK_H4 MEMCLK_L4 MEMCLK_H3 MEMCLK_L3 MEMCLK_H2 MEMCLK_L2 MEMCLK_H1 MEMCLK_L1 MEMCLK_H0 MEMCLK_L0 AE8 AE7 C403 105P D8 C8 E8 E7 D6 E6 C4 E5 MEMRASA_L MEMCASA_L MEMWEA_L H5 D4 G5 MEMBANKA1 MEMBANKA0 K3 H3 E13 C12 E10 AE6 AF3 M5 AE5 AB5 AD3 Y5 AB4 Y3 V5 T5 T3 N5 MCKE0 MCKE1 C418 105P C202 X0.22u 105P C135 C184 C183 C197 224P X0.22u 224P 224P D C423 105P U6A N12-7540010-A10 -MCS3 -MCS2 -MCS1 -MCS0 -MSRASA -MSCASA 8,9 8,9 D29 D27 D25 C28 C26 B29 B27 MEMCLK_H[7 0] 8,9 MEMCLK_L[7 0] 8,9 CADIP15 CADIN15 CADIP14 CADIN14 CADIP13 CADIN13 CADIP12 CADIN12 CADIP11 CADIN11 CADIP10 CADIN10 CADIP9 CADIN9 CADIP8 CADIN8 CADIP7 CADIN7 CADIP6 CADIN6 CADIP5 CADIN5 CADIP4 CADIN4 CADIP3 CADIN3 CADIP2 CADIN2 CADIP1 CADIN1 CADIP0 CADIN0 11 CADIP[0 15] 11 CADIN[0 15] -MCS3 -MCS2 -MCS1 -MCS0 -MSRASA -MSCASA -MSWEA 8,9 8,9 8,9 8,9 8,9 8,9 8,9 MEMBANKA1 8,9 MEMBANKA0 8,9 MAA13 MAA12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0 MAA[13 0] 8,9 11 11 11 11 CLKIP1 CLKIN1 CLKIP0 CLKIN0 11 11 CTLIP0 CTLIN0 VLDT0 R46 R40 49.9RST 49.9RST CTLIP1 CTLIN1 T25 R25 U27 U26 V25 U25 W27 W26 AA27 AA26 AB25 AA25 AC27 AC26 AD25 AC25 T27 T28 V29 U29 V27 V28 Y29 W29 AB29 AA29 AB27 AB28 AD29 AC29 AD27 AD28 VLDT0_B6 VLDT0_B5 VLDT0_B4 VLDT0_B3 VLDT0_B2 VLDT0_B1 VLDT0_B0 VLDT0_A6 VLDT0_A5 VLDT0_A4 VLDT0_A3 VLDT0_A2 VLDT0_A1 VLDT0_A0 L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0 AH29 AH27 AG28 AG26 AF29 AE28 AF25 L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0 N26 N27 L25 M25 L26 L27 J25 K25 G25 H25 G26 G27 E25 F25 E26 E27 N29 P29 M28 M27 L29 M29 K28 K27 H28 H27 G29 H29 F28 F27 E29 F29 -MSRASB -MSCASB -MSWEB MEMBANKB1 MEMBANKB0 L5 J5 MEMBANKB1 8,9 MEMBANKB0 8,9 CADOP15 CADON15 CADOP14 CADON14 CADOP13 CADON13 CADOP12 CADON12 CADOP11 CADON11 CADOP10 CADON10 CADOP9 CADON9 CADOP8 CADON8 CADOP7 CADON7 CADOP6 CADON6 CADOP5 CADON5 CADOP4 CADON4 CADOP3 CADON3 CADOP2 CADON2 CADOP1 CADON1 CADOP0 CADON0 L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKOUT_H1 L0_CLKOUT_L1 L0_CLKOUT_H0 L0_CLKOUT_L0 J26 J27 J29 K29 CLKOP1 CLKON1 CLKOP0 CLKON0 R27 R26 T29 R29 L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLOUT_H1 L0_CTLOUT_L1 L0_CTLOUT_H0 L0_CTLOUT_L0 N25 P25 P28 P27 CTLOP0 CTLON0 CADOP[0 15] 11 CADON[0 15] 11 C CLKOP1 CLKON1 CLKOP0 CLKON0 11 11 11 11 CTLOP0 CTLON0 11 11 B E14 D12 E9 AF6 AF4 M4 AD5 AC5 AD4 AA5 AB3 Y4 W5 U5 T4 M3 MAB13 MAB12 MAB11 MAB10 MAB9 MAB8 MAB7 MAB6 MAB5 MAB4 MAB3 MAB2 MAB1 MAB0 8,9 8,9 8,9 MAB[13 0] 8,9 N3 N1 U3 V1 N2 P1 U1 U2 A Micro Star Restricted Secret Title Rev K8 DDR & HT Document Number MICRO-STAR INT'L CO.,LTD No 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw C45 475P/0805 Y25 W25 Y27 Y28 MEMORY INTERFACE VLDT0 HYPER TRANSPORT - LINK0 H4 F5 F4 MEMCHECK7 MEMCHECK6 MEMCHECK5 MEMCHECK4 MEMCHECK3 MEMCHECK2 MEMCHECK1 MEMCHECK0 C408 105P C133 X_224P VLDT0 MCKE0 MCKE1 MEMRASB_L MEMCASB_L MEMWEB_L RSVD_MEMADDB15 RSVD_MEMADDB14 MEMADDB13 MEMADDB12 MEMADDB11 MEMADDB10 MEMADDB9 MEMADDB8 MEMADDB7 MEMADDB6 MEMADDB5 MEMADDB4 MEMADDB3 MEMADDB2 MEMADDB1 MEMADDB0 C412 105P VDD_12_A MEMCLK_H7 D10 MEMCLK_L7 C10 MEMCLK_H6 E12 MEMCLK_L6 E11 MEMCLK_H5 AF8 MEMCLK_L5 AG8 AF10 MEMCLK_H4 AE10 MEMCLK_L4 V3 V4 K5 K4 R5 MEMCLK_H1 P5 MEMCLK_L1 P3 MEMCLK_H0 P4 MEMCLK_L0 MEMCS_L7 MEMCS_L6 MEMCS_L5 MEMCS_L4 MEMCS_L3 MEMCS_L2 MEMCS_L1 MEMCS_L0 RSVD_MEMADDA15 RSVD_MEMADDA14 MEMADDA13 MEMADDA12 MEMADDA11 MEMADDA10 MEMADDA9 MEMADDA8 MEMADDA7 MEMADDA6 MEMADDA5 MEMADDA4 MEMADDA3 MEMADDA2 MEMADDA1 MEMADDA0 C424 X0.22u/BOT 0A MS-7010 Last Revision Date: Tuesday, September 02, 2003 Sheet of 35 VCCA_PLL trace length from the VR1 to the PGA must be 0.75" Place al filters close to the PGA Keep all power and signal trce away from the VR1 Place a cut in the GND plane around the VCCA_PLL regulator circuit D D Near SB/VT8235 LAYOUT: Route VDDA trace approx 50 mils wide (use 2x25 mil traces to exit ball field) and 500 mils long R84 VDDA_25 VCC2_5 THRMTRIP# 30 1K FB1 180nH/1210 CPU_VDDA_25 C43 392P C50 475P/0805 C94 106P/1206 C40 224P U6C AH25 AJ25 C25 X_102P 31 30 -CPURST CPU_GD CPU_GD 11,17 -LDTSTOP C VCC2_5 R47 R44 Place near CPU in 1" , Routed => 5:10/Trace:Space , Same Length Q5 NDS7002AS PS_ON#A 44.2RST 44.2RST L0_REF1 L0_REF0 C47 1K PS_ON#A VLDT0 R16 -LDTSTOP 31 VLDT0 C48 102P 102P 29 COREFB_H 29 COREFB_L Differential , "10:10:5:10:10" VDDIO_SENSE CPUCLK0_H C46 392P C49 R45 392P 169RST Near CPU in 0.5" VDD_25_SUS CPUCLK0_L CLKIN_H 8/28 AMD CHANGE THE PULL-UP POWER R38 R43 CLKIN_L 820 820 NC_AJ23 NC_AH23 VDDA1 VDDA2 AF20 AE18 AJ27 RESET_L PWROK LDTSTOP_L AF27 AE26 L0_REF1 L0_REF0 A23 A24 B23 COREFB_H COREFB_L CORE_SENSE AE12 AF12 AE11 VDDIOFB_H VDDIOFB_L VDDIO_SENSE AJ21 AH21 CLKIN_H CLKIN_L AJ23 AH23 NC_AJ23 NC_AH23 AE24 AF24 NC_AE24 NC_AF24 C16 AG15 VTT_A5 VTT_B5 AH17 DBRDY THRMTRIP# THERMTRIP_L A20 THERMDA THERMDC A26 A27 THERMDA_CPU VID4 VID3 VID2 VID1 VID0 AG13 AF14 AG14 AF15 AE15 VID4 VID3 VID2 VID1 VID0 NC_AG18 NC_AH18 NC_AG17 NC_AJ18 AG18 AH18 AG17 AJ18 G_FBCLKOUT_H G_FBCLKOUT_L AH19 AJ19 VID[4 0] C406 VDDIO_SENSE VDD_25_SUS X_102P B DBRDY NC_AG18 NC_AH18 NC_AG17 NC_AJ18 FBCLKOUT_H R48 80.6RST HDT Connectors R36 R37 DBREQ_L DBRDY TMS TCK TRST_L TDI 56 1K TMS TCK TRST_L TDI E20 E17 B21 A21 TMS TCK TRST_L TDI R83 1K NC_C18 C18 NC_C18 R74 1K NC_A19 A19 NC_A19 VCC2_5 NC_AE23 NC_AF23 NC_AF22 NC_AF21 8P4R-56 RN38 VCC2_5 NC_C15 RN3 8P4R-1K R79 RN4 8P4R-1K 8P4R-1K RN39 NC_AE23 NC_AF23 NC_AF22 NC_AF21 C1 J3 R3 AA2 D3 AG2 B18 AH1 AE21 C20 AG4 C6 AG6 AE9 AG9 FREE29 FREE31 FREE33 FREE35 FREE1 FREE37 FREE4 FREE38 FREE41 FREE7 FREE11 FREE12 FREE13 FREE14 FREE40 TDO AE19 DBREQ_L D20 C21 D18 C19 B19 NC_D20 NC_C21 NC_D18 NC_C19 NC_B19 A22 TDO 1K 8/28 AMD CHANGE THE PULL-UP POWER RSVD_SCL RSVD_SDA 1K AF18 D22 C22 VCC2_5 RN6 FREE26 FREE28 FREE30 FREE32 FREE34 FREE36 FREE10 FREE18 FREE19 FREE42 FREE24 FREE25 FREE27 B13 B7 C3 K1 R2 AA3 F3 C23 AG7 AE22 C24 A25 C9 VID0 VID2 VID1 VID3 VID4 R39 C36 104P C38 475P/0805 X_8P4R-4.7K X_4.7K A Micro Star Restricted Secret Title Rev K8 HDT & MISC Document Number MICRO-STAR INT'L CO.,LTD No 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw B VDD_25_SUS R89 NC_AF18 10 11 12 13 14 15 16 8 1 7 KEY1 KEY0 NC_D20 NC_C21 NC_D18 NC_C19 NC_B19 10 11 12 13 14 15 16 A NC_AJ18 NC_AH18 NC_AG18 NC_AG17 NC_C19 NC_D18 NC_D20 NC_B19 NC_C21 A28 AJ28 AE23 AF23 AF22 AF21 LAYOUT: Route FBCLKOUT_H/L differentially with 20/8/5/8/20 spacing and trace width ( In CPU breakout => routed 5:5:5 ) Zdiff = 80 ohm DBREQ_L C15 29 C FBCLKOUT_L VTT_DDR_SUS THERMDA_CPU 27 0A MS-7010 Last Revision Date: Tuesday, September 02, 2003 Sheet of 35 EMI U6E VCORE VCORE VDD_25_SUS GND VCORE C56 X_6.8pF C113 103P C109 224P C106 105P Place on CPU Solder side C99 224P C415 X_0.22u/BOT C93 X_0.22u/BOT D U6D X_6.8pF/BOT {nopop} C417 X_6.8pF/BOT {nopop} C420 C407 X_6.8pF/BOT X_6.8pF/BOT C421 X_6.8pF/BOT {nopop} C410 C411 X_6.8pF/BOT C405 X_6.8pF/BOT C419 X_6.8pF/BOT C409 X_6.8pF/BOT C414 X_6.8pF/BOT GND LAYOUT: Place 1000pF capacitors VCORE B LAYOUT: Place beside processor VDD_25_SUS LAYOUT: Place beside DDR slots 473P C125 473P C62 224P C136 224P C147 224P C156 C149 C73 224P VDD_25_SUS GND GND VDD_25_SUS VDD_25_SUS VDD_25_SUS 105P C142 105P C111 105P X_0.22uF {nopop} C102 105P A Micro Star Restricted Secret Title Document Number GND MICRO-STAR INT'L CO.,LTD No 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw GND Rev K8 POWER & GND GND GNDGND GNDGND C between VRM & CPU C219 POWER VCORE 224P N28 U28 AA28 AE27 R7 U7 W7 K8 M8 P8 T8 V8 Y8 J9 N9 R9 U9 W9 AA9 H10 K10 M10 P10 T10 Y10 AB10 G11 J11 AA11 AC11 H12 K12 Y12 AB12 J13 AA13 AC13 H14 AB26 E28 J28 LAYOUT: Place EMI caps along bottom right side of Clawhammer, in middle of HT link, and 12 along bottom left side of Claw- hammer C139 VDD96 VDD97 VDD98 VDD99 VDD100 VDD101 VDD102 VDD103 VDD104 VDD105 VDD106 VDD107 VDD108 VDD109 VDD110 VDD111 VDD112 VDD113 VDD114 VDD115 VDD116 VDD117 VDD118 VDD119 VDD120 VDD121 VDD122 VDD123 VDD124 VDD125 VDD126 VDD127 VDD128 VDD129 VDD130 VDD131 VDD132 VDD133 VDD93 VDD94 VDD95 GND 224P E4 G4 J4 L4 N4 U4 W4 AA4 AC4 AE4 D5 AF5 F6 H6 K6 M6 P6 T6 V6 Y6 AB6 AD6 D7 G7 J7 AA7 AC7 AF7 F8 H8 AB8 AD8 D9 G9 AC9 AF9 F10 AD10 D11 AF11 F12 AD12 D13 AF13 F14 AD14 F16 AD16 D15 R4 X_475P/0805 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27 VDDIO28 VDDIO29 VDDIO30 VDDIO31 VDDIO32 VDDIO33 VDDIO34 VDDIO35 VDDIO36 VDDIO37 VDDIO38 VDDIO39 VDDIO40 VDDIO41 VDDIO42 VDDIO43 VDDIO44 VDDIO45 VDDIO46 VDDIO47 VDDIO48 VDDIO49 VDDIO50 VDDIO6 C226 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD39 VDD38 VDD37 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 VDD55 VDD56 VDD57 VDD58 VDD59 VDD60 VDD61 VDD62 VDD63 VDD64 VDD65 VDD66 VDD67 VDD68 VDD69 VDD70 VDD71 VDD72 VDD73 VDD74 VDD75 VDD76 VDD77 VDD78 VDD79 VDD80 VDD81 VDD82 VDD83 VDD84 VDD85 VDD86 VDD87 VDD88 VDD89 VDD90 VDD91 VDD92 C120 L7 AC15 H18 B20 E21 H22 J23 H24 F26 N7 L9 V10 G13 K14 Y14 AB14 G15 J15 AA15 H16 K16 Y16 AB16 G17 J17 AA17 AC17 AE17 F18 K18 Y18 AB18 AD18 AG19 E19 G19 AC19 AA19 J19 F20 H20 K20 M20 P20 T20 V20 Y20 AB20 AD20 G21 J21 L21 N21 R21 U21 W21 AA21 AC21 F22 K22 M22 P22 T22 V22 Y22 AB22 AD22 E23 G23 L23 N23 R23 U23 W23 AA23 AC23 B24 D24 F24 K24 M24 P24 T24 V24 Y24 AB24 AD24 AH24 AE25 K26 P26 V26 GND GROUND LAYOUT: Place capacitor every 1-1.5" along VDD_CORE perimiter C238 A L28 R28 W28 AC28 AF28 AH28 C29 F2 H2 K2 M2 P2 T2 V2 Y2 AB2 AD2 AH2 B4 AH4 B6 G6 J6 L6 N6 R6 U6 AA6 AC6 AH6 F7 H7 K7 M7 P7 T7 V7 AB7 AD7 B8 G8 J8 L8 N8 R8 U8 W8 AC8 AH8 F9 H9 K9 M9 P9 T9 V9 Y9 AD9 B10 G10 J10 L10 N10 R10 U10 W10 AC10 AH10 F11 H11 K11 Y11 AB11 AD11 B12 G12 AA12 AC12 AH12 F13 H13 K13 Y13 AB13 AD13 AF17 G14 J14 AA14 AC14 AE14 D16 E15 K15 AB15 AD15 AH14 E16 G16 J16 AA16 AC16 AE29 AJ26 E18 F17 H17 K17 Y17 X_475P/0805 B VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS189 VSS190 VSS191 VSS192 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS223 VSS201 VSS202 VSS203 VSS204 VSS205 17 18 19 20 C VSS1 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS187 VSS188 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 17 18 19 20 D B2 AH20 AB21 W22 M23 L24 AG25 AG27 D2 AF2 W6 Y7 AA8 AB9 AA10 J12 B14 Y15 AE16 J18 G20 R20 U20 W20 AA20 AC20 AE20 AG20 AJ20 D21 F21 H21 K21 M21 P21 T21 V21 Y21 AD21 AG21 B22 E22 G22 J22 L22 N22 R22 U22 AG29 AA22 AC22 AG22 AH22 AJ22 D23 F23 H23 K23 P23 T23 V23 Y23 AB23 AD23 AG23 E24 G24 J24 N24 R24 U24 W24 AA24 AC24 AG24 AJ24 B25 C25 B26 D26 H26 M26 T26 Y26 AD26 AF26 AH26 C27 B28 D28 G28 F15 H15 AB17 AD17 B16 G18 AA18 AC18 D19 F19 H19 K19 Y19 AB19 AD19 AF19 J20 L20 N20 0A MS-7010 Last Revision Date: Tuesday, September 02, 2003 Sheet of 35 VCC3 CLKVCC3 CLKX1 FB3 C258 CPUCLK0_H C275 X_5P CPUCLK0_L C276 X_5P C297 10P X_120S/0805 CP4 104P C259 C255 104P 475P/0805 X1 CLKX2 14.318MHZ SEL_24 R194 10K C295 10P FS3 R179 10K FS2 R174 X_10K FS1 R176 X_10K FS0 R236 X_10K X_COPPER D U13 CLKVCC3 C313 104P C279 104P C311 104P CLKVCC3 R181 C C282 104P 10K C278 104P C280 104P VDDREF VDDPCI VDDPCI VDDPCI VDDCPU VDDCPU 10 47 15 20 34 39 GND GND GND GND GND GND 32 CLKVCC3 C277 104P 46 16 19 38 35 29 43 *FS0/REF0 FS1/REF1* FS2/REF2* X1 X2 48MHz/FS3** *ModeA/HTTCLK0 ~*ModeB/PCICLK7/HTTCLK1 ~PCICLK8/HTTCLK2 ~PCICLK9/HTTCLK3 PCICLK10 PCICLK0 PCICLK1 ~PCICLK2 ~PCICLK3 PD#* VDDREF AVDD48 VDDA 27 30 33 42 FS0 FS1 FS2 CLKX1 CLKX2 31 11 12 13 14 17 18 FS3 -SEL_66 HT_66_0 HT_66_1 HT_66_2 ~PCICLK_F PCICLK4 PCICLK5 23 21 22 24_48MHZ/SEL24_48#*~ 28 SDATA SCLK 26 25 CPUCLK8T0 CPUCLK8C0 41 40 CPUCLK8T1 CPUCLK8C1 37 36 ~PCICLK6 RESET# 24 44 C312 104P GND GND GND GND GND R235 R178 R195 48 45 ICS950403_SSOP48 SEL_24 22 22 22 SB_OSC14 AUD_CLK APICCLK R180 33 7 8 RN79 8P4R-22 SB_OSC14 16 AUD_CLK 21 APICCLK 17 3825.65 7089.39 3673.93 USBCLK_SB 15 1926.42 VCLK 17 GCLK_SLOT 14 7567.85 3576.26 GCLK_NB PCICLK6 PCICLK4 12 26 18 7522.82 10029.25 7036.71 VCLK C326 X_10P GCLK_SLOT C327 X_10P PCICLK3 18 7051.56 GCLK_NB C328 X_10P PCICLK1 PCICLK2 1394_PCLK SB_PCLK 18 18 20 17 7053.45 7068.48 10082.15 10075.8 USBCLK_SB C274 X_10P 26 5256.1 SIO48M C273 X_10P SB_OSC14 C305 X_10P APICCLK C272 X_10P SB_PCLK 1394_PCLK PCICLK2 PCICLK1 R193 R175 R197 R231 FS3 FS2 FS1 FS0 R242 HT_66_0 R196 RN81 8P4R-22 RN80 8P4R-22 33 VCLK GCLK_SLOT GCLK_NB PCICLK6 PCICLK4 PCICLK3 PCICLK1 PCICLK2 1394_PCLK SB_PCLK SIO48M SMBDATA1 SMBCLK1 SIO48M SMBDATA1 8,16,30 SMBCLK1 8,16,30 R191 R192 R239 R177 SPREAD -SEL_66 R243 15RST 15RST 22 10K CPUCLK0_H CPUCLK0_L MINI_PCLK D CPUCLK0_H CPUCLK0_L MINI_PCLK 19 FP_RST# 30,31 CLKVCC3 X_10K 10K 10K 10K 10K C CN25 9658.9 9645.87 7109.37 X_8P4C-10P 10K PCICLK4 C324 X_10P PCICLK6 C323 X_10P PCICLK3 C325 X_10P MINI_PCLK C315 X_10P B B Input Configuration FS3 FS2 FS1 FS0 PCI33 (MHz) 0 150 33.33 33.33 or 66.66 1 200.40 33.33 33.33 or 66.66 1 ModeA PCI33_HT66 (MHz) A Clock Generator Output CPU (MHz) 166.70 33.33 33.33 or 66.66 1 133.50 33.33 33.33 or 66.66 0 100.20 36.56 73.12 0 1 202 30.00 60.00 0 168.00 X1/6 X1/6 0 133.90 X1/6 X1/3 0 0 100.90 33.63 67.27 ModeB Pin7 0 HTTCLK0 HTTCLK1 HTTCLK0 HTTCLK0 1 HTTCLK0 SER_24 Pin28 Pin8 Pin11 HTTCLK2 PCICLK9 HTTCLK1 HTTCLK2 HTTCLK3 PCICLK7 PCICLK8 PCICLK9 HTTCLK1 PCICLK8 PCICLK9 A 24MHz 48MHz Micro Star Restricted Secret Title Rev Clock Synthesizer Document Number MICRO-STAR INT'L CO.,LTD No 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw 0A MS-7010 Last Revision Date: Tuesday, September 02, 2003 Sheet of 35 VDD_25_SUS R124 4,9 4.7K -MSWEA WP1 -MSWEA DDR_VREF 90 63 FETEN 167 MAA13 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10_AP A11 A12 A13 48 43 41 130 37 32 125 29 122 27 141 118 115 103 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 BA0 BA1 BA2 SCL SDA SA0 SA1 SA2 59 52 113 92 91 181 182 183 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 44 45 49 51 134 135 142 144 CK0(DU) CK0#(DU) CK1(CK0) CK1#(CK0#) CK2(DU) CK2#(DU) 16 17 137 138 76 75 NC5 NC(RESET#) 173 10 CKE0 CKE1 CAS# RAS# 21 111 65 154 MCKE0 MCKE1 -MSCASA -MSRASA DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 97 107 119 129 149 159 169 177 140 DR_MEMDM0 DR_MEMDM1 DR_MEMDM2 DR_MEMDM3 DR_MEMDM4 DR_MEMDM5 DR_MEMDM6 DR_MEMDM7 11 18 26 34 42 50 58 66 74 81 89 93 100 116 124 132 139 145 152 160 176 4,9 4,9 -DR_MDQS0 -DR_MDQS1 -DR_MDQS2 -DR_MDQS3 -DR_MDQS4 -DR_MDQS5 -DR_MDQS6 -DR_MDQS7 MAA[13 0] 9,10 9,10 9,10 9,10 9,10 9,10 9,10 9,10 MAA[13 0] 4,9 MEMBANKA0 4,9 MEMBANKA1 4,9 SMBCLK1 SMBDATA1 MEMCLK_H5 MEMCLK_L5 MEMCLK_H0 MEMCLK_L0 MEMCLK_H7 MEMCLK_L7 SMBCLK1 7,16,30 SMBDATA1 7,16,30 MEMCLK_H5 MEMCLK_L5 MEMCLK_H0 MEMCLK_L0 MEMCLK_H7 MEMCLK_L7 MCKE0 MCKE1 -MSCASA -MSRASA 4,9 4,9 4,9 4,9 4,9 4,9 4,9 4,9 4,9 4,9 VDD_25_SUS R132 4,9 -MSWEB Place 104p and 1000p Cap near the DIMM C29 104P DR_MEMDM[7 0] DR_MEMDM[7 0] 9,10 DR_MD0 DR_MD1 DR_MD2 DR_MD3 DR_MD4 DR_MD5 DR_MD6 DR_MD7 DR_MD8 DR_MD9 DR_MD10 DR_MD11 DR_MD12 DR_MD13 DR_MD14 DR_MD15 DR_MD16 DR_MD17 DR_MD18 DR_MD19 DR_MD20 DR_MD21 DR_MD22 DR_MD23 DR_MD24 DR_MD25 DR_MD26 DR_MD27 DR_MD28 DR_MD29 DR_MD30 DR_MD31 DR_MD32 DR_MD33 DR_MD34 DR_MD35 DR_MD36 DR_MD37 DR_MD38 DR_MD39 DR_MD40 DR_MD41 DR_MD42 DR_MD43 DR_MD44 DR_MD45 DR_MD46 DR_MD47 DR_MD48 DR_MD49 DR_MD50 DR_MD51 DR_MD52 DR_MD53 DR_MD54 DR_MD55 DR_MD56 DR_MD57 DR_MD58 DR_MD59 DR_MD60 DR_MD61 DR_MD62 DR_MD63 94 95 98 99 12 13 19 20 105 106 109 110 23 24 28 31 114 117 121 123 33 35 39 40 126 127 131 133 53 55 57 60 146 147 150 151 61 64 68 69 153 155 161 162 72 73 79 80 165 166 170 171 83 84 87 88 174 175 178 179 4.7K WP2 -MSWEB 90 63 DDR_VREF C21 X_102P 101 102 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DDR1 DDR400-CH VDDID 82 184 -MCS2 -MCS3 CS0# CS1# CS2# CS3# 157 158 71 163 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 14 25 36 56 67 78 86 47 FETEN 167 MAB13 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10_AP A11 A12 A13 48 43 41 130 37 32 125 29 122 27 141 118 115 103 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 BA0 BA1 BA2 SCL SDA SA0 SA1 SA2 59 52 113 92 91 181 182 183 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 44 45 49 51 134 135 142 144 CK0(DU) CK0#(DU) CK1(CK0) CK1#(CK0#) CK2(DU) CK2#(DU) 16 17 137 138 76 75 NC5 NC(RESET#) 173 10 CKE0 CKE1 CAS# RAS# 21 111 65 154 MCKE0 MCKE1 -MSCASB -MSRASB DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 97 107 119 129 149 159 169 177 140 DR_MEMDM0 DR_MEMDM1 DR_MEMDM2 DR_MEMDM3 DR_MEMDM4 DR_MEMDM5 DR_MEMDM6 DR_MEMDM7 WP(NC) WE# VREF NC2 NC3 NC4 VDDSPD -DR_MDQS0 -DR_MDQS1 -DR_MDQS2 -DR_MDQS3 -DR_MDQS4 -DR_MDQS5 -DR_MDQS6 -DR_MDQS7 -MCS0 -MCS1 DDR DIMM SOCKET 184 PIN DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 14 25 36 56 67 78 86 47 SLAVE ADDRESS = 1010000B Place 104p Cap near the DIMM 38 46 70 85 108 120 148 168 22 30 54 62 77 96 104 112 128 136 143 156 164 172 180 15 -MCS0 -MCS1 VREF NC2 NC3 NC4 184 157 158 71 163 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 101 102 CS0# CS1# CS2# CS3# WP(NC) WE# VDD_25_SUS SLAVE ADDRESS = 1010001B VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 B DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 -MCS2 -MCS3 4,9 4,9 D -DR_MDQS0 -DR_MDQS1 -DR_MDQS2 -DR_MDQS3 -DR_MDQS4 -DR_MDQS5 -DR_MDQS6 -DR_MDQS7 MAB[13 0] 4,9 C MEMBANKB0 4,9 MEMBANKB1 4,9 SMBCLK1 SMBDATA1 VDD_25_SUS MEMCLK_H4 MEMCLK_L4 MEMCLK_H1 MEMCLK_L1 MEMCLK_H6 MEMCLK_L6 MEMCLK_H4 MEMCLK_L4 MEMCLK_H1 MEMCLK_L1 MEMCLK_H6 MEMCLK_L6 4,9 4,9 4,9 4,9 4,9 4,9 B -MSCASB -MSRASB 4,9 4,9 DDR2 DDR400-CH 11 18 26 34 42 50 58 66 74 81 89 93 100 116 124 132 139 145 152 160 176 C 94 95 98 99 12 13 19 20 105 106 109 110 23 24 28 31 114 117 121 123 33 35 39 40 126 127 131 133 53 55 57 60 146 147 150 151 61 64 68 69 153 155 161 162 72 73 79 80 165 166 170 171 83 84 87 88 174 175 178 179 DDR DIMM SOCKET 184 PIN DR_MD0 DR_MD1 DR_MD2 DR_MD3 DR_MD4 DR_MD5 DR_MD6 DR_MD7 DR_MD8 DR_MD9 DR_MD10 DR_MD11 DR_MD12 DR_MD13 DR_MD14 DR_MD15 DR_MD16 DR_MD17 DR_MD18 DR_MD19 DR_MD20 DR_MD21 DR_MD22 DR_MD23 DR_MD24 DR_MD25 DR_MD26 DR_MD27 DR_MD28 DR_MD29 DR_MD30 DR_MD31 DR_MD32 DR_MD33 DR_MD34 DR_MD35 DR_MD36 DR_MD37 DR_MD38 DR_MD39 DR_MD40 DR_MD41 DR_MD42 DR_MD43 DR_MD44 DR_MD45 DR_MD46 DR_MD47 DR_MD48 DR_MD49 DR_MD50 DR_MD51 DR_MD52 DR_MD53 DR_MD54 DR_MD55 DR_MD56 DR_MD57 DR_MD58 DR_MD59 DR_MD60 DR_MD61 DR_MD62 DR_MD63 D VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDDQ0 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 DR_MD[63 0] 9,10 DR_MD[63 0] 82 38 46 70 85 108 120 148 168 22 30 54 62 77 96 104 112 128 136 143 156 164 172 180 15 SYSTEM MEMORY VDDID VDD_25_SUS VDDSPD VDD_25_SUS A R32 1KST A C35 104P DDR_VREF Micro Star Restricted Secret DDR_VREF Title R29 1KST Rev System Memory : DDR DIMM C22 104P Document Number MICRO-STAR INT'L CO.,LTD No 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw 0A MS-7010 Last Revision Date: Tuesday, September 02, 2003 Sheet of 35 DDR Terminations Ver:0B VTT_DDR_SUS VTT_DDR_SUS VTT_DDR_SUS RN43 8P4R-47 RN41 DR_MD38 DR_MD34 DR_MEMDM4 8P4R-47 DR_MD40 DR_MD39 DR_MD35 D R127 DR_MD59 47 4,8 MEMBANKA0 DR_MD23 MAA7 MAA9 MAA11 RN21 8P4R-47 MAA12 MAB7 MAB8 DR_MD22 RN20 8P4R-47 CN20 4,8 4,8 -MCS2 -MCS3 -MCS2 -MCS3 MAB13 MAA13 D 8P4C-22P CN5 DR_MD63 DR_MD58 DR_MD62 -DR_MDQS7 DR_MEMDM7 DR_MD57 DR_MD61 DR_MD56 RN65 RN62 8P4R-47 4,8 MEMBANKB0 8P4R-47 DR_MD60 DR_MD51 DR_MD55 DR_MD50 RN59 8P4R-47 DR_MD54 -DR_MDQS6 DR_MEMDM6 MAA13 RN56 MAB13 DR_MD53 DR_MD52 DR_MD49 -DR_MDQS4 DR_MD37 DR_MD33 DR_MD36 RN37 8P4R-47 MAB10 RN36 8P4R-47 8P4R-47 MAB0 MAA10 MAA0 RN35 8P4R-47 RN54 8P4R-47 MAA1 MAB1 MAB2 MAA2 RN34 8P4R-47 DR_MD48 DR_MD47 DR_MD46 DR_MD43 RN52 8P4R-47 DR_MD31 DR_MD27 DR_MD30 DR_MD26 RN33 8P4R-47 DR_MD42 DR_MEMDM5 -DR_MDQS5 -MCS0 RN50 8P4R-47 MAB3 MAA3 DR_MEMDM3 MAA4 RN31 8P4R-47 DR_MD32 4,8 MEMBANKB1 4,8 MEMBANKA1 DR_MD18 MAB9 DR_MEMDM2 MAB11 RN17 8P4R-47 RN13 8P4R-47 DR_MD11 DR_MD10 DR_MD15 DR_MD14 RN11 8P4R-47 DR_MEMDM1 DR_MD13 -DR_MDQS1 DR_MD12 RN9 8P4R-47 DR_MD9 DR_MD8 DR_MD3 DR_MD7 RN7 8P4R-47 DR_MD21 -DR_MDQS2 DR_MD17 MAB12 4,8 4,8 MCKE0 MCKE1 MAB1 MAA1 MAB3 MAA3 MAB2 MAA2 MAB6 MAA6 MAB4 MAA4 7 8P4C-22P CN13 8P4C-22P CN12 C DR_MD16 DR_MD20 8P4C-22P CN14 8P4R-47 RN15 MAB12 MAA12 MAB11 MAA11 C 8P4C-22P CN10 MAB8 MAA8 MAA5 MAB5 MAA0 MAA10 MAB0 MAB10 -MSCASB -MCS0 -MSCASA -MCS1 MAA9 MAB9 MAB7 MAA7 8P4C-22P CN15 8P4C-22P CN19 4,8 -MSCASB 4,8 -MCS0 4,8 -MSCASA 4,8 -MCS1 8P4C-22P CN7 B 4,8 -MCS0 4,8 -MCS2 4,8 -MCS3 4,8 -MCS1 4,8 -MSCASA 4,8 -MSWEB 4,8 -MSCASB 4,8 -MSWEA 4,8 -MSRASA 4,8 -MSRASB RN48 -MCS2 -MCS3 -MCS1 -MSCASA RN46 DR_MD41 -MSWEB -MSCASB DR_MD45 RN45 -MSWEA -MSRASA -MSRASB DR_MD44 8P4R-47 -DR_MDQS3 DR_MD25 MAB4 MAA6 8P4R-47 DR_MD29 DR_MD28 MAA5 MAA8 8P4R-47 DR_MD24 MAB6 MAB5 DR_MD19 RN29 RN27 RN24 8P4R-47 DR_MD2 DR_MD6 -DR_MDQS0 DR_MEMDM0 8P4R-47 DR_MD1 DR_MD5 DR_MD4 DR_MD0 RN5 RN2 1 B 8P4C-22P CN18 4,8 -MSRASB 4,8 -MSRASA 4,8 -MSWEA 4,8 -MSWEB 8P4R-47 -MSRASB -MSRASA -MSWEA -MSWEB 8P4C-22P CN16 4,8 4,8 4,8 4,8 8P4R-47 2 MEMBANKB1 MEMBANKA1 MEMBANKB0 MEMBANKA0 8P4C-22P CN4 8P4R-47 4,8 MCKE1 4,8 MCKE0 8P4C-22P A A MEMCLK_H5 MEMCLK_H4 MEMCLK_H7 MEMCLK_H6 MEMCLK_H1 MEMCLK_H0 R62 R60 R78 R77 R70 R71 120RST 10P 10P 10P 10P 10P 10P Micro Star Restricted Secret MEMCLK_L5 MEMCLK_L4 MEMCLK_L7 MEMCLK_L6 MEMCLK_L1 MEMCLK_L0 4,8 MEMCLK_L[7 0] 4,8 MEMCLK_H[7 0] 8,10 -DR_MDQS[7 0] 8,10 DR_MD[63 0] MEMCLK_L[7 0] DR_MD19 Document Number DR_MEMDM[7 0] 8,10 DR_MEMDM[7 0] MAB[13 0] MAA[13 0] 4,8 MAA[13 0] -DR_MDQS[7 0] Title Rev DDR Terminations Bank 4,8 MAB[13 0] MEMCLK_H[7 0] DR_MD[63 0] MICRO-STAR INT'L CO.,LTD No 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw 0A MS-7010 Last Revision Date: Tuesday, September 02, 2003 Sheet of 35 LAYOUT: Place on backside, evenly spaced around VTT fill DDR Terminations VDD_25_SUS LAYOUT: Locate close to Clawhammer socket VTT_DDR_SUS D C12 224P C114 C145 C180 C209 X_105P 105P X_105P 105P C69 C118 C152 C182 C215 X_105P 105P X_105P X_105P X_105P C79 C122 C158 C187 C27 105P X_105P 105P 105P 105P C124 C163 105P X_105P C X_105P 105P C140 C131 C129 X_105P 105P C126 X_105P 105P C123 C121 X_105P 105P C115 C110 C104 X_105P VTT_DDR_SUS GND VTT_DDR_SUS X_105P C13 C217 X_105P 105P C212 X_105P 105P C207 C204 X_105P 105P C198 C189 C181 X_105P 105P B C179 8P4R-10 DR_MD62 DR_MD58 DR_MD63 DR_MD59 C61 105P C97 X_105P 105P RN64 MD62 MD58 MD63 MD59 C206 105P C174 8P4R-10 DR_MD61 DR_MD57 DR_MEMDM7 -DR_MDQS7 C177 X_105P X_105P C137 105P C82 RN60 MD61 MD57 MEMDM7 -MDQS7 RN30 C108 105P 105P 8P4R-10 DR_MD29 DR_MD25 -DR_MDQS3 DR_MEMDM3 MD29 MD25 -MDQS3 MEMDM3 C72 105P 8P4R-10 DR_MD55 DR_MD51 DR_MD60 DR_MD56 105P C169 X_105P C75 RN57 105P X_105P MD55 MD51 MD60 MD56 X_105P C165 8P4R-10 DR_MD23 DR_MD19 DR_MD24 DR_MD28 RN26 C201 105P X_105P 8P4R-10 DR_MEMDM6 -DR_MDQS6 DR_MD54 DR_MD50 X_105P C171 C66 RN53 MEMDM6 -MDQS6 MD54 MD50 105P C130 105P 8P4R-10 DR_MD20 DR_MD16 -DR_MDQS2 DR_MD17 X_105P C100 105P RN18 MD20 MD16 -MDQS2 MD17 105P C44 C159 8P4R-10 DR_MD48 DR_MD49 DR_MD52 DR_MD53 VTT_DDR_SUS X_105P C11 VTT_DDR_SUS VDD_25_SUS C190 X_105P RN51 VTT_DDR_SUS VDD_25_SUS C167 C155 MD48 MD49 MD52 MD53 8P4R-10 DR_MD21 DR_MEMDM2 DR_MD18 DR_MD22 VTT_DDR_SUS VDD_25_SUS C128 X_105P 8P4R-10 DR_MD42 DR_MD43 DR_MD46 DR_MD47 GND VTT_DDR_SUS VDD_25_SUS C10 X_0.22uF {nopop} 105P RN49 C34 105P MD42 MD43 MD46 MD47 X_0.22uF {nopop} C148 8P4R-10 DR_MD45 DR_MD41 -DR_MDQS5 DR_MEMDM5 C220 D C96 C17 8P4R-10 DR_MD14 DR_MD15 DR_MD10 DR_MD11 8 RN23 MD21 MEMDM2 MD18 MD22 MD23 MD19 MD24 MD28 B RN16 RN47 MD45 MD41 -MDQS5 MEMDM5 8P4R-10 DR_MD35 DR_MD39 DR_MD40 DR_MD44 X_0.22uF {nopop} 105P MD14 MD15 MD10 MD11 RN44 X_0.22uF {nopop} C31 C57 C41 C MD35 MD39 MD40 MD44 VDD_25_SUS 8P4R-10 -DR_MDQS4 DR_MEMDM4 DR_MD34 DR_MD38 C170 X_105P 8P4R-10 DR_MD12 -DR_MDQS1 DR_MEMDM1 DR_MD13 RN42 -MDQS4 MEMDM4 MD34 MD38 8P4R-10 DR_MD32 DR_MD36 DR_MD33 DR_MD37 C18 8P4R-10 DR_MD7 DR_MD3 DR_MD8 DR_MD9 RN40 105P MD7 MD3 MD8 MD9 RN12 MD32 MD36 MD33 MD37 DR_MD26 DR_MD30 DR_MD27 DR_MD31 C52 8P4R-10 DR_MEMDM0 -DR_MDQS0 DR_MD2 DR_MD6 MD26 MD30 MD27 MD31 8P4R-10 105P RN10 DR_MD0 DR_MD4 DR_MD5 DR_MD1 RN32 C60 MEMDM0 -MDQS0 MD2 MD6 RN14 MD12 -MDQS1 MEMDM1 MD13 8P4R-10 X_105P MD0 MD4 MD5 MD1 RN8 X_0.22uF {nopop} C39 106P/1206 VTT_DDR_SUS C33 LAYOUT: Place alternating caps to GND and VDD_2.5_SUS in a single line along VTT island GND LAYOUT: Add 100pF and 1000pF on VTT fill near Clawhammer and near DIMMs (both sides) 8,9 DR_MD[63 0] A MD[63 0] MEMDM[7 0] 8,9 DR_MEMDM[7 0] VTT_DDR_SUS DR_MD[63 0] C141 X_102P C26 C232 475P/0805 224P C37 X_475P/0805 102P C203 X_475P/0805 C51 C175 475P/0805 102P C138 475P/0805 -DR_MDQS[7 0] C228 -MDQS[7 0] C229 -MDQS[7 0] 8,9 -DR_MDQS[7 0] VTT_DDR_SUS MD[63 0] 224P VTT_DDR_SUS GND A GND GND MEMDM[7 0] Micro Star Restricted Secret DR_MEMDM[7 0] Title Rev DDR Terminations Bank Document Number MICRO-STAR INT'L CO.,LTD No 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw 0A MS-7010 Last Revision Date: Tuesday, September 02, 2003 Sheet 10 of 35 FOR 9760 SHORT CMEDIA 9739A AC'97 CODEC SPDIFO Hi = 24.576MHZ LO= 14.318MHZ VCC3 +5VR R305 X_4.7K R304 C392 C393 C1U16Y0805 C1U16Y0805 SROUT_R SROUT_L SROUT_R 22 SROUT_L 22 VCC3 R307 R295 X_10/0805 X_300RST SPDIFI 4.7K AUD_CLK CE2 X_100UF/16V-T VCC3 C381 16 AC_SDOUT 16 AC_BITCLK 16 AC_SDIN0 R291 22 R288 22 16 AC_SYNC 16 AC_RST# C368 X_10P DVDD1 XTL_IN XTL_OUT DVSS1 SDATA_OUT BIT_CLK DVSS2 SDATA_IN DVDD2 SYNC RESET# PC_BEEP C373 0.1U25Y R320 14.3K 1% LOUT_R L_OUT_R L_OUT_L NC STEREO MIC NC CAP2 NC AFILT2 AFILT1 VREFOUT VREF AVSS1 AVDD1 13 14 15 16 17 18 19 20 21 22 23 24 C376 X_10P LOUT_L 36 35 34 33 32 31 30 29 28 27 26 25 LOUT_R 22 LOUT_L 22 C369 C366 102P 102P R310 4.7K C362 225P/0805 R308 4.7K C361 225P/0805 R312 4.7K R313 4.7K GG HH R315 11K 1% R321 11K 1% VREFOUT CT15 +5VR C367 0.1U25Y 475P/0805 C372 1U10Y CB21 0.1U25Y CMI9761A-L C363 C10U10Y0805 R279 4.7K C364 C10U10Y0805 R274 4.7K C377 LINE_IN_R 22 LINE_IN_L 22 R278 4.7K R286 FMIC_R VIDEO_IN_L VIDEO_IN_R R326 14.3K 1% FMIC_R R273 4.7K AUXR R302 X_300RST CB23 0.1U25Y U18 PHONE_IN AUX-L AUX-R NC NC CD-L CD-GND_REF CD-R MIC1 NC L-IN-L L-IN-R 10 11 12 X_1M AUXL 22 +5VR 48 47 46 45 44 43 42 41 40 39 38 37 C382 X_22P X_24.576MHZ R293 22 SPDIFI 0.1U25Y C375 X_22P X3 22 22 HH R325 11K 1% GG BA CE +5VR NC NC NC NC NC NC AVSS2 NC NC NC AVDD2 MONO_OUT FMIC C1U16Y0805 C379 FMIC 5VSB 22 C374 2.7K +12V 472P R265 X_100P G Q27 SI2303 4.7K D R264 X_4.7K VREFOUT C360 R275 +12V MIC C1U16Y0805 C351 MIC 22 472P X_100P 1N5817S C385 104P CP18 VIN VOUT + R323 100RST EC32 ELS10/16-B C399 X_104P +5VR U19 YLT1087S-0.8A D12 C355 2.7K FOR EMI D11 1N5817S AUDIO CODE REGULATORS R263 X_8.2K ADJ R324 11K 1% SPDIFO LFE-OUT 22 CEN-OUT 22 S BA LFE-OUT CEN-OUT CE R317 14.3K 1% C1U16Y0805 C1U16Y0805 + R316 14.3K 1% C391 C390 L9 301S JVIDEO1 VIDEO_IN_R C396 1U16Y0805 VIDEO_IN_L C397 1U16Y0805 R322 300RST CP19 TV-CARD R314 47K R311 47K CP20 C267 102P Micro Star Restricted Secret Title Rev CM9761 Audio codec Document Number 0A MS-7010 MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw Last Revision Date: Wednesday, September 03, 2003 Sheet 21 35 of SPEAKER OUT CIRCUIT channel Audio Connector AUDIO1A SPKR_R LOUT_R FRONT_R 10 220UF/10V 21 SROUT_R R318 FRONT_L 10 220UF/10V R309 X_4.7K AUDIO_6CH 21 SROUT_L 17 21 CEN-OUT 10 SB_OUT C394 X_102P 19 LOUT_L + 21 AUDIO1B R299 X_4.7K CE1 SPK 15 SPKR_L C388 X_102P 14 R300 21 + CE3 AUDIO_6CH 11 12 +5VR 21 LFE-OUT CN23 R301 8.2K +5VR JAUDIO1 21 FMIC FRONT_R FRONT_L MIC_IN MIC_BIAS FRONT_R HP_ON FRONT_L GND VCC SPEAKER_R KEY SPEAKER_L 10 LINE_IN_R LINE_IN_L 13 18 AUDIO_6CH CN24 8P4C-102P SPKR_L 21 LINE_IN_R 21 LINE_IN_L 8P4C-102P LINE_IN_R 20 R182 47K R185 47K 21 23 LINE_IN_L X_2.7K MIC VCC R117 J3 C144 1 R82 R81 100R 220 SPDIFO 21 C0.1U25Y SPDIF OUT C143 X_180P 10 12 10 12 R120 2.2K R131 2.2KR BH2X6(2)_yellow 22K RN63 VCC 8P4R-2.2K KBGND RXD GP5 GP7 GP1 TXD 26 26 26 26 26 GP3 26 GP0 GP2 GP6 GP4 26 26 26 26 IOGND IOGND KBGND J1 11 11 AUDIO1E C239 X_102P C240 X_102P YJ104-B AUDIO1D C/W_OUT 28 16 AUDIO_6CH AUXR 21 26 27 21 R169 8.2K SR_OUT 24 22 AUDIO_6CH 25 R173 +5VR JAUDIO2 AUXL AUDIO1C SPKR_R MEDION-FAUDIO 21 CEN_OUT R75 IOGND IOGND CN22 8P4C-0.01U50X RN66 8P4R-1MR C151 1 J2 C205 C0.1U25Y R87 140RST KBGND + VCC3 10/0805 EC9 100UF/16V-T SPDIFI 21 C0.1U25Y C150 X_180P R86 150RST JACK-RCA2Pspring_black KBGND SPDIF IN Micro Star Restricted Secret Title Rev Audio connector Document Number 0A MS-7010 MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw Last Revision Date: Wednesday, September 03, 2003 Sheet 22 35 of ATA 33/66/100 Connector 16 PDD[15 0] R158 HDDRST# IDE1 33 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 PDD_7 PDD_6 PDD_5 PDD_4 PDD_3 PDD_2 PDD_1 PDD_0 PDREQ_R PDIOW#_R PDIOR#_R PIORDY_R PDDACK#_R IRQ14_R PDA1_R PDA0_R PDCS#1_R IDEACTP# 31 IDEACTP# 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 RN77 PDD[15 0] 16 16 SDA0 SDA2 16 IRQ14 SDA0 SDA2 PDD9 IRQ14 SDIOW# SDDACK# IRQ15 SDA1 RN73 SDA0_R SDA2_R PDD_9 IRQ14_R SDIOW#_R SDDACK#_R IRQ15_R SDA1_R 16 PDREQ 16 PDIOR# 16 PIORDY 16 PDDACK# PDREQ PDIOR# PIORDY PDDACK# PDD14 PDD15 PDD0 PDIOW# PDD_8 PDD_9 PDD_10 PDD_11 PDD_12 PDD_13 PDD_14 PDD_15 SDD[15 0] 16 SDIOW# 16 SDDACK# 16 IRQ15 16 SDA1 PDREQ_R PDIOR#_R PIORDY_R PDDACK#_R PDD_14 PDD_15 PDD_0 PDIOW#_R 22 22 PDCS#1_R PDCS#3_R 8P4R-22 RN76 16 SDD[15 0] 30 HDDRST# 8P4R-22 PRIMARY IDE CONN D RN74 16 PDIOW# D 8P4R-22 8P4R-22 16 16 SDCS#1 SDCS#3 SDCS#1 SDCS#3 R245 R241 22 22 SDCS#1_R SDCS#3_R 16 16 PDCS#1 PDCS#3 PDCS#1 PDCS#3 R206 R207 RN82 16 SDIOR# SDD12 SDD14 SDD15 SDIOR# RN71 SDD_12 SDD_14 SDD_15 SDIOR#_R PDD12 PDD2 PDD13 PDD1 PDD_12 PDD_2 PDD_13 PDD_1 PDD_10 PDD_4 PDD_11 PDD_3 PDD_7 PDD_8 PDD_6 PDD_5 8P4R-22 8P4R-22 ATADET0 PDA2_R PDCS#3_R RN86 SDD7 SDD8 SDD9 SDD13 YJ220-Y-1 RN75 SDD_7 SDD_8 SDD_9 SDD_13 PDD10 PDD4 PDD11 PDD3 8P4R-22 8P4R-22 RN78 RN85 SDD4 SDD6 SDD10 SDD11 C SDD_4 SDD_6 SDD_10 SDD_11 PDD7 PDD8 PDD6 PDD5 8P4R-22 SIORDY SIORDY SDD5 SDD0 RN72 SIORDY_R SDD_5 SDD_0 16 16 16 IDE2 33 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 SDREQ_R SDIOW#_R SDIOR#_R SIORDY_R SDDACK#_R IRQ15_R SDA1_R SDA0_R SDCS#1_R IDEACTS# 31 IDEACTS# 16 R160 SDD_7 SDD_6 SDD_5 SDD_4 SDD_3 SDD_2 SDD_1 SDD_0 B 8P4R-22 RN84 SECONDARY IDE CONN HDDRST# C PDA2 PDA0 PDA1 PDA2 PDA0 PDA1 PDA2_R PDA0_R PDA1_R 8P4R-22 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 8P4R-22 SDD_8 SDD_9 SDD_10 SDD_11 SDD_12 SDD_13 SDD_14 SDD_15 RN88 16 SDREQ SDREQ SDD2 SDD1 SDD3 SDREQ_R SDD_2 SDD_1 SDD_3 16 16 ATADET1 ATADET0 ATADET1 ATADET0 8P4R-22 B ATADET1 SDA2_R SDCS#3_R YJ220-Y-1 VCC A IDEACTP# R92 10K ATADET0 R91 15K IDEACTS# R97 10K ATADET1 R100 15K PIORDY_R R90 4.7K PDREQ_R R199 5.6K SIORDY_R R103 4.7K SDREQ_R R115 5.6K IRQ14_R R94 8.2K PDD_7 R233 4.7K IRQ15_R R102 8.2K SDD_7 R156 4.7K A Micro Star Restricted Secret Title Rev ATA 33/66/100 Connector Document Number Near SB < 1"( or Damping Rs ) 0A MS-7010 MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw Last Revision Date: Wednesday, September 03, 2003 Sheet of 23 35 POWER CIRCUIT FOR USB PORT 4,5,6,7 POWER CIRCUIT FOR USB PORT 0,1,2,3 USBVCC1 5V_STR1 + R110 47K EC10 EL470/10V-3.5 C153 X_105P + 2.6A-miniSMDC200-S USBVCC2 F3 2.6A-miniSMDC200-S FS1 5V_STR R298 47K C380 C387 X_105P X_104P EC31 EL470/10V-3.5 D D 15 USB_OC#0 15 USB_OC#4 PGND R111 56K C318 104P NEAR USB CONNECTOR REAR USB PORT R294 56K NEAR USB CONNECTOR FRONT USB PORT 15 15 15 15 USBN3 USBP3 USBN2 USBP2 USBN3 USBP3 USBN2 USBP2 5 USB_D3USB_D3+ USB_D2USB_D2+ X_CMC-L02-9007030 C UP DOWN 15 16 17 18 19 20 21 22 L11 USBVCC2 15 15 15 15 I1394+USBx2-D20-BK USBN5 USBP5 USBN4 USBP4 USBN5 USBP5 USBN4 USBP4 USB_D5USB_D5+ USB_D4USB_D4+ JUSB1 X_CMC-L02-9007030 C447 X_220P I1394_USB1A C446 X_220P USBVCC1 L7 C317 104P PGND CN21 CP13 C USB_OC#3 JUSB NEAR USB CONNECTOR X_8P4C-47P CP12 USBVCC2 10 VCC VCC USB0USB1USB0+ USB1+ GND GND KEY USBOC PGND PGND USBVCC1 LAN_USB1A B 15 15 15 15 USBN1 USBP1 USBN0 USBP0 USBN1 USBP1 USBN0 USBP0 USB_D1USB_D1+ USB_D0USB_D0+ UP DOWN 21 22 23 24 25 26 27 28 B L12 USBVCC2 15 15 15 15 LAN_USB+RJ45-TR USBN7 USBP7 USBN6 USBP6 USBN7 USBP7 USBN6 USBP6 USB_D7USB_D7+ USB_D6USB_D6+ X_CMC-L02-9007030 PGND CN17 VCC VCC USB0USB1USB0+ USB1+ GND GND KEY USBOC 10 USB_OC#3 JUSB X_8P4C-47P USBVCC2 JUSB2 PGND NEAR USB CONNECTOR PGND A A Micro Star Restricted Secret Title Document Number Rev Rear USB Port MS-7010 MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw 0A Last Revision Date: Wednesday, September 03, 2003 Sheet 24 35 of 3VDUAL Fast Ethernet 1-Port PHY C234 R99 R98 TXDTXD+ 49.9RST 49.9RST 104P near connector 3VDUAL R148 R153 RXDRXD+ D 49.9RST 49.9RST 11 RXD0/PHYAD4 RXD1/PHYAD3 RXD2/PHYAD2 RXD3/PHYAD1 RXDV/BYPOSC RXER/ISO RXCLK 10 RXC CRS COL MII_MDC MDIO 22 21 CRS/RPTR COL/SYMB MDC MDIO 23 12 47 31 42 38 VDDRX VDDTX VDDPLL TXC RXD0 RXD1 RXD2 RXD3 RXDV RXER D C237 103P LAN_USB1B U10 RXRX+ 32 33 RXDRXD+ TXTX+ 40 41 TXDTXD+ LED0/TEST# LED1/SPD100 LED2/DUPLEX LED3/NWAYEN 26 27 28 29 INT#/PHYAD0 REXT SD/FXEN PD# RST# 25 37 34 30 48 XI 46 XI XO 45 XO 17 18 13 10 14 11 15 12 16 19 20 RXDRXD+ TXDTXD+ ACT_LED SP_100 R154 3V_LAN RN67 8P4R-10K 3VDUAL 3VDUAL FB2 6.49KST 80S CP2 MII_RST# AMBER+ AMBERNC NC RDN NC NC RDP TDN TDP GREEN+ GREENLAN_USB+RJ45-TR WITH 104P CAP C162 0.1U25Y C157 0.1U25Y 17 C PGND C260 X_106P/0805 Y1 GNDRX GNDTX GNDTXC GNDPLL 15 GNDOSC MII_MDC TXCLK GND GND GNDC 17 TXD0 TXD1 TXD2 TXD3 TXEN TXER 35 43 39 36 C 17 18 19 20 16 14 44 MII_TXD0 MII_TXD1 MII_TXD2 MII_TXD3 MII_TXEN VDD VDD VDDC 17 17 17 17 17 MII_TXD0 MII_TXD1 MII_TXD2 MII_TXD3 MII_TXEN VDDOSC 24 13 near chip C260 should not be populate for VT8237CD 25MHZ C249 22P VT6103 C250 22P 3VDUAL 17 17 17 17 B MII_RXD3 MII_RXD2 MII_RXD1 MII_RXD0 17 MII_RXDV 17 MII_RXCLK 17 MII_RXER 17 MII_TXCLK 17 MII_COL 17 MII_CRS MII_RXD3 MII_RXD2 RN68 MII_RXD1 8P4R-33 MII_RXD0 RXD3 RXD2 RXD1 RXD0 MII_RXDV MII_RXCLK R157 R155 33 33 RXDV RXCLK MII_RXER R151 33 RXER MII_TXCLK MII_COL R144 R143 33 33 TXCLK COL MII_CRS R142 33 CRS C236 C231 C244 C252 C243 C247 EC12 104P 104P 104P 104P 104P 104P 104P EEPROM B U17 17 MII_EEDI 17 MII_EECK 17 MII_EECS# MII_EEDI DI DO MII_EECK SK VCC MII_EECS# CS NC GND NC MII_EEDO MII_EEDO 17 VCC3 93C46S 17 MII_MDIO MII_MDIO R164 33 MDIO A A Micro Star Restricted Secret Title Rev Fast Ethernet / 1-Port PHY Document Number MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw 0A MS-7010 Last Revision Date: Wednesday, September 03, 2003 Sheet 25 35 of Super I/O VCC3 VCC 5VSB VBAT FLOPPY DISK HEADER 17 LPC_REQ# 17 LPC_FRAME# C 26 25 24 23 22 22 22 22 22 22 22 22 22 22 GP0 GP1 GP4 GP5 GP2 GP3 GP6 GP7 TXD RXD 125 123 128 121 126 124 127 122 120 119 GPBX/GP13 GPAY/GP15 GPAS1/GP10 GSAS2/GP17 GPAX/GP12 GPBY/GP14 GPBS1/GP11 GPBS2/GP16 MSO/GP50 MSI/GP51 27 27 27 VREF VTIN2 VTIN1 27 27 27 27 -5VIN -12VIN +12VIN VAVCC VCC3 VCORE 106 103 104 112 111 110 109 105 108 107 VREF VTIN2 VTIN1 AGND -5VIN -12VIN +12VIN AVCC +3.3VIN VCORE 116 114 115 113 FANPWM1 FANIO1 FANPWM2 FANIO2 XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7 94 93 92 91 89 88 87 86 XD0/GP20 XD1/GP21 XD2/GP22 XD3/GP23 XD4/GP24 XD5/GP25 XD6/GP26 XD7/GP27 XA0 XA1 XA2 XA3 XA4 XA5 XA6 XA7 XA8 XA9 XA10 XA11 XA12 XA13 XA14 XA15 XA16 XA17 XA18 85 84 83 82 81 80 79 78 77 76 74 73 72 71 70 69 68 67 66 XA0/GP30 XA1/GP31 XA2/GP32 XA3/GP33 XA4/GP34 XA5/GP35 XA6/GP36 XA7/GP37 XA8/GP40 XA9/GP41 XA10/GP42 XA11/GP43 XA12/GP44 XA13/GP45 XA14/GP46 XA15/GP47 XA16/GP55 XA17/GP56 XA18/GP57 B 27 XA[17 0] XA[17 0] XA18 99 45 75 102 VBAT DRVDEN0 INDEX# MOA# DSB# DSA# MOB# DIR# STEP# WRDATA# WE# TRACK0# WP# RDDATA# HEAD# DSKCHG# 10 11 12 13 14 15 16 DRVDEN0 INDEX# MOA# DSB# DSA# MOB# DIR# STEP# WRDATA# WE# TRACK0# WP# RDDATA# HEAD# DSKCHG# 10 12 14 16 18 20 22 24 26 28 30 32 34 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 SLCT PE BUSY ACK# SLIN# INIT# ERR# AFD# STB# 42 41 40 39 38 37 36 35 29 30 31 32 34 43 33 44 46 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 IRRX CIRRX IRTX 64 100 65 DCDA# DSRA# SINA RTSA# SOUTA CTSA# DTRA# RIA# DCDB# DSRB# SINB RTSB# SOUTB CTSB# DTRB# RIB# 53 48 51 49 52 47 50 54 62 56 59 57 61 55 58 63 PD[7 0] SIO CLKIN PME# CASEOPEN# BEEP OVT#/SMI# MEMW#/GP52 MEMR#/GP53 ROMCS#/GP54 18 60 90 27,30 VSB LAD0 LAD1 LAD2 LAD3 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 XD[7 0] XD[7 0] LRESET# LCLK SERIRQ LDRQ# LFRAME# 17 17 17 17 27 FANPWM1 27 FANIO1 27 28 19 21 20 27 VCC VCC VCC 12,20,30 PCIRST1# PCICLK6 16 SERIRQ 4.7K FDD1 U9 L6 301S 28 D YJ217-C-1 VCC R101 SOUTB RSLCT RPE RBUSY RACK# RSLIN# RINIT# RERR# RAFD# RSTB# 28 28 28 28 28 28 28 28 28 DCDA# DSRA# SINA RTSA# SOUTA CTSA# DTRA# RIA# 28 28 28 28 28 28 28 28 4.7K Power-on strap, enable 48MHz C IRRX IRTX SOUTB 17 98 101 118 117 97 96 95 PD[7 0] 11 13 15 17 19 21 23 25 27 29 31 33 SIO48M CHASISS BEEP 27 27 MEMW# MEMR# ROMCS# 27 27 27 B PCI_PME# 16,18,19,20 THRM# MEMW# MEMR# ROMCS# 16 VSS VSS VSS R285 D VCC3 22 VCC3 W83697HF-VB VBAT Distribute near the VCC power pin of the LPC VCC C185 C221 104P VCC3 VCC 5VSB C218 105P 104P C223 A C216 104P C298 104P C195 104P A 104P Micro Star Restricted Secret Title Rev Winbond W697HF Document Number MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw 0A MS-7010 Last Revision Date: Wednesday, September 03, 2003 Sheet of 26 35 Hardware Monitor SYSTEM ROM VTIN2 26 R138 VREF L8 X_08S/0805 VCC D 10KST YT103SC-1N SMD R136 VREF THERMDA_CPU 30KST +12V -12V -5V R135 232KST R125 VAVCC 26 26 +12VIN 26 -12VIN 26 -5VIN 26 26,30 120KST XA18 XA18 R130 12 11 10 27 26 23 25 28 29 30 R137 10KST A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 D0 D1 D2 D3 D4 D5 D6 D7 13 14 15 17 18 19 20 21 26 XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7 D VCC C264 104P R139 VCC 32 CE# OE# PGM# GND 22 24 31 16 C248 104P ROMCS# MEMR# MEMW# CB10 106P/0805 ROMCS# MEMR# MEMW# 26 26 26 VCC 4.7K R126 56KST C XD[7 0] U11 XA0 XA1 XA2 XA3 XA4 XA5 XA6 XA7 XA8 XA9 XA10 XA11 XA12 XA13 XA14 XA15 XA16 XA17 C222 104P CP3 XD[7 0] XA[17 0] THERMDA_CPU VTIN1 28KST VAVCC XA[17 0] CPU Thermal R129 10K R140 26 RESVD SYSTEM Thermal RT1 BIOS-SOCKET R128 56KST C VCC RN58 8P4R-4.7K VREF VREF 7 XD3 XD2 XD1 XD0 XD7 XD6 XD5 XD4 26 8 RN55 8P4R-4.7K ROMCS# MEMR# MEMW# RN61 8P4R-4.7K B B VCC VBAT +12V CPU FAN 2.2K S R9 R18 X_0_0805 D1 1N4148S A G R13 4.7K D FANIO1 470 26 BEEP 26 C20 104P R31 10K A Micro Star Restricted Secret YJ103-BO + Title EC2 E47U/16V D2 VCC Rev Hardware Monitor Document Number SM5817S 0A MS-7010 MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw 31 C Q23 E2N3904S 27K CFAN1 A 26 FANPWM1 26 B R28 Q1 SI2303 Q2 NDS7002AS ALARM CHASISS 1K R15 R172 10K R123 2M C R5 Last Revision Date: Wednesday, September 03, 2003 Sheet 27 35 of RACK# RBUSY RPE RSLCT 26 26 26 26 RINIT# RSLIN# RSTB# RAFD# PD[7 0] RACK# RBUSY RPE RSLCT RINIT# RSLIN# RSTB# RAFD# PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD[7 0] 7 RN25 8P4R-33 8 PRND3 PRND2 PRND1 PRND0 PRND0 PRND1 PRND2 PRND3 PRND4 PRND5 PRND6 PRND7 C 9 PRND7 PRND6 PRND5 PRND4 A VCC 26 26 C74 26 X_104p 1N4148S RN19 10P8R-4.7K RTSA# DTRA# SOUTA RTSA# DTRA# SOUTA VCC RIN1 RIN2 RIN3 RIN4 RIN5 V+ ROUT1 ROUT2 ROUT3 ROUT4 ROUT5 19 18 17 14 12 16 15 13 11 DIN1 DIN2 DIN3 GND DOUT1 DOUT2 DOUT3 V- 10 RIA# CTSA# DSRA# SINA DCDA# RIA# CTSA# DSRA# SINA DCDA# NRTSA NDTRA NSOUTA 26 26 26 26 26 NDCDA# NSINA NSOUTA NDTRA -12VC -12V 10 D5 1N4148S COM1 COM-D9-GN +12VC +12V D4 1N4148S C346 RN28 10P8R-4.7K NDSRA# NRTSA NCTSA# NRIA# D -12VC 75232-1 KBGND C117 104P 104P C92 X_104P 10 CN2 NRTSA NDSRA# NCTSA# NRIA# CN3 EX_8P4C-180P RN22 8P4R-33 For EMI C 4.7K 20 NDCDA# NSOUTA NSINA NDTRA EX_8P4C-180P L5 X_80S/0805 1CP1 CP15 CP14 2 KBGND KBGND RSLCT RPE RBUSY RACK# RERR# RAFD# RSTB# RSLIN# CN11 8P4C-180P PRND0 PRND1 PRND2 PRND3 CN9 8P4C-180P PRND4 PRND5 PRND6 PRND7 CN8 8P4C-180P KBGND RSTB# PRND0 PRND1 PRND2 PRND3 PRND4 PRND5 PRND6 PRND7 RACK# RBUSY RPE RSLCT 10 11 12 13 C119 180P RINIT# C KBGND CN6 8P4C-180P 51 26 26 26 26 26 R73 RERR# RERR# NRIA# NCTSA# NDSRA# NSINA NDCDA# D6 RAFD# RERR# RINIT# RSLIN# 14 15 16 17 18 19 20 21 22 23 24 25 48 52 D VCC 11 LPT / COM PORTS 26 +12VC U4 10 LPT1 N51-25F0041-F02 KBGND KBGND B B KBGND Keyboard/Mouse Ports STACKED PS2 CONNECTOR USBVCC1 JKBMS1 15 MSDAT# 15 MSCLK# 15 KBDAT# 15 KBCLK# MSDAT# L1 301S MSCLK# L3 301S XMSCLK1 KBDAT# L2 301S XKBDAT1 KBCLK# L4 301S XKBCLK1 XMSDAT1 11 12 10 MS C2 C1 X_39P X_104P KBGND KBGND KB USBVCC1 A MSDAT# KBDAT# MSCLK# KBCLK# YMD12P-1 CN1 CP11 RN1 R12 330 XKBCLK1 XMSCLK1 XKBDAT1 XMSDAT1 8P4R-4.7K KBGND A Micro Star Restricted Secret Title 8P4C-180P KBGND KBGND Rev LPT / COM Port Document Number MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw 0A MS-7010 Last Revision Date: Tuesday, September 02, 2003 Sheet 28 35 of CHOK3 K8 Voltage Regular Module 1.1uH/25A VDD_12_VRM +12V + C4 CT1 EL1500/16V X_39p/50V CT9 EL1500/16V D CT12 EL1500/16V CT2 EL1500/16V C3 475P/1206-16V C160 475P/1206-16V +12V D VCC 16 VID4 VID3 VID2 VID1 VID0 PGOOD GND GND GND PWM1 ISEN1 18 15 20 21 ISEN1 R2 3KST 154KST FS_ISL 23 FS/DIS PWM2 ISEN2 19 17 ISEN2 R1 3KST 10KST OFS OFS OVP COMP1 C23 C24 22P 562P COMP FB_ISL VCC R20 270K VDIFF IDROOP 12 11 R34 51RST GND R33 51RST C6 104P L_G1 PWM1 COMP FB L_G1 R80 X_2.2 Q10 06N03 L_G1A G C132 X_102P VDIFF IDROOP CB4 105P/0805 PBT2 R22 5.1/0805 RGND 14 R17 2.2/0805 U3B VDD_P1 13 0.8u-20% Q11 06N03 L_G1A G S R72 0/0805 R23 VSEN VCORE CHOK2 D GND Q13 09N03/DPACK PHASE1 CB1 105P/0805 U_G2 BOOT2 10 PHASE2 PVCC CB3 105P/0805-25V U_G2 BOOT2 R7 4.7 C U_G2A G Q4 09N03/DPACK C7 104P CHOK1 PHASE2 PGND R4 X_2.2 Offset Adjustment COREFB_H VCORE 13 G +12V R25 1KST R24 Droop Compensation 10 R6 4.7 PWM2 PWM2 L_G2 L_G2A G L_G2 R41 0/0805 HIP6602B_#B Q6 06N03 L_G2A C8 X_102P 0.8u-20% Q7 06N03 G S R27 C BOOT1 D R14 U_G1A U_G1 S C55 X_104P 30 PG_VCORE EN 22 R3 10K VCC PWM1 24 VID4 VID3 VID2 VID1 VID0 PG_VCORE VID[4 0] PHASE1 R88 2.2/0805 12 11 D VCC U2 ISL6569CB I32-6569B02-I11 VCORE_EN# 30 VCORE_EN# CB2 105P/0805-25V U_G1 BOOT1 S R8 4.7K VCC D C9 X_104P 14 S VDD_P0 S VCC PBT1 U3A HIP6602B_#A I33-6602B03-I11 D R10 5.1/0805 D CB5 105P/0805 OFS : Voltage up offset , 1K Ohm =10mV COREFB_L 0.8V~1.55V/42A VCORE R619 ORIGNAL 154KST R11-1543T13-Y01 POWER FREQENCY ADIUSTING 300KRST R11-0304T13-Y01 CT3 1500U/6.3V CT5 1500U/6.3V CT6 1500U/6.3V CT7 1500U/6.3V B B VID4 VID3 VID2 VID1 VID0 A Vout VID4 VID3 VID2 VID1 VID0 Vout 1 1 0.800 1 1.200 1 1 0.825 1 1.225 1 0 0.850 1 0 1.250 1 1 0.875 1 1.275 1 0.900 1 1300 1 0 0.925 0 1.325 1 0 0.950 0 1.350 1 1 0.975 0 1 1.375 1 1.000 0 1 1.400 1 1.025 0 1 1.425 1 0 1.050 0 0 1.450 0 1 1.075 0 1 1.475 0 1.100 0 1.500 0 1.125 0 0 1.525 0 0 1.150 0 0 1.550 1 1 1.175 1 1 Shutdown CT10 1500U/6.3V CT11 1500U/6.3V CT13 1500U/6.3V CT8 1500U/6.3V MOSFET Heat-Sink 60MIL JPW1 +12V C178 12V GND 12V GND A ATX12V-NPEG 104P Micro Star Restricted Secret Title Near to Vcore Input-Chock ( CHOK1 ) Rev K8 CORE POWER Document Number MICRO-STAR INT'L CO.,LTD No 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw 0A MS-7010 Last Revision Date: Tuesday, September 02, 2003 Sheet 29 of 35 5VSB VSUS2_5 330 31 3VSB MODE SELECT D 3VDLDEC# DUAL MOSFET PULL LOW SINGLE MOSFET VCC3 3VDUAL X_1KR R21 4.7K 3VDLDEC# Q26 2N3904S THESE OUTPUT AND INPUT PIN MUST BE PULL HIGH R58 4.7K R57 10K C68 X_102P C76 X_102P 5VSB 330 X_1KR R161 C86 + 5V_STR EC21 X_1000U/6.3V NN-P07D03LV_SO8 EXTRAM Q20 2N3904S VDIMM LINEAR OR PWM SELECT 4.7K Q28 X_222P 5VSB R55 EXTRAM 10K PULL LOW PWM REGULATOR VCC R53 PLED2 5VSB Q3 R159 31 D CPU PWR_GD OUTPUT CHIP PWR_GD OUTPUT I2C BUS I2C BUS CONNECT TO SOUTH BRIDGE RSMRST# SIGNAL SOUTH BRIDGE POWER CONTROL(SLP_S4# OR SUSB#) SIGNAL SOUTH BRIDGE POWER CONTROL(SLP_S3# OR SUSC#) SIGNAL ATX POWER OK INPUT CPU_GD ALL_PWRGD 17,31 SMBCLK1 7,8,16 SMBDATA1 7,8,16 RSMRST# 17 SUSC# 16 SUSB# 16 PW_OK 31 5VSB LINEAR REGULATOR 17 4.7K PULL HIGH VDIMM MODE RSMRST# 10K R68 PLED1 R223 3VSB MODE R69 LINEAR MODE 5VSB R224 C90 VCC C81 PULL HIGH 5VSB X_222P 5V_STR1 NN-P07D03LV_SO8 C0.1U16Y VCC3 VCC PCIRST2# 18,19 PCIRST2# 5VSB PS_IN# D 5VSB_DRV 5V_DRV VCC3 THRMTRIP# Q8 2N3904S Ic=200mA Vebo=6V Vceo=40V C59 104P R66 X10K G R67 10K 474P-X7R WD_DET 5VSB R59 X_4.7KR R61 4.7K + PULL LOW OFF PULL HIGH ON VCC3 100 100 VDIMM PULL LOW 2.5V PULL HIGH 1.8V + 1000U/6.3V 3VSB_DRV EC7 + D C88 X_102P EC27 X_470U10EL11.5 S VDD_25_SUS P3055LD EC34 C19 X_C1U16Y0805 1000U/6.3V + EC6 1000U/6.3V C233 0.1U16Y Q9 G EC1 + 25V 1KR1% Q21 5V_DRV 1000U/6.3V VTT_DDR_SUS W83310DS C245 C0.1U16Y DDR_VTT VIN GND VREF1 VOUT GND 2.2KR1% 1.7V 5VSB + NN-P07D03LV_SO8 + A VREF2 ENABLE VCNTL BOOT_SEL R64 DDR II VCC3 + U12 THIS MODE SELECT BY PIN 47 PULL LOW 3VSB REGULATE BY 5VSB AND VCC3 3VDUAL D + 3VDUAL R63 DDR VDIMM_HSEN VREF 2.0V EC11 1000U/6.3V + P3055LD Q12 G S DDRTYPE 1000U/6.3V B THE TWO MODE ONLY ONE MODE PRESENT SINGLE MODE DUAL MODE THIS MODE SELECT BY PIN 47 PULL HIGH 5VSB DDR AND DDR II VOLT SELECT VDD_25_SUS EC14 1000U/6.3V TIMER DDRTYPE R145 Routed as pour to CPU width > 250mils THE VDIMM_HSEN IN LINEAR MODE To CPU Copper trace width > 250mils , Fill island behind DIMM > 400mils R146 VDD_12_A MS-6 C71 104P THE TWO BLOCK CHOICE ONE SUPPORT SYSTEM POWER CONTROL Q14 PHD45N03LTA CONNECT TO CPU 5VSB EC16 S 105P/0805 5VSB C67 EC23 1000U/6.3V + WATCHING DOG TIMER SELECT PS_OUT# VDDQ C85 C0.1U16X E 4.7K B 36 35 34 33 32 31 30 29 28 27 26 25 C1 C2 CHRPMP AGND1 5VUSB_DRV 5V_DRV VAGP_DRV VAGP_SEN WD_DET 1.2VLDT_DRV 1.2VLDT_SEN TMP_FAULT# CHARGE PUMP VOLTAGE OUTPUT 9VSB EC20 CD470U10EL11.5 EC3 1000U/6.3V C 31 104P R56 1K 4.7K B 104P R42 C54 CD100U16EL11 5VSB C358 +1 EC4 475P/0805 CLOSE TO CHIP VDDA_25 To CPU Copper trace width > 50mils C53 VDDA_25 R52 R50 10 VCC3 VDDA_25 FP_RST# PCIRST# HDD_RST# DEV_RST# VDD_GD VDD_EN 1.25VREF VCC5 SLOT_RST# VCC3 2.5VDDA AGND0 G C84 PCI SOLT PCIRST# BUFFER OUTPUT SUSB# 10 11 12 7,31 FP_RST# 14,15 PCIRST# 23 HDDRST# 12,20,26 PCIRST1# 29 PG_VCORE 29 VCORE_EN# 31 1.25VREF PCIRST# BUFFER OUTPUT 16 R49 330 13 14 15 16 17 18 19 20 21 22 23 24 FRONT PANEL RESET BUTTON PCIRST# INPUT R51 330 C Q24 PHD45N03LTA S C42 22P R162 4.7K U5 D VCC3 VCC 48 47 46 45 44 43 42 41 40 39 38 37 VCC3 PLED1/EXTRAM PLED0/3VDLDEC# CPU_PWGD CHIP_PWGD I2C_CLK I2C_DATA RSMRST# S5# S3# PWR_OK 5VSB GND PCIRST2# PSIN# PSOUT# MEMBT SS 5VSB DDRTYPE VDIMM_LSEN VDIMM_LDRV VDIMM_HSEN VDIMM_HDRV 3VSB_SEN 3VSB_DRV C A DDR 2.5V Micro Star Restricted Secret Title Rev ACPI POWER CONTOLLER (MS-6) THIS POINT VOLT CAN'T SETTING BELOW 2.9V Document Number MICRO-STAR INT'L CO.,LTD No 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan http://www.msi.com.tw 0A MS-7010 Last Revision Date: Tuesday, September 02, 2003 Sheet 30 of 35 POWER OK Circuits MEDION FRONT PANEL Power On Sequence VCC PSON# PWRBTSW PWSWPWSW+ PLED1 SLED2 HDDHDD+ RESET GND D R165 330 JF_P1 PW_OK R222 PLED1 PLED2 HDDLED HDD+ FP_RST# PS_OUT# IDEACTP# 23 100 PWBTIN# PLED1 PLED2 30 30 FP_RST# 7,30 HDDLED 16 EN_DDR D10 BAT54A-S-SOT23 D EN_VDDA_25 C296 0.1U25Y C263 102P EN_VCORE IDEACTS# 23 D9 PG_VCORE SATAACT# 17 MEDION-FP EN_VDD_12_A 1N4148S C251 0.1U25Y CPU_GD ALL_PWRGD SPEAKER 3VDUAL 27 ALARM R170 220 R171 220 VCC R163 16 D8 1N4148S C269 0.1U25Y Q22 2N3904S SPKR R112 330 U1A 74LVC07S VCC2_5 11 BZ1 BUZZER SPK -LDTRST VSUS2_5 14 R19 330 2.2K C ALL_PWRGD 17,30 ALL_PWRGD 14 -CPURST C U1B 74LVC07S VCC3 VCC VCC3 JWR1 11 12 13 14 15 16 17 18 19 20 -12V 30 PS_OUT# PS_ON#A VCC3 PS_OUT# R11 -5V VCC VCC C14 B C116 104P 3.3V -12V GND PS_ON GND GND GND -5V 5V 5V 3.3V 3.3V GND 5V GND 5V GND PW_OK 5V_SB 12V 10 R65 4.7K VCC PW_OK PW_OK 30 5VSB +12V ATX-PCON C98 C95 104P 104P B 104P System Voltage Regulator 9VSB 9VSB 5VSB EC28 - G C191 X_103P R107 1K 1.25VREF Q16 P3055LS + - U7B LM358_#B D X_1000U/6.3V Q19 NDS351S G S + U7A LM358_#B C192 103P S 30 1.25VREF R108 1K 1.25VREF D + VCC3 A A R104 R109 Micro Star Restricted Secret VSUS2_5 1KR1% + EC15 EL470/10V-3.5 R106 1KR1% EC19 100U16EL11 Dual Layout Footprint Title +1 VCC2_5 120RST R105 110RST Rev Power OK Circuits Reserved for Hyper-Transport Reset Test Document Number MS-7010 MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw 0A Last Revision Date: Tuesday, September 02, 2003 Sheet of 31 35 CPU VCORE DDR VDD_25_SUS VCORE SYSTEM VDD_25_SUS 5VSB VCC C112 106P/1206 C428 X_104P/BOT C422 X_104P/BOT C154 104P C32 104P C80 X_104P C193 104P VDD_12_A VCORE C401 X_104P/BOT C400 X_104P/BOT C425 X_104P/BOT C213 X_104P C230 104P C271 104P C246 104P C63 X_104P C306 104P C77 104P C5 104P VCC3 K8T400M VDDQ VCC3 -5V EC8 X_EL100/16V-2.5 C16 104P D -12V + +12V C101 106P/1206 + EC5 EL470/10V-3.5 C58 104P C87 104P VCC 3VDUAL VDDQ C200 105P C383 X_104P D VCC C261 105P/0805 C15 104P C196 105P/0805 C270 104P C302 104P C268 104P C350 104P C320 104P C445 X_104P C161 104P + EC30 X_1000U/6.3V VCC3 Place on inside of CPU Cavity ( * 0.22uF/0603 X7R high-freq decoupling Cap ) VCORE LAYOUT: Locate close to LAYOUT: Place one 1210 10uF Clawhammer socket cap on each end of the VTT island For EMI VCC VCC3 VCC3 VTT_DDR_SUS C359 X_104P C332 X_104P VCC2_5 C348 X_104P VCC3 C146 X_104P C186 X_104P C168 X_104P VTT_DDR_SUS C103 224P X_224P C105 104P CT4 X_10u/1206 + C107 104P C357 X_104P + C166 C188 X_100u-16V C30 X_100u-16V C322 X_104P C127 X_104P C172 X_104P C28 X_104P C365 X_104P CT14 X_10u/1206 C199 X_104P VCC3 C Buck-decoupling Mid-Freq decoupling Cap ( * 4.7uF / 1206 X7R ) C65 X_104P C GND GND CB6 X_104P VCORE CB7 X_104P C303 X_104P C227 X_104P C265 X_104P C354 X_104P C319 X_104P C389 X_104P VCC C70 X_106P/1206 C91 106P/1206 C78 106P/1206 C83 X_106P/1206 C64 106P/1206 VCORE C416 X_107P/B MH6 MH4 X_150 Drill / 300 Pad (NPTH) MH7 X_150 Drill / 300 Pad (NPTH) X_150 Drill / 300 Pad For VCC2_5 MOS input cap For VDDQ MOS input cap VCC3 + EC17 1000U/6.3V + VCC3 (NPTH) EC22 X_1000U/6.3V MH5 X_150 Drill / 300 Pad MH2 X_150 Drill / 300 Pad (NPTH) MH3 X_150 Drill / 300 Pad (NPTH) 8 (NPTH) B MH1 X_150 Drill / 300 Pad (NPTH) 9 VCC2_5 9 4 B C413 X_107P/B VTT_DDR_SUS KBGND C241 X_104P C210 X_104P C194 X_104P C290 X_104P + EC18 EL470/10V-3.5 Impedance Test FM11 C301 X_104P FM9 FM5 FM3 FM16 X X FM15 FM21 FM1 FM22 FM23 VCC A X VCC2_5 VSUS2_5 C285 105P/0805 C307 105P/0805 C214 X_105P/0805 VDD_25_SUS EC25 10u/1206 X_FM FM12 C164 X_104P X X_FM VTT_DDR_SUS X FM14 X X_FM X_FM FM8 X X_FM X X_FM FM10 X X_FM FM4 X X_FM FM6 X X_FM X_FM X_FM FM7 X X_FM X X_FM FM13 X X_FM X X_FM X_FM FM2 FM24 X X X X X X_FM X_FM 2 T2 X_YJ102 A Micro Star Restricted Secret X_FM FM19 X_FM T1 X_YJ102 X FM17 X_FM X X_FM Title Rev BULK / Decopuling Document Number 0A MS-7010 MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw Last Revision Date: Tuesday, September 02, 2003 Sheet of 32 35 K8 CPU Power CPU Side K8 Vcore -> "VCORE" (42A) D NB & SB & AGP Power NB & SB Core-Power -> "VCC2_5" (?A) DDR Power -> "VDD_25_SUS" (9.5A) Other Power 5VDU DDR_3VDUAL NB & SB Core-Suspend Power -> "VSUS2_5" (?A) DDR-VTTPower -> "VTT_DDR_SUS" (5.21A) D 3VDU 9VSB NB AGP8X Power -> "VDDQ" (1.5A) ATX Power Supply C DDR Side VDDA_2.5 Power -> "VDDA_25" (0.11A) HT Power -> "VDD_12_A"&"VLDT0" (2A) VSUS2_5 -> SB +5VSB C 5VDUAL 3VDUAL VCC P3VA -> For 1394 Charge Pump -> 9VSB +12V VCORE -> K8 CPU B B DDR_25_SUS -> DDR +5VR -> Audio DDR_3VDUAL VDDA_25 -> K8 CPU(I/O) VTT_DDR_SUS -> DDR VCC3 VDDQ -> AGP A A VCC2_5 -> NB & SB ( VLINK ) -12V Micro Star Restricted Secret VDD_12_A -> HT Title Document Number Rev Power Generation 0A MS-7010 MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw Last Revision Date: Tuesday, September 02, 2003 Sheet of 33 35 Revision Initial ver:0A on 09/09/2002 0C Revision History (Changes from MS-6741 Rev 0B) Sheet Revision Initial ver:0B on MS-6707 P-7 U22 change from CY28330 to CY28331 nee to more pciclk D P-11 NB K8T400M ver change from 0.4 to 0.9 J18 need to pull down to gnd P-14 PWM change from phases to phases circuit change P-15 To add 105p cap to Vref_cg P-18 remove MII LAN interfase P-22 modify codec circuit remove some connectors P-25 Change lan to RTL8101L P-32~P35 ACPI circuit modify 30 Desciption Sheet Ap Date Change South Bridge from VT8235 to VT8237 11/18 23 Change Lan Controler from RTL8101L to VT6103 PHY 12/04 24 Add One Front Port USB Connector 11/18 15 Add one VGA Connector for K8M400 Reserved 16~18 Desciption Ap Date Change VRM from 3-Phase to 2-Phase 06/21 D 1.0 Revision History (Changes from MS-6741 Rev 0C) 0A Revision History (Changes from MS-6707 Rev 0B) Sheet Desciption Ap Date 12 Add Pull-Down Resistor on BISTIN 31 Change Q22 from SO8 to TO252 C C 21 Reserved C-MEDIA AC'97 Codec Circuit 12/04 28 Add CNR Riser Circuit 11/22 31 Change Power Sequence Solution 12/04 0B Revision History (Changes from MS-6741 Rev 0A) Sheet B Desciption Ap Date 18 -LDTSTOP must be connect to SB DPSLP# for NB Rev:CD and connect to SLP# for NB Rev:CE & K8M400 01/03 22 Add PDA0 & SDA0 Isolated 01/03 17 Add VT8237 CTL_PLED1# Reseved for S5 Control 01/03 29 Remove R100,D5,Q2,C15,R29 01/17 30 Change Pull-Up Power form +12V to VCC on R465 Change D28 to a Resistor connect to VCC 01/17 09 Add Resistor Capacitors back on Address and Control Signals for AMD Request 01/22 21 Add Crystal and AC filter to avoid that CNR Problem 04/01 B A A Micro Star Restricted Secret Title Document Number Rev History MS-7010 MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw 0A Last Revision Date: Wednesday, September 03, 2003 Sheet 34 35 of HS2 HS1 PCB1 VT8235CE D D U19_2 W49F002UP TO252MOS_Heatsink E31-0500261-K08 TO252MOS_Heatsink E31-0500261-K08 P01-701000A-C48 U14_HM U8_1 U19_4 W29C040P-90 E31-0400482-A58 E31-0400482-A58 CPU Retention C C U14_HT VBAT1_1 YSKTBT U19_SOC MSI DDR HEATSINK B B PLCC-32S 5010 Micro Star Restricted Secret Title A Rev Manual Parts Document Number MICRO-STAR INT'L No 69, Li-De St, Jung-He City, CO.,LTD Taipei Hsien, Taiwan http://www.msi.com.tw 0A MS-7010 Last Revision Date: Wednesday, September 03, 2003 Sheet of 35 35 A ... 4,8 -MCS1 4,8 -MSCASA 4,8 -MSWEB 4,8 -MSCASB 4,8 -MSWEA 4,8 -MSRASA 4,8 -MSRASB RN48 -MCS2 -MCS3 -MCS1 -MSCASA RN46 DR_MD41 -MSWEB -MSCASB DR_MD45 RN45 -MSWEA -MSRASA -MSRASB DR_MD44 8P4R-47 -DR_MDQS3... DR_MD1 DR_MD5 DR_MD4 DR_MD0 RN5 RN2 1 B 8P4C-22P CN18 4,8 -MSRASB 4,8 -MSRASA 4,8 -MSWEA 4,8 -MSWEB 8P4R-47 -MSRASB -MSRASA -MSWEA -MSWEB 8P4C-22P CN16 4,8 4,8 4,8 4,8 8P4R-47 2 MEMBANKB1 MEMBANKA1... PS2 CONNECTOR USBVCC1 JKBMS1 15 MSDAT# 15 MSCLK# 15 KBDAT# 15 KBCLK# MSDAT# L1 301S MSCLK# L3 301S XMSCLK1 KBDAT# L2 301S XKBDAT1 KBCLK# L4 301S XKBCLK1 XMSDAT1 11 12 10 MS C2 C1 X_39P X_104P KBGND