5 TITLE D SHEET COVER SHEET BLOCK DIAGRAM RESET&CLK MAP SPEC&CHANGE LIST PROCESSOR M2 940 5,6,7,8,9 DDR ADD/CTL/VTT TERMINATI 10 DDR2 11 DDR2 12 13,14,15 NV CHIPSET(MCP68S) 16,17,18,19 PCI 1&2 20 FRONT PANEL HEADER 21 PCI EXPRESS X16 22 IDE CONN 23 POWER CONN & FAN CONTROL 24 FLOOPY / KB / MOUSE / CMOS 25 D N68SA-M2S N68S+ VER:6.2 C C VGA CONN 26 USB DEVICE 27 SERIAL & PARALLEL 28 AUDIO CODEC ( ALC662) 29 AUDIO CONN 30 VCORE POWER SUPPLY 31 MEM_VREG/MEM_VTT 32 LPC SUPER IO ITE8716F 33 FLASH ROM & H/W MON 34 POWER SEQUENCING 35 LAN 10/100(RLT8201CL) 36 OVER VOLTAGE 37 B B MCP61 CORE 38 PAGE1 39 CHANGELIST 40 A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the COVER SHEET applicable civil and/or criminal Size Document Number penalties.◆ Custom Date: Rev 6.2 N68SA-M2S Friday, June 04, 2010 Sheet 1 of 39 POWER SUPPLY CONN D VREG AMD M2 SOCKET 940 M2 MEMORY DDR2 D DDR DIMM(2) 128-BIT 400/533/667/800 MHZ HT 16X16 1GHZ VGA PEX X16 (1) CONN NFORCE DVI REL8201CL LAN ATA 133 MCP61P PCI 33MHZ PCI SLOT (2) PRIMARY IDE 692BGA C C 4MB FLASH AC97/HDA SPI Port ALC662 AUDIO CODEC SATA CONN(X4) INTEGRATED SATA 1/2 USB2.0 (X8/X10) LPC BUS 33MHZ FLOPPY CONN SIO IT8712/8716 USB2 PORTS 1-0 DOUBLE STACK BACK PANEL CONN USB2 PORTS 3-2 LAN RJ45 PS2/KBRD CONN PARALLEL CONN USB2 PORTS 5-4 SERIAL CONN B FRONT PANEL HDR B USB2 PORTS 7-6 H/W MON USB2 PORTS 9-8 RGMII MII/RGMII A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the SYSTEM BLOCK applicable civil and/or criminal Size Document Number penalties.◆ Custom Rev 6.2 N68SA-M2S Date: Thursday, June 03, 2010 Sheet of 39 M2 940 CPU M2 SKT 939 HT_MCP_PWRGD HT_CPU_TXCLK0 MEMORY_A1_CLK[2:0] CHANNEL A1 0-63 CPU RST* RESET MAP DIMM HT_CPU_TXCLK0* MEMORY_A1_CLK[2:0]* HT_CPU_RXCLK0 HT_CPU_RXCLK0* MEMORY_B1_CLK[2:0] HT_CPU_TXCLK1 MEMORY_B1_CLK[2:0]* D HT_MCP_RST* CPU PWRGD D DIMM PE_RESET* CHANNEL B1 64-127 HT_CPU_TXCLK1* MEMORY_A2_CLK[2:0] HT_CPU_RXCLK1 HT_CPU_RXCLK1* MEMORY_A2_CLK[2:0]* CPUCLK_IN* MEMORY_B2_CLK[2:0] CPUCLK_IN MEMORY_B2_CLK[2:0]* PEX X16 MCP68S 8712/8716 CLKOUT_200MHZ CLKOUT_200MHZ* HT_MCP_RST* PWR SWTCH PE0_REFCLK PWRBT ON* PEX X16 PE0_REFCLK* PWRBTN* HT MCP PWRGD SLP S3* PS ON HT_CPU_RXCLK1 PE1_REFCLK HT_CPU_TXCLK1* HT_CPU_TXCLK1 PE1_REFCLK* HT_MCP_PWRGD SLP_S3* SLP_S3* HT_CPU_RXCLK1* HT MCP RST* PWR BUTTON PWR BUTTON* PWR CONN POWER_GOOD PCI RST0* PCIRST_SLOT1* PCI RST1* PCIRST_SLOT2* PWRGD PCI RST2* PCIRST_SLOT3-4* PCI RST3* PCIRST_IDE* LPC_RST* LPCRST_FLASH* AC_RESET* LPCRST_SIO* PS ON C C HT_CPU_RXCLK0* PE2_REFCLK PWR GOOD PWRGD_SB PWRGD_SB PWRGD SB HT_CPU_RXCLK0 PE2_REFCLK* GPIO_AUX* CIRCUIT HT_CPU_TXCLK0* HT_CPU_TXCLK0 XTAL_IN MCP68S 27 MHZ (TV OUT ONLY) CLOCK DISTRIBUTION PRI IDE SIO LAN_PHY RESET* PCI SLOT2 PCI SLOT1 FLASH AUDIO_PHY RESET* XTAL_OUT PCI SLOT2 14MHZ OR 24MHZ BUF_SIO RTC_XTAL B SUSCLK 32KHZ LPC_CLK0 33MHZ PCI_CLK0 PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK_FB 33MHZ SIO PCI SLOT1 32.0 KHZ 33MHZ B FLASH LPC_CLK1 XTAL_IN AC97/AZALIA LINK AC_97CLK AC97 CODEC S-IO 25 MHZ AC_BITCLK XTAL_OUT BUF_25MHZ LAN PHY A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the RESET&CLOCK MAP applicable civil and/or criminal Size Document Number penalties.◆ Custom Rev 6.2 N68SA-M2S Date: Thursday, June 03, 2010 Sheet of 39 CPU VID TABLE D C VDD VID [4 0] VDD BACK PANEL 0X00000 1.550V 0X10000 1.150V SLOT 0X00001 1.525V 0X10001 1.125V 01 0X05 0X00010 1.500V 0X10010 1.100V 01 0X06 PCI BUS# DEVICE# 0X00011 1.475V 0X10011 1.075V 01 0X07 0X00100 1.450V 0X10100 1.050V 01 0X08 0X00101 1.425V 0X10101 1.025V 01 0X09 0X00110 1.400V 0X10110 1.000V 01 0X0A 0X00111 1.375V 0X10111 0.975V 0X01000 1.350V 0X11000 0.950V 0X01001 1.325V 0X11001 0.925V 0X01010 1.300V 0X11010 0.900V IDSEL PIN PCI SLOT PCI SLOT PCI SLOT PCI SLOT INTA* INTB* INTC* INTD* 22 P_INTY* P_INTZ* P_INTW* P_INTX* 1/1 24 P_INTW* P_INTX* P_INTY* P_INTZ* 2/2 REQ/GNT D PCI DEVICE MAP DEVICE PCI BUS# FUNCTION IDSEL PIN DEVICE ID MCP68S MCP51 LOGICAL PCI BUS 0X01-0X0F 0X01011 1.275V 0X11011 0.875V 0X01100 1.250V 0X11100 0.850V MAC /MAC XA 0X56/57 0X01101 1.225V 0X11101 0.825V PCI-PCI BRIDGE X9 0X005C 0X01110 1.200V 0X11110 0.800V SATA1 X8 0X0055 0X01111 1.175V 0X11111 OFF SATA0 X8 0X0054 IDE X6 0X0053 MODEM CODEC X4 0X0058 AUDIO CODEC X4 0X0059 USB 2.0 X2 0X005B USB 1.1 X2 0X005A SHAPE TRIM X1 0X005F LDT X0 0X005E SMBUS2 X1 0X0052 LEGACY SLAVE ? ? 0X00D3 LPC X1 0X0050/51 LOGICAL PCI BUS ? ? ? SMBUS ADDRESS MAP SMBUS # PCI INTERRUPT/IDSEL MAP VID [4 0] DEVICE C ADDRESS SLOT DIMM 0 1010 000 = 0X50 DIMM 1010 001 = 0X51 DIMM 1010 010 = 0X52 DIMM 1010 011 = 0X53 SIO 0101 101 = 0X2D PCI SLOT 1 ARP PCI SLOT ARP PCI SLOT ARP PCI SLOT ARP DDC BUS A ? DDC BUS B ? 22U/25DE 5*7 mm 100U/16DE 6.3*11 mm 220U/10DE 6.3*11 mm 470U/16DE 8*11 mm 1000U/10DE 8*14 mm 1500U/16DE 10*25 mm 3300U/25DE 10*25 mm PCI SLOT PCI SLOT PCI SLOT PCI SLOT B B PCI SLOT D O D G S G S A O A I C D R G C S B KA E A TO-263 TO-252 SOT-223 SOT-23 SOT-23 SOT-23 PHB55N03 90N02 20N03 TM3055TL-S PHD55N03 AMS1117 LM431 2N7002 SI2303S SI2301S 2N3904 BAT54C 2N3906 BAT54S MMBT2907A 2N2222A SOT-23 I GO E BC ECB TO-92 TO-92 TO-92 LM431 78L05-D LM432 2N2222A 2N2097A HSD882-D K A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the SPEC&CHANGE LIST applicable civil and/or criminal Size Document Number penalties.◆ Custom Rev 6.2 N68SA-M2S Date: Thursday, June 03, 2010 Sheet of 39 R47 49.9 1% 0402 +1.2V_HT 13 HTCPU_UPCLK1 13 HTCPU_UPCLK1_ 13 HTCPU_UPCLK0 13 HTCPU_UPCLK0_ D 13 HTCPU_UPCNTL1 13 HTCPU_UPCNTL1_ 13 HTCPU_UPCNTL 13 HTCPU_UPCNTL_ R46 49.9 1% 0402 C 13 HTCPU_UP[15 0] 13 HTCPU_UP_[15 0] CPU1A CPU1B HYPERTRANSPORT HTCPU_UPCLK1 HTCPU_UPCLK1_ HTCPU_UPCLK0 HTCPU_UPCLK0_ N6 P6 N3 N2 L0_CLKIN_H(1) L0_CLKIN_L(1) L0_CLKIN_H(0) L0_CLKIN_L(0) L0_CLKOUT_H(1) L0_CLKOUT_L(1) L0_CLKOUT_H(0) L0_CLKOUT_L(0) AD5 AD4 AD1 AC1 HTCPU_DWNCLK1 HTCPU_DWNCLK1_ HTCPU_DWNCLK0 HTCPU_DWNCLK0_ V4 V5 HTCPU_UPCNTL U1 HTCPU_UPCNTL_ V1 L0_CTLIN_H(1) L0_CTLIN_L(1) L0_CTLIN_H(0) L0_CTLIN_L(0) L0_CTLOUT_H(1) L0_CTLOUT_L(1) L0_CTLOUT_H(0) L0_CTLOUT_L(0) Y6 W6 W2 W3 HTCPU_DWNCNTL1 HTCPU_DWNCNTL1 13 HTCPU_DWNCNTL1_ HTCPU_DWNCNTL1_ 13 HTCPU_DWNCNTL HTCPU_DWNCNTL 13 HTCPU_DWNCNTL_ HTCPU_DWNCNTL_ 13 HTCPU_DWN15 HTCPU_DWN_15 HTCPU_DWN14 HTCPU_DWN_14 HTCPU_DWN13 HTCPU_DWN_13 HTCPU_DWN12 HTCPU_DWN_12 HTCPU_DWN11 HTCPU_DWN_11 HTCPU_DWN10 HTCPU_DWN_10 HTCPU_DWN9 HTCPU_DWN_9 HTCPU_DWN8 HTCPU_DWN_8 HTCPU_DWN7 HTCPU_DWN_7 HTCPU_DWN6 HTCPU_DWN_6 HTCPU_DWN5 HTCPU_DWN_5 HTCPU_DWN4 HTCPU_DWN_4 HTCPU_DWN3 HTCPU_DWN_3 HTCPU_DWN2 HTCPU_DWN_2 HTCPU_DWN1 HTCPU_DWN_1 HTCPU_DWN0 HTCPU_DWN_0 HTCPU_UP15 HTCPU_UP_15 HTCPU_UP14 HTCPU_UP_14 HTCPU_UP13 HTCPU_UP_13 HTCPU_UP12 HTCPU_UP_12 HTCPU_UP11 HTCPU_UP_11 HTCPU_UP10 HTCPU_UP_10 HTCPU_UP9 HTCPU_UP_9 HTCPU_UP8 HTCPU_UP_8 U6 V6 T4 T5 R6 T6 P4 P5 M4 M5 L6 M6 K4 K5 J6 K6 L0_CADIN_H(15) L0_CADIN_L(15) L0_CADIN_H(14) L0_CADIN_L(14) L0_CADIN_H(13) L0_CADIN_L(13) L0_CADIN_H(12) L0_CADIN_L(12) L0_CADIN_H(11) L0_CADIN_L(11) L0_CADIN_H(10) L0_CADIN_L(10) L0_CADIN_H(9) L0_CADIN_L(9) L0_CADIN_H(8) L0_CADIN_L(8) L0_CADOUT_H(15) L0_CADOUT_L(15) L0_CADOUT_H(14) L0_CADOUT_L(14) L0_CADOUT_H(13) L0_CADOUT_L(13) L0_CADOUT_H(12) L0_CADOUT_L(12) L0_CADOUT_H(11) L0_CADOUT_L(11) L0_CADOUT_H(10) L0_CADOUT_L(10) L0_CADOUT_H(9) L0_CADOUT_L(9) L0_CADOUT_H(8) L0_CADOUT_L(8) Y5 Y4 AB6 AA6 AB5 AB4 AD6 AC6 AF6 AE6 AF5 AF4 AH6 AG6 AH5 AH4 HTCPU_UP7 HTCPU_UP_7 HTCPU_UP6 HTCPU_UP_6 HTCPU_UP5 HTCPU_UP_5 HTCPU_UP4 HTCPU_UP_4 HTCPU_UP3 HTCPU_UP_3 HTCPU_UP2 HTCPU_UP_2 HTCPU_UP1 HTCPU_UP_1 HTCPU_UP0 HTCPU_UP_0 U3 U2 R1 T1 R3 R2 N1 P1 L1 M1 L3 L2 J1 K1 J3 J2 L0_CADIN_H(7) L0_CADIN_L(7) L0_CADIN_H(6) L0_CADIN_L(6) L0_CADIN_H(5) L0_CADIN_L(5) L0_CADIN_H(4) L0_CADIN_L(4) L0_CADIN_H(3) L0_CADIN_L(3) L0_CADIN_H(2) L0_CADIN_L(2) L0_CADIN_H(1) L0_CADIN_L(1) L0_CADIN_H(0) L0_CADIN_L(0) L0_CADOUT_H(7) L0_CADOUT_L(7) L0_CADOUT_H(6) L0_CADOUT_L(6) L0_CADOUT_H(5) L0_CADOUT_L(5) L0_CADOUT_H(4) L0_CADOUT_L(4) L0_CADOUT_H(3) L0_CADOUT_L(3) L0_CADOUT_H(2) L0_CADOUT_L(2) L0_CADOUT_H(1) L0_CADOUT_L(1) L0_CADOUT_H(0) L0_CADOUT_L(0) Y1 W1 AA2 AA3 AB1 AA1 AC2 AC3 AE2 AE3 AF1 AE1 AG2 AG3 AH1 AG1 HTCPU_UP[15 0] HTCPU_DWN[15 0] HTCPU_UP_[15 0] HTCPU_DWN_[15 0] HTCPU_DWNCLK1 13 HTCPU_DWNCLK1_ 13 HTCPU_DWNCLK0 13 HTCPU_DWNCLK0_ 13 AG21 AG20 G19 H19 U27 U26 MA0_CLK_H(2) MA0_CLK_L(2) MA0_CLK_H(1) MA0_CLK_L(1) MA0_CLK_H(0) MA0_CLK_L(0) 10,11 MEM_MA0_CS_L1 10,11 MEM_MA0_CS_L0 AC25 AA24 MA0_CS_L(1) MA0_CS_L(0) 10,11 MEM_MA0_ODT0 AC28 MA0_ODT(0) AE20 AE19 G20 G21 V27 W27 MA1_CLK_H(2) MA1_CLK_L(2) MA1_CLK_H(1) MA1_CLK_L(1) MA1_CLK_H(0) MA1_CLK_L(0) AD27 AA25 MA1_CS_L(1) MA1_CS_L(0) AC27 MA1_ODT(0) 10,11 MEM_MA_CAS_L 10,11 MEM_MA_WE_L 10,11 MEM_MA_RAS_L AB25 AB27 AA26 MA_CAS_L MA_WE_L MA_RAS_L 10,11 MEM_MA_BANK2 10,11 MEM_MA_BANK1 10,11 MEM_MA_BANK0 N25 Y27 AA27 MA_BANK(2) MA_BANK(1) MA_BANK(0) L27 M25 MA_CKE(1) MA_CKE(0) MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0 M27 N24 AC26 N26 P25 Y25 N27 R24 P27 R25 R26 R27 T25 U25 T27 W24 MA_ADD(15) MA_ADD(14) MA_ADD(13) MA_ADD(12) MA_ADD(11) MA_ADD(10) MA_ADD(9) MA_ADD(8) MA_ADD(7) MA_ADD(6) MA_ADD(5) MA_ADD(4) MA_ADD(3) MA_ADD(2) MA_ADD(1) MA_ADD(0) MEM_MA_DQS_H7 MEM_MA_DQS_L7 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H0 MEM_MA_DQS_L0 AD15 AE15 AG18 AG19 AG24 AG25 AG27 AG28 D29 C29 C25 D25 E19 F19 F15 G15 MA_DQS_H(7) MA_DQS_L(7) MA_DQS_H(6) MA_DQS_L(6) MA_DQS_H(5) MA_DQS_L(5) MA_DQS_H(4) MA_DQS_L(4) MA_DQS_H(3) MA_DQS_L(3) MA_DQS_H(2) MA_DQS_L(2) MA_DQS_H(1) MA_DQS_L(1) MA_DQS_H(0) MA_DQS_L(0) MEM_MA_DM7 MEM_MA_DM6 MEM_MA_DM5 MEM_MA_DM4 MEM_MA_DM3 MEM_MA_DM2 MEM_MA_DM1 MEM_MA_DM0 AF15 AF19 AJ25 AH29 B29 E24 E18 H15 MA_DM(7) MA_DM(6) MA_DM(5) MA_DM(4) MA_DM(3) MA_DM(2) MA_DM(1) MA_DM(0) 10,11 MEM_MA_CKE0 10,11 MEM_MA_ADD[15 0] HTCPU_DWN[15 0] HTCPU_DWN_[15 0] 11 11 11 11 11 11 11 11 11 MEM_MA_DQS_H0 MEM_MA_DQS_H1 MEM_MA_DQS_H2 MEM_MA_DQS_H3 MEM_MA_DQS_H4 MEM_MA_DQS_H5 MEM_MA_DQS_H6 MEM_MA_DQS_H7 MEM_MA_DQS_H8 MEM_MA_DQS_H0 MEM_MA_DQS_H1 MEM_MA_DQS_H2 MEM_MA_DQS_H3 MEM_MA_DQS_H4 MEM_MA_DQS_H5 MEM_MA_DQS_H6 MEM_MA_DQS_H7 MEM_MA_DQS_H8 11 11 11 11 11 11 11 11 11 MEM_MA_DQS_L0 MEM_MA_DQS_L1 MEM_MA_DQS_L2 MEM_MA_DQS_L3 MEM_MA_DQS_L4 MEM_MA_DQS_L5 MEM_MA_DQS_L6 MEM_MA_DQS_L7 MEM_MA_DQS_L8 MEM_MA_DQS_L0 MEM_MA_DQS_L1 MEM_MA_DQS_L2 MEM_MA_DQS_L3 MEM_MA_DQS_L4 MEM_MA_DQS_L5 MEM_MA_DQS_L6 MEM_MA_DQS_L7 MEM_MA_DQS_L8 11 11 11 11 11 11 11 11 11 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 MEM_MA_DM8 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 MEM_MA_DM8 MEM_MA_ADD[15 0] 13 13 B MA_DATA(63) MA_DATA(62) MA_DATA(61) MA_DATA(60) MA_DATA(59) MA_DATA(58) MA_DATA(57) MA_DATA(56) MA_DATA(55) MA_DATA(54) MA_DATA(53) MA_DATA(52) MA_DATA(51) MA_DATA(50) MA_DATA(49) MA_DATA(48) MA_DATA(47) MA_DATA(46) MA_DATA(45) MA_DATA(44) MA_DATA(43) MA_DATA(42) MA_DATA(41) MA_DATA(40) MA_DATA(39) MA_DATA(38) MA_DATA(37) MA_DATA(36) MA_DATA(35) MA_DATA(34) MA_DATA(33) MA_DATA(32) MA_DATA(31) MA_DATA(30) MA_DATA(29) MA_DATA(28) MA_DATA(27) MA_DATA(26) MA_DATA(25) MA_DATA(24) MA_DATA(23) MA_DATA(22) MA_DATA(21) MA_DATA(20) MA_DATA(19) MA_DATA(18) MA_DATA(17) MA_DATA(16) MA_DATA(15) MA_DATA(14) MA_DATA(13) MA_DATA(12) MA_DATA(11) MA_DATA(10) MA_DATA(9) MA_DATA(8) MA_DATA(7) MA_DATA(6) MA_DATA(5) MA_DATA(4) MA_DATA(3) MA_DATA(2) MA_DATA(1) MA_DATA(0) AE14 AG14 AG16 AD17 AD13 AE13 AG15 AE16 AG17 AE18 AD21 AG22 AE17 AF17 AF21 AE21 AF23 AE23 AJ26 AG26 AE22 AG23 AH25 AF25 AJ28 AJ29 AF29 AE26 AJ27 AH27 AG29 AF27 E29 E28 D27 C27 G26 F27 C28 E27 F25 E25 E23 D23 E26 C26 G23 F23 E22 E21 F17 G17 G22 F21 G18 E17 G16 E15 G13 H13 H17 E16 E14 G14 MEM_MA_DATA[0 63] MEM_MA_DATA63 MEM_MA_DATA62 MEM_MA_DATA61 MEM_MA_DATA60 MEM_MA_DATA59 MEM_MA_DATA58 MEM_MA_DATA57 MEM_MA_DATA56 MEM_MA_DATA55 MEM_MA_DATA54 MEM_MA_DATA53 MEM_MA_DATA52 MEM_MA_DATA51 MEM_MA_DATA50 MEM_MA_DATA49 MEM_MA_DATA48 MEM_MA_DATA47 MEM_MA_DATA46 MEM_MA_DATA45 MEM_MA_DATA44 MEM_MA_DATA43 MEM_MA_DATA42 MEM_MA_DATA41 MEM_MA_DATA40 MEM_MA_DATA39 MEM_MA_DATA38 MEM_MA_DATA37 MEM_MA_DATA36 MEM_MA_DATA35 MEM_MA_DATA34 MEM_MA_DATA33 MEM_MA_DATA32 MEM_MA_DATA31 MEM_MA_DATA30 MEM_MA_DATA29 MEM_MA_DATA28 MEM_MA_DATA27 MEM_MA_DATA26 MEM_MA_DATA25 MEM_MA_DATA24 MEM_MA_DATA23 MEM_MA_DATA22 MEM_MA_DATA21 MEM_MA_DATA20 MEM_MA_DATA19 MEM_MA_DATA18 MEM_MA_DATA17 MEM_MA_DATA16 MEM_MA_DATA15 MEM_MA_DATA14 MEM_MA_DATA13 MEM_MA_DATA12 MEM_MA_DATA11 MEM_MA_DATA10 MEM_MA_DATA9 MEM_MA_DATA8 MEM_MA_DATA7 MEM_MA_DATA6 MEM_MA_DATA5 MEM_MA_DATA4 MEM_MA_DATA3 MEM_MA_DATA2 MEM_MA_DATA1 MEM_MA_DATA0 MA_DQS_H(8) MA_DQS_L(8) J28 J27 MEM_MA_DQS_H8 MEM_MA_DQS_L8 MA_DM(8) J25 MA_CHECK(7) MA_CHECK(6) MA_CHECK(5) MA_CHECK(4) MA_CHECK(3) MA_CHECK(2) MA_CHECK(1) MA_CHECK(0) K25 J26 G28 G27 L24 K27 H29 H27 MEM_MA_DM8 MEM_MA_CHECK[7 0] MEM_MA_CHECK7 MEM_MA_CHECK6 MEM_MA_CHECK5 MEM_MA_CHECK4 MEM_MA_CHECK3 MEM_MA_CHECK2 MEM_MA_CHECK1 MEM_MA_CHECK0 MEMORY INTERFACE A MEM_MA0_CLK_H2 MEM_MA0_CLK_L2 MEM_MA0_CLK_H1 MEM_MA0_CLK_L1 MEM_MA0_CLK_H0 MEM_MA0_CLK_L0 10,11 10,11 10,11 10,11 10,11 10,11 MEM_MA_DATA[0 63] 11 D C B MEM_MA_CHECK[7 0] 11 A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the M2 HT/DDR2 A applicable civil and/or criminal Size Document Number penalties.◆ Custom Date: Rev 6.2 N68SA-M2S Thursday, June 03, 2010 Sheet of 39 CPU1C D AJ19 AK19 A18 A19 U31 U30 MB0_CLK_H(2) MB0_CLK_L(2) MB0_CLK_H(1) MB0_CLK_L(1) MB0_CLK_H(0) MB0_CLK_L(0) 10,12 MEM_MB0_CS_L1 10,12 MEM_MB0_CS_L0 AE30 AC31 MB0_CS_L(1) MB0_CS_L(0) 10,12 MEM_MB0_ODT0 AD29 MB0_ODT(0) AL19 AL18 C19 D19 W29 W28 MB1_CLK_H(2) MB1_CLK_L(2) MB1_CLK_H(1) MB1_CLK_L(1) MB1_CLK_H(0) MB1_CLK_L(0) AE29 AB31 MB1_CS_L(1) MB1_CS_L(0) AD31 MB1_ODT(0) 10,12 MEM_MB_CAS_L 10,12 MEM_MB_WE_L 10,12 MEM_MB_RAS_L AC29 AC30 AB29 MB_CAS_L MB_WE_L MB_RAS_L 10,12 MEM_MB_BANK2 10,12 MEM_MB_BANK1 10,12 MEM_MB_BANK0 N31 AA31 AA28 MB_BANK(2) MB_BANK(1) MB_BANK(0) 10,12 MEM_MB_CKE0 10,12 MEM_MB_ADD[15 0] C 12 MEM_MB_DQS_H[8 0] B 12 MEM_MB_DQS_L[8 0] 12 MEM_MB_DM[8 0] MEM_MB_ADD[15 0] MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0 MEM_MB_DQS_H[8 0] MEM_MB_DQS_H7 MEM_MB_DQS_L7 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DQS_L[8 0] MEM_MB_DM7 MEM_MB_DM6 MEM_MB_DM5 MEM_MB_DM4 MEM_MB_DM3 MEM_MB_DM2 MEM_MB_DM1 MEM_MB_DM0 MEM_MB_DM[8 0] MB_DATA(63) MB_DATA(62) MB_DATA(61) MB_DATA(60) MB_DATA(59) MB_DATA(58) MB_DATA(57) MB_DATA(56) MB_DATA(55) MB_DATA(54) MB_DATA(53) MB_DATA(52) MB_DATA(51) MB_DATA(50) MB_DATA(49) MB_DATA(48) MB_DATA(47) MB_DATA(46) MB_DATA(45) MB_DATA(44) MB_DATA(43) MB_DATA(42) MB_DATA(41) MB_DATA(40) MB_DATA(39) MB_DATA(38) MB_DATA(37) MB_DATA(36) MB_DATA(35) MB_DATA(34) MB_DATA(33) MB_DATA(32) MB_DATA(31) MB_DATA(30) MB_DATA(29) MB_DATA(28) MB_DATA(27) MB_DATA(26) MB_DATA(25) MB_DATA(24) MB_DATA(23) MB_DATA(22) MB_DATA(21) MB_DATA(20) MB_DATA(19) MB_DATA(18) MB_DATA(17) MB_DATA(16) MB_DATA(15) MB_DATA(14) MB_DATA(13) MB_DATA(12) MB_DATA(11) MB_DATA(10) MB_DATA(9) MB_DATA(8) MB_DATA(7) MB_DATA(6) MB_DATA(5) MB_DATA(4) MB_DATA(3) MB_DATA(2) MB_DATA(1) MB_DATA(0) AH13 AL13 AL15 AJ15 AF13 AG13 AL14 AK15 AL16 AL17 AK21 AL21 AH15 AJ16 AH19 AL20 AJ22 AL22 AL24 AK25 AJ21 AH21 AH23 AJ24 AL27 AK27 AH31 AG30 AL25 AL26 AJ30 AJ31 E31 E30 B27 A27 F29 F31 A29 A28 A25 A24 C22 D21 A26 B25 B23 A22 B21 A20 C16 D15 C21 A21 A17 A16 B15 A14 E13 F13 C15 A15 A13 D13 MEM_MB_DATA[0 63] MEM_MB_DATA63 MEM_MB_DATA62 MEM_MB_DATA61 MEM_MB_DATA60 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57 MEM_MB_DATA56 MEM_MB_DATA55 MEM_MB_DATA54 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA51 MEM_MB_DATA50 MEM_MB_DATA49 MEM_MB_DATA48 MEM_MB_DATA47 MEM_MB_DATA46 MEM_MB_DATA45 MEM_MB_DATA44 MEM_MB_DATA43 MEM_MB_DATA42 MEM_MB_DATA41 MEM_MB_DATA40 MEM_MB_DATA39 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA35 MEM_MB_DATA34 MEM_MB_DATA33 MEM_MB_DATA32 MEM_MB_DATA31 MEM_MB_DATA30 MEM_MB_DATA29 MEM_MB_DATA28 MEM_MB_DATA27 MEM_MB_DATA26 MEM_MB_DATA25 MEM_MB_DATA24 MEM_MB_DATA23 MEM_MB_DATA22 MEM_MB_DATA21 MEM_MB_DATA20 MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA17 MEM_MB_DATA16 MEM_MB_DATA15 MEM_MB_DATA14 MEM_MB_DATA13 MEM_MB_DATA12 MEM_MB_DATA11 MEM_MB_DATA10 MEM_MB_DATA9 MEM_MB_DATA8 MEM_MB_DATA7 MEM_MB_DATA6 MEM_MB_DATA5 MEM_MB_DATA4 MEM_MB_DATA3 MEM_MB_DATA2 MEM_MB_DATA1 MEM_MB_DATA0 MB_DQS_H(8) MB_DQS_L(8) J31 J30 MEM_MB_DQS_H8 MEM_MB_DQS_L8 MB_DM(8) J29 MEM_MB_DM8 MB_CHECK(7) MB_CHECK(6) MB_CHECK(5) MB_CHECK(4) MB_CHECK(3) MB_CHECK(2) MB_CHECK(1) MB_CHECK(0) K29 K31 G30 G29 L29 L28 H31 G31 MEM_MB_CHECK7 MEM_MB_CHECK6 MEM_MB_CHECK5 MEM_MB_CHECK4 MEM_MB_CHECK3 MEM_MB_CHECK2 MEM_MB_CHECK1 MEM_MB_CHECK0 MEM_MB_CHECK[7 0] MEMORY INTERFACE B MEM_MB0_CLK_H2 MEM_MB0_CLK_L2 MEM_MB0_CLK_H1 MEM_MB0_CLK_L1 MEM_MB0_CLK_H0 MEM_MB0_CLK_L0 10,12 10,12 10,12 10,12 10,12 10,12 M31 M29 MB_CKE(1) MB_CKE(0) N28 N29 AE31 N30 P29 AA29 P31 R29 R28 R31 R30 T31 T29 U29 U28 AA30 MB_ADD(15) MB_ADD(14) MB_ADD(13) MB_ADD(12) MB_ADD(11) MB_ADD(10) MB_ADD(9) MB_ADD(8) MB_ADD(7) MB_ADD(6) MB_ADD(5) MB_ADD(4) MB_ADD(3) MB_ADD(2) MB_ADD(1) MB_ADD(0) AK13 AJ13 AK17 AJ17 AK23 AL23 AL28 AL29 D31 C31 C24 C23 D17 C17 C14 C13 MB_DQS_H(7) MB_DQS_L(7) MB_DQS_H(6) MB_DQS_L(6) MB_DQS_H(5) MB_DQS_L(5) MB_DQS_H(4) MB_DQS_L(4) MB_DQS_H(3) MB_DQS_L(3) MB_DQS_H(2) MB_DQS_L(2) MB_DQS_H(1) MB_DQS_L(1) MB_DQS_H(0) MB_DQS_L(0) AJ14 AH17 AJ23 AK29 C30 A23 B17 B13 MB_DM(7) MB_DM(6) MB_DM(5) MB_DM(4) MB_DM(3) MB_DM(2) MB_DM(1) MB_DM(0) MEM_MB_DATA[0 63] 12 D C B MEM_MB_CHECK[7 0] 12 A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the M2 DDR2 B applicable civil and/or criminal Size Document Number penalties.◆ Custom Date: Rev 6.2 N68SA-M2S Thursday, June 03, 2010 Sheet of 39 +5V +2.5V +2.5V C26 3900P 50V X7R 0402 D D R8 54.9 1% 0402 AZ1117H-ADJ SOT-223 +1.8V_SUS C16 C17 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V C24 10UF 10V 0805 Y5V 2 I O A R7 49.9 1% 0402 R1 Q6 1 CT1 10UF 10V 0805 Y5V /NI R2 +1.8V_SUS BR1 16.9 1% 0402 CPU1D MISC C10 D10 HTCPU_PWRGD HTCPU_STOP_ HTCPU_RST_ CPU_CLK* CPU_CLK_ 3900P 50V X7R 0402 18 18 +1.8V_SUS THERM_SIC THERM_SID +1.8V_SUS RN56 1K 8P4R 0402 ALERT_ RN2 330 8P4R 0402 C R69 +1.8V_SUS CPU_CORE_FB CPU_CORE_FB- 31 CPU_CORE_FB 31 CPU_CORE_FB_ 13 HTCPU_STOP_ 13 HTCPU_RST_ 13 HTCPU_PWRGD TP /NI TP_VDDIOSENSE1 VDDA1 VDDA2 A8 B8 CLKIN_H CLKIN_L C9 D8 C7 PWROK LDTSTOP_L RESET_L C32 13 C31 RN54 1K 8P4R 0402 2 CPU_CLK CPU_CLK 3900P 50V X7R 0402 R37 169 1% 0402 BR2 BC2 BC5 16.9 1% 0402 1UF 10V Y5V 0402 0.1UF 16V Y5V 0402 2 13 1 1 CPU_M_VREFF AL3 CPU_PRESENT_L AL6 AK6 SIC SID THERMTRIP_L PROCHOT_L AL10 TDI AJ10 TRST_L AH10 TCK AL9 300 0402TMS 2A5 DBREQ_L G2 G1 E12 VID(5) VID(4) VID(3) VID(2) VID(1) VID(0) VDD_FB_H VDD_FB_L VTT_SENSE TDO D2 D1 C1 E3 E2 E1 VID5 VID4 VID3 VID2 VID1 VID0 K8_VID5 K8_VID4 K8_VID3 K8_VID2 K8_VID1 K8_VID0 CPU_THERMTRIP PROCHOT AK7 AL7 AK10 TP_CPU_TDO1 B6 CPU_DBREQ1 AK11 AL11 TP_VDDIOFB1 TP_VDDIOFB_1 31 31 31 31 31 31 CPU_THERMTRIP_ 13 PROCHOT 13 BTP_CPU_TDO1 TP /NI C DBRDY VDDIO_FB_H VDDIO_FB_L PSI_L F1 HTREF1 HTREF0 V8 V7 R45 R43 TEST29_H TEST29_L C11 D11 FBCLKOUT FBCLKOUT* TEST24 TEST23 TEST22 TEST21 TEST20 AK8 AH8 AJ9 AL8 AJ8 CPU_TEST24 CPU_TEST23 CPU_TEST22 CPU_TEST21 CPU_TEST20 TEST28_H TEST28_L TEST27 TEST26 TEST10 TEST8 J10 H9 AK9 AK5 G7 D4 CPU_TEST27 CPU_TEST26 BCPU_DBREQ1 TP /NI TP /NI BTP_VDDIOFB1 BTP_VDDIOFB_1 TP /NI +1.2V_HT BTP_VDDIOSENSE1 2 2 510 0402 510 0402 300 0402 300 0402 INTERNAL MISC L25 L26 L31 L30 B RSVD1 RSVD2 RSVD3 RSVD4 W26 W25 AE27 U24 V24 AE28 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 Y31 Y30 AG31 V31 W31 AF31 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 E20 B19 RSVD19 RSVD20 RSVD21 AL4 AK4 AK3 RSVD22 RSVD23 F2 F3 RSVD24 RSVD25 RSVD26 G4 G3 G5 RSVD27 RSVD28 RSVD29 RSVD30 RSVD31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36 RSVD37 RSVD38 AD25 AE24 AE25 AJ18 AJ20 C18 C20 G24 G25 H25 V29 W30 ALERT_ R131 R97 300 0402 /NI 33,34 CPU_THERMDC 33 CPU_THERMDA +1.8V_SUS 300 0402 A10 B10 F10 E9 AJ7 F6 TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9 D6 E7 F8 C5 AH9 TEST17 TEST16 TEST15 TEST14 TEST12 E5 AJ5 AG9 AG8 AH7 AJ6 TEST7 TEST6 THERMDC THERMDA TEST3 TEST2 44.2 1% 0402 44.2 1% 0402 2 R30 R31 R28 R27 CPU1E M_VREF M_ZN M_ZP LAYOUT: ROUTE 80 OHM DIFF IMPEDENCE LAYOUT: PLACE WITHIN INCH OF CPU R29 80.6 1% 0402 8/5/8/20 +1.8V_SUS +1.8V_SUS R70 R68 CPU_M_VREFF F12 39.2 1% 0402AH11 39.2 1% 0402AJ11 R126 300 0402 PROCHOT CPU_THERMTRIP CPU_TEST27 CPU_TEST26 CPU_TEST22 CPU_TEST21 CPU_TEST24 CPU_TEST20 RN14 330 8P4R 0402 RN55 B 330 8P4R 0402 A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the M2 CNTL / STRAPS applicable civil and/or criminal Size Document Number penalties.◆ Custom Rev 6.2 N68SA-M2S Date: Friday, June 04, 2010 Sheet of 39 2 BC1 1UF 10V Y5V 0402 +1.2V_HT_CPU +V_CPU C104 10UF 10V 0805 Y5V 1 C101 10UF 10V 0805 Y5V D D +1.2V_HT +V_CPU +V_CPU CPU1F VDD1 C B A4 A6 AA8 AA10 AA12 AA14 AA16 AA18 AB7 AB9 AB11 AC4 AC5 AC8 AC10 AD2 AD3 AD7 AD9 AE10 AF7 AF9 AG4 AG5 AG7 AH2 AH3 B3 B5 B7 C2 C4 C6 C8 D3 D5 D7 D9 E4 E6 E8 E10 F5 F7 F9 F11 G6 G8 G10 G12 H7 H11 H23 J8 J12 J14 J16 J18 J20 J22 J24 K7 K9 K11 K13 K15 K17 K19 K21 K23 L4 L5 L8 L10 L12 Y17 Y19 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 VDD55 VDD56 VDD57 VDD58 VDD59 VDD60 VDD61 VDD62 VDD63 VDD64 VDD65 VDD66 VDD67 VDD68 VDD69 VDD70 VDD71 VDD72 VDD73 VDD74 VDD75 VDD150 VDD151 +V_CPU CPU1G CPU1H A3 A7 A9 A11 AA4 AA5 AA7 AA9 AA11 AA13 AA15 AA17 AA19 AA21 AA23 AB2 AB3 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC7 AC9 AC11 AC13 AC15 AC17 AC19 AC21 AC23 AD8 AD10 AD12 AD14 AD16 AD20 AD22 AD24 AE4 AE5 AE9 AE11 AF2 AF3 AF8 AF10 AF12 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AF28 AG10 AG11 AH14 AH16 AH18 AH20 AH22 AH24 AH26 AH28 AH30 AK2 AK14 AK16 AK18 Y14 Y16 L14 L16 L18 M2 M3 M7 M9 M11 M13 M15 M17 M19 N8 N10 N12 N14 N16 N18 P7 P9 P11 P13 P15 P17 P19 R4 R5 R8 R10 R12 R14 R16 R18 R20 T2 T3 T7 T9 T11 T13 T15 T17 T19 T21 U8 U10 U12 U14 U16 U18 U20 V9 V11 V13 V15 V17 V19 V21 W4 W5 W8 W10 W12 W14 W16 W18 W20 Y2 Y3 Y7 Y9 Y11 Y13 Y15 Y21 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 VDD55 VDD56 VDD57 VDD58 VDD59 VDD60 VDD61 VDD62 VDD63 VDD64 VDD65 VDD66 VDD67 VDD68 VDD69 VDD70 VDD71 VDD72 VDD73 VDD74 VDD75 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 AK20 AK22 AK24 AK26 AK28 AK30 AL5 B4 B9 B11 B14 B16 B18 B20 B22 B24 B26 B28 B30 C3 D14 D16 D18 D20 D22 D24 D26 D28 D30 E11 F4 F14 F16 F18 F20 F22 F24 F26 F28 F30 G9 G11 H8 H10 H12 H14 H16 H18 H22 H24 H26 H28 H30 J4 J5 J7 J9 J11 J13 J15 J17 J19 J21 J23 K2 K3 K8 K10 K12 K14 K16 K18 K20 K22 Y18 AA20 AA22 AB13 AB15 AB17 AB19 AB21 AB23 AC12 AC14 AC16 AC18 AC20 AC22 AD11 AD23 AE12 AF11 L20 L22 M21 M23 N20 N22 P21 P23 R22 T23 U22 V23 W22 Y23 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 N17 N19 N21 N23 P2 P3 P8 P10 P12 P14 P16 P18 P20 P22 R7 R9 R11 R13 R15 R17 R19 R21 R23 T8 T10 T12 T14 T16 T18 T20 T22 U4 U5 U7 U9 U11 U13 U15 U17 U19 U21 U23 V2 V3 V10 V12 V14 V16 V18 V20 V22 W9 W11 W13 W15 W17 W19 W21 W23 Y8 Y10 Y12 W7 Y20 Y22 +1.8V_SUS C302 0.1UF 16V Y5V 0402 C49 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V C53 CPU1I +0.9V_SUS VDD3 VDD2 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS240 VSS241 +1.2V_HT_CPU VDDIO AJ4 AJ3 AJ2 AJ1 VLDT_A1 VLDT_A2 VLDT_A3 VLDT_A4 D12 C12 B12 A12 VTT1 VTT2 VTT3 VTT4 AB24 AB26 AB28 AB30 AC24 AD26 AD28 AD30 AF30 M24 M26 M28 M30 P24 P26 P28 P30 T24 T26 T28 T30 V25 V26 V28 V30 Y24 Y26 Y28 Y29 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO29 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27 VDDIO28 VLDT_B1 VLDT_B2 VLDT_B3 VLDT_B4 VTT5 VTT6 VTT7 VTT8 VTT9 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 H6 H5 H2 H1 AK12 AJ12 AH12 AG12 AL12 +0.9V_SUS K24 K26 K28 K30 L7 L9 L11 L13 L15 L17 L19 L21 L23 M8 M10 M12 M14 M16 M18 M20 M22 N4 N5 N7 N9 N11 N13 N15 C B A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the M2 PWR / GND applicable civil and/or criminal Size Document Number penalties.◆ Custom Date: Rev 6.2 N68SA-M2S Friday, June 04, 2010 Sheet of 39 BC38 D BC34 BC29 BC24 1 1 1 +1.8V_SUS BC16 BC3 BC11 D 2 2 2 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V C131 C80 C92 C52 1 1 1 +1.8V_SUS C54 C85 C84 2 2 2 10UF 10V 0805 Y5V 1UF 10V Y5V 0402 0.1UF 16V Y5V 0402 10UF 10V 0805 Y5V 1UF 10V Y5V 0402 10UF 10V 0805 Y5V 1UF 10V Y5V 0402 +V_CPU 2 C99 C297 C298 C299 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 C38 C35 C 0.1UF 16V Y5V 0402 蚚衾HT輻脯 C27 2 C117 10UF 10V 0805 Y5V 0.1UF 16V Y5V 0402 10UF 10V 0805 Y5V C25 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V C105 C 1 +0.9V_SUS 0.1UF 16V Y5V 0402 PLACE BOTTOM SIDE DECOUPLING BC82 C29 C30 C109 1 1 C23 C112 C145 2 2 2 10UF 10V 0805 Y5V10UF 10V 0805 Y5V10UF 10V 0805 Y5V 10UF 10V 0805 Y5V10UF 10V 0805 Y5V10UF 10V 0805 Y5V10UF 10V 0805 Y5V 2 2 2 2 BC36 BC8 BC18 BC25 BC50 BC60 BC61 BC66 BC79 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 1UF 16V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 1 1 1 1 1 +V_CPU B B 1 BC15 1UF 10V Y5V 0402 BC4 1UF 16V 0805 Y5V 1UF 10V Y5V 0402 BC42 10UF 10V 0805 Y5V 2 BC31 1UF 16V 0805 Y5V BC12 1UF 16V 0805 Y5V BC35 10UF 10V 0805 Y5V 1 1 BC17 1UF 16V 0805 Y5V 2 BC28 10UF 10V 0805 Y5V BC21 10UF 10V 0805 Y5V BC30 1 +V_CPU A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the M2 DECOUPLING applicable civil and/or criminal Size Document Number penalties.◆ Custom Rev 6.2 N68SA-M2S Date: Friday, June 04, 2010 Sheet of 39 +0.9V_SUS 5,11 MEM_MA0_CLK_H2 +0.9V_SUS C102 5,11 MEM_MA_ADD[15 0] 1.5P 50V NPO 0402 5,11 MEM_MA0_CLK_L2 MEM_MA_ADD[15 0] MEM_MB_ADD9 MEM_MA_ADD8 MEM_MA_ADD5 MEM_MB_ADD7 RN7 47 8P4R 0402 MEM_MB_ADD1 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MB_ADD2 MEM_MB_WE_L MEM_MA_BANK0 MEM_MA_RAS_L MEM_MB_ADD5 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MA_ADD3 47 8P4R 0402 MEM_MA_CAS_L MEM_MA_ADD13 MEM_MA0_CS_L1 RN18 47 8P4R 0402 MEM_MB_ADD14 MEM_MA_CKE0 MEM_MA_ADD15 MEM_MA_ADD14 6,12 MEM_MB_ADD[15 0] MEM_MB_ADD[15 0] RN5 47 8P4R 0402 RN6 47 8P4R 0402 RN8 47 8P4R 0402 MEM_MB_ADD0 MEM_MB_BANK1 MEM_MB_ADD10 MEM_MB_BANK0 RN11 47 8P4R 0402 MEM_MA_ADD10 MEM_MA_BANK1 MEM_MA_ADD0 MEM_MB_RAS_L RN12 47 8P4R 0402 MEM_MB_CKE0 MEM_MB_ADD15 MEM_MA_BANK2 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD9 RN10 47 8P4R 0402 MEM_MA_ADD7 MEM_MB_BANK2 MEM_MB_ADD12 MEM_MB_ADD11 RN13 47 8P4R 0402 MEM_MB_ADD8 MEM_MA_ADD6 MEM_MB_ADD6 MEM_MA_ADD4 5,11 MEM_MA0_CLK_H1 C33 5,11 MEM_MA0_CLK_L1 C76 5,11 MEM_MA0_CLK_H0 5,11 MEM_MA0_CLK_L0 C106 6,12 MEM_MB0_CLK_H2 6,12 MEM_MB0_CLK_L2 C36 6,12 MEM_MB0_CLK_H1 6,12 MEM_MB0_CLK_L1 C C75 6,12 MEM_MB0_CLK_H0 6,12 MEM_MB0_CLK_L0 1.5P 50V NPO 04021.5P 50V NPO 04021.5P 50V NPO 04021.5P 50V NPO 04021.5P 50V NPO 0402 D RN9 RN4 LAYOUT: FRONT SIDE PLACE ALTERNATING GND AND 1.8V ALONG 0.9V VTT FILL 47 8P4R 0402 MEM_MB0_ODT0 MEM_MB_ADD13 MEM_MB0_CS_L1 MEM_MA0_ODT0 RN17 47 8P4R 0402 MEM_MA0_CS_L0 MEM_MA_WE_L MEM_MB0_CS_L0 MEM_MB_CAS_L RN15 47 8P4R 0402 RN3 D 47 8P4R 0402 C +1.8V_SUS +1.8V_SUS +0.9V_SUS +0.9V_SUS B +1.8V_SUS C122 0.1UF 16V Y5V 0402 C115 0.1UF 16V Y5V 0402 C58 0.1UF 16V Y5V 0402 C110 0.1UF 16V Y5V 0402 C55 0.1UF 16V Y5V 0402 C42 0.1UF 16V Y5V 0402 C62 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 C120 0.1UF 16V Y5V 0402 C50 0.1UF 16V Y5V 0402 C74 0.1UF 16V Y5V 0402 C126 C48 0.1UF 16V Y5V 0402 C41 0.1UF 16V Y5V 0402 C69 0.1UF 16V Y5V 0402 C107 0.1UF 16V Y5V 0402 C46 5,11 5,11 5,11 5,11 5,11 5,11 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2 MEM_MA_CAS_L MEM_MA_WE_L MEM_MA_RAS_L BC44 BC41 BC9 BC47 BC46 BC45 BC37 BC32 BC33 BC27 BC26 BC22 BC23 BC19 BC20 BC14 BC43 BC13 BC10 BC48 BC7 BC6 MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 6,12 6,12 6,12 6,12 6,12 6,12 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2 MEM_MB_CAS_L MEM_MB_WE_L MEM_MB_RAS_L MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15 C86 C82 C61 C90 C89 C87 C81 C78 C77 C73 C72 C70 C71 C68 C67 C64 C83 C65 C60 C91 C56 C57 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 B 0.1UF 16V Y5V 0402 5,11 MEM_MA_CKE0 6,12 MEM_MB_CKE0 5,11 MEM_MA0_CS_L0 5,11 MEM_MA0_CS_L1 6,12 MEM_MB0_CS_L0 6,12 MEM_MB0_CS_L1 5,11 MEM_MA0_ODT0 6,12 MEM_MB0_ODT0 A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the DDR ADD/CTL/VTT TERMINATI applicable civil and/or criminal Size Document Number penalties.◆ N68SA-M2S Custom Date: Friday, June 04, 2010 Sheet 10 Rev 6.2 of 39 A B C D E +5V +5V 14 U2A SN74ACT08 PS1 15 DAC_VSYNC U2B SN74ACT08 33 0402 POLY FUSE 1.1A R12 0805 /NI +5V DAC_HSYNC 14 15 R24 R22 +5V C14 0.1UF 16V Y5V 0402 33 0402 R44 2.2K 0402 DAC_RED R15 DDC_CLK R40 R39 R36 150 1% 0402 150 1% 0402 150 1% 0402 3 68nH 300mA 0.85 0603 FB9 68nH 300mA 0.85 0603 22 0402 C44 C40 C37 5P 50V NPO 0402 5P 50V NPO 0402 LQ4 B2 B1 CM1293 A2 + A1 15 FB10 JVGA1 VGA CONN PC99 SHORT 11 MONGREEN_A MONSDA_A 12 MONBLUE_A MONHSYNC_A 13 DDCPOWER_A MONVSYNC_A 14 10 MONSCL_A 15 MONRED_A 22 0402 +5V Q38 BAV99 SOT23 /NI KA CM1293 SOT23-6 /NI +3.3V C15 C18 C19 C45 C43 C39 C34 C47 470P 50V X7R 0402 5P 50V NPO 0402 10P 50V NPO 0402 5P 50V NPO 0402 10P 50V NPO 0402 5P 50V NPO 0402 470P 50V X7R 0402 470P 50V X7R 0402 /NI Q37 BAV99 SOT23 /NI KA VGA CONNECTOR 5P 50V NPO 0402 K DAC_BLUE 68nH 300mA 0.85 0603 +5V A 15 R42 K DAC_GREEN 15 DDC_DATA A 15 FB11 G1 G2 R23 2.2K 0402 15 C51 0.1UF 16V Y5V 0402 /NI R52 0805 2 1 ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the VGA CONNECTOR applicable civil and/or criminal Size Document Number penalties.◆ Custom Rev 6.2 N68SA-M2S Date: A B C D Friday, June 04, 2010 Sheet E 26 of 39 +5V +5V_DUAL +5V R57 R226 JUSBPWR1 0805 /NI HEADER 1X3 USB_0_1_OC_ 18 PS2 POLY FUSE 2.0A USB_2_3_OC_ 18 10K 1% 0402 C20 0.1UF 16V Y5V 0402 FOR EMI NEAR C172 USB SIGNAL VIA C251 0.1UF 16V Y5V 0402 USB_POWER1 R55 UST3+ C95 0805 0.1UF 16V Y5V 0402 B1 USB_POWER1 UST2+ JUSB1 CM1293 SOT23-6 0.1UF 16V Y5V 0402 G3 G1 G4 G2 UST0UST0+ UST1UST1+ USB UST2- B2 B1 CM1293 A2 + A1 C118 USB LAN Q16 UST3- D UST3- B2 DATA0- UST3+ B3 DATA0+ B4 GND0 A1 UST2- A2 USB CONN C114 10P 50V NPO 0402 C116 C108 C111 UST2+ + A4 C123 C121 C125 C119 10P 50V NPO 0402 10P 50V NPO 0402 10P 50V NPO 0402 10P 50V NPO 0402 10P 50V NPO 0402 10P 50V NPO 0402 10P 50V NPO 0402 FB7 A3 CT9 1000UF 6.3V 8X12 D JUSBLAN1A VCC0 GND2 G3 GND3 G4 GND4 G5 GND5 G6 VCC1 DATA1DATA1+ GND1 RJ45USBA CONN 0805 +5V C C RN16 18 18 18 18 UST0+ UST0UST1+ UST1- 18 18 18 18 USB_3 USB_3_ USB_2 USB_2_ 10 8P4R 0402 UST3+ UST3UST2+ UST2- C127 0.1UF 16V Y5V 0402 C103 0.1UF 16V Y5V 0402 C211 0.1UF 16V Y5V 0402 10 8P4R 0402 JUSBPWR2 HEADER 1X3 +5V_DUAL +5V USB_0 USB_0_ USB_1 USB_1_ RN19 R140 R227 0805 /NI USB_4_5_OC_ 18 USB_6_7_OC_ 18 10K 1% 0402 PS3 POLY FUSE 2.0A USB_8_9_OC_ 18 C172 USB_POWER2 C181 USB_5_ USB_5 JUSB2 10 0.1UF 16V Y5V 0402 USB_4_ USB_4 18 18 18 18 USB_6_ USB_6 JUSB3 10 USB_4 USB_5_ USB_POWER2 USB_5 USB_6_ USB_6 CM1293 SOT23-6 USB_8 UST0- B2 B1 CM1293 A2 + A1 JUSB4 10 0.1UF 16V Y5V 0402 USB_8_ USB_8 18 18 HEADER 2X5 N9 R-USB B 6 USB_7_ USB_POWER2 USB_7 CM1293 SOT23-6 Q14 Q26 USB_8_ B2 B1 CM1293 A2 + A1 1 USB_9_ USB_9 Q21 B2 B1 CM1293 A2 + A1 Q24 USB_4_ 0.1UF 16V Y5V 0402 18 18 USB_7_ 18 USB_7 18 + HEADER 2X5 N9 R-USB CT16 1000UF 6.3V 8X12 HEADER 2X5 N9 R-USB B USB_9_ USB_POWER2 UST0+ USB_9 B2 B1 CM1293 A2 + A1 18 18 C184 UST1USB_POWER1 UST1+ CM1293 SOT23-6 CM1293 SOT23-6 A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the USB INTERFACE applicable civil and/or criminal Size Document Number penalties.◆ Custom Rev 6.2 N68SA-M2S Date: Friday, June 04, 2010 Sheet 27 of 39 +3.3V_DUAL D D13 R224 RN50 RN46 RN48 RN44 2.2K 0402 2.2K 8P4R 0402 2.2K 8P4R 0402 2.2K 8P4R 0402 2.2K 8P4R 0402 D +5V RIJ0_C SS12/5817 SMA 8 8 LPT 7 7 PARALLEL - CONNECTOR RN32 10K 8P4R 0402 33 33 33 33 SER_RI_ C 18 E B Q27 2N3904 SOT23 WAKE ON LAN PD0 PD2 PD1 PD3 33 33 33 33 33 33 33 33 PD4 PD5 PD6 PD7 STB# ALF# INIT# SLCTIN# P_PRD0 P_PRD2 P_PRD1 P_PRD3 RN47 33 8P4R 0402 PRD0 PRD2 PRD1 PRD3 P_PRD4 P_PRD5 P_PRD6 P_PRD7 P_-STB P_-AFD P_-INIT P_-SLIN RN49 7 33 8P4R 0402 PRD4 PRD5 PRD6 PRD7 -STB AFD -INIT -SLIN RN45 33 8P4R 0402 33 ACK# 33 EEROR# -STB AFD -SLIN P_-ACK PRD2 PRD0 -INIT P_-ERR PRD1 PRD6 PRD5 PRD4 PRD3 C C PRD7 COM1 33 +5V +12V U9 33 33 33 33 33 33 33 33 DCD1# DSR1# SINA RTS1# SOUTA CTS1# DTR1# RI1# 20 19 18 17 16 15 14 13 12 11 VCC ROUT1 ROUT2 ROUT3 DIN1 DIN2 ROUT4 DIN3 ROUT5 GND V+ RIN1 RIN2 RIN3 DOUT1 DOUT2 RIN4 DOUT3 RIN5 V- 10 DCDJ0_C DSRJ0_C RXDJ0_C RTSJ0_C TXDJ0_C CTSJ0_C DTRJ0_C RIJ0_C ST75185CTR TSSOP C289 C288 C290 C291 C293 C294 C295 C296 -12V 220P 50V X7R 0402 /NI 220P 50V X7R 0402 /NI 220P 50V X7R 0402 /NI 220P 50V X7R 0402 /NI 220P 50V X7R 0402 /NI 220P 50V X7R 0402 /NI 220P 50V X7R 0402 /NI 220P 50V X7R 0402 /NI BUSY 33 PE 33 SLCT P_PE P_SLCT JCOM1 G1 DCDJ0_C DSRJ0_C RXDJ0_C RTSJ0_C TXDJ0_C CTSJ0_C DTRJ0_C RIJ0_C G2 D CONN 9PIN PC99 IO_GND B P_BUSY -STB PRD0 PRD1 PRD2 PRD3 PRD4 PRD5 PRD6 PRD7 P_-ACK P_BUSY P_PE P_SLCT 11 13 15 17 19 21 23 25 JPRNT1 HEADER 2X13 N26 AFD P_-ERR -INIT -SLIN 10 12 14 16 18 20 22 24 B A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the SERIAL & PARALLEL applicable civil and/or criminal Size Document Number penalties.◆ Custom Rev 6.2 N68SA-M2S Date: Friday, June 04, 2010 Sheet 28 of 39 18 AC_BITCLK AR25 ACBITCLK 22 0402 ARN1 CD_R CD_L CD_GND AC19 10P 50V NPO 0402 LINE2_L 30 LINE2_R LINE2_L AR15 LINE2_R AR16 ACT4 ACT3 75 0402 ACT2 75 0402 ACT1 + D 30 100UF 16V 5X11 2mm LR CD_L AC10 1UF 10V Y5V 0402 CD_GND AC9 1UF 10V Y5V 0402 CD_R AC8 1UF 10V Y5V 0402 FRONT_JD MIC1_JD 30 LINE1_JD MIC2_L 30 MIC2_R FRONT_JD MIC1_JD AR6 AR5 5.1K 1% 0402 20K 1% 0402 LINE1_JD AR3 10K 1% 0402 AR37 75 0402 ACT5 AR38 75 0402 ACT6 + GND_AUD 30 30 30 + ARN2 47K 8P4R 0402 R1 SENSE_A 100UF 16V 5X11 2mm LR AR39 75 0402 100UF 16V 5X11 2mm LR AR40 75 0402 AC14 10UF 10V 0805 Y5V AR41 75 0402 AC15 10UF 10V 0805 Y5V AR42 75 0402 AC7 10UF 10V 0805 Y5V AR43 75 0402 AC13 10UF 10V 0805 Y5V AR44 75 0402 100UF 16V 5X11 2mm LR AU1 WAFER 1X4 BLACK 47K 8P4R 0402 AC_RST_ AC_SYNC AC_SDOUT AC_SDIN_0 + R0603 JCDIN1 18 18 18 18 PORT-E-L PORT-E-R 100UF 16V 5X11 2mm LR 100UF 16V 5X11 2mm LR PORT-F-L PORT-F-R KA LINE2_VREFO 11 10 14 15 18 19 20 16 17 13 37 45 46 12 26 42 RESET# (I) FRONT_OUT_L (B) SYNC (I) FRONT_OUT_R (B) SDOUT (I) LINE_IN1_L (B) SDIN (O) LINE_IN1_R (B) BITCLK (I) MIC1_L (B) LINE_IN2_L (B) MIC1_R (B) LINE_IN2_R (B) CENTER_OUT (O) CD_L (I) LFE_OUT (O) CD_GND (I) SURR_L (B) CD_R (I) SURR_R (B) MIC2_L (B) SENSE_B (I) MIC2_R (B) DCVOL (I) SENSE_A (I) JDREF LINE1_VREFO_R (O) SPDIFO (O) SIDESURR_L (O) SPDIFI/EAPD (B) SIDESURR_R (O) VREF (O) PC_BEEP (I) MIC1_VREFO_L (O) GPIO0 (B) LINE1_VREFO-L (O) GPIO1 (B) MIC2_VREFO (O) GND1 (P) LINE2_VREFO (O) GND2 (P) MIC1_VREFO_R (O) VCC3_1 (P) VCC3_2 (P) AGND1 (P) AVCC_1 (P) AGND2 (P) AVCC_2 (P) 35 36 23 24 21 22 43 44 39 41 34 33 40 48 47 27 28 29 30 31 32 25 38 ALC662 LQFP48 LQFP48-0_5 AQ4 BAT54A SOT23 PORT-D-L PORT-D-R PORT-C-L PORT-C-R PORT-B-L PORT-B-R AR31 EXT_VOL_CTRL JDREF SPDIFO MIC1_VREFO 47 0402 LINEOUT_L 30 LINEOUT_R 30 LINE1_L 30 LINE1_R 30 MIC1_L 30 MIC1_R 30 FRONT_IO_SENSE D 30 R2 30 SPDIFO C192 0.1UF 16V Y5V 0402 C2 AC18 10UF 10V 0805 Y5V MIC1_VREFO 30 MIC2_VREFO LINE2_VREFO AL7 +3.3V 2.7 0805 GND_AUD AC17 AC20 1UF 10V Y5V1UF 0402 10V Y5V 0402 KA CD_IN + + AC22 1UF 10V Y5V 0402 1UF 10V Y5V 0402 C 30 AR17 AR14 2.2K 04022.2K 0402 AQ1 BAT54A SOT23 GND_AUD LINE2-L LINE2-R LINE2_L LINE2_R K GND_AUD C A A K AC16 GND_AUD AR18 30 30 2.2K 0402 AR19 2.2K 0402 +5VA +12V R35 + 30 30 MIC2_R MIC2_L MIC2_R MIC2_L 0805 CT28 1UF 16V 0805 Y5V +5VA GND_AUD R1 Q36 I O A R210 110 1% 0402 AR26 10K 1% 0402 /NI + AZ1117H-ADJ SOT-223 EXT_VOL_CTRL CT29 C303 100UF 16V 5X11 2mm LR R212 0.1UF 16V Y5V 0402 330 1% 0402 JDREF R2 B GND_AUD Vout=Vref (1.25V) X ( 1+R2/R1 ) =5V PLACE CLOSE TO CODEC AR1 IO_GND B AR27 20K 1% 0402 GND_AUD C318 100P 50V NPO 0402 C319 100P 50V NPO 0402 0805 GND_AUD IO_GND A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the AUDIO CODEC applicable civil and/or criminal Size Document Number penalties.◆ Custom Date: Rev 6.2 N68SA-M2S Friday, June 04, 2010 Sheet 29 of 39 +3.3V 0: INTEL HD AUDIO DONGLE CONNECTED AR13 10K 1% 0402 29 MIC2_L 29 MIC2_R 29 LINE2_R 29 FRONT_IO_SENSE 29 LINE2_L Rear Panel Onboard Analog I/O AC21 29 LINE1_L 29 LINE1_R AL2 LINE1_R AL1 LINE1_L_ BEAD 60 0603 BEAD 60 0603 29 LINE1_JD LINE1_R_ MIC2_L MIC2_R LINE2_R FRONT_IO_SENSE LINE2_L 1: INTEL HD AUDIO DONGLE UNCONNECTED GND_AUD GPI 18 HEADER 2X5 N8 R D LINE1_L JAUDIOF1 10 JAUDIO1D 32 33 34 35 1000P 50V X7R 0402 BLUE JACK AR32 22K 0402 AR33 22K 0402 AR34 22K 0402 AR36 0402 /NI AR11 39.2K 1% 0402 D AR12 20K 1% 0402 AR35 22K 0402 AUDIO JACK 3HD BLUE AR4 22K 0402 AR2 22K 0402 GND_AUD AC2 AC1 100P 50V NPO 0402 29 G2 G1 C 29 JAUDIO1A LINEOUT_L LINEOUT_R LINEOUT_L AL6 BEAD 60 0603 LINEOUT_L_ LINEOUT_R AL4 29 FRONT_JD BEAD 60 0603 LINEOUT_R_ 22 23 24 25 G4 G3 G4 AR10 22K 0402 H1 G3 G5 JAUDIO1C C AUDIO JACK 3HD G2 G1 GND_AUD 100P 50V NPO 0402 AR8 22K 0402 AC6 AC4 100P 50V NPO 0402 100P 50V NPO 0402 GREEN JACK AUDIO JACK 3HD IO_GND AQ2 BAT54A SOT23 K MIC1_VREFO 29 MIC1_VREFO AR21 2.2K 0402 +5V AR28 JSPDIF_OUT1 KA A AR22 2.2K 0402 0805 AC23 1UF 16V 0805 Y5V B 29 MIC1_L 29 MIC1_R MIC1_L AL3 BEAD 60 0603 MIC1_R AL5 29 BEAD 60 0603 MIC1_L_ MIC1_JD MIC1_R_ SPDIFO 29 WAFER 1X3 BLACK B JAUDIO1B PINK JACK AUDIO JACK 3HD AR7 22K 0402 29 AR9 22K 0402 GND_AUD AC3 AC5 100P 50V NPO 0402 100P 50V NPO 0402 GND_AUD 29 GND_AUD GND_AUD A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the AUDIO PORT applicable civil and/or criminal Size Document Number penalties.◆ Custom Date: Rev 6.2 N68SA-M2S Friday, June 04, 2010 Sheet 30 of 39 +5V VIN +12V +V_CPU D +3.3V PQ1 D PC7 10P 50V NPO 0402 14 15 PC6 470P 50V X7R 0402 /NI C PR6 750 1% 0402 /NI 16 COMP FB IDROOP +V_CPU 27 UGATE2 PHASE2 LGATE2 26 25 28 ISEN2+ ISEN2- 19 20 PVCC3 42 2.2 0402 CPU_CORE_FB IE2+ IE2PHASE2 ISEN2 18 VSEN BOOT3 40 RGND UGATE3 PHASE3 LGATE3 39 38 41 ISEN3+ ISEN3- 44 43 PC5 17 CPU_CORE_FB_ V_6312 0402 PR25 2.7 0805 0.01UF 50V X7R 0402 /NI PR39 82K 0402 PR42 1K 0402 /NI IE3- 0402 /NI DRSEL/SCL PR44 0402 /NI OVPSEL/SDA 11 45 B PC27 0.1UF 16V X7R 0402 /NI PR8 PR15 PR24 REF FS SS/RST/A0 ISEN4+ ISEN4- 21 22 PWM4 24 EN_PH4 23 PR35 PR34 PR14 + + BPR4 ISEN_SHORT /NI BPR3 ISEN2 PQ5 ISEN_SHORT /NI PC23 4.7UF 16V Y5V 0805 PL4 P0903BDG TO252 PH3 C134 220P 50V X7R 0402 LG3 PR37 0805 V_6312 INDUCTOR 1UH 27A 11X11 PR36 2.7 0805 G PQ6 BPR5 ISEN_SHORT /NI B PC26 1000P 50V X7R 0402 P75N02LDG TO252 PHASE3 PC2 0402 0402 /NI + D S 0805 100K 0402 0.1UF 16V X7R 0402 7.5K 1% 0402 PR43 C 820UF-S 2.5V 8X8 ELITE PC24 1000P 50V X7R 0402 G UG3 PC20 0.1UF 16V X7R 0402 PC17 OFS 1000UF 6.3V 8X12 6.3X8 PHASE2 ISEN3 PR23 GND 18,20,22 SMB_SDA INDUCTOR 1UH 27A 11X11 P75N02LDG TO252 49 18,20,22 SMB_SCL P0903BDG TO252 VIN PHASE3 12 ISEN_SHORT /NI PC21 4.7UF 16V Y5V 0805 PL3 PR21 360 1% 0402 5.1K 0402 /NI 1000UF 6.3V 8X12 6.3X8 PQ3 PR20 2.2 0402 IE3+ PCT8 G PQ4 +12V 1000UF 6.3V 8X12 6.3X8 BPR1 PR30 2.7 0805 PC16 4.7UF 16V Y5V 0805 PC15 0.1UF 16V X7R 0402 PR11 100 1% 0402 PR41 7.5K 1% 0402 PC4 0.1UF 16V X7R 0402 C88 PC1 220P 50V X7R 0402 0.1UF 16V X7R 0402 LG2 PR33 0805 1000UF 6.3V 8X12 6.3X8 PCT6 ISEN1 PH2 PR10 360 1% 0402 OVL PR5 0805 100K 0402 D 100 1% 0402 37 PR4 PHASE1 PR32 PR31 1000UF 6.3V 8X12 6.3X8 PCT5 VIN G UG2 0.1UF 16V X7R 0402 PC22 1000P 50V X7R 0402 D 35 34 PR18 360 1% 0402 IE1+ ISEN1 IE1PC14 PHASE1 PC13 0.1UF 16V X7R 0402 PR19 7.5K 1% 0402 PR9 PC3 0.1UF 16V X7R 0402 PR2 PR3 100 1% 0402 BPR2 ISEN_SHORT /NI P75N02LDG TO252 0.1UF 16V X7R 0402 PCT3 3 G PQ2 2.2 0402 32 33 30 BOOT2 VDIFF PR27 2.7 0805 0805 S 13 PR29 31 5.62K 1% 0402 3900P 50V X7R 0402 PR12 562 1% 0402 LG1 PC12 1000UF 6.3V 8X12 6.3X8 + PR17 PCT1 + 29 INDUCTOR 1UH 27A 11X11 S K8_VID5 K8_VID4 K8_VID3 K8_VID2 K8_VID1 K8_VID0 C79 220P 50V X7R 0402 D 7 7 7 P0903BDG TO252 S VCC 18 CPU_VLD 18 CPUVDD_EN 0805 100K 0402 PH1 PC9 4.7UF 16V Y5V 0805 10 PC11 PC19 PR16 PR22 1UF 16V 0805 Y5V 0.1UF 16V Y5V 0402 1K 1% 0402 PU1 1K 1% 0402 ISL6312CRZ 37 PGOOD PVCC1_2 36 PC18 0.1UF 16V Y5V 0402 /NI 46 EN VID7 BOOT1 47 VID6 48 VID5 UGATE1 VID4 PHASE1 VID3 LGATE1 VID2 VID1 VID0 ISEN1+ VRSEL ISEN1PR7 PC8 PR28 PR26 D PC25 4.7UF 16V Y5V 0805 PL2 G UG1 S PR13 PC10 PR1 2.7 0805 1UF 10V Y5V 0402 2.7 0805 V_6312 D +5V S PR38 1K 1% 0402 249K 1% 0402 150K 1% 0402 0.01UF 25V X7R 0402 BPR6 ISEN3 ISEN_SHORT /NI ISL6312CR FOR K8 940 POWER CKT VIN +12V_P PL1 1.2UH 30A 11X10.5 CARVE 2 + + PCT7 PCT4 3 1500UF 16V 10X20X5 LR O 8X11 + PCT2 A A 1500UF 16V 10X20X5 LR O 8X11 PC36 1000P 50V X7R 0402 +12V_P JATXPWR4 1500UF 16V 10X20X5 LR O 8X11 2 4 POWER CONN ATX12V 2X2 Title VCORE POWER SUPPLY Size Document Number Custom Date: Rev 6.2 N68SA-M2S Thursday, June 03, 2010 Sheet 31 of 39 MEM_VDD MEM_STR +5V S 35 DUALS_FET_GATE +12V +5V_STBY R34 1K 0402 G Q8 P0903BDG TO252 R54 10K 1% 0402 D R56 +5V_DUAL C 4.7K 0402 B 33 VTT_MEM R60 PWRGD_SIO 4.7K 0402 D + Q11 2N3904 SOT23 E B C94 +5V_DUAL Q12 2N3904 SOT23 E C C151 C133 1UF 16V 0805 Y5V 0.1UF 16V Y5V 0402 D +1.8V_SUS C142 CT4 1000UF 6.3V 8X12 +5V_STBY D3 R59 4.7K 0402 0.1UF 16V Y5V 0402 NC1 REFEN GND1 VOUT NC NC2 VCTNL CT13 +0.9V_SUS 1000UF 6.3V 8X12 + FP6173C SOP8 100UF 16V 5X11 2mm LR + CT3 CT7 100UF 16V 5X11 2mm LR 100UF 16V 5X11 2mm LR + CT12 RN22 2.2K 8P4R 0402 +12V K +5V_STBY A VIN SS12/5817 SMA + 1 GND2 0.1UF 16V Y5V 0402 /NI U4 Q105 +5V_DUAL C66 BAT54C SOT23 C C KA 0.1UF 16V Y5V 0402 R25 10 0805 R13 10 0805 K A L1 RH TYPE BEAD RT9202NC/RT9214 R33 30K 1% 0402 C22 D2 SS12/5817 SMA VIN_5V_DDR2 +5V_STBY Q9 P0903BDG TO252 1UF 16V 0805 Y5V S D 4.7K 0402 Q5 G S R9 C11 C12 1UF 16V 0805 Y5V /NI 10UF 10V 0805 Y5V /NI FB 2N7002 SOT23 VCC + C59 CT5 10UF 10V 0805 Y5V 1000UF 10V 8X14X3.5 LR O U3 BOOT UGATE PHASE LGATE FP6321A SOP8 R314 42.2K 1% 0402 /NI B SLP_S5_ COMP Q7 2N7002 SOT23 G 18 D 10K 1% 0402 GND R10 RT9202/RT9214NC R11 10K 1% 0402 R49 0805 R51 10K 0402 R48 0805 Q10 P0903BDG TO252 C28 0.1UF 16V X7R 0402 1.2UH 30A 11X10.5 CARVE +1.8V_SUS L2 R50 2.7 0805 + + R16 442 1% 0402 B CT6 CT8 1000UF 6.3V 8X12 1000UF 6.3V 8X12 C139 C9 220P 50V X7R 0402 /NI C63 1000P 50V X7R 0402 R1 10UF 10V 0805 Y5V /NI +1.8VDIMM_FB 37 R26 309 1% 0402 R2 A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the PLL DELAY / PWRGD / MEM VREG applicable civil and/or criminal Size Document Number penalties.◆ Custom Rev 6.2 N68SA-M2S Date: Friday, June 04, 2010 Sheet 32 of 39 R182 R231 R232 R233 +5V 4.7K 0402 4.7K 0402 4.7K 0402 4.7K 0402 +5V KBC'S ROM:1/BUILT IN,0/EXT PDR7 PDR6 PDR5 PDR4 PDR3 PDR2 PDR1 PDR0 R8 28 28 28 28 28 28 28 28 D DCD1# RI1# CTS1# DTR1# RTS1# DSR1# SOUTA SINA R181 +5V To CK8-04 C 51K P/U is necessaried on IX version LPC I/O 16 LPCRST_SIO_ 16 LPC_DRQ0_ 680 0402 /NI 8716 >R6 >ADD 680 R8 >4.7K /NI R179 8712 >R6 >680 /NI R8 >ADD 4.7K 4.7K 0402 R178 R177 4.7K 04024.7K 0402 24 FAN1 24 FAN_CTL1 24 FAN2 10 11 12 24 FAN_CTL3 13 14 15 16 17 18 19 20 21 22 38 OV_HT0 23 37 OV_CHIP1 24 37 OV_CHIP0 25 37 VDIMM1 26 37 VDIMM0 27 37 VCORE1 28 29 37 VCORE0 10K 1% 0402 30 +3.3V R214 31 32 +5V 33 34 35 LPC_PD# 36 LPCRST_SIO_ 37 LPC_DRQ0_ 38 CTS2# RI2# DCD2# SIN1 SOUT1 DSR1# RTS1# DTR1# CTS1# RI1# DCD1# GNDD PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 STB# AFD# ERR# INIT# SLIN# ACK# R176 4.7K 0402 DTR2# RTS2# DSR2# VCC SOUT2 SIN2 FAN_TAC1 FAN_CTL1 FAN_TAC2/GP52 FAN_CTL2/GP51 FAN_TAC3/GP37 FAN_CTL3/GP36 WTI#/GP35 VID4/GP34 GNDD VID3/GP33 VID2/GP32 VID1/GP31 VID0/GP30 JSBB2/GP27 JSBB1/GP26 JSBCY/GP25 JSBCX/GP24 JSAB2/GP23 JSAB1/GP22 JSACY/GP21 JSACX/GP20 MIDI_OUT/GP17 MIDI_IN/GP16 CIRTX/GP15 [PU51K] SCRRST/GP14 SCRFET#/GP13 SCRIO/GP12 SCRCLK/GP11 VCC LPCPD# LRESET# LDRQ# BUSY PE SLCT VCC VIN0 VIN1 VIN2 VIN3 VIN4 VIN5 VIN6 VIN7 VREF TMPIN1 TMPIN2 TMPIN3 GNDA [5VSB PWR WELL] CIRRX/GP55 [5VSB PWR WELL] SCRPRES#/GP10 [5VSB PWR WELL] MCLK [5VSB PWR WELL] MDAT [5VSB PWR WELL] KCLK [5VSB PWR WELL] KDAT [5VSB PWR WELL] SCLK/GP40 [5VSB PWR WELL] SDAT/GP41 [5VSB PWR WELL] RING#/GP53 [5VSB PWR WELL] PSON#/GP42 [5VSB PWR WELL] PANSWH#/GP43 GNDD [5VSB PWR WELL] PME#/GP54 [5VSB PWR WELL] PWRON#GP44 [5VSB PWR WELL] PSIN/GP45 [5VSB PWR WELL] IRRX/GP46 VBAT [VBAT/5VSB PWR WELL] ] COPEN# VCCH IRTX/GP47 DSKCHG# +3.3V +3.3V B CPU_THERMDA CPU_THERMDC 7,34 PWRGD-PS Routed by differential R183 BEAD 60 0805 1A VIN0 C284 +5V FB20 VIN0 34 VIN1 3900P 50V X7R 0402 VIN1 34 C231 Should be 2200P VIN2 BEAD 60 0805 1A VIN2 34 PWRGD-PS R189 0402 /NI C2 PWRGD_PS 24 VIN4 VIN4 34 VIN5 VIN5 34 VIN6 8716 >C2 >ADD 2200P VIN6 34 VIN7 8712 >C2 >ADD 3900P VREF 0402 /NI PWRGD_PS PWRGD_SIO R125 +5V_DUAL R199 4.7K 0402 C FOR BIOS SOLUTION SMB_ALLERT_ MCLK MDAT KCLK KDAT PWRGD-SIO R198 25 25 25 25 0402 +3.3V_DUAL PWRGD-SIO +5V_DUAL PWRGD_SIO 32 R204 4.7K 0402 R203 4.7K 0402 To POWER LED circuit IO_PWIN ACPI_LED IO_PME_ IO_POUT R211 R206 +5V_DUAL 4.7K 0402 R202 21 10K 1% 0402 +3.3V_DUAL 1M 0402 +3.3V_VBAT 18,25 GP54: To generate an event for the function SLEEP BUTTON, POWER ON BY KB/MOUSE,RING-IN 10 0805 +5V_DUAL C287 0.1UF 16V Y5V 0402 100UF 16V 5X11 2mm LR B CT30 IO_PME_ PS_ON_ SIO_KBRST_ A20GATE LPCCLK_SIO R200 FDSKCHGFWPFINDEXFTRAK0FRDATAFWENFHEADFSTEPFDIRFWDFDSBFDSAFMOBFMOAFRWC- BUF_SIO_CLK R10 R11 R219 R216 56K 0402 /NI 56K 0402 /NI R181 Should be 0ohm RN51 LPC_DRQ0_ LPC_PD# SUSCLK 4.7K 8P4R 0402 RN52 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 18 To Power Supplier F0R 3.3V OUTPUT 8716 : R9 >10K R10 >0 R11 >56K /NI 8712 : R9 >10K /NI R10 >10K R11 >56K 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 R207 33 0402 33 0402 24 From Power Button PWRBTN_ 21 To SB PWBTOUT_ 18 From SB SLP_S3_ C285 R208 470P 50V X7R 0402 /NI 22K 0402 /NI 18 SMB_ALLERT_ R197 4.7K 0402+5V_DUAL A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ 18 SUSCLK ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the LPC SUPER I/O IT8716DX applicable civil and/or criminal Size Document Number penalties.◆ Custom SUSCLK 8.2K 8P4R 0402 /NI Rev 6.2 N68SA-M2S Date: R187 4.7K 0402 From CPU C1 R1 R213 R9 +3.3V 8716 >R7 >30K /NI 8712 >R7 >ADD 30K R7 R196 C272 30K 1% 0402 /NI 1UF 10V Y5V 0402 + 18 BUF_SIO_CLK 24 MHz 8712 : R1 >0 0805 8712 : C1 >1UF /NI +5V LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 SIO_KBRST_ A20GATE LPCCLK_SIO +3.3V D +5V 10K 1% 0402 /NI R4 R5 C252 1UF 10V Y5V 0402 10K 1% 0402 /NI LPC_FRAME_ 16 LPC_FRAME_ A VIN7 R195 IT8716FFX LPC_SERIRQ 16 LPC_SERIRQ 16 16 16 16 18 18 16 R217 10K 1% 0402 /NI R215 NO USE FUNCTION ADD R4 R5 >10K C286 1UF 16V 0805 Y5V 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 R218 10K 1% 0402 /NI 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 8716 : R1 >BEAD 60 0805 1A 8716 : C1 >1UF U8 SERIRQ LFRAME LAD0 LAD1 LAD2 LAD3 KRST# GA20 PCICLK CLKRUN#/GP50 CLKIN GNDD DENSEL# MTRA# MTRB# DRVA# DRVB# WDATA# DIR# STEP# HDSEL# WGATE# RDATA# TRK0# INDEX# WPT# 18 CHIP_THERM_ R6 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 GP35: To generate an event for the function THERMAL SHUTDOWN PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 STB# ALF# EEROR# INIT# SLCTIN# ACK# BUSY PE SLCT C276 0.1UF 16V Y5V 0402 Thursday, June 03, 2010 Sheet 33 of 39 Voltage Sensing D +V_CPU +1.2V +3.3V +12V R184 R185 R188 10K 1% 040210K 1% 040210K 1% 0402 33 33 33 VIN0 VIN1 VIN2 33 33 33 VIN4 VIN5 VIN6 +1.8V_SUS D +1.2V_HT R192 R193 R194 30K 1% 0402 10K 1% 0402 10K 1% 0402 R186 10K 1% 0402 C C 7,33 CPU_THERMDC hardware monitor B B A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the H/W MON applicable civil and/or criminal Size Document Number penalties.◆ Custom Date: Rev 6.2 N68SA-M2S Thursday, June 03, 2010 Sheet 34 of 39 +3.3V_DUAL +1.2V_HT +5V_DUAL E C C C124 0.1UF 16V Y5V 0402 /NI B C R71 1K 1% 0402 C97 10UF 10V 0805 Y5V /NI Q31 2N3904 SOT23 MCP61_PWRGD 18 HT_BASE R153 6.34K 1% 0402 D Q30 2N3906 SOT23 HT_VLD HT_VLD 18 E C E C113 10UF 10V 0805 Y5V /NI E B R58 10K 1% 0402 R151 10K 1% 0402 Q15 2N3906 SOT23 Q13 2N3904 SOT23 32 DUALS_FET_GATE B R66 10K 1% 0402 B R152 10K 1% 0402 R61 10K 1% 0402 D +3.3V_DUAL +5V_DUAL R150 1K 1% 0402 C239 0.1UF 16V Y5V 0402 C238 0.1UF 16V Y5V 0402 /NI POWER SEQUENCING C C +5V_DUAL +1.8V_SUS +5V_DUAL +3.3V_DUAL +5V_DUAL +3.3V_DUAL B E B C235 10UF 10V 0805 Y5V 2N3904 SOT23 C MEM_VLD_RC D R171 15K 0402 Q28 Q29 R149 6.34K 1% 0402 0.1UF 16V Y5V 0402 /NI MEM_VLD R146 1K 1% 0402 MEM_VLD 18 E Q33 2N3906 SOT23 Q34 2N7002 SOT23 PWRGD_Q1 G C247 10UF 10V 0805 Y5V C234 R169 10K 0402 C E 2N3906 SOT23 S C B C230 R147 10K 1% 0402 B R170 8.2K 0402 R148 10K 1% 0402 PWRGD_SB R168 1K 1% 0402 PWRGD_SB 18 C246 1UF 16V 0805 Y5V B 0.1UF 16V Y5V 0402 /NI A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the POWER SEQUENCING applicable civil and/or criminal Size Document Number penalties.◆ Custom Rev 6.2 N68SA-M2S Date: Thursday, June 03, 2010 Sheet 35 of 39 15 15 15 15 RXD3 RXD2 RXD1 RXD0 RGMII_RXD3 RGMII_RXD2 RGMII_RXD1 RGMII_RXD0 U7 D 15 RGMII_RXCLK 15 MII_COL 15 MII_CRS 15 MII_RXER 15 BUF_25M RGMII_MDC RGMII_MDIO RGMII_TXD0 RGMII_TXD1 RGMII_TXD2 RGMII_TXD3 RGMII_TXCTL 25 26 22 RXD0 21 RXD1 20 RXD2 19 RXD3 18 R136 0402 16 MII_COL MII_CRS 23 MII_RXER 24 46 47 LINK_LED LED1 LED2 SPEED_LED LED3 MDC MDIO TXD0 TXD1 TXD2 TXD3 TXEN TXC RXDV RXD0 RXD1 RXD2 RXD3 RXC COL CRS RXER/FXEN X1 X2 10 12 13 15 PWFBIN AVDD2 PWFBIN DVDD33 11 17 DGND DGND 32 36 48 AGND AGND DGND 29 35 45 NC RTL8201 LED0/PHYAD0 LED1/PHYAD1 LED2/PHYAD2 LED3/PHYAD3 LED4/PHYAD4 14 PWFBOUT AVDD33 DVDD33 TPRX+ TPRXTPTXTPTX+ RTSET ISOLATE RPTR SPEED DUPLEX ANE LDPS MII/SNIB/RTT3 RESETB RTL8201BL : R6(NC); C10(NC) RTL8201CL/CP : R6(0 ohm); C10(0.1uF) PWFBOUT AVDD1 AVDD2 PWFBOUT JUSBLAN1B C186 0.1UF 16V Y5V 0402 27 31 30 33 34 28 43 40 39 38 37 41 44 42 RXIN+ RXIN- PHY address set to 00001h LINK_LED R279 is reserved for 8201CL/CP LED Mode Change to compatible with BL R280 is reserved for ensuring 8201BL/CL/CP latch to UTP Mode R281 is reserved for ensuring 8201CL/CP latch to normal operation mode TXD- TX0- RXIN+ TX1+ RXIN- TX1- TX2+ R78 R77 51 1% 0402 51 1% 0402 C130 R122 51 1% 0402 R121 51 1% 0402 C182 TX2- TX3+ TX3- 10 LR6 LR7 11 GLED+ 12 YLED- 13 YLED+ 14 GND GND GND GND G1 G2 G7 G8 LR4 LR5 D 680 0402 680 0402 LINK_LED RN21 680 8P4R 0402 AVDD2 SPEED_LED 680 0402 680 0402 +3.3V_DUAL LQ30 RCT RXIN+ RJ45USBA CONN 0.1UF 16V Y5V 04020.1UF 16V Y5V 0402 REST NEAR CONNECTOR PWFBOUT NEAR PHY RXIN- TXD+ TXD- CM1293 SOT23-6 C128 0.1UF 16V Y5V 0402 SPEED DUPLEX ANE LINK_LED RN30 4.7K 8P4R 0402AVDD2 AVDD2 MII_L ISOLATE LDPS RPTR C FB18 AVDD2 AVDD1 RTL8201BL : R19(NC) RTL8201CL/CP : R19(0 ohm) BEAD 60 0805 1A C191 0.1UF 16V Y5V 0402 /NI AVDD2 RN31 4.7K 8P4R 0402 AVDD2 FB17 PWFBIN D9 1N4148 SMD R145 BEAD 60 0805 1A C233 C188 5.1K 1% 0402 CT18 100UF 16V 5X11 2mm LR 0.1UF 16V Y5V 04020.1UF 16V Y5V 0402 EMI LED3 SPEED_LED LED2 LED1 RN33 4.7K 8P4R 0402 AVDD2 AVDD2 C231 C210 1UF 16V 0805 Y5V 0.1UF 16V Y5V 0402 AVDD2 FB19 BEAD 60 0805 1A +5V_DUAL C229 C190 C187 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 AVDD2 R124 1.5K 1% 0402 B AVDD2 +3.3V_DUAL +3.3V_DUAL C237 C232 1UF 16V 0805 Y5V 0.1UF 16V Y5V 0402 + CT24 100UF 16V 5X11 2mm LR FOR EMI F0R REST RGMII_MDIO PWFBOUT AVDD2 MII_COL MII_RXER MII_CRS AVDD1 B TX0+ RGMII_RESET_ 15 RTL8201CL TQFP48 C GLED- TXDTXD+ R123 2K 1% 0402 ISOLATE RPTR SPEED DUPLEX ANE LDPS F0R MII_L TCT TXD+ B2 B1 CM1293 A2 + A1 15 RGMII_MDC 15 RGMII_MDIO 15 RGMII_TXD0 15 RGMII_TXD1 15 RGMII_TXD2 15 RGMII_TXD3 15 RGMII_TXCTL 15 RGMII_TXCLK 15 RGMII_RXCTL R1 Q35 I O A R190 200 1% 0402 +5V EMI + AZ1117H-ADJ SOT-223 R2 CT27 100UF 16V 5X11 2mm LR R191 330 1% 0402 C270 0.1UF 16V Y5V 0402 Vout=Vref (1.25V) X ( 1+R2/R1 ) =3.3V A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the LAN (RTL8201CL) applicable civil and/or criminal Size Document Number penalties.◆ Custom N68SA-M2S Date: Thursday, June 03, 2010 Sheet Rev 6.2 36 of 39 33 R83 OV_CHIP1 1K 1% 0402 OVCHIP 38 CORE VOLTAGE OV_CHIP0 OV_CHIP1 +1.24V H-R H-R +1.28V +1.33V +1.37V H-R H-R 0 D D 33 R82 2.26K 1% 0402 OV_CHIP0 33 VDIMM0 R17 6.34K 1% 0402 +1.8VDIMM_FB 32 VDIMM0 VDIMM1 Default 1.944V H-R H-R 2.00V H-R 2.046V H-R 2.102V 0 +1.8VDIMM_FB C C 33 R18 3.48K 1% 0402 VDIMM1 VCORE_OVL Default B 33 33 R3 VCORE0 3K 1% 0402 OVL 31 VCORE0 VCORE1 H-R H-R Default +3.3% H-R Default +6.6% H-R Default +10% 0 B R1 1.5K 1% 0402 VCORE1 NEAR PWM A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the OVER VOLTAGE applicable civil and/or criminal Size Document Number penalties.◆ Custom Rev 6.2 N68SA-M2S Date: Thursday, June 03, 2010 Sheet 37 of 39 MCP68 CORE +12V +5V R88 10 0805 D R180 10 0805 K A L3 RH TYPE BEAD RT9202NC/RT9214 R95 30K 1% 0402 C136 D D7 SS12/5817 SMA VIN_5V +1.2V_HT Q22 P0903BDG TO252 1UF 16V 0805 Y5V FB BOOT UGATE PHASE LGATE 0805 R109 10K 0402 R106 0805 +1.2V RN20 8P4R 0402 /NI L4 R107 2.7 0805 Q20 P0903BDG TO252 FP6321A SOP8 R313 42.2K 1% 0402 /NI C141 220P 50V X7R 0402 /NI S +1.2V C162 0.1UF 16V X7R 0402 1.2UH 30A 11X10.5 CARVE R119 Q19 2N7002 SOT23 /NI VCC GND COMP D G U5 RT9202/RT9214NC + C168 CT17 10UF 10V 0805 Y5V 1000UF 10V 8X14X3.5 LR O + CT14 + CT15 + CT21 R84 1000UF 6.3V 6.3X8 8X12 1000UF 6.3V 6.3X8 1000UF 8X12 6.3V 6.3X8 8X12 110 1% 0402 C169 1000P 50V X7R 0402 C C OVCHIP R80 4.7K 0402 37 R86 200 1% 0402 +2.5V +5V R79 5.1K 0402 R130 0805 /NI+12V +5V REF_2V5# C MCPVDD_EN 18 Q2 R2 5.1K 0402 D R492 110 1% 0402 2N7002 SOT23 E C129 REF_2.5V OV_HT0 R2 B +12V +3.3V C10 0.1UF 16V Y5V 0402 R19 1.47K 1% 0402 V1 C13 B R20 1.47K 1% 0402 + - 1UF 10V Y5V 0402 Vout=1.22X(1+R1/R2) R14 R132 1K 0402 +1.2V_HT 90.9 1% 0402 A + OV_HT0 R21 CT10 1000UF 6.3V 8X12 Q17 P0903BDG TO252 G U1A LM324 SO14 Vout=V1=Vref(2.5V)*(R2/)=1.25V 33 + D A +12V Change to +12V_P R1 +1.25V +1.35V C Q1 2N3904 SOT23 E Q48 LM431 SOT23 +1.2V_HT G B C R 1UF 10V Y5V 0402 S B 10K 1% 0402 11 2N3904 SOT23 R75 S Q18 HT +1.2V_HT @ 850MA AMPS MAX A CT11 1000UF 6.3V 8X12 1.2K 1% 0402 ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, Title duplication, or disclosure of this MCP68 CORE document will be subject to the Size Document Number applicable civil and/or criminal Custom N68SA-M2S penalties.◆ Date: Friday, June 04, 2010 Sheet Rev 6.2 38 of 39 New JPANEL1 JPANEL1 2*11 (BAT1) 電池 JPANEL1(9_10) JPANEL1(15_16) HEADER 1X2 /NI HEADER 1X2 /NI JPANEL1(11_14) PLED /NI 3V BATTERY SONY D D (U17) JPANEL1(1_4) JPANEL1(5_6) SPK /NI HLED /NI JPANEL1(7_8) RST /NI FLASH ROM SPI MX25L8005 DIP PCB (CPU1) (X2) X'TAL WIRE PCB N68SA-M2S VER:6.1 AM2RM-B (PCB) JCMOS1(1_2) JUMPER 2P B (U6) JKB_PWR(1_2) JUMPER 2P R 北橋散熱片 泡棉 POLON 245x200 C JUSBPWR1(1_2) JUMPER 2P R C NBHS-A74GC JUSBPWR2(1_2) JUMPER 2P R B B A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the BOM applicable civil and/or criminal Size Document Number penalties.◆ Custom Date: Rev 6.2 N68SA-M2S Thursday, June 03, 2010 Sheet 39 of 39 N61PA-M2S-V6.0蜊唳善N61PB-M2S-V6.0垀党蜊囀 1﹜ Page 盓厥AM2+ CPU 崝樓ㄩR53ㄛR97ㄛR131ㄛR225ㄛR99ㄛR101ㄛR126ㄛR128ㄛR228ㄛR229 2﹜ Page 15 載蜊R/G/B盄腔狟嶺萇郯迵狟嶺萇 腔佼唗 D C 3﹜ Page 21 載蜊Power LED 盄繚 4﹜ Page 26 崝樓VGA ESD 悵誘萇繚 崝樓LQ4ㄛQ38ㄛQ37 5﹜ Page 27 崝樓USB FUSE COLAY萇繚 崝樓R226ㄛR227 6﹜ Page 28 刉壺COM PORT腔嗣豻媼憤奪 刉壺D8 7﹜ Page 29 載蜊AUDIO 萇埭萇 蔚CT28蚕 10UF 10V載蜊峈4.7UF 16V 8﹜ Page 30 載蜊SPDIF 萇埭萇 蔚AC23 NI 9﹜ Page 31 COLAY CPU IN/OUTPUT 萇 8X10 覃遙PR11迵PR5腔佼唗 蔚PWM腔SM BUS腔揹薊萇郯NIㄛ撈NI PR43ㄛPR44 D 10﹜ Page 32 載蜊DDR 1.8V萇繚ㄛ蔚窒煦眳 5V-DUAL 垀蚚眳揭蜊峈5V-STBYㄛ賤泔萇埭眳恀枙 載蜊ISEN萇郯ㄛ撈載蜊R33ㄛ蚕20K載蜊峈30K 載蜊萇郯R34ㄛ蚕4.7K載蜊峈1K C 11﹜ Page 38 載蜊CORE 萇揤萇繚腔ISEN萇郯ㄛ撈載蜊R95ㄛ蚕20K載蜊峈30K 12﹜ Page 39 載蜊USB 沷簽腔蘇 萇揤 蔚埻懂腔蘇 2ㄛ3PIN 蜊峈珋婓蘇 腔1ㄛ2PIN 載蜊BIOS ROMㄛ蚕4M 蜊峈8M N61PB-M2S-V6.0蜊唳善N61PB-M2S-V6.1垀党蜊囀 B 1﹜ Page 30 AUDIO崝樓ESD悵誘 崝樓ㄩLQ27ㄛLQ31ㄛD14ㄛD15 2﹜ Page 36 崝樓ESD悵誘萇繚 崝樓LQ30 2009/01/05 党蜊囀 蔚PR24 蚕埻懂腔100K曹峈121Kㄛ蔥腴CPU PWM Change list 薹 B N61PB-M2S-V6.4 to N68SA-M2S-V6.0 1.(PAGE 2.(PAGE 3.(PAGE 4.(PAGE 5.(PAGE 13-19) Chage NB CHIP from 61 to 68 38) Change 1.2V_HT Voltage and OV step 39) Change NB heatsink 31) Change CPU POWER OCP point and Loadline by following TW power test report ALL) Change 1UF 0603 to 0402 A A ◇BIOSTAR'S PROPRIETARY INFORMATION◆ ◇Any unauthorized use, reproduction, duplication, or disclosure of this Title document will be subject to the CHANGELIST applicable civil and/or criminal Size Document Number penalties.◆ Custom Date: Rev 6.2 N68SA-M2S Thursday, June 03, 2010 Sheet 40 of 40 ... AG 22 AE17 AF17 AF21 AE21 AF23 AE23 AJ 26 AG 26 AE 22 AG23 AH25 AF25 AJ28 AJ29 AF29 AE 26 AJ27 AH27 AG29 AF27 E29 E28 D27 C27 G 26 F27 C28 E27 F25 E25 E23 D23 E 26 C 26 G23 F23 E 22 E21 F17 G17 G 22 F21... 16V Y5V 04 02 22 D PE0_OUT_[15 0] 22 C PE0_REFCLK 22 PE0_REFCLK_ 22 PE_RESET_ 22 2. 37K 1% 04 02 +3.3V_PLL_PE_SS I107 C 167 MCP68S A3 MCP68S XXXX-XXXX-XXXX SEC OF 22 22 22 22 22 22 22 22 22 22 22 ... PE0_IN6 PE0_IN7 PE0_IN8 PE0_IN9 PE0_IN10 PE0_IN11 PE0_IN 12 PE0_IN13 PE0_IN14 PE0_IN15 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 22 PE0_IN_0 PE0_IN_1 PE0_IN _2 PE0_IN_3 PE0_IN_4 PE0_IN_5 PE0_IN_6