5 BIB75-MHA ( Fm Z77A-MHT V5.0) A CPU: Front I/O: Intel Ivy Bridge processors in LGA1155 Package 95W 5SATA2(Black)+ 1SATA3(white) USB2.0 BOX Header * USB3.0 BOX Header * CPU /System FAN Serial header BOX Header 2x5 Front Audio Header & SPDIF Out System Chipset: Intel B75 colay with Q77-RAID 0/1/5/10 & iAMT( Active Management Technology 8.0) Main Memory: Dual Channel/DDR-III*4(Max 16GB) 1333/1600 DDR3-1066 /1333/1600 D Onboard Device: Super I/O:Fintek F81866AD-COM x6 +F81216-COMx4 LAN:Intel 82579 PHY-iAMT & PCIe-Realtek8111E - 20120222 Change HD Codec::ALC892 -3 jacks C Power solution: CPU Voltage Regulators:3phase by ISL6363 AXG voltage Regulators:1phase by ISL6363 VCCIO voltage Regulators:1phase by ISL6363 DDR voltage Regulators:1Phase by FP6326 Expansion Slots: PCI EXPRESS 16X SLOTx1 PCI EXPRESS 4X SLOTx1 PCI SLOT*2 B REAR IO: PS/2 +2 layer USB2.0 Port HDMI Port ( DP > PS161 ) -( Co_LAY /w-COM2 ) + COM Port DVI ( DP > PS161 ) +VGA Port layer USB2.0/3.0 + Gb RJ-45 Ports layer USB3.0 + Gb RJ-45 Ports Audio Jack x3 A BIOSTAR'S PROPRIETARY INFORMATION Title Any unauthoriz ed us e, reproduction, duplication, or dis clos ure of this document w ill be s ubject to the applicable civil and/orcriminal penalties ◆ B INDEX BLOCK DIAGRAM POWER DELIVERY CHANGE LIST CPU PCIEX16/DMI/FDI CPU DDR CHANNEL A CPU DDR CHANNEL B CPU MISC CPU POWER/GND DDR3 DIMMA1/A2 DDR3 DIMMB1/B2 PCH PCI PCH USB/DMI/PCIE PCH CLINK/SATA/CPU HOST PCH LPC/HDA/SPI/MISC PCH NVRAM PCH FDI LINK PCH VGA/DISPLAY PORT PCH CLOCK BUFFER PCH POWER PCH GND SPI ROM/BAT PCIEX16 SLOT1 PCIEX16 SLOT2 & x1 SLOT HDMI CONNECTOR VGA/DVI CONNECTOR AUDIO CODEC ALC892 AUDIO CONNECTOR LAN RTL8111E/8105E SUPER I/O Fintek F81866A SUPERIO FDD/PRT/PS2/COM SUPERIO FAN CONTROL FRONT USB USB CONNECTOR 24PIN POWER CONN&FP RESUME RESET LOGIC ACPI POWER CONTROL LINEAR POWER MEMORY DC-DC Conver VTT DC-DC Conver ISL6363 PWM controller VCORE & VAXG OVER VOLTAGE BOM ◆ C CONTENTS ◇ D 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 INDEX ◇ PAGE Ver:1.0 Size Document Number Custom Date: Friday, July 20, 2012 Rev 1.0 BIB75-MHA Sheet 1 of 48 PCIE GEN2 X16 PCIe x16 SLOT X1 D Ivy Bridge (B75 Colay Q77) 1333/1600 Channel A DIMM X2 Channel B DIMM X2 D LGA 1155 SOCKET USB 2.0 PORTS *8 USB 3.0 PORTS *4 DMI FDI DP >DVI PORTS PS161-Downgle PORT D SATA3.0 PORTS X2 SATA2.0 PORTS X4 Dual Independent Dispaly VGA PORT (B75 Colay Q77) PCH SPI FLASH 64M SPDIF OUT PORT C PCI SLOTx2 PCIe x4 SLOT x1 HDC CODEC ALC892 JACKS Realtek 8111F 5GT/s C PORT B PCIE2.0 PORTS GIGA LAN Intel 82579V DP >HDMI PORTS PS161-Downgle LPC Front Audio Header Fintek F81866AD (w/6 COM) B SYSTEM FAN x1 CPU SMART FAN x1 PS2 KB/Mouse Fintek F81216AD (w/4 COM) Serial header x6 Serial header x4 B Printer header 2x13 A A Title BLOCK DIAGRAM Size Document Number Custom Date: Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet of 48 POWER DELIVERY MAP DDR3(4 DIMM) SWITCHING Icc=20A Max=30A V_SM=1.5V D V_SM_VTT=0.75V V_SM(1.5V) TO V_SM_VTT(0.75V) Icc=1A Max=1A IVB(VRD12) 12V(4PIN) SWITCHING Icc=85A Max=112A VCCP (CPU Vcore) Voltage=1.1V Icc=85A ,Imax=112A 3-Phases Swithing SWITCHING Icc=25A Max=35A V_AXG(Havendale only) Voltage=1.1V Icc=25A, Imax=35A 5V_DUAL 3.3V PCI Express x16 3.3VDUAL Icc(Max)=0.375A(wake) Icc(Max)=0.02A(no wake) 5V_DUAL to 3.3VDUAL VTT(1.1/1.05V) -> V_SA PCI Express x4 VCCPLL(1.8V) Icc set to DVI Mode is OK ) 20120521 3-Display Must use Ivy Bridge CPU - by B75- Spec ) 2-Display : IDR2 & IRD4 = / 3-Display : IDR1=1 & IRD4=0 20120521 Display & display BOM is different : 20120523 PS161-Set=DVI mode can fix AOC & LG DVI input.- 20120530 Ver: 1.0 pcb Modify Note: PE - 關於BIB75-MHA-MosFET-TOP & Bottom 共通via hole 請修改為塞孔設計 20120521 B Printer D0~D7 need swap.-V1.0 20120522 B Disply only or Disply-/w-PS161 x2 - Config ID-Resister setting FR3 -Change to Pull-High >3V3_Dual For S3 -Blinking-V1.0 20120522 LU1-Pin26 & Pin27 Swap & LED +/- need swap for follow BIB75-AHA 20120521 2-DisplayID=0 : IDR2 & IRD4 = / 3-DisplayID=1 : IDR1=1 & IRD4=0 20120521 8111F -Lan LED resister(R18,19,21~23) modify >100 ohm 20120524 2 Disply only BOM ??? 3 Disply-/w-PS161 x2 - BOM setting -COM or 10 COM BOM setting EMI modify PCB list 20120531 A a AC30左上方靠近AUD_LINK_BCLK VIA孔加一顆VCC5對GND的104p電容(EC55) 20120531 b ECT2右上方加一顆VCC3_3對GND的104p電容(EC56) 20120531 c LFB1, LFB2 =0R 20120531 d CT9左上方CK_PE_100M_MCP_DN 訊號線VIA孔旁加兩顆GND VIA 孔 20120531 e 將GND,BOT層重新切割 HDMI如下 20120531 f DVI 紅點打GND VIA 20120531 g BYC2 上方USB3_RXN1 訊號線與右方CK_PE_100M_MCP_DN 拉開25MIL 20120531 h LC46上方USB3_TXP1與CK_PE_100M_MCP_DN 拉開25MIL 20120531 i USB3_RXP2 與GBE_TXP 拉開拉開25MIL 20120531 Title A CHANGELIST BOM For Sale request : Display(DVI+VGA)+10 COM (DB-9Pin x2 + 2x20Pin x2) 20120710 Size Document Number Custom 8.Change D CONN 9PIN SLIM -> Foxcon-Pin-out 20120720 Date: Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet of 48 CPU1C BIOSTAR_D V1_4 C 13 13 13 13 13 13 13 13 DMI_IT_MR_0_DP DMI_IT_MR_0_DN DMI_IT_MR_1_DP DMI_IT_MR_1_DN DMI_IT_MR_2_DP DMI_IT_MR_2_DN DMI_IT_MR_3_DP DMI_IT_MR_3_DN W5 W4 V3 V4 Y3 Y4 AA4 AA5 P3 P4 R2 R1 T4 T3 U2 U1 B V_CPU_VCCIO 24.9 1% 0402 PEG_RCOMP CR1 B5 C4 B4 PEG_RX_0 PEG_RX#_0 PEG_RX_1 PEG_RX#_1 PEG_RX_2 PEG_RX#_2 PEG_RX_3 PEG_RX#_3 PEG_RX_4 PEG_RX#_4 PEG_RX_5 PEG_RX#_5 PEG_RX_6 PEG_RX#_6 PEG_RX_7 PEG_RX#_7 PEG_RX_8 PEG_RX#_8 PEG_RX_9 PEG_RX#_9 PEG_RX_10 PEG_RX#_10 PEG_RX_11 PEG_RX#_11 PEG_RX_12 PEG_RX#_12 PEG_RX_13 PEG_RX#_13 PEG_RX_14 PEG_RX#_14 PEG_RX_15 PEG_RX#_15 PEG_TX_0 PEG_TX#_0 PEG_TX_1 PEG_TX#_1 PEG_TX_2 PEG_TX#_2 PEG_TX_3 PEG_TX#_3 PEG_TX_4 PEG_TX#_4 PEG_TX_5 PEG_TX#_5 PEG_TX_6 PEG_TX#_6 PEG_TX_7 PEG_TX#_7 PEG_TX_8 PEG_TX#_8 PEG_TX_9 PEG_TX#_9 PEG_TX_10 PEG_TX#_10 PEG_TX_11 PEG_TX#_11 PEG_TX_12 PEG_TX#_12 PEG_TX_13 PEG_TX#_13 PEG_TX_14 PEG_TX#_14 PEG_TX_15 PEG_TX#_15 PEG B11 B12 D12 D11 C10 C9 E10 E9 B8 B7 C6 C5 A5 A6 E2 E1 F4 F3 G2 G1 H3 H4 J1 J2 K3 K4 L1 L2 M3 M4 N1 N2 DMI_RX_0 DMI_RX#_0 DMI_RX_1 DMI_RX#_1 DMI_RX_2 DMI_RX#_2 DMI_RX_3 DMI_RX#_3 PE_RX_0 PE_RX#_0 PE_RX_1 PE_RX#_1 PE_RX_2 PE_RX#_2 PE_RX_3 PE_RX#_3 DMI D EXP_A_RX_0_DP EXP_A_RX_0_DN EXP_A_RX_1_DP EXP_A_RX_1_DN EXP_A_RX_2_DP EXP_A_RX_2_DN EXP_A_RX_3_DP EXP_A_RX_3_DN EXP_A_RX_4_DP EXP_A_RX_4_DN EXP_A_RX_5_DP EXP_A_RX_5_DN EXP_A_RX_6_DP EXP_A_RX_6_DN EXP_A_RX_7_DP EXP_A_RX_7_DN EXP_A_RX_8_DP EXP_A_RX_8_DN EXP_A_RX_9_DP EXP_A_RX_9_DN EXP_A_RX_10_DP EXP_A_RX_10_DN EXP_A_RX_11_DP EXP_A_RX_11_DN EXP_A_RX_12_DP EXP_A_RX_12_DN EXP_A_RX_13_DP EXP_A_RX_13_DN EXP_A_RX_14_DP EXP_A_RX_14_DN EXP_A_RX_15_DP EXP_A_RX_15_DN DMI_TX_0 DMI_TX#_0 DMI_TX_1 DMI_TX#_1 DMI_TX_2 DMI_TX#_2 DMI_TX_3 DMI_TX#_3 GEN 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 PE_TX_0 PE_TX#_0 PE_TX_1 PE_TX#_1 PE_TX_2 PE_TX#_2 PE_TX_3 PE_TX#_3 C13 C14 E14 E13 G14 G13 F12 F11 J14 J13 D8 D7 D3 C3 E6 E5 F8 F7 G10 G9 G5 G6 K7 K8 J5 J6 M8 M7 L6 L5 N5 N6 EXP_A_TX_0_DP 24 EXP_A_TX_0_DN 24 EXP_A_TX_1_DP 24 EXP_A_TX_1_DN 24 EXP_A_TX_2_DP 24 EXP_A_TX_2_DN 24 EXP_A_TX_3_DP 24 EXP_A_TX_3_DN 24 EXP_A_TX_4_DP 24 EXP_A_TX_4_DN 24 EXP_A_TX_5_DP 24 EXP_A_TX_5_DN 24 EXP_A_TX_6_DP 24 EXP_A_TX_6_DN 24 EXP_A_TX_7_DP 24 EXP_A_TX_7_DN 24 EXP_A_TX_8_DP 24 EXP_A_TX_8_DN 24 EXP_A_TX_9_DP 24 EXP_A_TX_9_DN 24 EXP_A_TX_10_DP 24 EXP_A_TX_10_DN 24 EXP_A_TX_11_DP 24 EXP_A_TX_11_DN 24 EXP_A_TX_12_DP 24 EXP_A_TX_12_DN 24 EXP_A_TX_13_DP 24 EXP_A_TX_13_DN 24 EXP_A_TX_14_DP 24 EXP_A_TX_14_DN 24 EXP_A_TX_15_DP 24 EXP_A_TX_15_DN 24 V7 V6 W7 W8 Y6 Y7 AA7 AA8 DMI_MT_IR_0_DP DMI_MT_IR_0_DN DMI_MT_IR_1_DP DMI_MT_IR_1_DN DMI_MT_IR_2_DP DMI_MT_IR_2_DN DMI_MT_IR_3_DP DMI_MT_IR_3_DN P8 P7 T7 T8 R6 R5 U5 U6 D C 13 13 13 13 13 13 13 13 PCIE X4 LANES ARE NOT SUPPORTED ON DT CPU SKUS B PEG_ICOMPO PEG_RCOMPO PEG_COMPI 3/10 LGA 1155 SOCKET_FOX CPU1D AE5 AE4 17 FDI_FSYNC_1 17 FDI_LSYNC_1 FDI_FSYNC_1 FDI_LSYNC_1 A 17 V_CPU_VCCIO CR2 FDI_INT 24.9 1% 0402 FDI_RCOMP AG3 AE2 AE1 FDI_INT FDI_COMPIO FDI_ICOMPO FDI_TX_4 FDI_TX#_4 FDI_TX_5 FDI_TX#_5 FDI_TX_6 FDI_TX#_6 FDI_TX_7 FDI_TX#_7 AC8 AC7 AC2 AC3 AD2 AD1 AD4 AD3 AD7 AD6 AE7 AE8 AF3 AF2 AG2 AG1 FDI_TX_0_DP FDI_TX_0_DN FDI_TX_1_DP FDI_TX_1_DN FDI_TX_2_DP FDI_TX_2_DN FDI_TX_3_DP FDI_TX_3_DN 17 17 17 17 17 17 17 17 FDI_TX_4_DP FDI_TX_4_DN FDI_TX_5_DP FDI_TX_5_DN FDI_TX_6_DP FDI_TX_6_DN FDI_TX_7_DP FDI_TX_7_DN 17 17 17 17 17 17 17 17 BIOSTAR' S PROPRIETARY INFORMATION Any unauthorized use, reproduction, duplication, or disclosure of this document will be subject to the applicable civil and/orcriminal penalties ◆ FDI_TX_0 FDI_TX#_0 FDI_TX_1 FDI_TX#_1 FDI_TX_2 FDI_TX#_2 FDI_TX_3 FDI_TX#_3 ◆ FDI_FSYNC_0 FDI_LSYNC_0 ◇ 17 FDI_FSYNC_0 17 FDI_LSYNC_0 ◇ BIOSTAR_D V1_4 AC5 AC4 A Title FDI LINK 4/10 LGA 1155 SOCKET_FOX CPU PCIEX16/DMI/FDI Size Document Number Custom Date: Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet of 48 CPU1A 10 M_DATA_A[0 63] M_DATA_A[0 63] D C B A 10 10 10 10 10 10 10 10 M_DQS_A_DP0 M_DQS_A_DP1 M_DQS_A_DP2 M_DQS_A_DP3 M_DQS_A_DP4 M_DQS_A_DP5 M_DQS_A_DP6 M_DQS_A_DP7 10 10 10 10 10 10 10 10 M_DQS_A_DN0 M_DQS_A_DN1 M_DQS_A_DN2 M_DQS_A_DN3 M_DQS_A_DN4 M_DQS_A_DN5 M_DQS_A_DN6 M_DQS_A_DN7 M_MAA_A[0 15] BIOSTAR_D V1_4 M_DATA_A0 M_DATA_A1 M_DATA_A2 M_DATA_A3 M_DATA_A4 M_DATA_A5 M_DATA_A6 M_DATA_A7 M_DATA_A8 M_DATA_A9 M_DATA_A10 M_DATA_A11 M_DATA_A12 M_DATA_A13 M_DATA_A14 M_DATA_A15 M_DATA_A16 M_DATA_A17 M_DATA_A18 M_DATA_A19 M_DATA_A20 M_DATA_A21 M_DATA_A22 M_DATA_A23 M_DATA_A24 M_DATA_A25 M_DATA_A26 M_DATA_A27 M_DATA_A28 M_DATA_A29 M_DATA_A30 M_DATA_A31 M_DATA_A32 M_DATA_A33 M_DATA_A34 M_DATA_A35 M_DATA_A36 M_DATA_A37 M_DATA_A38 M_DATA_A39 M_DATA_A40 M_DATA_A41 M_DATA_A42 M_DATA_A43 M_DATA_A44 M_DATA_A45 M_DATA_A46 M_DATA_A47 M_DATA_A48 M_DATA_A49 M_DATA_A50 M_DATA_A51 M_DATA_A52 M_DATA_A53 M_DATA_A54 M_DATA_A55 M_DATA_A56 M_DATA_A57 M_DATA_A58 M_DATA_A59 M_DATA_A60 M_DATA_A61 M_DATA_A62 M_DATA_A63 AJ3 AJ4 AL3 AL4 AJ2 AJ1 AL2 AL1 AN1 AN4 AR3 AR4 AN2 AN3 AR2 AR1 AV2 AW3 AV5 AW5 AU2 AU3 AU5 AY5 AY7 AU7 AV9 AU9 AV7 AW7 AW9 AY9 AU35 AW37 AU39 AU36 AW35 AY36 AU38 AU37 AR40 AR37 AN38 AN37 AR39 AR38 AN39 AN40 AL40 AL37 AJ38 AJ37 AL39 AL38 AJ39 AJ40 AG40 AG37 AE38 AE37 AG39 AG38 AE39 AE40 SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63 AK3 AP3 AW4 AV8 AV37 AP38 AK38 AF38 SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14 SA_MA_15 SA_WE# SA_CAS# SA_RAS# SA_BS_0 SA_BS_1 SA_BS_2 SA_CS#_0 SA_CS#_1 SA_CS#_2 SA_CS#_3 SA_CKE_0 SA_CKE_1 SA_CKE_2 SA_CKE_3 SA_ODT_0 SA_ODT_1 SA_ODT_2 SA_ODT_3 SA_CK_0 SA_CK#_0 SA_CK_1 SA_CK#_1 SA_CK_2 SA_CK#_2 SA_CK_3 SA_CK#_3 SM_DRAMRST# SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7 M_MAA_A[0 15] 10 M_MAA_A0 M_MAA_A1 M_MAA_A2 M_MAA_A3 M_MAA_A4 M_MAA_A5 M_MAA_A6 M_MAA_A7 M_MAA_A8 M_MAA_A9 M_MAA_A10 M_MAA_A11 M_MAA_A12 M_MAA_A13 M_MAA_A14 M_MAA_A15 D AW29 AV30 AU28 M_WE_A_N M_CAS_A_N M_RAS_A_N 10 10 10 AY29 AW28 AV20 M_SBS_A0 M_SBS_A1 M_SBS_A2 10 10 10 AU29 AV32 AW30 AU33 M_SCS_A_N0 M_SCS_A_N1 M_SCS_A_N2 M_SCS_A_N3 10 10 10 10 AV19 AT19 AU18 AV18 M_SCKE_A0 M_SCKE_A1 M_SCKE_A2 M_SCKE_A3 10 10 10 10 AV31 AU32 AU30 AW33 M_ODT_A0 M_ODT_A1 M_ODT_A2 M_ODT_A3 10 10 10 10 AY25 AW25 AU24 AU25 AW27 AY27 AV26 AW26 CK_M_DDR0_A_DP CK_M_DDR0_A_DN CK_M_DDR1_A_DP CK_M_DDR1_A_DN CK_M_DDR2_A_DP CK_M_DDR2_A_DN CK_M_DDR3_A_DP CK_M_DDR3_A_DN C 10 10 10 10 10 10 10 10 B AW18 DDR3_DRAMRST_N 10,11 CC1 0.1UF 16V X7R 0402 /NI SA_DQS_8 SA_DQS#_8 SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7 AK2 AP2 AV4 AW8 AV36 AP39 AK39 AF39 AV27 AY24 AW24 AW23 AV23 AT24 AT23 AU22 AV22 AT22 AV28 AU21 AT21 AW32 AU20 AT20 SA_ECC_CB_0 SA_ECC_CB_1 SA_ECC_CB_2 SA_ECC_CB_3 SA_ECC_CB_4 SA_ECC_CB_5 SA_ECC_CB_6 SA_ECC_CB_7 AV13 AV12 AU12 AU14 AW13 AY13 AU13 AU11 AY12 AW12 A DDR_0 Title 1/10 LGA 1155 SOCKET_FOX Date: CPU DDR CHANNEL A Size Document Number Custom Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet of 46 M_MAA_B[0 15] CPU1B 11 M_DATA_B[0 63] D M_DATA_B[0 63] M_DATA_B0 M_DATA_B1 M_DATA_B2 M_DATA_B3 M_DATA_B4 M_DATA_B5 M_DATA_B6 M_DATA_B7 M_DATA_B13 M_DATA_B9 M_DATA_B11 M_DATA_B15 M_DATA_B12 M_DATA_B8 M_DATA_B14 M_DATA_B10 M_DATA_B16 M_DATA_B17 M_DATA_B18 M_DATA_B19 M_DATA_B20 M_DATA_B21 M_DATA_B22 M_DATA_B23 M_DATA_B24 M_DATA_B25 M_DATA_B26 M_DATA_B27 M_DATA_B28 M_DATA_B29 M_DATA_B30 M_DATA_B31 M_DATA_B32 M_DATA_B33 M_DATA_B34 M_DATA_B35 M_DATA_B36 M_DATA_B37 M_DATA_B38 M_DATA_B39 M_DATA_B40 M_DATA_B41 M_DATA_B42 M_DATA_B43 M_DATA_B44 M_DATA_B45 M_DATA_B46 M_DATA_B47 M_DATA_B48 M_DATA_B52 M_DATA_B55 M_DATA_B51 M_DATA_B54 M_DATA_B49 M_DATA_B53 M_DATA_B50 M_DATA_B56 M_DATA_B57 M_DATA_B58 M_DATA_B59 M_DATA_B60 M_DATA_B61 M_DATA_B62 M_DATA_B63 DQ REMAPPING IMPLEMENTED TO IMPROVE BREAKOUT AND MINIMIZE CH-2-CH COUPLING C DQ REMAPPING IMPLEMENTED B TO IMPROVE BREAKOUT AND MINIMIZE CH-2-CH COUPLING A BIOSTAR_D V1_4 11 11 11 11 11 11 11 11 M_DQS_B_DP0 M_DQS_B_DP1 M_DQS_B_DP2 M_DQS_B_DP3 M_DQS_B_DP4 M_DQS_B_DP5 M_DQS_B_DP6 M_DQS_B_DP7 11 11 11 11 11 11 11 11 M_DQS_B_DN0 M_DQS_B_DN1 M_DQS_B_DN2 M_DQS_B_DN3 M_DQS_B_DN4 M_DQS_B_DN5 M_DQS_B_DN6 M_DQS_B_DN7 AG7 AG8 AJ9 AJ8 AG5 AG6 AJ6 AJ7 AL7 AM7 AM10 AL10 AL6 AM6 AL9 AM9 AP7 AR7 AP10 AR10 AP6 AR6 AP9 AR9 AM12 AM13 AR13 AP13 AL12 AL13 AR12 AP12 AR28 AR29 AL28 AL29 AP28 AP29 AM28 AM29 AP32 AP31 AP35 AP34 AR32 AR31 AR35 AR34 AM32 AM31 AL35 AL32 AM34 AL31 AM35 AL34 AH35 AH34 AE34 AE35 AJ35 AJ34 AF33 AF35 AH7 AM8 AR8 AN13 AN29 AP33 AL33 AG35 AH6 AL8 AP8 AN12 AN28 AR33 AM33 AG34 SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63 SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14 SB_MA_15 SA_CK(2) SA_CK(1) SA_ODT(2) SB_BS_0 SB_BS_1 SB_BS_2 SB_CS#_0 SB_CS#_1 SB_CS#_2 SB_CS#_3 SB_CKE_0 SB_CKE_1 SB_CKE_2 SB_CKE_3 SB_ODT_0 SB_ODT_1 SB_ODT_2 SB_ODT_3 SB_CK_0 SB_CK#_0 SB_CK_1 SB_CK#_1 SB_CK_2 SB_CK#_2 SB_CK_3 SB_CK#_3 AR25 AK25 AP24 AP23 AM24 AW17 AN25 AN26 AL25 AT26 AU16 AY15 AW15 AV15 AL26 AP26 AM26 AK26 AL21 AL22 AL20 AK20 AL23 AM22 AP21 AN21 M_MAA_B0 M_MAA_B1 M_MAA_B2 M_MAA_B3 M_MAA_B4 M_MAA_B5 M_MAA_B6 M_MAA_B7 M_MAA_B8 M_MAA_B9 M_MAA_B10 M_MAA_B11 M_MAA_B12 M_MAA_B13 M_MAA_B14 M_MAA_B15 D M_WE_B_N M_CAS_B_N M_RAS_B_N 11 11 11 M_SBS_B0 M_SBS_B1 M_SBS_B2 11 11 11 M_SCS_B_N0 M_SCS_B_N1 M_SCS_B_N2 M_SCS_B_N3 11 11 11 11 M_SCKE_B0 M_SCKE_B1 M_SCKE_B2 M_SCKE_B3 11 11 11 11 M_ODT_B0 M_ODT_B1 M_ODT_B2 M_ODT_B3 11 11 11 11 CK_M_DDR0_B_DP CK_M_DDR0_B_DN CK_M_DDR1_B_DP CK_M_DDR1_B_DN CK_M_DDR2_B_DP CK_M_DDR2_B_DN CK_M_DDR3_B_DP CK_M_DDR3_B_DN C 11 11 11 11 11 11 11 11 B SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7 AK24 AM20 AM19 AK18 AP19 AP18 AM18 AL18 AN18 AY17 AN23 AU17 AT18 AR26 AY16 AV16 M_MAA_B[0 15] 11 SB_DQS_8 SB_DQS#_8 SB_ECC_CB_0 SB_ECC_CB_1 SB_ECC_CB_2 SB_ECC_CB_3 SB_ECC_CB_4 SB_ECC_CB_5 SB_ECC_CB_6 SB_ECC_CB_7 AN16 AN15 AL16 AM16 AP16 AR16 AL15 AM15 AR15 AP15 A DDR_1 Title 2/10 Date: CPU DDR CHANNEL A Size Document Number Custom LGA 1155 SOCKET_FOX Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet of 48 V_CPU_VCCIO CPU1E BIOSTAR_D V1_4 CR6 110 1% 0402 VRD12 INTERFACE CR7 75 1% 0402 19 CK_PE_100M_MCP_DP 19 CK_PE_100M_MCP_DN H_VIDSCK H_VIDSOUT 41 H_VIDSCK 41 H_VIDSOUT 41 H_VIDALERT_N D H67 NO PECI3.0 SUPPORTED 14 PCH_PECI CR22 0402 /NI H_PECI 15,36 H_PWRGD 15 H_DRAMPWRGD V_1P8_SFR CR13 NV_CLE 4.7K 0402 CR28 120 0402 14 H_PM_SYNC_0 29 H_PECI 41 H_PROCHOT_N 14 H_THERMTRIP_N CR10 2.2K 0402 16 W2 W1 15,36,41 H_SKTOCC_N H_SNB_N H_PWRGD C_DRAMPWRGD PLTRST_CPU_N J40 AJ19 F36 H_PECI H_CATERR_N H_PROCHOT_N H_THERMTRIP_N E38 J35 E37 H34 G35 H_SNB_N SNB_DDR_VREF SNB:"1" IVB:"0" CC2 0.1UF 16V X7R 0402 V_SM SNB_DDR_VREF CR18 1K 1% 0402 AJ33 K32 AJ22 H36 J36 J37 K36 L36 N35 L37 M36 J38 L35 M38 N36 N38 N39 N37 N40 G37 G36 CR12 1K 1% 0402 C C37 B37 A37 CC3 1UF 10V Y5V 0402 solder side SLP_S4_N與 C_DRAMPWRGD在 S5時 序 不 對 ,spec如 Table 1,波 形 如 圖 一 ,CC56改 為 NI -By Peter- 20120410 AT14 C_DRAMPWRGD CC56 0.01UF 25V X7R 0402 /NI AY3 H7 H8 BCLK_0 BCLK#_0 VCCP_SELECT VCCSA_VID VCCSA_SENSE VIDSCLK VIDSOUT VIDALERT# VCC_SENSE VSS_SENSE VCCIO_SENSE VSSIO_SENSE UNCOREPWRGOOD SM_DRAMPWROK RESET# VCCAXG_SENSE VSSAXG_SENSE PM_SYNC PECI CATERR# PROCHOT# THERMTRIP# SKTOCC# PROC_SEL MISC SM_VREF CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 TDO TDI TCK TMS TRST# PRDY# PREQ# DBR# RSVD_001 RSVD_002 BPM#_0 BPM#_1 BPM#_2 BPM#_3 BPM#_4 BPM#_5 BPM#_6 BPM#_7 RSVD_024 RSVD_030 RSVD_037 RSVD_036 RSVD_033 RSVD_040 RSVD_039 B CR29 CC55 VCCP_SEL VCCSA_VID A36 B36 VCC_SENSE VSS_SENSE 41 41 AB4 AB3 1 1 1 CK_PE_100M_MCP_DP CK_PE_100M_MCP_DN H_PWRGD C_DRAMPWRGD PLTRST_CPU_N SNB_DDR_VREF MTP10 MTP13 1 VCCSA_VID VCCP_SEL RSVD_018 RSVD_020 RSVD_023 RSVD_038 RSVD_032 RSVD_034 RSVD_028 RSVD_029 1K 0402 RSVD_050 RSVD_053 0.01UF 25V X7R 0402 RSVD_051 RSVD_052 NEAR CPU D NEAR CPU L32 M32 L39 L40 M40 L38 J39 K38 K40 E39 C40 D40 MTP1 MTP2 MTP3 MTP4 MTP5 MTP6 VCCAXG_SENSE VSSAXG_SENSE 41 41 H_TDO H_TDI H_TCK H_TMS H_TRST_N H_PRDY_N H_PREQ_N CPU1J BIOSTAR_D V1_4 AB7 AD37 AG4 AJ29 AJ30 AJ31 AV34 AW34 H40 H38 G38 G40 G39 F38 E40 F40 P35 P37 P39 R34 R36 R38 R40 B39 J33 L34 L33 K34 A38 AU40 AW38 C2 D1 N33 M34 RSVD_04 RSVD_05 RSVD_08 RSVD_10 RSVD_11 RSVD_12 RSVD_19 RSVD_21 FC_AH1 FC_AH2 RSVD_15 RSVD_14 RSVD_13 RSVD_17 RSVD_22 RSVD_43 RSVD_44 RSVD_45 RSVD_46 RSVD_47 RSVD_48 RSVD_49 RSVD_07 RSVD_03 RSVD_06 RSVD_09 NCTF_01 NCTF_02 NCTF_03 NCTF_04 NCTF_05 RSVD_27 RSVD_26 RSVD_25 RSVD_31 RSVD_41 SPARES RSVD_016 RSVD_035 H_PWRGD P33 P34 T2 AV1 AW2 H_THERMTRIP_N H_PREQ_N H_PRDY_N H_CATERR_N H_PECI H_PWRGD J31 K31 AD34 AD35 H_TDI H_TDO CPU RESET LOGIC CR35 CR27 CR14 CR16 CR17 CR19 CFG A H NORM * * L RESERVED * * PLTRST_CPU_N H_TMS H_TCK CC5 0.1UF 16V Y5V 0402 H_TRST_N DESCRIPTION CFG6 CFG5 51 0402 /NI 51 0402 /NI 51 0402 /NI 1K 0402 /NI 1K 0402 /NI 51 0402 /NI B 51 8P4R 0402 51 8P4R 0402 A 1 X 16 SEL0 2X8 SEL1 RESERVED 0 X8,X4,X4 Title Date: D38 C39 C38 J34 N34 PCIE CONFIG PEGLANE REVERSAL[0],X16 CPU MISC Size Document Number Custom CRN2 CR25 110 1% 0402 C V_CPU_VCCIO L31 H_PROCHOT_N 200 1% 0402 AF4 AB6 AE6 AJ11 L9 J9 K9 LGA 1155 SOCKET_FOX CR23 11 10 10/10 CRN1 PLTRST_N DQB_VREF DQA_VREF AT11 AP20 AN20 AU10 AY10 LGA 1155 SOCKET_FOX 5/10 15,29 AH1 AH4 Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet of 48 9/10 D AV11 AV14 AV17 AV3 AV35 AV38 AV6 AW10 AW11 AW14 AW16 AW36 AW6 AY11 AY14 AY18 AY35 AY4 AY6 AY8 B10 B13 B14 B17 B23 B26 B29 B32 B35 B38 B6 C11 C12 C17 C20 C23 C26 C29 C32 C35 C7 C8 D17 D2 D20 D23 D26 D29 D32 D37 D39 D4 D5 D9 E11 E12 E17 E20 E23 E26 E29 E32 E36 E7 E8 F1 F10 F13 F14 F17 F2 F20 F23 F26 F29 F35 F37 F39 F5 F6 F9 G11 G12 G17 G20 G23 G26 G29 G34 G7 AY37 B3 BIOSTAR_D V1_4 VSS_001 VSS_091 VSS_002 VSS_092 VSS_003 VSS_093 VSS_004 VSS_094 VSS_005 VSS_095 VSS_006 VSS_096 VSS_007 VSS_097 VSS_008 VSS_098 VSS_009 VSS_099 VSS_010 VSS_100 VSS_011 VSS_101 VSS_012 VSS_102 VSS_013 VSS_103 VSS_014 VSS_104 VSS_015 VSS_105 VSS_016 VSS_106 VSS_017 VSS_107 VSS_018 VSS_108 VSS_019 VSS_109 VSS_020 VSS_110 VSS_021 VSS_111 VSS_022 VSS_112 VSS_023 VSS_113 VSS_024 VSS_114 VSS_025 VSS_115 VSS_026 VSS_116 VSS_027 VSS_117 VSS_028 VSS_118 VSS_029 VSS_119 VSS_030 VSS_120 VSS_031 VSS_121 VSS_032 VSS_122 VSS_033 VSS_123 VSS_034 VSS_124 VSS_035 VSS_125 VSS_036 VSS_126 VSS_037 VSS_127 VSS_038 VSS_128 VSS_039 VSS_129 VSS_040 VSS_130 VSS_041 VSS_131 VSS_042 VSS_132 VSS_043 VSS_133 VSS_044 VSS_134 VSS_045 VSS_135 VSS_046 VSS_136 VSS_047 VSS_137 VSS_048 VSS_138 VSS_049 VSS_139 VSS_050 VSS_140 VSS_051 VSS_141 VSS_052 VSS_142 VSS_053 VSS_143 VSS_054 VSS_144 VSS_055 VSS_145 VSS_056 VSS_146 VSS_057 VSS_147 VSS_058 VSS_148 VSS_059 VSS_149 VSS_060 VSS_150 VSS_061 VSS_151 VSS_062 VSS_152 VSS_063 VSS_153 VSS_064 VSS_154 VSS_065 VSS_155 VSS_066 VSS_156 VSS_067 VSS_157 VSS_068 VSS_158 VSS_069 VSS_159 VSS_070 VSS_160 VSS_071 VSS_161 VSS_072 VSS_162 VSS_073 VSS_163 VSS_074 VSS_164 VSS_075 VSS_165 VSS_076 VSS_166 VSS_077 VSS_167 VSS_078 VSS_168 VSS_079 VSS_169 VSS_080 VSS_170 VSS_081 VSS_171 VSS_082 VSS_172 VSS_083 VSS_173 VSS_084 VSS_174 VSS_085 VSS_175 VSS_086 VSS_176 VSS_087 VSS_177 VSS_088 VSS_178 VSS_089 VSS_179 VSS_090 VSS_180 VSS_NCTF_01 VSS_NCTF_02 A17 A23 A26 A29 A35 AA33 AA34 AA35 AA36 AA37 AA38 AA6 AB5 AC1 AC6 AD33 AD36 AD38 AD39 AD40 AD5 AD8 AE3 AE33 AE36 AF1 AF34 AF36 AF37 AF40 AF5 AF6 AF7 AG36 AH2 AH3 AH33 AH36 AH37 AH38 AH39 AH40 AH5 AH8 AJ12 AJ15 AJ18 AJ21 AJ25 AJ27 AJ36 AJ5 AK1 AK10 AK13 AK14 AK16 AK22 AK28 AK31 AK32 AK33 AK34 AK35 AK36 AK37 AK4 AK40 AK5 AK6 AK7 AK8 AK9 AL11 AL14 AL17 AL19 AL24 AL27 AL30 AL36 AL5 AM1 AM11 AM14 AM17 AM2 AM21 AM23 AM25 A4 AV39 D G8 H1 H17 H2 H20 H23 H26 H29 H33 H35 H37 H39 H5 H6 H9 J11 J17 J20 J23 J26 J29 J32 K1 K12 K13 K14 K17 K2 K20 K23 K26 K29 K33 K35 K37 K39 K5 K6 L10 L17 L20 L23 L26 L29 L8 M1 M17 M2 M20 M23 M26 M29 M33 M35 M37 M39 M5 M6 M9 N8 P1 P2 P36 P38 P40 P5 P6 R33 R35 R37 R39 R8 T1 T5 T6 U8 V1 V2 V33 V34 V35 V36 V37 V38 V39 V40 V5 W6 Y5 Y8 VSS_181 VSS_271 VSS_182 VSS_272 VSS_183 VSS_273 VSS_184 VSS_274 VSS_185 VSS_275 VSS_186 VSS_276 VSS_187 VSS_277 VSS_188 VSS_278 VSS_189 VSS_279 VSS_190 VSS_280 VSS_191 VSS_281 VSS_192 VSS_282 VSS_193 VSS_283 VSS_194 VSS_284 VSS_195 VSS_285 VSS_196 VSS_286 VSS_197 VSS_287 VSS_198 VSS_288 VSS_199 VSS_289 VSS_200 VSS_290 VSS_201 VSS_291 VSS_202 VSS_292 VSS_203 VSS_293 VSS_204 VSS_294 VSS_205 VSS_295 VSS_206 VSS_296 VSS_207 VSS_297 VSS_208 VSS_298 VSS_209 VSS_299 VSS_210 VSS_300 VSS_211 VSS_301 VSS_212 VSS_302 VSS_213 VSS_303 VSS_214 VSS_304 VSS_215 VSS_305 VSS_216 VSS_306 VSS_217 VSS_307 VSS_218 VSS_308 VSS_219 VSS_309 VSS_220 VSS_310 VSS_221 VSS_311 VSS_222 VSS_312 VSS_223 VSS_313 VSS_224 VSS_314 VSS_225 VSS_315 VSS_226 VSS_316 VSS_227 VSS_317 VSS_228 VSS_318 VSS_229 VSS_319 VSS_230 VSS_320 VSS_231 VSS_321 VSS_232 VSS_322 VSS_233 VSS_323 VSS_234 VSS_324 VSS_235 VSS_325 VSS_236 VSS_326 VSS_237 VSS_327 VSS_238 VSS_328 VSS_239 VSS_329 VSS_240 VSS_330 VSS_241 VSS_331 VSS_242 VSS_332 VSS_243 VSS_333 VSS_244 VSS_334 VSS_245 VSS_335 VSS_246 VSS_336 VSS_247 VSS_337 VSS_248 VSS_338 VSS_249 VSS_339 VSS_250 VSS_340 VSS_251 VSS_341 VSS_252 VSS_342 VSS_253 VSS_343 VSS_254 VSS_344 VSS_255 VSS_345 VSS_256 VSS_346 VSS_257 VSS_347 VSS_258 VSS_348 VSS_259 VSS_349 VSS_260 VSS_350 VSS_261 VSS_351 VSS_262 VSS_352 VSS_263 VSS_353 VSS_264 VSS_354 VSS_265 VSS_355 VSS_266 VSS_356 VSS_267 VSS_357 VSS_268 VSS_358 VSS_269 VSS_359 VSS_270 VSS_360 VSS_NCTF_03 VSS_NCTF_04 AM27 AM3 AM30 AM36 AM37 AM38 AM39 AM4 AM40 AM5 AN10 AN11 AN14 AN17 AN19 AN22 AN24 AN27 AN30 AN31 AN32 AN33 AN34 AN35 AN36 AN5 AN6 AN7 AN8 AN9 AP1 AP11 AP14 AP17 AP22 AP25 AP27 AP30 AP36 AP37 AP4 AP40 AP5 AR11 AR14 AR17 AR18 AR19 AR27 AR30 AR36 AR5 AT1 AT10 AT12 AT13 AT15 AT16 AT17 AT2 AT25 AT27 AT28 AT29 AT3 AT30 AT31 AT32 AT33 AT34 AT35 AT36 AT37 AT38 AT39 AT4 AT40 AT5 AT6 AT7 AT8 AT9 AU1 AU15 AU26 AU34 AU4 AU6 AU8 AV10 CPU1I LGA 1155 SOCKET_FOX CC22,CC23,CC234,CC25,CC26,CC27 -10UF 10V 0805 Y5V -> 22UF 6.3V X5R 0805 -20120510 by 量 測 CC10,CC18,CC190.CC14,CC15,CC16-10UF 10V 0805 Y5V -> 22UF 6.3V X5R 0805 -20120510 by 量 測 V_AXG V_CPU_VCCIO VCC_082 VCC_083 VCC_084 VCC_085 VCC_086 VCC_087 VCC_088 VCC_089 VCC_090 VCC_091 VCC_092 VCC_093 VCC_094 VCC_095 VCC_096 VCC_097 VCC_098 VCC_099 VCC_100 VCC_101 VCC_102 VCC_103 VCC_104 VCC_105 VCC_106 VCC_107 VCC_108 VCC_109 VCC_110 VCC_111 VCC_112 VCC_113 VCC_114 VCC_115 VCC_116 VCC_117 VCC_118 VCC_119 VCC_120 VCC_121 VCC_122 VCC_123 VCC_124 VCC_125 VCC_126 VCC_127 VCC_128 VCC_129 VCC_130 VCC_131 VCC_132 VCC_133 VCC_134 VCC_135 VCC_136 VCC_137 VCC_138 VCC_139 VCC_140 VCC_141 VCC_142 VCC_143 VCC_144 VCC_145 VCC_146 VCC_147 VCC_148 VCC_149 VCC_150 VCC_151 VCC_152 VCC_153 VCC_154 VCC_155 VCC_156 VCC_157 VCC_158 VCC_159 VCC_160 VCC_161 V_CPU_CORE V_CPU_CORE V_CPU_CORE V_CPU_CORE M13 F32 F33 F34 G15 G16 G18 G19 G21 G22 G24 G25 G27 G28 G30 G31 G32 G33 H13 H14 H15 H16 H18 H19 H21 H22 H24 H25 H27 H28 H30 H31 H32 J12 J15 J16 J18 J19 J21 J22 J24 J25 J27 J28 J30 K15 K16 K18 K19 K21 K22 K24 K25 K27 K28 K30 L13 L14 L15 L16 L18 L19 L21 L22 L24 L25 L27 L28 L30 M14 M15 M16 M18 M19 M21 M22 M24 M25 M27 M28 M30 CC6 10UF 10V 0805 Y5V V_CPU_CORE CC7 10UF 10V 0805 Y5V V_CPU_CORE CC12 10UF 10V 0805 Y5V V_CPU_CORE CC8 10UF 10V 0805 Y5V V_CPU_CORE CC59 10UF 10V 0805 Y5V V_CPU_CORE CC19 22UF 6.3V X5R 0805 22UF 6.3V X5R 0805 BCC1 10UF 10V 0805 Y5V V_CPU_CORE BCC2 10UF 10V 0805 Y5V BCC7 10UF 10V 0805 Y5V CC20 10UF 10V 0805 Y5V V_CPU_CORE V_CPU_CORE CC15 V_CPU_CORE BCC3 10UF 10V 0805 Y5V V_CPU_CORE BCC8 10UF 10V 0805 Y5V BCC9 10UF 10V 0805 Y5V BCC10 10UF 10V 0805 Y5V CC28 10UF 10V 0805 Y5V V_CPU_CORE BCC5 10UF 10V 0805 Y5V V_CPU_CORE CC17 10UF 10V 0805 Y5V V_CPU_CORE CC57 10UF 10V 0805 Y5V V_CPU_CORE A11 A7 AA3 AB8 AF8 AG33 AJ16 AJ17 AJ26 AJ28 AJ32 AK15 AK17 AK19 AK21 AK23 AK27 AK29 AK30 B9 D10 D6 E3 E4 G3 G4 J3 J4 J7 J8 L3 L4 L7 N3 N4 N7 R3 R4 R7 U3 U4 U7 V8 W3 CC11 10UF 10V 0805 Y5V V_CPU_CORE 22UF 6.3V X5R 0805 V_CPU_CORE BCC4 10UF 10V 0805 Y5V V_CPU_CORE 22UF 6.3V X5R 0805 CC16 CC21 10UF 10V 0805 Y5V V_CPU_CORE CC10 V_CPU_CORE 22UF 6.3V X5R 0805 22UF 6.3V X5R 0805 V_CPU_CORE V_CPU_CORE V_CPU_CORE CC14 CC18 V_CPU_CORE CC9 10UF 10V 0805 Y5V BCC6 10UF 10V 0805 Y5V V_CPU_CORE BCC11 10UF 10V 0805 Y5V BCC12 10UF 10V 0805 Y5V V_SA V_CPU_VCCIO V_CPU_VCCIO CC33 10UF 10V 0805 Y5V V_CPU_VCCIO V_CPU_VCCIO CC34 10UF 10V 0805 Y5V V_CPU_VCCIO V_CPU_VCCIO CC35 10UF 10V 0805 Y5V V_CPU_VCCIO V_CPU_VCCIO CC37 10UF 10V 0805 Y5V V_CPU_VCCIO CC38 10UF 10V 0805 Y5V CC43 10UF 10V 0805 Y5V V_CPU_VCCIO V_1P8_SFR CC41 10UF 10V 0805 Y5V CC42 1UF 16V 0805 Y5V CC40 10UF 10V 0805 Y5V CC39 1UF 10V Y5V 0402 V_SM CPU1H BIOSTAR_D V1_4 V_CPU_CORE H10 H11 H12 J10 K10 K11 L11 L12 M10 M11 M12 AK11 AK12 V_AXG CPU1G BIOSTAR_D V1_4 V_AXG VCCIO_34 VCCIO_01 VCCIO_02 VCCIO_03 VCCIO_04 VCCIO_05 VCCIO_06 VCCIO_07 VCCIO_08 VCCIO_09 VCCIO_10 VCCIO_11 VCCIO_12 VCCIO_13 VCCIO_14 VCCIO_15 VCCIO_16 VCCIO_17 VCCIO_18 VCCIO_19 VCCIO_20 VCCIO_21 VCCIO_22 VCCIO_23 VCCIO_24 VCCIO_25 VCCIO_26 VCCIO_27 VCCIO_28 VCCIO_29 VCCIO_30 VCCIO_31 VCCIO_32 VCCIO_33 VCCIO_35 VCCIO_36 VCCIO_37 VCCIO_38 VCCIO_39 VCCIO_40 VCCIO_41 VCCIO_42 VCCIO_43 VCCIO_44 VCCIO_45 VDDQ_01 VDDQ_02 VDDQ_04 VDDQ_05 VDDQ_06 VDDQ_07 VDDQ_08 VDDQ_09 VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14 VDDQ_15 VDDQ_16 VDDQ_17 VDDQ_18 VDDQ_19 VDDQ_20 VDDQ_21 VDDQ_22 VDDQ_23 AJ13 AJ14 AJ23 AJ24 AR20 AR21 AR22 AR23 AR24 AU19 AU23 AU27 AU31 AV21 AV24 AV25 AV29 AV33 AW31 AY23 AY26 AY28 CC22 CC23 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V V_AXG V_AXG CC24 V_AXG 10UF 10V 0805 Y5V V_AXG CC26 CC27 10UF 10V 0805 Y5V V_AXG VDDQ_03 CC25 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V V_AXG AJ20 CC61 10UF 10V 0805 Y5V V_AXG V_AXG BCC19 10UF 10V 0805 Y5V VCCSA_01 VCCSA_02 VCCSA_03 VCCSA_04 VCCSA_05 VCCSA_06 VCCSA_07 VCCSA_08 VCCSA_09 VCCSA_10 VCCSA_11 CC62 10UF 10V 0805 Y5V V_AXG BCC20 10UF 10V 0805 Y5V V_AXG BCC21 10UF 10V 0805 Y5V V_SM VCCPLL_01 VCCPLL_02 AB33 AB34 AB35 AB36 AB37 AB38 AB39 AB40 AC33 AC34 AC35 AC36 AC37 AC38 AC39 AC40 T33 T34 T35 T36 T37 T38 T39 T40 U33 U34 U35 U36 U37 U38 U39 U40 W33 W34 W35 W36 W37 W38 Y33 Y34 Y35 Y36 Y37 Y38 V_SM VCCAXG_01 VCCAXG_02 VCCAXG_03 VCCAXG_04 VCCAXG_05 VCCAXG_06 VCCAXG_07 VCCAXG_08 VCCAXG_09 VCCAXG_10 VCCAXG_11 VCCAXG_12 VCCAXG_13 VCCAXG_14 VCCAXG_15 VCCAXG_16 VCCAXG_17 VCCAXG_18 VCCAXG_19 VCCAXG_20 VCCAXG_21 VCCAXG_22 VCCAXG_23 VCCAXG_24 VCCAXG_25 VCCAXG_26 VCCAXG_27 VCCAXG_28 VCCAXG_29 VCCAXG_30 VCCAXG_31 VCCAXG_32 VCCAXG_33 VCCAXG_34 VCCAXG_35 VCCAXG_36 VCCAXG_37 VCCAXG_38 VCCAXG_39 VCCAXG_40 VCCAXG_41 VCCAXG_42 VCCAXG_43 VCCAXG_44 C 7/10 V_AXG BCC22 10UF 10V 0805 Y5V LGA 1155 SOCKET_FOX B BCC23 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V -> 22UF 6.3V X5R 0805 -20120510 by 量 測 V_SM CC63 CC64 CC65 22UF 6.3V X5R 0805 22UF 6.3V X5R 0805 22UF 6.3V X5R 0805 POWER 8/10 LGA 1155 SOCKET_FOX V_SM V_CPU_VCCIO V_CPU_VCCIO V_CPU_VCCIO V_CPU_VCCIO V_SM BCC24 10UF 10V 0805 Y5V BCC13 10UF 10V 0805 Y5V BCC16 10UF 10V 0805 Y5V BCC17 10UF 10V 0805 Y5V MTP7 V_CPU_CORE MTP8 V_CPU_VCCIO MTP9 V_SA MTP11 V_1P8_SFR MTP12 V_AXG V_SM V_CPU_VCCIO BCC25 10UF 10V 0805 Y5V BCC26 10UF 10V 0805 Y5V BCC14 10UF 10V 0805 Y5V NEAR CPU V_SA V_SA V_SA A V_1P8_SFR B IO S TAR ' S P R O P R IETAR Y IN FO R M ATIO N ◆ 6/10 LGA 1155 SOCKET_FOX CC30 10UF 10V 0805 Y5V CC31 10UF 10V 0805 Y5V BCC18 10UF 10V 0805 Y5V Any unautho rized use, repro ductio n, duplicatio n, o r disclo sure o f this cument will be subject to the applicable civ il and/o rcriminal penalties CC60 10UF 10V 0805 Y5V ◆ A VCC_001 VCC_002 VCC_003 VCC_004 VCC_005 VCC_006 VCC_007 VCC_008 VCC_009 VCC_010 VCC_011 VCC_012 VCC_013 VCC_014 VCC_015 VCC_016 VCC_017 VCC_018 VCC_019 VCC_020 VCC_021 VCC_022 VCC_023 VCC_024 VCC_025 VCC_026 VCC_027 VCC_028 VCC_029 VCC_030 VCC_031 VCC_032 VCC_033 VCC_034 VCC_035 VCC_036 VCC_037 VCC_038 VCC_039 VCC_040 VCC_041 VCC_042 VCC_043 VCC_044 VCC_045 VCC_046 VCC_047 VCC_048 VCC_049 VCC_050 VCC_051 VCC_052 VCC_053 VCC_054 VCC_055 VCC_056 VCC_057 VCC_058 VCC_059 VCC_060 VCC_061 VCC_062 VCC_063 VCC_064 VCC_065 VCC_066 VCC_067 VCC_068 VCC_069 VCC_070 VCC_071 VCC_072 VCC_073 VCC_074 VCC_075 VCC_076 VCC_077 VCC_078 VCC_079 VCC_080 VCC_081 V_CPU_CORE ◇ B A12 A13 A14 A15 A16 A18 A24 A25 A27 A28 B15 B16 B18 B24 B25 B27 B28 B30 B31 B33 B34 C15 C16 C18 C19 C21 C22 C24 C25 C27 C28 C30 C31 C33 C34 C36 D13 D14 D15 D16 D18 D19 D21 D22 D24 D25 D27 D28 D30 D31 D33 D34 D35 D36 E15 E16 E18 E19 E21 E22 E24 E25 E27 E28 E30 E31 E33 E34 E35 F15 F16 F18 F19 F21 F22 F24 F25 F27 F28 F30 F31 CPU POWER C V_CPU_CORE CPU1F BIOSTAR_D V1_4 ◇ V_CPU_CORE Title Date: CPU POWER/GND Size Document Number Custom Rev 5.0 BIB75-MHA Friday, July 20, 2012 Sheet of 48 MEMORY PART: M+Reference M_DATA_A[0 63] DDR3_A1A 6 6 6 6 6 6 6 6 D M_DQS_A_DN0 M_DQS_A_DP0 M_DQS_A_DN1 M_DQS_A_DP1 M_DQS_A_DN2 M_DQS_A_DP2 M_DQS_A_DN3 M_DQS_A_DP3 M_DQS_A_DN4 M_DQS_A_DP4 M_DQS_A_DN5 M_DQS_A_DP5 M_DQS_A_DN6 M_DQS_A_DP6 M_DQS_A_DN7 M_DQS_A_DP7 M_DQS_A_DN0 M_DQS_A_DP0 M_DQS_A_DN1 M_DQS_A_DP1 M_DQS_A_DN2 M_DQS_A_DP2 M_DQS_A_DN3 M_DQS_A_DP3 M_DQS_A_DN4 M_DQS_A_DP4 M_DQS_A_DN5 M_DQS_A_DP5 M_DQS_A_DN6 M_DQS_A_DP6 M_DQS_A_DN7 M_DQS_A_DP7 C 11,36 SMB_DATA_MAIN 11,36 SMB_CLK_MAIN B 39 40 45 46 158 159 164 165 SMB_DATA_MAIN SMB_CLK_MAIN 79 238 118 M_MAA_A[0 15] M_MAA_A[0 15] M_SBS_A2 15 16 24 25 33 34 84 85 93 94 102 103 111 112 42 43 125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162 M_MAA_A0 M_MAA_A1 M_MAA_A2 M_MAA_A3 M_MAA_A4 M_MAA_A5 M_MAA_A6 M_MAA_A7 M_MAA_A8 M_MAA_A9 M_MAA_A10 M_MAA_A11 M_MAA_A12 M_MAA_A13 M_MAA_A14 M_MAA_A15 M_SBS_A2 188 181 61 180 59 58 178 56 177 175 70 55 174 196 172 171 52 DQS0DQS0 DQS1DQS1 DQS2DQS2 DQS3DQS3 DQS4DQS4 DQS5DQS5 DQS6DQS6 DQS7DQS7 DQS8DQS8 DQS9 DQS9DQS10 DQS10DQS11 DQS11DQS12 DQS12DQS13 DQS13DQS14 DQS14DQS15 DQS15DQS16 DQS16DQS17 DQS17CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 RSVD SDA SCL A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16/BA2 DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 NC/PAR_IN NC/ERR_OUT NC/TEST4 BLACK 234 233 228 227 115 114 109 108 225 224 219 218 106 105 100 99 216 215 210 209 97 96 91 90 207 206 201 200 88 87 82 81 156 155 150 149 37 36 31 30 147 146 141 140 28 27 22 21 138 137 132 131 19 18 13 12 129 128 123 122 10 68 53 167 M_DATA_A63 M_DATA_A62 M_DATA_A61 M_DATA_A60 M_DATA_A59 M_DATA_A58 M_DATA_A57 M_DATA_A56 M_DATA_A55 M_DATA_A54 M_DATA_A53 M_DATA_A52 M_DATA_A51 M_DATA_A50 M_DATA_A49 M_DATA_A48 M_DATA_A47 M_DATA_A46 M_DATA_A45 M_DATA_A44 M_DATA_A43 M_DATA_A42 M_DATA_A41 M_DATA_A40 M_DATA_A39 M_DATA_A38 M_DATA_A37 M_DATA_A36 M_DATA_A35 M_DATA_A34 M_DATA_A33 M_DATA_A32 M_DATA_A31 M_DATA_A30 M_DATA_A29 M_DATA_A28 M_DATA_A27 M_DATA_A26 M_DATA_A25 M_DATA_A24 M_DATA_A23 M_DATA_A22 M_DATA_A21 M_DATA_A20 M_DATA_A19 M_DATA_A18 M_DATA_A17 M_DATA_A16 M_DATA_A15 M_DATA_A14 M_DATA_A13 M_DATA_A12 M_DATA_A11 M_DATA_A10 M_DATA_A9 M_DATA_A8 M_DATA_A7 M_DATA_A6 M_DATA_A5 M_DATA_A4 M_DATA_A3 M_DATA_A2 M_DATA_A1 M_DATA_A0 M_DATA_A[0 63] V_SM V_SM DDR3_A1B VCC3_3 51 54 57 60 62 65 66 69 72 75 78 170 173 176 179 182 183 186 189 191 194 197 236 DIMM_CA_VREF DIMM_DQ_VREF_A 67 VDDQ1 (P) VDDQ2 (P) VDDQ3 (P) VDDQ4 (P) VDDQ5 (P) VDDQ6 (P) VDDQ7 (P) VDDQ8 (P) VDDQ9 (P) VDDQ10 (P) VDDQ11 (P) VDD1 (P) VDD2 (P) VDD3 (P) VDD4 (P) VDD5 (P) VDD6 (P) VDD7(P) VDD8(P) VDD9(P) VDD10(P) VDD11(P) VDDSPD(P) VREFCA VREFDQ 117 237 6 M_SCKE_A0 M_SCKE_A1 6 M_SBS_A0 M_SBS_A1 6,11 DDR3_DRAMRST_N M_WE_A_N M_RAS_A_N M_CAS_A_N M_SCS_A_N0 M_SCS_A_N1 6 6 6 SA0 SA1 50 169 M_SBS_A0 M_SBS_A1 71 190 DDR3_DRAMRST_N M_WE_A_N M_RAS_A_N M_CAS_A_N 168 73 192 74 193 76 CKE0 CKE1 BA0 BA1 RESET WERASCASS-0 S-1 195 77 M_ODT_A0 M_ODT_A1 ODT0 ODT1 64 63 185 184 CK_M_DDR1_A_DN CK_M_DDR1_A_DP CK_M_DDR0_A_DN CK_M_DDR0_A_DP CK-1 CK1 CK-0 CK0 48 49 187 198 DDR3_A2A VSS1(P) VSS2(P) VSS3(P) VSS4(P) VSS5(P) VSS6(P) VSS7(P) VSS8(P) VSS9(P) VSS10(P) VSS11(P) VSS12(P) VSS13(P) VSS60(P) VSS14(P) VSS15(P) VSS16(P) VSS17(P) VSS18(P) VSS19(P) VSS20(P) VSS21(P) VSS22(P) VSS23(P) VSS24(P) VSS25(P) VSS26(P) VSS27(P) VSS28(P) VSS29(P) VSS30(P) VSS31(P) VSS32(P) VSS33(P) VSS34(P) VSS35(P) VSS36(P) VSS37(P) VSS38(P) VSS39(P) VSS40(P) VSS41(P) VSS42(P) VSS43(P) VSS44(P) VSS45(P) VSS46(P) VSS47(P) VSS48(P) VSS49(P) VSS50(P) VSS51(P) VSS52(P) VSS53(P) VSS54(P) VSS55(P) VSS56(P) VSS57(P) VSS58(P) VSS59(P) FREE1 FREE2 FREE3 FREE4 VTT VTT M_DQS_A_DN0 M_DQS_A_DP0 M_DQS_A_DN1 M_DQS_A_DP1 M_DQS_A_DN2 M_DQS_A_DP2 M_DQS_A_DN3 M_DQS_A_DP3 M_DQS_A_DN4 M_DQS_A_DP4 M_DQS_A_DN5 M_DQS_A_DP5 M_DQS_A_DN6 M_DQS_A_DP6 M_DQS_A_DN7 M_DQS_A_DP7 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 92 95 98 101 104 107 110 113 116 119 121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 199 202 205 208 211 214 217 220 223 226 229 232 235 239 89 15 16 24 25 33 34 84 85 93 94 102 103 111 112 42 43 125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162 39 40 45 46 158 159 164 165 120 240 V_SM_VTT DDR3-240 PIN-W DDR3-240 PIN-W SMB_DATA_MAIN SMB_CLK_MAIN 79 238 118 M_MAA_A0 M_MAA_A1 M_MAA_A2 M_MAA_A3 M_MAA_A4 M_MAA_A5 M_MAA_A6 M_MAA_A7 M_MAA_A8 M_MAA_A9 M_MAA_A10 M_MAA_A11 M_MAA_A12 M_MAA_A13 M_MAA_A14 M_MAA_A15 M_SBS_A2 188 181 61 180 59 58 178 56 177 175 70 55 174 196 172 171 52 DQS0DQS0 DQS1DQS1 DQS2DQS2 DQS3DQS3 DQS4DQS4 DQS5DQS5 DQS6DQS6 DQS7DQS7 DQS8DQS8 DQS9 DQS9DQS10 DQS10DQS11 DQS11DQS12 DQS12DQS13 DQS13DQS14 DQS14DQS15 DQS15DQS16 DQS16DQS17 DQS17CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 RSVD SDA SCL A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16/BA2 DDR3_A2B DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 NC/PAR_IN NC/ERR_OUT NC/TEST4 BLACK 234 233 228 227 115 114 109 108 225 224 219 218 106 105 100 99 216 215 210 209 97 96 91 90 207 206 201 200 88 87 82 81 156 155 150 149 37 36 31 30 147 146 141 140 28 27 22 21 138 137 132 131 19 18 13 12 129 128 123 122 10 68 53 167 M_DATA_A63 M_DATA_A62 M_DATA_A61 M_DATA_A60 M_DATA_A59 M_DATA_A58 M_DATA_A57 M_DATA_A56 M_DATA_A55 M_DATA_A54 M_DATA_A53 M_DATA_A52 M_DATA_A51 M_DATA_A50 M_DATA_A49 M_DATA_A48 M_DATA_A47 M_DATA_A46 M_DATA_A45 M_DATA_A44 M_DATA_A43 M_DATA_A42 M_DATA_A41 M_DATA_A40 M_DATA_A39 M_DATA_A38 M_DATA_A37 M_DATA_A36 M_DATA_A35 M_DATA_A34 M_DATA_A33 M_DATA_A32 M_DATA_A31 M_DATA_A30 M_DATA_A29 M_DATA_A28 M_DATA_A27 M_DATA_A26 M_DATA_A25 M_DATA_A24 M_DATA_A23 M_DATA_A22 M_DATA_A21 M_DATA_A20 M_DATA_A19 M_DATA_A18 M_DATA_A17 M_DATA_A16 M_DATA_A15 M_DATA_A14 M_DATA_A13 M_DATA_A12 M_DATA_A11 M_DATA_A10 M_DATA_A9 M_DATA_A8 M_DATA_A7 M_DATA_A6 M_DATA_A5 M_DATA_A4 M_DATA_A3 M_DATA_A2 M_DATA_A1 M_DATA_A0 51 54 57 60 62 65 66 69 72 75 78 170 173 176 179 182 183 186 189 191 194 197 236 VCC3_3 6 6 6 DIMM_CA_VREF DIMM_DQ_VREF_A 67 VCC3_3 117 237 VDDQ1 (P) VDDQ2 (P) VDDQ3 (P) VDDQ4 (P) VDDQ5 (P) VDDQ6 (P) VDDQ7 (P) VDDQ8 (P) VDDQ9 (P) VDDQ10 (P) VDDQ11 (P) VDD1 (P) VDD2 (P) VDD3 (P) VDD4 (P) VDD5 (P) VDD6 (P) VDD7(P) VDD8(P) VDD9(P) VDD10(P) VDD11(P) VDDSPD(P) VREFCA VREFDQ SA0 SA1 50 169 M_SCKE_A2 M_SCKE_A3 M_SBS_A0 M_SBS_A1 71 190 DDR3_DRAMRST_N M_WE_A_N M_RAS_A_N M_CAS_A_N 6 M_SCS_A_N2 M_SCS_A_N3 168 73 192 74 193 76 6 M_ODT_A2 M_ODT_A3 195 77 CK_M_DDR3_A_DN CK_M_DDR3_A_DP CK_M_DDR2_A_DN CK_M_DDR2_A_DP 64 63 185 184 CKE0 CKE1 BA0 BA1 RESET WERASCASS-0 S-1 ODT0 ODT1 CK-1 CK1 CK-0 CK0 48 49 187 198 VSS1(P) VSS2(P) VSS3(P) VSS4(P) VSS5(P) VSS6(P) VSS7(P) VSS8(P) VSS9(P) VSS10(P) VSS11(P) VSS12(P) VSS13(P) VSS60(P) VSS14(P) VSS15(P) VSS16(P) VSS17(P) VSS18(P) VSS19(P) VSS20(P) VSS21(P) VSS22(P) VSS23(P) VSS24(P) VSS25(P) VSS26(P) VSS27(P) VSS28(P) VSS29(P) VSS30(P) VSS31(P) VSS32(P) VSS33(P) VSS34(P) VSS35(P) VSS36(P) VSS37(P) VSS38(P) VSS39(P) VSS40(P) VSS41(P) VSS42(P) VSS43(P) VSS44(P) VSS45(P) VSS46(P) VSS47(P) VSS48(P) VSS49(P) VSS50(P) VSS51(P) VSS52(P) VSS53(P) VSS54(P) VSS55(P) VSS56(P) VSS57(P) VSS58(P) VSS59(P) FREE1 FREE2 FREE3 FREE4 VTT VTT 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 92 95 98 101 104 107 110 113 116 119 121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 199 202 205 208 211 214 217 220 223 226 229 232 235 239 89 D C 120 240 V_SM_VTT DDR3-240 PIN-B B DDR3-240 PIN-B Near DDR3_A2 V_SM V_SM V_SM MR3 1K 1% 0402 DIMM_DQ_VREF_A MR2 1K 1% 0402 MR1 0402 DQA_VREF Near DDR3_A1 MC6 0.1UF 16V Y5V 0402 MC8 0.1UF 16V Y5V 0402 MC1 0.1UF 16V Y5V 0402 MC10 0.1UF 16V Y5V 0402 MC3 10UF 10V 0805 Y5V MC13 0.1UF 16V Y5V 0402 MC5 10UF 10V 0805 Y5V MC14 0.1UF 16V Y5V 0402 MC7 0.1UF 16V Y5V 0402 V_SM_VTT MC12 10UF 10V 0805 Y5V VCC3_3 MC16 0.1UF 16V Y5V 0402 V_SM_VTT MC2 1UF 10V Y5V 0402 V_SM MR5 1K 1% 0402 DDR3_DRAMRST_N SMB_DATA_MAIN SMB_CLK_MAIN 11 A B IO S TAR ' S P R O P R IETAR Y IN FO R M ATIO N ◆ DIMM_CA_VREF ◇ DIMM_CA_VREF MC4 1UF 10V Y5V 0402 MC34 100P 50V NPO 0402 MC35 100P 50V NPO 0402 MC36 100P 50V NPO 0402 Any unautho rized use, repro ductio n, duplicatio n, o r disclo sure o f this cument will be subject to the applicable civ il and/o rcriminal penalties ◆ MR6 1K 1% 0402 ◇ A Title DDR2 DIMMA1/A2 Size Document Number Custom Date: Rev 5.0 BIB75-MHA Sheet Friday, July 20, 2012 10 of 48 Colay /w RTL8111E Lan POWER_JUSB3 POWER_JUSB4 RJ45USB2A 0.1UF 16V Y5V 0402 + CT6 560UF-S 6.3V 6.3X9 8X12 USB_KBMS1A Dual USB2_KB-2COLOR 13 13 USB_D4USB_D4+ USB_D4USB_D4+ USB_D5USB_D5+ 13 USB_D8+ USB_D8- B2 USB_D8+ B3 USB_D5USB_D5+ A1 G2 13 USB_D9- 13 USB_D9+ USB_9- A2 USB_D9+ A3 IO_GND Del R12 USB_D4- CM1293 SOT23-6 IO_GND IO_GND F4 POLY FUSE 1.1A /NI * Colay /w USB3.0 Connector + 82579 Lan PHY 17 17 USB3_TXN1 USB3_TXP1 USB_D0USB_D0+ U2 U3 USB3_RXN1 USB3_RXP1 C117 C118 U5 U6 0.1UF 16V X7R 0402 0.1UF 16V X7R 0402 F_USB3_TXN1 F_USB3_TXP1 Near USB connector 13 13 USB_D1USB_D1+ 17 17 USB3_RXN2 USB3_RXP2 17 17 USB3_TXN2 USB3_TXP2 U11 U12 USB3_RXN2 USB3_RXP2 U14 U15 0.1UF 16V X7R 0402 0.1UF 16V X7R 0402 F_USB3_TXN2 F_USB3_TXP2 Near USB connector A U8 U9 U10 USB_D1USB_D1+ C119 C120 RJ45USB1A U1 USB3_RXN1 USB3_RXP1 USB_D1+ R7 U17 U18 VCC1 DM1 DP1 GND1 GND2 GND3 GND4 G6 GND5 DATA1+ IO_GND GND1 C USB_D9POWER_JUSB3 USB_D8- POWER_JUSB3 USB_D1- Q16 RX1RX1+ USB3_RXN2 USB3_RXP2 TX1TX1+ VCC2 USB3_RXN1 USB3_RXP1 Q19 10 USB3_RXN2 F_USB3_TXN1 USB3_RXP2 F_USB3_TXP1 USB3_RXN1 F_USB3_TXP2 USB3_RXP1 F_USB3_TXN2 AZ1045 DFN2510P10E DM2 DP2 RX2RX2+ USB_D0- MGND2 RJ45GIGA_USB3 MGND3 MGND4 MGND5 TX2TX2+ 10 F_USB3_TXN1 B F_USB3_TXP1 F_USB3_TXP2 F_USB3_TXN2 AZ1045 DFN2510P10E G3 G4 G5 G6 IO_GND A USB3.0 PORTS 0805 Title USB CONN IO_GND Size Document Number Custom Date: G5 GND4 DATA1- CM1293 SOT23-6 U4 U7 U13 U16 CH4 CH3 G CH2 CH1 IP4284CZ10-TB NC NC NC NC G C39 0.1UF 16V Y5V 0402 B2 B1 CM1293 A2 + A1 USB_D0+ CT11 17 17 G4 GND3 VCC1 Q13 560UF-S 6.3V 6.3X9 8X12 B G3 POWER_JUSB3 + USB_D0USB_D0+ GND0 Q9 CM1293 SOT23-6 USB_D8+ * 13 13 D DATA0+ USB_D9+ R13 -Del by Layout 20120418 F5 POLY FUSE 2.0A DATA0- LANUSB_GBMA C +5V_DUAL VCC0 GND2 13 13 A4 POWER_JUSB4 B2 USB_D5+ G1 B1 CM1293 A2 + A1 USB_D4+ USB_D8- B4 Q6 USB_D5- 13 CH4 CH3 G CH2 CH1 IP4284CZ10-TB NC NC NC NC G D C56 * F1 POLY FUSE 2.0A B1 B2 B1 CM1293 A1 A2 + +5V_DUAL Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet 34 of 48 +5V_STBY VCC5 FP PART: F+Reference VCC3_3 +5V_STBY VCC3_3 VCC3_3 VCC5 VCC3_3 ATXPWR1 VCC12- 3.3V 3.3V VCC5 VCC12 13 VCC12- R8 4.7K 0402 -12V 3.3V GND GND RN1 8.2K 8P4R 0402 RN12 8.2K 8P4R 0402 15 14 VCC12 D 19 VCC5 VCC5 20 21 FC8 0.1UF 16V Y5V 0402 FC3 0.1UF 16V Y5V 0402 22 23 24 VCC3_3 VCC3_3 FC11 0.1UF 16V Y5V 0402 FC10 0.1UF 16V Y5V 0402 BUZZ1 GND GND 5V GND GND NC POK 5V 5VSB 5V 12V 5V 12V GND DET VCC5 FR13 R9 4.7K 0402 DI01 14 14 DO01 DI02 14 14 DO02 DI03 14 10 14 DO03 DI04 14 11 14 DO04 10 ATXPG_IN 29 C42 470P 50V X7R 0402 HEADER 2X5 12 68 0402 C FR10 B SPK_DAT 2.2K 0402 SPKR C 15 E C50 0.1UF 16V Y5V 0402 VCC3_3 +5V_STBY JDIO1 POWER CONN ATX 24P BUZZ1 BUZZER 1206 FQ1 2N3904 SOT23 VCC5 +3V3_DUAL + CT7 FC5 0.1UF 16V Y5V 0402 560UF-S 6.3V 6.3X9 8X12 VCC3_3 VCC3_3 FR3 -Change to Pull-High >3V3_Dual For S3 Blinking-V1.0 20120522 FR3 220 0402 FR11 10K 0402 FR12 200 0402 JPANEL1 HEADER 2X5 N1 HDD_LED+ HDD_LED- 14 PCH_SATA_LED_N +3V3_STBY B VCC3_3 +3V3_DUAL FQ3 2N3904 SOT23 10 POWER_LED- B E C FQ4 BAT54A SOT23 FR5 1K 0402 FR6 1K 0402 FR16 4.7K 0402 C VCC3_3 FR7 10K 0402 15 D VCC5 C GND DO04 DO01 18 5V DI02 17 C41 470P 50V X7R 0402 PSON DI03 FC2 0.1UF 16V Y5V 0402 16 PS_ON_N DO03 FC1 0.1UF 16V Y5V 0402 29 FQ5 2N3904 SOT23 K B FR15 2.2K 0402 FR17 4.7K 0402 FR14 ACPI_LED 29 B +3V3_DUAL 2.2K 0402 V_SM E KA SYS_RST_N +3V3_STBY A +5V_STBY FC6 0.1UF 16V Y5V 0402 29 WATCH_DOG FR8 10K 0402 FP_RST_N_H 16 FP_RST_N_H FR9 33 0402 PWRBTN_N 29 FC7 0.1UF 16V Y5V 0402 A A Title 24PIN POWER CONN&FP Size Document Number Custom Date: Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet 35 of 46 +3V3_STBY +5V_DUAL C R39 4.7K 0402 R43 4.7K 0402 Q22 2N3904 SOT23 S E R45 4.7K 0402 B 10K 0402 Q31 2N7002 SOT23 G 8,15 C E B E D R27 15,29,38 SLP_S3_N 37 D H_PWRGD 4.7K 0402 B R42 Q17 2N3904 SOT23 C Q48 2N3904 SOT23 /NI E PCH_DPWROK 15,29 D Q18 2N3904 SOT23 R41 4.7K 0402 B +5V_STBY 15,41 C PCH_SYSPWROK R44 1K 0402 0.6 >0.65 D_PWROK C81 10UF 10V 0805 Y5V VCC3_3 C +5V_STBY C PCH_RSMRST_N 15,29 Q12 2N3904 SOT23 R19 10K 0402 E R46 2.7K 0402 Q43 2N7002 SOT23 S D G SMB_CLK_MAIN 10,11 D B 15,24,25,32,44 SMB_CLK_RESUME C VCC3_3 15,29,37 SLP_SUSB 1K 0402 S R22 G Q14 2N7002 SOT23 R47 2.7K 0402 0.6 >0.65 B 15,24,25,32,44 SMB_DATA_RESUME FOR POWER TEST B SMB_DATA_MAIN 10,11 5VDUAL_G_SYS 37 14,15,29 C PWRGD_3V Q44 2N7002 SOT23 S D G 10K 0402 E R32 ◇ 8,15,41 H_SKTOCC_N B Q23 2N3904 SOT23 ◆ BIOSTAR'S PROPRIETARY INFORMATION A ◇ A Title ◆ Any unauthorized use, reproduction, duplication, or disclosure of this document will be subject to the applicable civil and/orcriminal penalties RESUME RESET LOGIC Size Document Number Custom Date: Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet 36 of 48 Q5 BAT54C SOT23 A +3V3_STBY SW_ON_N 15,29 D_PWROK 36 KA +5V_STBY K CNTL NC R2 R55 4.7K 1% 0402 C64 22NF 16V X7R 0402 CT5 + 100UF-S 16V 6.3X9 5x11 FB C57 10UF 10V 0805 Y5V D VOUT VIN 4.7K 0402 +3V3_STBY C74 1UF 10V Y5V 0402 R64 POK EN R54 4.7K 0402 /NI 2 3V_STBY_EN GND_PAD GND D R71 1K 0402 U3 UP0105 PSOP8 +5V_STBY R53 4.7K 0402 R1 R56 1.5K 1% 0402 0.6 >0.65 Vout=Vref (0.8V) X ( R2/R1+1 ) NETIN: 100UF 16V 5X11 2MM LR 6.3X5 BOM: 100UF 16V 5X11 2mm LR 100UF-S 16V 6.3X8 ELITE C C +3V3_DUAL 560UF-S 6.3V 6.3X9 8X12 S +5V_DUAL Q46 AZ1117H-ADJ SOT-223 R75 200 1% 0402 CT15 S Q29 SI2301BDS SOT23 G EUP_GATE Q30 SI2301BDS SOT23 C58 1UF 10V Y5V 0402 29 R1 CT13 R86 200 1% 0402 I O A + 560UF-S 6.3V 6.3X9 8X12 R50 10K 0402 S R85 330 1% 0402 Vout=Vref (1.25V) X ( R2/R1+1 ) VCC5 S Q34 2N7002 SOT23 G E B Q35 2N3904 SOT23 10K 0402 G 100UF-S 16V 6.3X9 5x11 R2 C63 1UF 10V Y5V 0402 Q33 P0903BDL TO252 D C 5VDUAL_G_SYS CT14 D R49 10K 0402 + VCC12 B +3V3_AUX +5V_STBY R66 330 1% 0402 +5V_DUAL +5V_DUAL Q49 AZ1117H-ADJ SOT-223 R52 100UF-S 16V 6.3X9 5x11 G D EUPR5 10K 0402 29,30 PCI_RST2# CT12 + I O A + EUPC2 10UF 10V 0805 Y5V D 15,29,36 SLP_SUSB 5VSB_CTRL D2 SS12/5817 SMA B C EUPQ3 2N3906 SOT23 S G EUPQ2 2N7002 SOT23 B D1 SS12/5817 SMA 10K 0402 D EUPR4 A +5V_STBY K EUPR3 10K 0402 EUPR2 10K 0402 A EUPR9 10K 0402 5VSB_CTRL 29 +5V_STBY +5V_STBY K +3V3_STBY E +3V3_STBY C61 1UF 10V Y5V 0402 A A 5VDUAL_G_SYS 36 Title ACPI POWER CONTROL Size Document Number Custom Date: Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet 37 of 48 VCC5 R59 110 1% 0402 2V5_REF V_SM VCC12 2V5_REF V1P05PCH_EN C59 1UF 10V Y5V 0402 D PWR + - 11 R60 2.21K 1% 0402 A GND G U5A LM324 SO14 V_1P8_SFR_EN S R61 3.48K 1% 0402 C60 1UF 10V Y5V 0402 VCC3_3 D D U5B LM324 SO14 PWR + C122 1UF 10V Y5V 0402 Q37 P0903BDL TO252 G GND TDC:6.2A R62 1K 0402 R65 R58 1.33K 1% 0402 C123 1UF 10V Y5V 0402 Q36 P0903BDL TO252 R57 3K 1% 0402 Q38 AM431 SOT23 C65 0.1UF 16V Y5V 0402 S 11 C R VCC12 2V5_REF D MAX:1A R63 1K 0402 V_1P05_PCH V_1P8_SFR 100 1% 0402 NETIN:820UF-S 2.5V 6.3X8 8X8 BOM: 1000UF 6.3V 8X12 820UF-S 2.5V 6.3X8 ELITE NETIN:820UF-S 2.5V 6.3X8 8X8 BOM: 1000UF 6.3V 8X12 820UF-S 2.5V 6.3X8 ELITE + CT8 820UF-S 2.5V 6.3X8 ELITE + CT9 820UF-S 2.5V 6.3X8 ELITE C V1P05PCH_EN C C Q40 2N3904 SOT23 E B +5V_DUAL R67 10K 0402 10K 0402 C R69 V_1P8_SFR_EN C Q39 2N3904 SOT23 R82 10K 0402 V1P05PCH_EN MTP75 V_SA_EN E 10K 0402 MTP76 NEAR OP E R68 B 15,29,36 SLP_S3_N B Q41 2N3904 SOT23 2V5_REF VCC12 R70 2.21K 1% 0402 +5V_DUAL 10 C72 1UF 10V Y5V 0402 - GND G U5C LM324 SO14 11 R72 1.3K 1% 0402 PWR + S R73 1K 0402 E Q27 2N3904 SOT23 R76 + CT10 820UF-S 2.5V 6.3X8 ELITE E 10K 0402 B R164 TDC:8.8A 61.9 1% 0402 Q28 2N3904 SOT23 V_CPU_VCCIO Q7 P0903BDL TO252 V_SA C B R163 10K 0402 B D 0.926V V_SA_EN C V_SA_EN B V_CPU_VCCIO 820UF-S 2.5V 6.3X8 C121 1UF 10V Y5V 0402 A ◇ A ◇ ◆ BIOSTAR'S PROPRIETARY INFORMATION Title ◆ Any unauthoriz ed use, reproduction, duplication, or disclosure of this document w ill be subject to the applicable civ il and/orcriminal penalties LINEAR POWER CONTROL Size B Document Number Date: Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet 38 of 48 MEMORY PART:M+Reference K MQ1 BAT54C SOT23 D +5V_DUAL D KA ML1 INDUCTOR 1.2UH 22A 11X10.5 MR16 2.7 0805 MR34 0805 MC40 0.1UF 16V X7R 0402 A K MC38 10UF 10V 0805 Y5V D MD1 SS12/5817 SMA BV_VSM_EN COMP MQ4 2N3904 SOT23 FB MR17 0805 MR18 100K 0402 MR21 0805 R4 MR26 E 10K 0402 B MR33 ML2 INDUCTOR 1.5UH 30A 13X12 S MR23 42.2K 1% 0402 /NI V_SM MR20 2.7 0805 MQ3 P0603BDL TO252 S C MC44 1000P 50V X7R 0402 R5 30K 1% 0402 R1 MR25 1.24K 1% 0402 R2 FOR INTEL PLATFORM MR29 1.37K 1% 0402 MEMORY VLOTAGE CONTROL CIRCUIT + + MCT3 820UF-S 2.5V 6.3X8 ELITE Vout=0.8V X(1+R1/R2)=1.52V + MCT4 820UF-S 2.5V 6.3X8 ELITE MCT5 820UF-S 2.5V 6.3X8 ELITE UP0109 取 代 >FP6137E 20120402 VOUT REFEN MU3 uP0109 PSOP8 GND1 VIN GND2 MC37 1UF 10V Y5V 0402 NC1 NC2 B NC +5V_DUAL B VCTNL 15,29 SLP_S4_N MQ2 P0903BDL TO252 G G C MU2 uP1514 SOP8 MQ5 2N3904 SOT23 + MCT7 270UF-S 16V 8X12 APAQ D LGATE E B MR32 10K 0402 C BOOT UGATE PHASE GND C VCC MC39 4.7UF 16V Y5V 0805 +5V_DUAL +5V_STBY A VCC12 1K 1% 0402 A ◇ MR31 V_SM A V_SM_VTT BIOSTAR'S PROPRIETARY INFORMATION MCT2 100UF-S 16V 6.3X9 5x11 ◇ MC49 1UF 10V Y5V 0402 MR30 1K 1% 0402 ◆ + MC41 10UF 10V 0805 Y5V Title VSM DC-DC Conver ◆ Any unauthoriz ed use, reproduction, duplication, or disclosure of this document w ill be subject to the applicable civ il and/orcriminal penalties Size B Document Number Date: Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet 39 of 48 VCC12 D MTP80 D 1UF 16V Y5V 0805 -> 4.7UF 16V Y5V 0805 -20120510 by 量 測 12V VIN VCCIO_EN TC1 1UF 16V 0805 Y5V /NI TR1 10 0805 VIN NEAR CONTROLLER 4.7UF 16V 0805 Y5V TR2 TC2 TC4 0805 0.1UF 16V X7R 0402 A K + TQ4 2N3904 SOT23 270UF-S 16V 8X11.5 FB BOOT UGATE PHASE LGATE C TR3 TR4 0805 100K 0402 S TU1 uP1514 SOP8 TR5 TC6 1UF 10V Y5V 0402 V_CPU_VCCIO TL1 INDUCTOR 1.2UH 22A 11X10.5 1.054V R4 C TR6 2.7 0805 G TR7 42.2K 1% 0402 /NI S TC5 1000P 50V X7R 0402 TQ2 P0603BDL TO252 E B TR16 4.7K 0402 TQ1 P0903BDL TO252 0805 TQ5 2N3904 SOT23 V_1P05_PCH G D E TR14 10K 0402 B C VCC COMP C GND VCCIO_EN +5V_DUAL TCT1 270UF-S 16V 8X12 APAQ D TD1 SS12/5817 SMA TC3 1UF 16V 0805 Y5V TR8 30K 1% 0402 R1 OV_VCCIO OV_VCCIO TR9 R2 TR10 3.74K 1% 0402 B 1.24K 1% 0402 Vout=0.8V X(1+R1/R2)=1.053V + + TCT3 820UF-S 2.5V 6.3X8 ELITE R4 Only For UP6109 TCT2 820UF-S 2.5V 6.3X8 ELITE B OCP Set : 50A 820UF-S 2.5V 6.3X8 820UF-S 2.5V 6.3X8 FOR TWO LS MOSFET,P0903BDG : R4=26.1K 1% ◇ IZ75B-AHT ◇ ◆ BIOSTAR'S PROPRIETARY INFORMATION Any unauthorized use, reproduction, duplication, or disclosure of this document will be subject to the applicable civ il and/orcriminal penalties A ◆ A Title VCCIO DC-DC Conver Size Document Number Custom Date: Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet 40 of 48 VCC5 H_VIDSCK D MTP81 VCORE_EN MTP83 IMON_VAXG PR1 2.7 0805 V6363 PR102 169 1% 0402 /NI V_CPU_VCCIO +12V_AUX PC1 10UF 10V 0805 Y5V +12V_AUX PR2 2.7 0805 PR3 2.7 0805 PC3 4.7UF 16V Y5V 0805 PC4 4.7UF 16V Y5V 0805 D PU1 MTP84 VCC_SENSE MTP85 VSS_SENSE PR4 110 1% 0402 PR9 56 0402 VCORE_EN MTP86 VCCAXG_SENSE MTP87 VSSAXG_SENSE 19 20 21 H_VIDSOUT H_VIDALERT_N H_VIDSCK 31 H_PROCHOT_N Freq=200KHZ VBOOT_SET PR5 PR6 3.74K 1% 0402 42.2K 1% 0402 PR7 499K 1% 0402 PR13 PC10 C OV_CPU PC6 220P 50V X7R 0402 V_CPU_CORE PR22 VCC_SENSE PR20 PVCCG PVCCG 42 15 ISUMN PR10 0402 VR_HOT# BOOT1 VW UGATE1 PHASE1 COMP 14 FB 13 PR15 499 1% 0402 COMP LGATE1 UGATE2 PR21 750 1% 0402 PSICOMP 11 PHASE2 PSICOMP LGATE2 10 VSS_SENSE BOOT1 UG_1 47 PH_1 44 LG_1 41 BOOT2 40 UG_2 39 PH_2 42 LG_2 42 PR8 0805 UG_1 42 PH1 42 LG_1 42 VSEN RTN UGATEG PHASEG PR24 100 0402 LGATEG 34 BOOTG 35 V_UG 36 V_PH 33 V_LG 28 VSUMG+ 29 ISUMGN VSUM+ ISUMN PR11 2K 1% 0402 * PRT2 10K 1% 0402 PC11 1UF 10V X5R 0402 PC5 1UF 10V X5R 0402 PR12 715 1% 0402 OCP=180A T PRT1 10K 1% 0603 SMD /NI VSUM- VSUM- PC9 0.1UF 16V X7R 0402 42 VSUMG+ VSUMG+ ISUMGN PR16 0805 UG_2 42 PH2 42 LG_2 42 PC19 0.1UF 16V X7R 0402 BOOTG 12 45 46 PC13 0.1UF 16V X7R 0402 FB BOOT2 4.99K 1% 0402 VSUM+ VSUM+ PRT3 PLACE CLOSE TO PHASE1 CHOKE PC18 100P 50V NPO 0402 /NI PVCC SDA ALERT# SCLK LL=1.7mV/A 61.9 1% 0402 43 32 13.7K 1% 0402 PC17 330P 50V NPO 0402 PR19 100 0402 PVCC PGOOD PGOODG PC7 1000P 50V X7R 0402 100P 50V NPO 0402 PC14 680P 50V X7R 0402 VR_ON PC8 0.1UF 16V X7R 0402 VW PC12 2700P 50V X7R 0402 18 22 15,36 PCH_SYSPWROK VCC PC2 1UF 10V Y5V 0402 NEAR CONTROLLER PR17 5.76K 1% 0402 0805 V_UG 42 VPH 42 V_LG 42 PC16 0.22UF 10V X5R 0402 PRT4 PLACE CLOSE TO V_AXG CHOKE 42 PR23 PC15 0.1UF 16V X7R 0402 C PR18 475 1% 0402 OCP=55A VSUMG- VSUMG- PC20 0.1UF 16V X7R 0402 +12V_AUX Freq=200KHZ 13.7K 1% 0402 ISUMPG VWG PC24 24 VWG ISUMNG PC23 1000P 50V X7R 0402 56P 50V NPO 0402 COMPG V_AXG 25 COMPG ISUMP PR36 PC26 680P 50V X7R 0402 FBG 26 FBG 3.48K 1% 0402 LL=4.1mV/A 27 RTNG PWM3 VSSAXG_SENSE PWM4 38 PWM3 PWM3 42 37 PWM4 PWM4 42 ISEN1 ISEN1 42 ISEN2 ISEN2 42 V_CPU_VCCIO PR37 10K 0402 48 ISEN1 PR39 42.2K 1% 0402 ADDR_TMAX VBOOT_SET ISEN2 PWM_TMG 30 36K 1% 0402 PWM_TM 16 PR44 10K 0402 /NI PWM_SCOMP ADDR_DES_FDVID_TMAX IMON_CPUCORE 17 IMON_VAXG 23 PR45 0402 PC29 22NF 16V X7R 0402 PR46 16K 1% 0402 CPU IMON 111A PC30 22NF 16V X7R 0402 PR47 18.7K 1% 0402 VAXG IMON 35A ISEN3 ISEN3 ISEN3 42 ISEN4 ISEN4 42 NTCG NTC ISEN4 PR42 8,15,36 H_SKTOCC_N 10K 0402 SCOMP IZ75B-AHT IMONG B IO S TAR ' S P R O P R IETAR Y IN FO R M ATIO N ISL6363 TQFN48 Any unautho rized use, repro ductio n, duplicatio n, o r disclo sure o f this cument will be subject to the applicable civ il and/o rcriminal penalties BOTTOM PAD CONNECT TO GND Through VIAs Title ISL6363 PWM controller Size Document Number Custom Date: A IMON ◇ 36K 1% 0402 PR41 W/O CPU: H Level Vboot=1.1V W/I CPU: L Level Vboot=0V ◇ PR43 10K 0402 /NI PR40 GND VR_HOT DISABLED 49 V6363 D ADDR_DES_FDVID_TMAX PQ2 2N7002 SOT23 B PC28 1UF 10V Y5V 0402 PR38 100 0402 Set ADDR 4.7K 0402 PC25 0.1UF 16V Y5V 0402 PQ18 2N3904 SOT23 CONTROL PWM PC27 100P 50V NPO 0402 /NI A PR33 PR31 1K 0402 S 61.9 1% 0402 200 1% 0402 PR30 4.7K 0402 G PR35 VCCAXG_SENSE PR34 VCORE_EN PQ1 2N3904 SOT23 C ISUMN PR32 100 0402 PR29 10K 0402 +5V_DUAL C PC22 680P 50V X7R 0402 ◆ OV_AXG B PR28 100K 1% 0402 E PR27 4.32K 1% 0402 /NI ◆ PC21 2200P 50V X7R 0402 /NI E PR26 B 300K 0402 B PR25 Rev 5.0 BIB75-MHA Friday, July 20, 2012 Sheet 41 of 48 VIN +12V_AUX D PL2 VIN INDUCTOR 1.2UH 22A 11X10.5 PC35 0.1UF 16V Y5V 0402 41 UG_1 41 PH1 41 LG_1 UG_1 PR48 PR49 0805 10K 0402 UG1 PC31 4.7UF 16V Y5V 0805 D 4 2 LG_1 PR53 220P 50V X7R 0402 /NI 0805 V_CPU_CORE PL1 INDUCTOR 0.6UH 40A 13X10 PQ4 P0603BDL TO252 D PQ5 P0603BDL TO252 D ATXPWR2 + PCT1 270UF-S 16V 8X12 APAQ S PH1 PC32 PQ3 P0903BDL TO252 G LG1 G PR50 2.7 0805 PR51 ISEN_SHORT /NI PR52 ISEN_SHORT /NI + S S PC33 1000P 50V X7R 0402 VIN-2 PL7 INDUCTOR 1.2UH 22A 11X10.5 PR54 10 0402 + PCT2 820UF-S 2.5V 6.3X8 ELITE G 820UF-S 2.5V 6.3X8 VSUM- POWER CONN ATX12V 2X2 PC57 0.1UF 16V Y5V 0402 PR55 3.74K 1% 0402 VIN PR56 30K 1% 0402 20120323 PR57 30K 1% 0402 ISEN1 41 UG_2 41 PH2 41 LG_2 UG_2 PR58 PR59 0805 10K 0402 UG2 PC36 4.7UF 16V Y5V 0805 G D PC37 PR63 220P 50V X7R 0402 /NI LG2 0805 PQ7 P0603BDL TO252 D PQ8 P0603BDL TO252 PR60 2.7 0805 PR61 ISEN_SHORT /NI PR62 ISEN_SHORT /NI + S 41 41 PC38 1000P 50V X7R 0402 + PCT5 820UF-S 2.5V 6.3X8 ELITE G S ISEN1 VSUM+ V_CPU_CORE PL3 INDUCTOR 0.6UH 40A 13X10 G 41 + PCT4 270UF-S 16V 8X12 APAQ S PH2 LG_2 PQ6 P0903BDL TO252 VSUM- PC34 0.47UF 6.3V X5R 0402 VSUM+ D D PCT3 820UF-S 2.5V 6.3X8 ELITE 820UF-S 2.5V 6.3X8 PCT6 820UF-S 2.5V 6.3X8 ELITE PR64 10 0402 C C VSUMPR65 3.74K 1% 0402 VIN-2 PR66 30K 1% 0402 20120323 PR67 30K 1% 0402 20120323 ISEN2 VSUM+ +12V_AUX 41 PC40 PWM3 D 0.1UF 16V X7R 0402 0805 RLV1 PC43 1UF 16V 0805 Y5V BOOT PWM VCC LVCC GND PC44 1UF 16V 0805 Y5V UGATE PHASE LGATE UG_3 PR71 PR69 PR70 UG3 0805 10K 0402 0805 PR76 220P 50V X7R 0402 /NI 0805 LG3 PQ10 P0603BDL TO252 D PQ11 P0603BDL TO252 PR73 2.7 0805 PR74 ISEN_SHORT /NI PR75 ISEN_SHORT /NI + S PC45 1000P 50V X7R 0402 RLV1 : 805 For ISL6612 PCT9 820UF-S 2.5V 6.3X8 ELITE PR77 10 0402 VSUM- RLV1 : NI For ISL6622 PR78 3.74K 1% 0402 B 41 41 + PCT8 820UF-S 2.5V 6.3X8 ELITE G S ISEN2 VSUM+ V_CPU_CORE PL4 INDUCTOR 0.6UH 40A 13X10 G 41 + PCT7 270UF-S 16V 8X12 APAQ S D PC42 LG_3 PC41 4.7UF 16V Y5V 0805 G PH3 PR72 PU2_VCC PU2_LVCC GND_PAD PU2 ISL6612ACB-SO8 PR68 2.7 0805 PQ9 P0903BDL TO252 VSUM- PC39 0.47UF 6.3V X5R 0402 PR79 10K 1% 0402 PR80 1K 1% 0402 20120323 VSUM- 41 ISEN3 VSUM+ 41 41 PC46 0.47UF 6.3V X5R 0402 B ISEN3 VIN-2 VSUM+ +12V_AUX D 0.1UF 16V X7R 0402 PC49 1UF 16V 0805 Y5V PC50 1UF 16V 0805 Y5V UGATE PHASE LGATE UG_4 PR84 PR82 PR83 UG4 0805 10K 0402 D PC51 LG_4 PR89 220P 50V X7R 0402 /NI LG4 0805 PC48 4.7UF 16V Y5V 0805 + PCT10 270UF-S 16V 8X12 APAQ V_CPU_CORE PL5 INDUCTOR 0.6UH 40A 13X10 S PH4 0805 PQ12 P0903BDL TO252 G PQ13 P0603BDL TO252 G D PQ14 P0603BDL TO252 PR86 2.7 0805 PR87 ISEN_SHORT /NI PR88 ISEN_SHORT /NI G S S + + PCT11 820UF-S 2.5V 6.3X8 ELITE PC52 1000P 50V X7R 0402 B IO S TAR ' S P R O P R IETAR Y IN FO R M ATIO N VSUM- 41 V_UG 41 VPH V_UG PR94 PR95 0805 10K 0402 VUG PC54 4.7UF 16V Y5V 0805 PC55 V_LG V_LG PR99 220P 50V X7R 0402 /NI 0805 VLG G D PQ17 P0603BDL TO252 S PR96 2.7 0805 PR97 ISEN_SHORT /NI PR98 ISEN_SHORT /NI PC56 1000P 50V X7R 0402 PR100 10K 1% 0402 PR101 10 0402 VSUMG+ IZ75B-AHT + + PCT14 820UF-S 2.5V 6.3X8 ELITE + PCT15 820UF-S 2.5V 6.3X8 ELITE PCT16 820UF-S 2.5V 6.3X8 ELITE Title VSUMG- 41 41 A G S ISEN4 VSUM+ Any unautho rized use, repro ductio n, duplicatio n, o r disclo sure o f this cument will be subject to the applicable civ il and/o rcriminal penalties V_AXG PL6 INDUCTOR 0.6UH 40A 13X10 PQ16 P0603BDL TO252 41 PC53 0.47UF 6.3V X5R 0402 + PCT13 270UF-S 16V 8X12 APAQ S D 41 PR93 1K 1% 0402 20120323 VSUM+ PQ15 P0903BDL TO252 G VPH PR92 10K 1% 0402 ISEN4 D A PR91 3.74K 1% 0402 VSUM- ◆ VIN-2 PCT12 820UF-S 2.5V 6.3X8 ELITE PR90 10 0402 ◆ 0805 RLV1 BOOT PWM VCC LVCC GND PR85 PU3_VCC PU3_LVCC GND_PAD PU3 ISL6612ACB-SO8 ◇ PC47 PWM4 ◇ 41 PR81 2.7 0805 VSUMGVSUMG+ VCORE & VAXG Size Document Number Custom 41 41 Date: Rev 5.0 BIB75-MHA Friday, July 20, 2012 Sheet 42 of 48 MH3 PAD200-8 /NI MH8 PAD200-8 /NI D MH6 PAD200-8 /NI MH7 PAD200-8 /NI GND_AUD MH9 PAD200-8 /NI MH5 PAD200-8 /NI GND_AUD MH4 PAD200-8 /NI 9 D MH2 PAD200-8 /NI MH1 PAD200-8 /NI 9 C C (CPU1) (PCH1) PCB Impedance Testing Coupon PCB TUNE1 NC1 CP1 CP2 NBHS-IH55A-MHS BIB75-MHA V1.0 HEADER 1X2 D 150 /NI LGA 1156 FRAME_FOX +5V_DUAL B B TUNE2 NC2 CP1 CP2 Cancel Power-MoFET heatsinK ◇ HEADER 1X2 D 150 /NI ◆ BIOSTAR'S PROPRIETARY INFORMATION A ◇ A Title BOM ◆ Any unauthorized use, reproduction, duplication, or disclosure of this document will be subject to the applicable civil and/orcriminal penalties Size Document Number Custom Date: Friday, July 20, 2012 Rev 5.0 BIB75-MHA Sheet of 43 48 PCI1 IDSEL AD17 GNT_REQ0 CLK1 PIRQJF PIRQJH PCLK_1 12 REQ_N0 AD31 AD29 C AD27 AD25 12 C_BE_N3 AD23 AD21 AD19 AD17 12 C_BE_N2 12 IRDY_N 12 DEVSEL_N 12 12 PLOCK_N PERR_N 12 SERR_N 12 C_BE_N1 AD14 AD12 AD10 AD8 AD7 AD5 AD3 AD1 PU1_A64J H1 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 -12V TCK GND1 TDO +5V1 +5V2 INTBINTDPRSNT1RSV1 PRSNT2GND2 GND3 RSV2 GND4 CLK GND5 REQ+5V3 AD(31) AD(29) GND6 AD(27) AD(25) +3.3V1 C/BE-(3) AD(23) GND7 AD(21) AD(19) +3.3V2 AD(17) C/BE-(2) GND8 IRDY+3.3V3 DEVSELGND9 LOCKPERR+3.3V4 SERR+3.3V5 C/BE-(1) AD(14) GND10 AD(12) AD(10) GND11 TRST+12V TMS TDI +5V7 INTAINTC+5V8 RSV3 +5V9 RSV4 GND13 GND14 RSV5 RESET+5V10 GNTGND15 RSV6 AD(30) +3.3V7 AD(28) AD(26) GND16 AD(24) IDSEL +3.3V8 AD(22) AD(20) GND17 AD(18) AD(16) +3.3V9 FRAMEGND18 TRDYGND19 STOP+3.3V10 SDONE SBOGND20 PAR AD(15) +3.3V11 AD(13) AD(11) GND21 AD(09) H1 AD(8) AD(7) +3.3V6 AD(5) AD(3) GND12 AD(1) +5V4 ACK64+5V5 +5V6 H2 C/BE-(0) +3.3V12 AD(06) AD(04) GND22 AD(02) AD(00) +5V11 REQ64+5V12 +5V13 PCI2 12 12 12 12 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 PIRQJG PIRQJE +3V3_AUX PCI_RST1# 29 GNT_N0 12 PME_N 12 19 PCLK_2 12 AD30 REQ_N1 AD31 AD29 AD28 AD26 AD27 AD25 AD24 AD17 12 C_BE_N3 AD22 AD20 AD18 AD16 AD17 12 TRDY_N 12 STOP_N 12 12 C_BE_N2 12 IRDY_N 12 SMB_CLK_RESUME 15,24,25,32,36 SMB_DATA_RESUME 15,24,25,32,36 AD15 AD23 AD21 AD19 FRAME_N PAR DEVSEL_N 12 12 PLOCK_N PERR_N 12 SERR_N 12 C_BE_N1 12 AD13 AD11 AD14 AD12 AD10 AD9 H2 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 C_BE_N0 D VCC3_3 AD[31:0] PIRQJE PIRQJG H1 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 AD8 AD7 12 AD6 AD4 AD5 AD3 AD2 AD0 AD1 PU1_R64J PU2_A64J -12V TCK GND1 TDO +5V1 +5V2 INTBINTDPRSNT1RSV1 PRSNT2GND2 GND3 RSV2 GND4 CLK GND5 REQ+5V3 AD(31) AD(29) GND6 AD(27) AD(25) +3.3V1 C/BE-(3) AD(23) GND7 AD(21) AD(19) +3.3V2 AD(17) C/BE-(2) GND8 IRDY+3.3V3 DEVSELGND9 LOCKPERR+3.3V4 SERR+3.3V5 C/BE-(1) AD(14) GND10 AD(12) AD(10) GND11 TRST+12V TMS TDI +5V7 INTAINTC+5V8 RSV3 +5V9 RSV4 GND13 GND14 RSV5 RESET+5V10 GNTGND15 RSV6 AD(30) +3.3V7 AD(28) AD(26) GND16 AD(24) IDSEL +3.3V8 AD(22) AD(20) GND17 AD(18) AD(16) +3.3V9 FRAMEGND18 TRDYGND19 STOP+3.3V10 SDONE SBOGND20 PAR AD(15) +3.3V11 AD(13) AD(11) GND21 AD(09) H1 AD(8) AD(7) +3.3V6 AD(5) AD(3) GND12 AD(1) +5V4 ACK64+5V5 +5V6 H2 C/BE-(0) +3.3V12 AD(06) AD(04) GND22 AD(02) AD(00) +5V11 REQ64+5V12 +5V13 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 PIRQJF PIRQJH 12 12 +3V3_AUX PCI_RST1# AD30 GNT_N1 12 PME_N 12 29 AD28 AD26 C AD24 AD18 AD22 AD20 AD18 AD16 FRAME_N 12 TRDY_N 12 STOP_N 12 SMB_CLK_RESUME 15,24,25,32,36 SMB_DATA_RESUME 15,24,25,32,36 PAR AD15 12 AD13 AD11 B AD9 H2 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 C_BE_N0 12 AD6 AD4 AD2 AD0 PU2_R64J PCI SLOT 120PIN U CT18 560UF-S 6.3V 6.3X9 8X12 2.7K 0402 2.7K 0402 2.7K 0402 2.7K 0402 PU2_R64J PU2_A64J PU1_R64J PU1_A64J BIOSTAR'S PROPRIETARY INFORMATION Any unauthoriz ed use, reproduction, duplication, or disclosure of this document w ill be subject to the applicable civ il and/orcriminal penalties Title PCI & ◆ 560UF-S 6.3V 6.3X8 ELITE 560UF-S 6.3V 6.3X9 8X12 A ◇ R48 R51 R1 R15 ◆ + VCC5 ◇ VCC3_3 VCC3_3 VCC5 VCC3_3 12 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 PCI SLOT 120PIN U A VCC12 VCC5 VCC3_3 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 INT PCI_SLOT VCC5 PCI1 19 B VCC12- VCC12 PCI_SLOT VCC3_3 12 12 PCI2 IDSEL AD18 BCDA GNT_REQ1 CLK2 INT ABCD VCC12VCC5 D 3 Size B Document Number Date: Friday, July 20, 2012 Rev 0.95 BIB75-MHA Sheet 44 of 48 RJ45USB2B MDI2- MDI3+ MDI3- 10 LAN_V_DAC YLEDN/C1 LR19 100 0402 13 LED-100-A- LR23 100 0402 14 YLED+ LED_Y+ N/C2 RXN/C3 N/C4 V_DAC GNDP G1 G2 G7 G8 GND1 GND2 GND3 GND4 LED-LINK-A VCC33SBY +3V3_AUX LED-100-A LR21 100 0402 /NI LR22 100 0402 LED1-TX-G_1 IO_GND VCC33SBY 3V3_PHY A1 + A2 MDI0+ B2 B1 CM1293 C LED1-TX-G_1 22 49 MDI0+ MDI0- MDI1+ MDI1- MDI1VCC33SBY MDI2+ MDI2- MDI0MDI3+ MDI3- 10 11 12 GND MDI3VCC33SBY MDI2- MDIP0 MDIN0 AVDD10 MDIP1 MDIN1 AVDD10(NC) MDIP2(NC) MDIN2(NC) AVDD10(NC) MDIP3(NC) MDIN3(NC) AVDD33(NC) 13 14 15 16 17 18 19 20 21 22 23 24 A1 MDI2+ + A2 B2 B1 CM1293 LQ6 CM1293 SOT23-6 MDI3+ XTAL2 13 13 LAN2_TXP LAN2_TXN 19 19 LAN2_CLK LAN2_CLK# 13 13 LAN2_RXP LAN2_RXN LC47 LC46 Internal EEPROM selected GBE_TXP GBE_TXN 0.1UF 16V X7R 0402 0.1UF 16V X7R 0402 LAN1_CLK LAN1_CLK# LC41 LC42 0.1UF 16V X7R 0402 0.1UF 16V X7R 0402 VCC33SBY LR15 10K 0402 LR16 10K 0402 GBE_RXPP GBE_RXNN 28,29 LAN_RST1# 15,24,25,29 WAKE_N CLKREQB GBE_TXP GBE_TXN LAN1_CLK LAN1_CLK# B EEDI LED-1000-A EECS LR27 10K 0402 LR12 10K 0402 LC31 22UF 6.3V X5R 0805 LR13 1K 1% 0402 LR14 14.7K 1% 0402 VDD10 C WAKE# ISOLATEB LAN_RST1# VDD10 LC33 0.1UF 16V Y5V 0402 VCC3_3 VDD10 VDD10 LC34 0.1UF 16V Y5V 0402 VDD10 RTL8111F-CG QFN48 LC36 0.1UF 16V Y5V 0402 LC37 0.1UF 16V Y5V 0402 LC38 0.1UF 16V Y5V 0402 RTL8111E-VL-CG QFN48 RTL8111F-CG QFN48 B VCC33SBY VCC33SBY VCC33SBY LC40 1UF 10V Y5V 0402 GBE_RXPP GBE_RXNN LC43 0.1UF 16V Y5V 0402 + LCT1 100UF-S 16V 6.3X9 APAQ NEAR PIN 21 VCC33SBY LC44 0.1UF 16V Y5V 0402 VCC33SBY LC45 0.1UF 16V Y5V 0402 VCC33SBY VCC33SBY 8111E change to RTL8111F-CG QFN48 LAN_RST1# 1.05V VDD10 VCC33SBY LC39 0.1UF 16V Y5V 0402 1.05V VDD10_2 x7 22UF 6.3V X5R 0805 10UF 10V 0805 Y5V /NI LC35 0.1UF 16V Y5V 0402 LAN_RST1# WAKE# EVDD10_2 x1 LC30 LC32 REGOUT 36 35 34 33 32 31 30 29 28 27 26 25 3.3V VDD33 LC28 33P 50V NPO 0402 VDD10 LL1 INDUCTOR 4.7UH 1.3A DIP REGOUT VDDREG VDDREG ENSWREG EEDI/SDA LED3/EEDO EECS/SCL DVDD10 LANWAKEB DVDD33 ISOLATEB PERSTB RTL8111E D LC27 33P 50V NPO 0402 Reference Gnd 0805 LQ5 CM1293 SOT23-6 LY2 25MHZ 20PF 30PPM VDD10 12 IO_GND MDI1+ LR26 1K 0402 LED-1000-A LU2 LC29 0.01UF 25V X7R 0402 Power domain chart XTAL1 LR25 2.49K 1% 0402 FLANLED HEADER 2X2 LANUSB_GBMA FB1 VCC33SBY VCC33SBY VDD10 MDI2+ D RX+ 100 0402 LED_G+ GPO LED-100-A LR18 12 LED-LINK-A MDI1- GLED+ LINK-A+ XTAL2 XTAL1 TX- 11 RSET MDI1+ GLED- 48 47 46 45 44 43 42 41 40 39 38 37 0.95 >1.0(swap) TX+ AVDD33 AVDD33 RSET AVDD10 CKXTAL2 CKXTAL1 AVDD33 DVDD10(NC) LED0 DVDD3 GPO/SMBALERT LED1/EESK MDI0- DVDD10 SMBCLK(NC) SMBDATA(NC) CLKREQB HSIP HSIN REFCLK_P REFCLK_N EVDD10 HSOP HSON GND MDI0+ LC20 0.1UF 16V X7R 0402 /NI LC21 0.1UF 16V Y5V 0402 LC22 0.1UF 16V Y5V 0402 LC23 0.1UF 16V Y5V 0402 LC24 0.1UF 16V Y5V 0402 VCC33SBY A A Del MTP35 & MTP36 CLK_LAN1_PEX_DP CLK_LAN1_PEX_DN LC25 10UF 10V 0805 Y5V LC26 0.1UF 16V Y5V 0402 Title NEAR PIN 33,34,35 Lan1 Realtek 8111E Size B Document Number Date: Friday, July 20, 2012 Rev 0.9 BIB75-MHA Sheet 45 of 48 +5V_DUAL D +3V3_DUAL R10 1K 0402 U7 UP0105 PSOP8 ME_EN D +5V_STBY C C37 10UF 10V 0805 Y5V POK PCH_MEPWROK 14 V_1P05_PCH EN V_1P05_ME VOUT VIN R2 FB R18 1.2K 1% 0402 R1 R26 0805 /NI + C40 0.1UF 16V Y5V 0402 ME_FB NC 22NF 16V X7R 0402 C38 R20 3.6K 0402 E B Q53 2N3904 SOT23 15 CNTL GND_PAD GND S Q51 2N7002 SOT23 G C47 0.1UF 16V Y5V 0402 +3V3_DUAL R11 10K 0402 C V_1P05_ME D C36 0.1UF 16V Y5V 0402 ME_EN C CT17 100UF-S 16V 6.3X9 APAQ 100UF-S 16V 6.3X8 ELITE Vout=Vref (0.8V) X ( R2/R1+1 ) =1.067V SLP_M_N R23 10K 0402 +3V3_DUAL +3V3_DUAL S V_3P3_EPW R28 10K 0402 B VCC3_3 B EPW_CTL_N 15 EPW_CTL SLP_M_N E R30 B Q54 2N3904 SOT23 D C G R29 0805 /NI Q52 SI2301BDS SOT23 C46 0.1UF 16V Y5V 0402 10K 0402 C45 1UF 10V Y5V 0402 A Title A RESERVED FOR AMT POWER Size Document Number Custom Date: Friday, July 20, 2012 Rev 0.95 BIB75-MHA Sheet 46 of 48 VCC3_3 VCC3_3 GR96 100K 0402 /NI 18 18 GR95 1M 0402 /NI 0.1UF 16V X7R 0402 /NI GC70 DDSPB_AUXP DDSPB_AUXN GC55 GC54 0.1UF 16V X7R 0402 /NI 0.1UF 16V X7R 0402 /NI GR94 GR93 HPDET_DVI 10K 0402 /NI 10K 0402 /NI GC71 0.1UF 16V X7R 0402 /NI GR98 1M 0402 /NI VCC3_3 Fm DVI-D -HotPlug IN DAUXDCP_R DAUXDCN_R DAUXP DAUXN VDD12_PS D DP_HPD_PS DP_HPD_PS 1K 0402 /NI IROMD IROMC IROMS IROMQ IROMW HPDET_DVI VDD33_PS GR99 18,22 DDSP_B_HPD GR97 100K 0402 /NI HPDET_DVI_IN INDUCTOR 10NH 0603 /NI GL1 22 VDD33_PS 0.1UF 16V Y5V 0402 /NI GC67 GC66 10UF 10V 0805 Y5V /NI 22 INDUCTOR 10NH 0603 /NI VDDA33_PS 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 DDSP_B_TX_0-DP DDSP_B_TX_0-DN 22 22 DDSP_B_TX_1-DP DDSP_B_TX_1-DN VDDRX VDD33_PS RST_161# RST_161# 1UF 10V Y5V 0402 /NI GC56 22 22 C DDSP_B_TX_2-DP DDSP_B_TX_2-DN DDSP_B_TX_3-DP DDSP_B_TX_3-DN VDD12_PS GC72 10UF 10V 0805 Y5V /NI GND GPIO6 GPIO5 GPIO4 TESTMODE HDMI_D2p HDMI_D2n VDD12 HDMI_D1p HDMI_D1n VDD33 HDMI_D0p HDMI_D0n GND HDMI_CLKp HDMI_CLKn 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 GPIO6 GPIO5 GPIO4 DVI_TDC2+ DVI_TDC2VDD12_PS DVI_TDC1+ DVI_TDC1VDD33_PS DVI_TDC0+ DVI_TDC0DVI_TLC+ DVI_TLC- XTAL2_PS CSDA CSCL GPIO3 DVI_SCL DVI_SDA XTAL1_PS SMD 27MHZ 12PF 3.2x2.5MM /NI GY1 VDDA12_PS VDD33_PS GPIO0 VDD12_PS VDDA33_PS XTAL-3.2_2.5 DVI_TDC2+ DVI_TDC2- 22 22 DVI_TDC1+ DVI_TDC1- 22 22 DVI_TDC0+ DVI_TDC0- 22 22 DVI_TLC+ DVI_TLC- 22 22 GC81 15P 50V NPO 0402 /NI GR92 4.7K 0402 /NI VDD12_PS 0.1UF 16V Y5V 0402 /NI 0.1UF 16V Y5V 0402 /NI GC76 GC77 GC78 GC79 10UF 10V 0805 Y5V /NI 0.1UF 16V Y5V 0402 /NI INDUCTOR 10NH 0603 /NI VDDA12_PS in 100 mil GC82 10UF 10V 0805 Y5V /NI GC83 0.1UF 16V Y5V 0402 /NI INDUCTOR 10NH 0603 /NI in 100 mil VDDRX 1UF 10V Y5V 0402 /NI GC84 DVI_SDA DVI_SCL JP3: 1-2: HDMI mode (default) 2-3: DVI Mode GC106 0.1UF 16V Y5V 0402 /NI GC86 0.1UF 16V Y5V 0402 /NI 22 22 GC85 10UF 10V 0805 Y5V /NI JP3(2_3) JUMPER 2P B 2mm /NI VCC3_3 GR100 HEADER 1X3 2mm /NI 4.7K 0402 /NI CS# DO WP# VSS PCT25VF020B SO8 /NI GR86 4.7K 0402 /NI GPIO4 GR104 4.7K 0402 /NI VCC3_3 GPIO4: MCP / I2C Select, internal pull-down ~80K 0: Use MCP to control PS161 (default) 1: Use control I2C to control PS161 GR87 4.7K 0402 /NI GC100 0.1UF 16V Y5V 0402 /NI GPIO5 GR84 4.7K 0402 /NI VCC3_3 NC1 HEADER 1X3 2mm /NI GU2 uP0109 PSOP8 /NI UPI0109-2A output current UP0109 取 代 > FP6137E VCC_1P2 VCC3_3 GPIO5: MPU clock speed select, internal pull-down ~80K 0: MPU run at 54MHz (default) 1: MPU run at 108MHz A NC2 GND2 VOUT VCC HOLD CLK DI IROMS IROMQ IROMW IROMD GR85 4.7K 0402 /NI VCC3_3 GPIO6 GR88 4.7K 0402 /NI VCC3_3 GC75 10UF 10V 0805 Y5V /NI GR101 2K 1% 0402 /NI GR102 1.2K 1% 0402 /NI GC98 22UF 6.3V X5R 0805 /NI GC99 1UF 10V Y5V 0402 /NI {IROMD, GPIO6}: Firmware Initial Address, internal pull-down ~80K '00': Start from Bank '01': Start from Bank '10': Start from Bank '11': Start from Bank A Title PS161HDM ( DP > DVI-D ) Size Document Number Custom Date: IROMC IROMD VCC3_3 REFEN 4.7K 0402 /NI VIN GU3 GR103 GPIO0: Control I2C address selection, internal pull-down ~80K 0: 0x10h - 0x2Fh (default) 1: 0xB0h - 0xCFh GR106 4.7K 0402 /NI GPIO0 GR105 4.7K 0402 /NI NC Power On Configuration GC65 0.1UF 16V Y5V 0402 /NI VCTNL VCC3_3 B JP1 CSDA CSCL GND1 GR91 4.7K 0402 /NI VCC3_3 VCC3_3 GPIO3: 0: HDMI(default) 1: DVI B C GC101 0.1UF 16V Y5V 0402 /NI GL4 GL5 JP3 GC80 15P 50V NPO 0402 /NI in 100 mil INDUCTOR 10NH 0603 /NI GL3 CSDA,CSCL FOR DEBUG and write ROM GR71 4.99K 1% 0402 /NI GC73 10UF 10V 0805 Y5V /NI VCC_1P2 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 22 22 VDDRX GND DRX0p DRX0n VDDRX DRX1p DRX1n VDD33 RST# PD# GND DRX2p DRX2n VDDRX DRX3p DRX3n VDD12 NC NC DAUXDCP DAUXDCN DAUXP DAUXN VDD12 DP_HPD GND IROMD IROMC IROMS IROMQ IROMW / GPIO7 HDMI_HPD VDD33 22 22 10 11 12 13 14 15 16 GC74 0.1UF 16V Y5V 0402 /NI PS161HDM LQFP64 /NI XTLI XTLO VDD33 GPIO0 / TS_CKO VDD12 VDDA33 REXT GND VDDA12 GPIO1 / MSDA GPIO2 / MSCL CSDA CSCL INTRQ / GPIO3 HDMI_SCL HDMI_SDA DP Port-B GR89 10K 0402 /NI D GC105 0.1UF 16V Y5V 0402 /NI GL2 GU1 VCC3_3 0.1UF 16V Y5V 0402 /NI GC69 GC68 0.1UF 16V Y5V 0402 /NI Friday, July 20, 2012 Rev 0.6 BIB75-MHA Sheet 47 of 48 DP_HPD_PS-D DAUXDCN-D DAUXDCP-D VCC3_3 VCC3_3 GC1 GC2 GR1 GR2 GR8 100K 0402 /NI D HPDET_HDMI_IN 0.1UF 16V X7R 0402 /NI 0.1UF 16V X7R 0402 /NI 10K 0402 /NI 10K 0402 /NI GR9 1M 0402 /NI 0.1UF 16V X7R 0402 /NI GC23 DDSPD_AUXP DDSPD_AUXN GR11 100K 0402 /NI 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 GR10 1M 0402 /NI DP Port-D 23 DDSP_D_TX_0-DP 23 DDSP_D_TX_0-DN 10 11 12 13 14 15 16 VDDRX-D 23 DDSP_D_TX_1-DP 23 DDSP_D_TX_1-DN VDD33_PS-D RST_161#1-D 23 DDSP_D_TX_2-DP 23 DDSP_D_TX_2-DN C VDDRX-D 23 DDSP_D_TX_3-DP 23 DDSP_D_TX_3-DN VDD12_PS-D GND DRX0p DRX0n VDDRX DRX1p DRX1n VDD33 RST# PD# GND DRX2p DRX2n VDDRX DRX3p DRX3n VDD12 PS161HDM LQFP64 /NI 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 SMD 27MHZ 12PF 3.2x2.5MM /NI GY2 XTAL2_PS-D GC25 15P 50V NPO 0402 /NI B GC26 15P 50V NPO 0402 /NI GR13 4.99K 1% 0402 /NI CSDA-D CSCL-D GPIO3-D HDMI_SCL HDMI_SDA VDDA12_PS-D XTAL1_PS-D XTAL1_PS-D XTAL2_PS-D VDD33_PS-D GPIO0-D VDD12_PS-D VDDA33_PS-D XTAL-3.2_2.5 HDMI_TDC2+ HDMI_TDC2VDD12_PS-D HDMI_TDC1+ HDMI_TDC1VDD33_PS-D HDMI_TDC0+ HDMI_TDC0HDMI_TLC+ HDMI_TLC- HDMI_TDC2+ HDMI_TDC2- 23 23 GR18 4.7K 0402 /NI VCC3_3 GPIO4-D GR20 4.7K 0402 /NI HDMI_TDC1+ HDMI_TDC1- 23 23 HDMI_TDC0+ HDMI_TDC0- 23 23 HDMI_TLC+ HDMI_TLC- 23 23 GL6 INDUCTOR 10NH 0603 /NI GR21 4.7K 0402 /NI VDD33_PS-D 0.1UF 16V Y5V 0402 /NI 0.1UF 16V Y5V 0402 /NI GC29 GC33 GC35 GC52 10UF 10V 0805 Y5V /NI 0.1UF 16V Y5V 0402 /NI C GC102 0.1UF 16V Y5V 0402 /NI GL7 VDDA33_PS-D INDUCTOR 10NH 0603 /NI GC87 GC53 10UF 10V 0805 Y5V /NI 10UF 10V 0805 Y5V /NI GC88 0.1UF 16V Y5V 0402 /NI CSDA,CSCL FOR DEBUG and write ROM VCC_1P2 HDMI_SDA HDMI_SCL 23 23 GL8 GR16 4.7K 0402 /NI INDUCTOR 10NH 0603 /NI GC89 10UF 10V 0805 Y5V /NI GPIO3: 0: HDMI(default) 1: DVI VDD12_PS-D 0.1UF 16V Y5V 0402 /NI GC90 0.1UF 16V Y5V 0402 /NI GC91 GC92 0.1UF 16V Y5V 0402 /NI GC104 0.1UF 16V Y5V 0402 /NI GL9 INDUCTOR 10NH 0603 /NI GC93 10UF 10V 0805 Y5V /NI VCC3_3 B VDDA12_PS-D GC94 0.1UF 16V Y5V 0402 /NI JP2 CSDA-D CSCL-D VCC3_3 GL10 INDUCTOR 10NH 0603 /NI 10UF 10V 0805 Y5V /NI GC96 HEADER 1X3 2mm /NI GPIO4: MCP / I2C Select, internal pull-down ~80K 0: Use MCP to control PS161 (default) 1: Use control I2C to control PS161 GPIO5-D GC4 0.1UF 16V Y5V 0402 /NI VCC3_3 Power On Configuration GPIO0-D CS# DO WP# VSS D IROMS-1 IROMQ-1 IROMW-1 IROMW GPIO6-D GPIO5-D GPIO4-D VCC3_3 GR14 4.7K 0402 /NI GR15 4.7K 0402 /NI GPIO0: Control I2C address selection, internal pull-down ~80K 0: 0x10h - 0x2Fh (default) 1: 0xB0h - 0xCFh VCC HOLD CLK DI GR5 4.7K 0402 /NI GR7 4.7K 0402 /NI GR6 4.7K 0402 /NI GND GPIO6 GPIO5 GPIO4 TESTMODE HDMI_D2p HDMI_D2n VDD12 HDMI_D1p HDMI_D1n VDD33 HDMI_D0p HDMI_D0n GND HDMI_CLKp HDMI_CLKn GU5 PCT25VF020B SO8 /NI IROMC-1 IROMC IROMD-1 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 GC3 1UF 10V Y5V 0402 /NI GR4 4.7K 0402 /NI GU4 VCC3_3 GR3 10K 0402 /NI HPDET_HDMI_IN 23 DP Downgle > HDMI NC NC DAUXDCP DAUXDCN DAUXP DAUXN VDD12 DP_HPD GND IROMD IROMC IROMS IROMQ IROMW / GPIO7 HDMI_HPD VDD33 GC24 0.1UF 16V X7R 0402 /NI VCC3_3 XTLI XTLO VDD33 GPIO0 / TS_CKO VDD12 VDDA33 REXT GND VDDA12 GPIO1 / MSDA GPIO2 / MSCL CSDA CSCL INTRQ / GPIO3 HDMI_SCL HDMI_SDA 18 18 DAUXDCP-D DAUXDCN-D HPDET_HDMI_IN VDD33_PS-D 1K 0402 /NI IROMD-1 IROMC-1 IROMS-1 IROMQ-1 IROMW-1 GR12 DAUXDCP_R-D DAUXDCN_R-D DAUXP-D DAUXN-D VDD12_PS-D DP_HPD_PS-D 18,23 DDSP_D_HPD VDDRX-D GC97 0.1UF 16V Y5V 0402 /NI GC103 0.1UF 16V Y5V 0402 /NI GC95 1UF 10V Y5V 0402 /NI VCC3_3 GPIO5: MPU clock speed select, internal pull-down ~80K 0: MPU run at 54MHz (default) 1: MPU run at 108MHz A A IROMD-1 GR22 4.7K 0402 /NI VCC3_3 GPIO6-D GR23 4.7K 0402 /NI VCC3_3 {IROMD, GPIO6}: Firmware Initial Address, internal pull-down ~80K '00': Start from Bank '01': Start from Bank '10': Start from Bank '11': Start from Bank Title Date: PS161HDM ( DP > HDMI ) Size Document Number Custom Friday, July 20, 2012 Rev 0.6 BIB75-MHA Sheet 48 of 48 ... VSS_ 01 0 VSS _ 10 0 VSS_ 01 1 VSS _ 10 1 VSS_ 01 2 VSS _ 10 2 VSS_ 01 3 VSS _ 10 3 VSS_ 01 4 VSS _ 10 4 VSS_ 01 5 VSS _ 10 5 VSS_ 01 6 VSS _ 10 6 VSS_ 01 7 VSS _ 10 7 VSS_ 01 8 VSS _ 10 8 VSS_ 01 9 VSS _ 10 9 VSS _02 0 VSS _11 0 VSS _0 21 VSS _11 1 VSS _02 2... CC 60 10 UF 10 V 08 05 Y5V ◆ A VCC _0 01 VCC _00 2 VCC _00 3 VCC _00 4 VCC _00 5 VCC _00 6 VCC _00 7 VCC _00 8 VCC _00 9 VCC_ 01 0 VCC_ 01 1 VCC_ 01 2 VCC_ 01 3 VCC_ 01 4 VCC_ 01 5 VCC_ 01 6 VCC_ 01 7 VCC_ 01 8 VCC_ 01 9 VCC _02 0 VCC _0 21. .. M_DQS_B_DP7 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 92 95 98 10 1 10 4 10 7 11 0 11 3 11 6 11 9 12 1 12 4 12 7 13 0 13 3 13 6 13 9 14 2 14 5 14 8 15 1 15 4 15 7 16 0 16 3 16 6 19 9 202 205 208 211 214 217 2 20 223