schematic asus TERESA

5 TERESA Block Diagram FAN + SENSOR ADM1032ARMZ PAGE CLOCK GEN ICS954310 CPU D D T2060 4xx,5xx Series PAGE DISCHARGER CIRCUIT PAGE 2,3 PAGE 37 FSB 533MHz Power On Sequence PAGE 40 DC/BATT IN GMCH-M Calistoga 943GML B0:02G010009121 LVDS & INV PAGE 12 CRT PAGE 13 Dual Channel DDR2 DDR2-533MHz PAGE 41 SO-DIMM X CPU VCORE PAGE 50 PAGE 14,15,16 PAGE 6,7,8,9,10,11 C SYSTEM PWR DMI Interface C PAGE 51 T/P BAT & CHARGER PAGE 30 PCIE *1 KEYPAD MATRIX PAGE 29 INSTANT KEY ICH7-M Azalia PAGE 29,30 PCIE *1 PAGE 38 PCI 33MHz B0:02G010008811 LED Control B MINI CARD WLAN PAGE 26 LPC 33MHz EC IT8511E BTO NEW CARD PAGE 25 BTO B PAGE 17,18,19,20 PAGE 30,38 10/100 LAN RTL8100CL USB SATA ISA ROM PAGE 57 IDE PAGE 34,35 PCMCIA PAGE 24 CardBus R5C847 HDD (SATA) PAGE 43,44 MIC PHONE JACK PAGE 44 MEDIA CARD SLOT BTO PAGE 28 BTO PAGE 33 PAGE 23 HEADPHONE JACK Azalia Codec AD1986A BTO USB 2.0 CON X3 ODD PAGE 36 PAGE 22 PAGE 21,22,23 A SPEAKER PAGE 28 A AUDIO AMP PAGE 22 PAGE 22 MDC PAGE 35 PCMCIA Title : BLOCK DIAGRAM BTO ASUSALPHATeK COMPUTER INC Size Custom Horng Chou Project Name Rev TERESA Date: Tuesday, February 06, 2007 Engineer: 1.1 Sheet 1 of 57 H_A#[16 3] H_REQ#[4 0] H_A#[31 17] T202 H_D#[0 63] U201A AA1 AA4 AB2 AA3 M4 N5 T2 V3 B2 C3 B THERMTRIP# STPCLK# LINT0 LINT1 SMI# BCLK[0] BCLK[1] H_LOCK# B1 F3 F4 G3 G2 H_CPURST# H_RS#0 H_RS#1 H_RS#2 H_TRDY# G6 E4 H_HIT# H_HITM# B25 H_INIT# H_CPURST# H_RS#0 H_RS#1 H_RS#2 H_TRDY# H_HIT# H_HITM# AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20 PRDY# H_PREQ# H_TCK H_TDI H_TDO H_TMS H_TRST# CPU_DBR# D21 A24 A25 H_PROCHOT_S# CPU_THRM_DA CPU_THRM_DC C7 PM_THRMTRIP# A22 A21 CLK_CPU_BCLK CLK_CPU_BCLK# +VCCP_AGTL+ +VCCP_AGTL+ 17 H_LOCK# R202 Do Not Stuff @ T201 6 H_DSTBN#0 H_DSTBP#0 H_DINV#0 6 +VCCP_AGTL+ RSVD[1] RSVD[2] RSVD[3] RSVD[4] RSVD[5] RSVD[6] RSVD[7] RSVD[8] RSVD[9] RSVD[10] RSVD[11] RSVD[12] RSVD[A2] R203 R204 R205 R206 R207 R208 2 2 2 T203 Do Not @ Stuff 56Ohm 56Ohm Do Not @ Stuff 56Ohm 56Ohm GND +VCCP_AGTL+ T204 Do Not Stuff CPU_THRM_DA CPU_THRM_DC R209 1KOhm 1% PM_THRMTRIP# 4,17 CLK_CPU_BCLK CLK_CPU_BCLK# C201 Do Not Stuff @ RSVD[13] RSVD[14] RSVD[15] RSVD[16] RSVD[17] RSVD[18] RSVD[19] RSVD[20] R213 2KOhm 1% T22 A2 6 H_DSTBN#1 H_DSTBP#1 H_DINV#1 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1 N22 K25 P26 R23 L25 L22 L23 M23 P25 P22 P23 T24 R24 L26 T25 N24 M24 N25 M26 GTL_REF Bottom side Secondary side => Top side 1215 -PWR comp Place the cap on North CE301 Do Not Stuff of Secondary side 1 Do Not Stuff +VCORE +1.5VS +VCORE JP301 V6 G21 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21 +1.5VO +VCCA AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20 B VCC[1] VCC[68] VCC[2] VCC[69] VCC[3] VCC[70] VCC[4] VCC[71] VCC[5] VCC[72] VCC[6] VCC[73] VCC[7] VCC[74] VCC[8] VCC[75] VCC[9] VCC[76] VCC[10] VCC[77] VCC[11] VCC[78] VCC[12] VCC[79] VCC[13] VCC[80] VCC[14] VCC[81] VCC[15] VCC[82] VCC[16] VCC[83] VCC[17] VCC[84] VCC[18] VCC[85] VCC[19] VCC[86] VCC[20] VCC[87] VCC[21] VCC[88] VCC[22] VCC[89] VCC[23] VCC[90] VCC[24] VCC[91] VCC[25] VCC[92] VCC[26] VCC[93] VCC[27] VCC[94] VCC[28] VCC[95] VCC[29] VCC[96] VCC[30] VCC[97] VCC[31] VCC[98] VCC[32] VCC[99] VCC[33] VCC[100] VCC[34] VCC[35] VCCP[1] VCC[36] VCCP[2] VCC[37] VCCP[3] VCC[38] VCCP[4] VCC[39] VCCP[5] VCC[40] VCCP[6] VCC[41] VCCP[7] VCC[42] VCCP[8] VCC[43] VCCP[9] VCC[44] VCCP[10] VCC[45] VCCP[11] VCC[46] VCCP[12] VCC[47] VCCP[13] VCC[48] VCCP[14] VCC[49] VCCP[15] VCC[50] VCCP[16] VCC[51] VCC[52] VCCA VCC[53] VCC[54] VCC[55] VID[0] VCC[56] VID[1] VCC[57] VID[2] VCC[58] VID[3] VCC[59] VID[4] VCC[60] VID[5] VCC[61] VID[6] VCC[62] VCC[63] VCC[64] VCCSENSE VCC[65] VCC[66] VCC[67] VSSSENSE C A7 A9 A10 A12 A13 A15 A17 A18 A20 B7 B9 B10 B12 B14 B15 B17 B18 B20 C9 C10 C12 C13 C15 C17 C18 D9 D10 D12 D14 D15 D17 D18 E7 E9 E10 E12 E13 E15 E17 E18 E20 F7 F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20 AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18 +VCCP_AGTL+ +VCORE +1.5VS +VCORE U201C +VCCP_AGTL+ +VCORE P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 AF3 AF6 AF8 AF11 AF13 AF16 AF19 AF21 AF24 D VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98] VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] Modity Table for Celeron M VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] A4 A8 A11 A14 A16 A19 A23 A26 B6 B8 B11 B13 B16 B19 B21 B24 C5 C8 C11 C14 C16 C19 C2 C22 C25 D1 D4 D8 D11 D13 D16 D19 D23 D26 E3 E6 E8 E11 E14 E16 E19 E21 E24 F5 F8 F11 F13 F16 F19 F2 F22 F25 G4 G1 G23 G26 H3 H6 H21 H24 J2 J5 J22 J25 K1 K4 K23 K26 L3 L6 L21 L24 M2 M5 M22 M25 N1 N4 N23 N26 P3 MAX 1.102V MAX 2.5A Celeron M FSB:533MHz MIN TYP VCCP 0.997V 1.05V MIN TYP ICCP 2 Celeron M FSB:533MHz MIN TYP MAX VCC 1.0V 1.2V 1.3V C3 C2 C0 ICC 14.7A 16.5A 29Ah GND Layout Note: VCCSENSE/VSSSENSE lines between the CPU and the VR should have a trace width of 18 mils on mils spacing, with trace impedance of Zo=27.4 Ohm The VCCSENSE/VSSSENSE should be length matched to within 25 mils These resistors should be placed within inch of the CPU A A PCMCIA Title : Yonah CPU (2) ASUSALPHATeK COMPUTER INC Size Horng Chou Project Name Custom Date: Engineer: Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet of 57 Fan Speed Control +5VS +3VS +3VA +5VS +3VS +3VA 13,19,20,21,22,28,29,30,34,37,38,50,61 5,7,9,11,12,13,14,15,19,20,21,22,25,26,27,28,29,30,33,37,40,43,50,52,60,61 12,22,29,37,38,40,41,54,59,63 +5VS D D KBC will issue a analog ( a voltage level ) signal 1 C408 2 10UF/10V GND GND C402 0.1UF/10V R402 10KOhm GND GND Unmount: CE401 and D1 WtoB_CON_4P New addition R403 10KOhm C403 Do Not Stuff @ NC1 CON401 (070122)Change CON401 into PN:12G171000047 2 +3VS NC2 FAN_PWM FAN_PWM 29 + CE401 D1 Do Not Stuff Do Not Stuff @ @ SW: FAN_DA1 must be low during S3 +3VS GND GND GND 29 FAN0_TACH C C FAN0_TACH C401 2200PF/50V GND T403 Do Not Stuff THERMAL PROTECTION PLACE UNDER CPU +3VA R411 7.68KOhm (85 DEGREE C) 1 +3VA 105 -> 85, R411 need to be tuned (1204)maybe R411=14.7K Ohm(10G213147213010) 1 PM_THRMTRIP# FORCE_OFF# TRIP_R E R408 B 11 G C404 S 0.22UF/6.3V GND GND GND Standby Mode: 3uA(Max 10uA) Full Active: 0.5 mA(Max 1mA) +3VS_THM 2 C405 0.1UF/10V c0402 +3VS_THM +5VS CPU_THRM_DA CPU_THRM_DC G781P8F 06G023048021 4"-8" R418 10KOhm GND A CPU_THRM_DC PCMCIA Title : THER-SENSOR,FAN G D S (070110) Add second sorce: 06G023048021 CPU_THRM_DA C406 2200PF/50V R410 4.7KOhm 4"-8" SCLK VDD SDATA D+ ALERT# DGND THERM# +3VS Q403 2N7002 SMB1_CLK SMB1_DAT SMBALERT# SMB1_CLK SMB1_DAT G 29 29 S 2 3 D 29 THRM_CPU# U401 11 R409 10KOhm r0402 EC_RST_SW# 29,38,41,51,60 ASUSALPHATeK COMPUTER INC Avoid BPSB,Power Q404 2N7002 (070110)Add R418 and Q404 to avoid error action Size Engineer: Horng Chou Project Name Custom Date: 25,29,51 +3VS_THM +3VA_EC PMBS3904 (070130)Add 0ohm resister +3VS 0Ohm r0402 A 29,38,41,51,60 Do Not Stuff T401 GND R417 0Ohm GMCH_THRMTRIP# PST9013NR OTHER SIGNALS 12 mils ===============GND 10 mils =========H_THERMDA(10 mils) 10 mils =========H_THERMDC(10 mils) 10 mils =========GND 12 mils -OTHER SIGNALS 330Ohm GND VSUS_ON Q401 2N7002 2,17 U402 Route H_THERMDA and H_THERMDC on the same layer Q402 C B R407 0.01UF/50V NC VCC SUB GND VOUT D (061214)Add thermiters 1 3 VSUS_ON_G 2 2 Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff 100KOhm 2 R406 1MOhm @ @ @ R405 Do Not Stuff r0402 @ VSUS_ON R416 R415 1 R414 @ C407 R413 R412 T402 Do Not Stuff B 1 1 +3VS Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet of 57 +VCCP_AGTL+ Control net Request R501 Net name @ R502 Do Not Stuff PCIE_REQ1# PCIE0(#),PCIE6(#) R503 None CPU_BSEL0 0Ohm MCH_BSEL0 @ Do Not Stuff PCIE_REQ2# PCIE1(#),PCIE8(#) R504 None Bclk @ R505 CPU_BSEL1 Do Not Stuff PCIE_REQ3# R506 @ Do Not Stuff CLK_PCIE_MINICARD(#) PCIE2(#),PCIE4(#) R507 CPU_BSEL2 0Ohm PCIE3(#),PCIE5(#), PCIE7(#) MCH_BSEL2 +VCCP_AGTL+ FSLC FSLB FSLA BSEL2 BSEL1 BSEL0 133 533 166 667 0Ohm D PCIE_REQ4# MCH_BSEL1 FSB L L H L H H +VCCP_AGTL+ +3VS +3VS 2,3,6,9 4,7,9,11,12,13,14,15,19,20,21,22,25,26,27,28,29,30,33,37,40,43,50,52,60,61 D CLK_MCH_3GPLL(#) GND +3VS +3VS_CLK L501 C506 0.1UF/10V Layout Note: Place termination close to source IC C507 0.1UF/10V 0.1UF/10V 1 0.1UF/10V C505 2 10UF/10V L502 120Ohm/100Mhz C504 2 C503 1 CLK_MCH_BCLK R508 49.9Ohm CLK_MCH_BCLK# R509 49.9Ohm CLK_CPU_BCLK R510 49.9Ohm CLK_CPU_BCLK# R511 49.9Ohm CLK_PCIE_ICH R512 49.9Ohm CLK_PCIE_ICH# R515 49.9Ohm CLK_MCH_3GPLL R516 49.9Ohm CLK_MCH_3GPLL# R518 49.9Ohm CLK_LCD_SSCG R519 49.9Ohm CLK_LCD_SSCG# R521 49.9Ohm CLK_UMA_96M R522 49.9Ohm r0402_h16 +3VS_CLK 120Ohm/100Mhz C502 0.1UF/10V 1 C501 0.1UF/10V GND GND r0402_h16 r0402_h16 34 50 C517 33PF/50V +3VS_VDDA 45 GND 46 GND ICS_X1 58 ICS_X2 57 GND GND 43 CLK_CBPCI 26 CLK_FWHPCI Delete CLK_TPMPCI(connect to pin3) 17 R532 33Ohm LCD_SSCG# 18 FSA 33Ohm 2.2KOhm R539 R540 R541 PCICLK5 33Ohm 10KOhm PCICLK4 33Ohm R544 33Ohm +3VS_CLK +3VS_CLK R550 +3VS_CLK R552 R553 18 CLK_ICHPCI 14,15,19,25,26 LCD_SSCG R546 R548 29 CLK_ECPCI 14,15,19,25,26 33Ohm 12 16 34 CLK_LAN_PCI B R535 R536 19 CLK_USB48 CPU_BSEL0 CPU_BSEL1 PCICLK3 PCICLK2 33Ohm 10KOhm 64 10KOhm PCICLK_F0 33Ohm 10KOhm 54 SMB_CLK_S 55 SMB_DAT_S 47 VDD48 VDDREF VDD PCI/PCIEX_STOP# VDDCPU CPU_STOP# VDDA CPUCLKT1 CPUCLKC1 GNDA X1 CPUCLKT0 CPUCLKC0 X2 27FIX/LCD_SSCGT/PCIEX0T CPUCLKT2_ITP/PCIEXT8 CPUCLKC2_ITP/PCIEXC8 27SS/LCD_SSCGC/PCIEX0C PEREQ1#/PCIEXT7 PEREQ2#/PCIEXC7 FSLA/USB_48MHz PCIEXT6 PCIEXC6 FSLB/TEST_MODE PCIEXT5 PCIEXC5 SELPCIEX0_LCD#PCICLK5 PCICLK4 PCIEXT4 PCIEXC4 PCICLK3 PCIEXT3 PCIEXC3 PCICLK2/REQ_SEL PCIEXT2 PCIEXC2 SELLCD_27#/PCICLK_F1 ITP_EN/PCICLK_F0 PCIEXT1 PCIEXC1 SCLK SATACLKT SATACLKC SDATA IREF DOTT_96MHz DOTC_96MHz +3VS_VDD48 56 +3VS_VDDREF r0402_h16 C513 0.1UF/10V 63 STP_PCI# 62 STP_CPU# 49 48 CLK_CPU R526 CLK_CPU# R527 1 33Ohm 33Ohm CLK_CPU_BCLK CLK_CPU_BCLK# CLK_UMA_96M# R525 49.9Ohm 52 51 CLK_MCH R523 CLK_MCH# R524 1 33Ohm 33Ohm CLK_MCH_BCLK CLK_MCH_BCLK# CLK_PCIE_MINICARD R528 49.9Ohm CLK_PCIE_MINICARD# R529 49.9Ohm CLK_PCIE_NEWCARD R566 49.9Ohm CLK_PCIE_NEWCARD# R567 49.9Ohm CLK_PCIE_SATA R568 49.9Ohm CLK_PCIE_SATA# R569 49.9Ohm STP_PCI# STP_CPU# 44 43 R531 19 +3VS 41 40 PEREQ#1 PEREQ#2 R533 @ Do Not Stuff R534 10KOhm GND 39 38 PCIE6 R537 PCIE#6R538 1 33Ohm 33Ohm r0402_h16 r0402_h16 GND 19,50 10KOhm 13 29 37 53 59 GND GND1 GND2 GND3 GND4 GND5 GND6 GND7 internal pull high PEREQ3# PEREQ4# r0402_h16 r0402_h16 r0402_h16 (070205) R533 Remove CLK_NEWCARD_REQ# CLK_PCIE_NEWCARD CLK_PCIE_NEWCARD# r0402_h16 25 r0402_h16 r0402_h16 25 25 r0402_h16 36 35 r0402_h16 30 31 PCIE4 R542 PCIE#4R543 1 33Ohm 33Ohm CLK_MCH_3GPLL CLK_MCH_3GPLL# 24 25 22 23 PCIE3 R545 PCIE#3R547 1 33Ohm 33Ohm CLK_PCIE_MINICARD CLK_PCIE_MINICARD# PCIE2 R549 PCIE#2R551 1 33Ohm 33Ohm 26 27 CLK_SATA CLK_SATA# R554 R555 14 15 DOT96 R556 DOT96#R557 1 GND PREQ#1 26 26 B 0=PCIEX 6/0 Not Controlled CLK_PCIE_ICH 18 CLK_PCIE_ICH# 18 1=PCIEX 6/0 Controlled 19 20 PREQ#2 33Ohm 33Ohm 1 0=PCIEX 8/1 Not Controlled CLK_PCIE_SATA 17 CLK_PCIE_SATA# 17 33Ohm 33Ohm 1=PCIEX 8/1 Controlled CLK_UMA_96M CLK_UMA_96M# 32 MCH_CLK_REQ# 33 PREQ#3 CLK_MINICARD_REQ# Remove 0ohm Vtt_PwrGd#/PD C r0402_h16 +3VS_CLK 2 1 2 1 Do Not Stuff 11 R558 475Ohm @ Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff @ C522 C521 @ C523 @ C520 @ C519 C518 2 ICS_IREF @ r0402_h16 0=PCIEX 4/2 Not Controlled 1=PCIEX 4/2 Controlled CLK_LCD_SSCG# R530 VDDPCIEX1 VDDPCIEX2 VDDPCIEX3 GND R560 Do Not Stuff @ 26 CLK_LCD_SSCG r0402_h16 R514 1Ohm 21 28 42 VDDPCI2 1 2.2Ohm C515 0.1UF/10V C516 33PF/50V (070130)Change C516 from 27PF to 33PF C514 10UF/10V X501 14.318Mhz 2 +/-30ppm/20PF VDDPCI1 R517 C C512 10UF/10V GND +3VS_CLK U501 r0402_h16 1 C511 0.1UF/10V R513 2.2Ohm C510 10UF/10V 2 C509 0.1UF/10V C508 0.1UF/10V Pin34 is PWRSAVE# +3VS_VDDPCI 10 CLK_EN# 50 GND SELPCIE0_LCD#: >pin17,pin18=LCDCLK(96MHz) or 27M/27M_SS GND REF1/FSLC/TEST_SEL REF0 Realtek:Mount R519,Remove R550 R534 A 61 60 REF1 R563 REF0 R564 2.2KOhm 33Ohm PREQ#4 CPU_BSEL2 CLK_ICH14 19 0=PCIEX 7/5/3 Not Controlled ICS954310CGLFT A 1=PCIEX 7/5/3 Controlled SELLCD_27#/PCICLK_F1: >pin17,pin18=LCDCLK(96MHz) Internal Pull-Up Resistor PCMCIA PCICLK2/REQ_SEL: >pin40,pin41=PREQ1#,PREQ2# Internal Pull-Down Resistor ASUSALPHATeK COMPUTER INC Size ITP_EN/PCICLK_F0: >CPU_ITP pair CLOCK GEN Horng Chou Project Name Custom Date: Title : Engineer: Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet of 57 H_D#[0 63] H_A#[31 3] 2 +VCCP U601A Y1 U1 W1 CLK_MCH_BCLK AG2 CLK_MCH_BCLK# AG1 CLK_MCH_BCLK CLK_MCH_BCLK# H_HIT# H_HITM# H_LOCK# H_BNR# H_BPRI# H_BR0# H_CPURST# H_DBSY# H_DEFER# H_DPWR# H_DRDY# H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4 H_YRCOMP H_YSCOMP H_YSWING H_RS#_0 H_RS#_1 H_RS#_2 H_CLKIN H_CLKIN# A H_SLPCPU# H_TRDY# 10/20mils 24.9Ohm 1% GND GND C +VCCP R606 200Ohm 1% C601 0.1UF/10V R607 221Ohm 1% GND GND H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3 2 2 D8 G8 B8 F8 A8 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 B4 E6 D6 H_RS#0 H_RS#1 H_RS#2 E3 E7 N_CPUSLP# H_TRDY# 0.1UF/10V 10/20mils 2 2 R608 100Ohm 1% C602 GND GND B Signal voltage level = 0.3125*VCCP Trace should be 10 mil wide with 20 mil spacing +VCCP H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 Layout Note: 0.1uF should be placed 100mils or less from GMCH pin 2 2 2 H_XSWING H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3 R609 221Ohm 1% H_HIT# H_HITM# H_LOCK# H_YSWING H_REQ#[4 0] H_XRCOMP H_XSCOMP H_XSWING 2 H_HIT# H_HITM# H_LOCK# 150UF VCCD_LVDS 20 mA Pin A28 B28 C28 1 +1.5VS_3GPLL +2.5VS +1.5VS GND GND F21 E21 G21 GND +1.5VS_DPLLA GND GND GND L904 +1.5VS C912 VCCD_TVDAC Pin D21 0.1UF/10V C913 +1.5VS_MPLL C914 +1.5VS_DPLLB 0.022UF/25V L906 GND GND + CE905 @ C918 GND GND +1.5VS VCCD_QTVDAC H19 C28 1 +1.5VS_HPLL C919 C920 H20 G20 120Ohm/100Mhz C924 0.1UF/10V C923 Do Not Stuff @ GND GND VCCA_HPLL 45 mA GND 0.1UF/10V GND +1.5VS_MPLL Layout Note: These Caps should be within 250 mils of edge of GMCH L908 C928 C927 Do Not Stuff @ 0.1UF/10V 120Ohm/100Mhz 1 B GND GND (070131)C923, C927:unmount VCCA_MPLL 45 mA Layout Note: 0.1uF caps in 1.5VS_xPLL need to be located as edge caps within 200 mils C935 C936 C937 2 4.7UF/10V 0.1UF/10V 0.1UF/10V C934 GND GND GND GND GND GND D902 R905 1 +VCCP_GMCH_R +VCCP_GMCH +3VS 10Ohm VCC_HV 40 mA Pin A23 B23 B25 BAT54C 0.1UF/10V 10UF/10V C945 GND GND C901 0.022UF/25V GND 2 120Ohm/100Mhz C944 VCCA_CRTDAC Pin E21 F21 L909 +2.5VS_CRTDAC 70 mA GND C946 0.1UF/10V Layout Note: These Caps should be within 250 mils of edge of GMCH +1.5VS D21 +3VS A23 B23 B25 Layout Note: These 0.1uF caps should be placed within 200 mils of edge VCCTX_LVDS 60 mA Pin A30 B30 C30 C933 0.01UF/25V 0.1UF/10V +1.5VS A28 B28 C28 +1.5VS 0.1UF/10V VCCA_3GBG Pin G41 mA C932 1 VCCA_LVDS Pin A38 10 mA AH1 AH2 +1.5VS_VCCAUX +2.5VS VCC_SYNC Pin H22 +1.5VS 0.022UF/25V 1 E19 F19 C20 D20 E20 F20 TV OUT disable way L907 AF2 GND VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_LVDS VSSA_LVDS VCCA_MPLL VCCA_TVBG VSSA_TVBG GND 24 mA +1.5VS 0.1UF/10V Do Not Stuff VCCA_DPLLB 50 mA 30Ohm/100Mhz A A38 B39 VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC 1 +1.5VS 0.1UF/10V GND GND B26 C39 AF1 +1.5VS_DPLLA +1.5VS_DPLLB +1.5VS_HPLL +2.5VS CE904 @ Do Not Stuff C VCCA_DPLLA 50 mA + 30Ohm/100Mhz 1 VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6 VCCA_3GPLL VCCA_3GBG VSSA_3GBG H19 AK31 AF31 AE31 AC31 AL30 AK30 AJ30 AH30 AG30 AF30 AE30 AD30 AC30 AG29 AF29 AE29 AD29 AC29 AG28 AF28 AE28 AH22 AJ21 AH21 AJ20 AH20 AH19 P19 P16 AH15 P15 AH14 AG14 AF14 AE14 Y14 AF13 AE13 AF12 AE12 AD12 VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1 VCCD_HMPLL0 VCCD_HMPLL1 POW E R VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2 VCCD_TVDAC VCC_HV0 VCC_HV1 VCC_HV2 VCCD_QTVDAC VCCAUX0 VCCAUX1 VCCAUX2 VCCAUX3 VCCAUX4 VCCAUX5 VCCAUX6 VCCAUX7 VCCAUX8 VCCAUX9 VCCAUX10 VCCAUX11 VCCAUX12 VCCAUX13 VCCAUX14 VCCAUX15 VCCAUX16 VCCAUX17 VCCAUX18 VCCAUX19 VCCAUX20 VCCAUX21 VCCAUX22 VCCAUX23 VCCAUX24 VCCAUX25 VCCAUX26 VCCAUX27 VCCAUX28 VCCAUX29 VCCAUX30 VCCAUX31 VCCAUX32 VCCAUX33 VCCAUX34 VCCAUX35 VCCAUX36 VCCAUX37 VCCAUX38 VCCAUX39 VCCAUX40 C906 4.7UF/10V C907 2.2UF/6.3V + CE901 100UF/2.5V (070118) change into 11G08D210791 GND Remove TV OUT Power C VTTLF_CAP3 C929 0.47UF/16V B GND VTTLF_CAP2 VTTLF_CAP1 C938 0.22UF/6.3V 0.47UF/16V C939 GND GND A PCMCIA NOTE:0.1UF CAPS USED IN +1.5VS, +3.3VS +2.5VS should be placed within 200 mils of edge Title : Calistoga Power (4) ASUSALPHATeK COMPUTER INC Size Engineer: Horng Chou Project Name Custom Date: C908 0.22UF/6.3V Layout Note: Place in cavity CALISTOGA_Q137 D 2 GND +1.5VS_VCCAUX L903 80Ohm/100Mhz AJ41 AB41 Y41 V41 R41 N41 L41 AC33 G41 H41 VCCA_3GPLL 10UF/10V 0.1UF/10V C905 C904 VCC_TXLVDS0 VCC_TXLVDS1 VCC_TXLVDS2 800 mA 1 30Ohm/100Mhz C30 B30 A30 AC14 AB14 W14 V14 T14 R14 P14 N14 M14 L14 AD13 AC13 AB13 AA13 Y13 W13 V13 U13 T13 R13 N13 M13 L13 AB12 AA12 Y12 W12 V12 U12 T12 R12 P12 N12 M12 L12 R11 P11 N11 M11 R10 P10 N10 M10 P9 N9 M9 R8 P8 N8 M8 P7 N7 M7 R6 P6 M6 A6 R5 P5 N5 M5 P4 N4 M4 R3 P3 N3 M3 R2 P2 M2 D2 AB1 R1 P1 N1 M1 1500 mA 1 +1.5VS_PCIE VTT_0 VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8 VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25 VTT_26 VTT_27 VTT_28 VTT_29 VTT_30 VTT_31 VTT_32 VTT_33 VTT_34 VTT_35 VTT_36 VTT_37 VTT_38 VTT_39 VTT_40 VTT_41 VTT_42 VTT_43 VTT_44 VTT_45 VTT_46 VTT_47 VTT_48 VTT_49 VTT_50 VTT_51 VTT_52 VTT_53 VTT_54 VTT_55 VTT_56 VTT_57 VTT_58 VTT_59 VTT_60 VTT_61 VTT_62 VTT_63 VTT_64 VTT_65 VTT_66 VTT_67 VTT_68 VTT_69 VTT_70 VTT_71 VTT_72 VTT_73 VTT_74 VTT_75 VTT_76 Do Not Stuff @ Layout Note: Place on the edge +VCCP_AGTL+ VCCSYNC GND H22 L901 +VCCP_AGTL+ U601H 2 +1.5VS_3GPLL GND +2.5VS Do Not Stuff @ JP901 10UF/10V D GND +VCCP VCC3G JP902 +VCCP_AGTL+ 2,3,5,6 +VCCP_GMCH 10 +1.5VS_PCIE +3VS 4,5,7,11,12,13,14,15,19,20,21,22,25,26,27,28,29,30,33,37,40,43,50,52,60,61 +2.5VS 37,54 +1.5VS 7,10,20,25,26,37,52 C903 +VCCP_AGTL+ +VCCP_GMCH +1.5VS_PCIE +3VS +2.5VS +1.5VS CE902 C902 Do Not Stuff @ 10UF/10V + 120Ohm/100Mhz Layout Note: Caps should be on Top layer L902 GMCH VCORE +1.5VS_PCIE +1.5VS Layout Note: Place filter components close to GMCH Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet of 57 +VCCP_GMCH 1 C1002 C1003 0.47UF/16V 0.47UF/16V GND GND VCC_SM_3 C1004 0.47UF/16V GND VCC_SM_4 U601J VCC_NCTF0 VCC_NCTF1 VCC_NCTF2 VCC_NCTF3 VCC_NCTF4 VCC_NCTF5 VCC_NCTF6 VCC_NCTF7 VCC_NCTF8 VCC_NCTF9 VCC_NCTF10 VCC_NCTF11 VCC_NCTF12 VCC_NCTF13 VCC_NCTF14 VCC_NCTF15 VCC_NCTF16 VCC_NCTF17 VCC_NCTF18 VCC_NCTF19 VCC_NCTF20 VCC_NCTF21 VCC_NCTF22 VCC_NCTF23 VCC_NCTF24 VCC_NCTF25 VCC_NCTF26 VCC_NCTF27 VCC_NCTF28 VCC_NCTF29 VCC_NCTF30 VCC_NCTF31 VCC_NCTF32 VCC_NCTF33 VCC_NCTF34 VCC_NCTF35 VCC_NCTF36 VCC_NCTF37 VCC_NCTF38 VCC_NCTF39 VCC_NCTF40 VCC_NCTF41 VCC_NCTF42 VCC_NCTF43 VCC_NCTF44 VCC_NCTF45 VCC_NCTF46 VCC_NCTF47 VCC_NCTF48 VCC_NCTF49 VCC_NCTF50 VCC_NCTF51 VCC_NCTF52 VCC_NCTF53 VCC_NCTF54 VCC_NCTF55 VCC_NCTF56 VCC_NCTF57 VCC_NCTF58 VCC_NCTF59 VCC_NCTF60 VCC_NCTF61 VCC_NCTF62 VCC_NCTF63 VCC_NCTF64 VCC_NCTF65 VCC_NCTF66 VCC_NCTF67 VCC_NCTF68 VCC_NCTF69 VCC_NCTF70 VCC_NCTF71 VCC_NCTF72 VSS_NCTF0 VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 VSS_NCTF8 VSS_NCTF9 VSS_NCTF10 VSS_NCTF11 VSS_NCTF12 AE27 AE26 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AC17 Y17 U17 J11 D11 B11 AV10 AP10 AL10 AJ10 AG10 AC10 W10 U10 BA9 AW9 AR9 AH9 AB9 Y9 R9 G9 E9 A9 AG8 AD8 AA8 U8 K8 C8 BA7 AV7 AP7 AL7 AJ7 AH7 AF7 AC7 R7 G7 D7 AG6 AD6 AB6 Y6 U6 N6 K6 H6 B6 AV5 AF5 AD5 AY4 AR4 AP4 AL4 AJ4 Y4 U4 R4 J4 F4 C4 AY3 AW3 AV3 AL3 AH3 AG3 AF3 AD3 AC3 AA3 G3 AT2 AR2 AP2 AK2 AJ2 AD2 AB2 Y2 U2 T2 N2 J2 H2 F2 C2 AL1 GND +1.5VS VCCAUX_NCTF0 VCCAUX_NCTF1 VCCAUX_NCTF2 VCCAUX_NCTF3 VCCAUX_NCTF4 VCCAUX_NCTF5 VCCAUX_NCTF6 VCCAUX_NCTF7 VCCAUX_NCTF8 VCCAUX_NCTF9 VCCAUX_NCTF10 VCCAUX_NCTF11 VCCAUX_NCTF12 VCCAUX_NCTF13 VCCAUX_NCTF14 VCCAUX_NCTF15 VCCAUX_NCTF16 VCCAUX_NCTF17 VCCAUX_NCTF18 VCCAUX_NCTF19 VCCAUX_NCTF20 VCCAUX_NCTF21 VCCAUX_NCTF22 VCCAUX_NCTF23 VCCAUX_NCTF24 VCCAUX_NCTF25 VCCAUX_NCTF26 VCCAUX_NCTF27 VCCAUX_NCTF28 VCCAUX_NCTF29 VCCAUX_NCTF30 VCCAUX_NCTF31 VCCAUX_NCTF32 VCCAUX_NCTF33 VCCAUX_NCTF34 VCCAUX_NCTF35 VCCAUX_NCTF36 VCCAUX_NCTF37 VCCAUX_NCTF38 VCCAUX_NCTF39 VCCAUX_NCTF40 VCCAUX_NCTF41 VCCAUX_NCTF42 VCCAUX_NCTF43 VCCAUX_NCTF44 VCCAUX_NCTF45 VCCAUX_NCTF46 VCCAUX_NCTF47 VCCAUX_NCTF48 VCCAUX_NCTF49 VCCAUX_NCTF50 VCCAUX_NCTF51 VCCAUX_NCTF52 VCCAUX_NCTF53 VCCAUX_NCTF54 VCCAUX_NCTF55 VCCAUX_NCTF56 VCCAUX_NCTF57 N CTF C1005 0.47UF/16V AG27 AF27 AG26 AF26 AG25 AF25 AG24 AF24 AG23 AF23 AG22 AF22 AG21 AF21 AG20 AF20 AG19 AF19 R19 AG18 AF18 R18 AG17 AF17 AE17 AD17 AB17 AA17 W17 V17 T17 R17 AG16 AF16 AE16 AD16 AC16 AB16 AA16 Y16 W16 V16 U16 T16 R16 AG15 AF15 AE15 AD15 AC15 AB15 AA15 Y15 W15 V15 U15 T15 R15 CALISTOGA_Q137 GND +VCCP_GMCH VCC(GMCH Core) C1009 C1008 C1010 C1011 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360 U601I VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 V SS 2 0.22UF/6.3V 0.22UF/6.3V 0.22UF/6.3V 1UF/10V 1 C1007 10UF/10V 2 2 C1006 + CE1002 Do Not Stuff 10UF/10V @ + CE1001 220UF/2V +1.8V 1 +1.5VS (5500 mA) or +1.05VS (3500 mA) GND (070205) 11G08D222795 changed to 11G08D222795 220uF/2V AT23 AN23 AM23 AH23 AC23 W23 K23 J23 F23 C23 AA22 K22 G22 F22 E22 D22 A22 BA21 AV21 AR21 AN21 AL21 AB21 Y21 P21 K21 J21 H21 C21 AW20 AR20 AM20 AA20 K20 B20 A20 AN19 AC19 W19 K19 G19 C19 AH18 P18 H18 D18 A18 AY17 AR17 AP17 AM17 AK17 AV16 AN16 AL16 J16 F16 C16 AN15 AM15 AK15 N15 M15 L15 B15 A15 BA14 AT14 AK14 AD14 AA14 U14 K14 H14 E14 AV13 AR13 AN13 AM13 AL13 AG13 P13 F13 D13 B13 AY12 AC12 K12 H12 E12 AD11 AA11 Y11 AK34 AG34 AF34 AE34 AC34 C34 AW33 AV33 AR33 AE33 AB33 Y33 V33 T33 R33 M33 H33 G33 F33 D33 B33 AH32 AG32 AF32 AE32 AC32 AB32 G32 B32 AY31 AV31 AN31 AJ31 AG31 AB31 Y31 AB30 E30 AT29 AN29 AB29 T29 N29 K29 G29 E29 C29 B29 A29 BA28 AW28 AU28 AP28 AM28 AD28 AC28 W28 J28 E28 AP27 AM27 AK27 J27 G27 F27 C27 B27 AN26 M26 K26 F26 D26 AK25 P25 K25 H25 E25 D25 A25 BA24 AU24 AL24 AW23 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 V SS GND CALISTOGA_Q137 GND AC41 AA41 W41 T41 P41 M41 J41 F41 AV40 AP40 AN40 AK40 AJ40 AH40 AG40 AF40 AE40 B40 AY39 AW39 AV39 AR39 AN39 AJ39 AC39 AB39 AA39 Y39 W39 V39 T39 R39 P39 N39 M39 L39 J39 H39 G39 F39 D39 AT38 AM38 AH38 AG38 AF38 AE38 C38 AK37 AH37 AB37 AA37 Y37 W37 V37 T37 R37 P37 N37 M37 L37 J37 H37 G37 F37 D37 AY36 AW36 AN36 AH36 AG36 AF36 AE36 AC36 C36 B36 BA35 AV35 AR35 AH35 AB35 AA35 Y35 W35 V35 T35 R35 P35 N35 M35 L35 J35 H35 G35 F35 D35 AN34 D C B CALISTOGA_Q137 Layout Note: Place in cavity +1.8V GND 3200 mA 150UF/4V + 1 CE1003N/A CE1004 Do Not Stuff @ + CE1005 +1.5VS +1.8V +VCCP_GMCH +1.5VS 7,9,20,25,26,37,52 +1.8V 7,14,15,16,37,53 +VCCP_GMCH Do Not Stuff @ PCMCIA 10UF/10V + 2 10UF/10V C1001 VCC_SM_5 VCC_SM_6 C1012 1 A 0.47UF/16V C1014 Title : Clistoga GND (5) 0.47UF/16V ASUSALPHATeK COMPUTER INC GND GND GND Size Date: Engineer: Horng Chou Project Name Custom VSS_0 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 GND C1013 CALISTOGA_Q137 AD27 AC27 AB27 AA27 Y27 W27 V27 U27 T27 R27 AD26 AC26 AB26 AA26 Y26 W26 V26 U26 T26 R26 AD25 AC25 AB25 AA25 Y25 W25 V25 U25 T25 R25 AD24 AC24 AB24 AA24 Y24 W24 V24 U24 T24 R24 AD23 V23 U23 T23 R23 AD22 V22 U22 T22 R22 AD21 V21 U21 T21 R21 AD20 V20 U20 T20 R20 AD19 V19 U19 T19 AD18 AC18 AB18 AA18 Y18 W18 V18 U18 T18 VCC_SM_1 VCC_SM_2 A AU41 AT41 AM41 AU40 BA34 AY34 AW34 AV34 AU34 AT34 AR34 BA30 AY30 AW30 AV30 AU30 AT30 AR30 AP30 AN30 AM30 AM29 AL29 AK29 AJ29 AH29 AJ28 AH28 AJ27 AH27 BA26 AY26 AW26 AV26 AU26 AT26 AR26 AJ26 AH26 AJ25 AH25 AJ24 AH24 BA23 AJ23 BA22 AY22 AW22 AV22 AU22 AT22 AR22 AP22 AK22 AJ22 AK21 AK20 BA19 AY19 AW19 AV19 AU19 AT19 AR19 AP19 AK19 AJ19 AJ18 AJ17 AH17 AJ16 AH16 BA15 AY15 AW15 AV15 AU15 AT15 AR15 AJ15 AJ14 AJ13 AH13 AK12 AJ12 AH12 AG12 AK11 BA8 AY8 AW8 AV8 AT8 AR8 AP8 BA6 AY6 AW6 AV6 AT6 AR6 AP6 AN6 AL6 AK6 AJ6 AV1 AJ1 B V CC VCC_SM_0 VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35 VCC_SM_36 VCC_SM_37 VCC_SM_38 VCC_SM_39 VCC_SM_40 VCC_SM_41 VCC_SM_42 VCC_SM_43 VCC_SM_44 VCC_SM_45 VCC_SM_46 VCC_SM_47 VCC_SM_48 VCC_SM_49 VCC_SM_50 VCC_SM_51 VCC_SM_52 VCC_SM_53 VCC_SM_54 VCC_SM_55 VCC_SM_56 VCC_SM_57 VCC_SM_58 VCC_SM_59 VCC_SM_60 VCC_SM_61 VCC_SM_62 VCC_SM_63 VCC_SM_64 VCC_SM_65 VCC_SM_66 VCC_SM_67 VCC_SM_68 VCC_SM_69 VCC_SM_70 VCC_SM_71 VCC_SM_72 VCC_SM_73 VCC_SM_74 VCC_SM_75 VCC_SM_76 VCC_SM_77 VCC_SM_78 VCC_SM_79 VCC_SM_80 VCC_SM_81 VCC_SM_82 VCC_SM_83 VCC_SM_84 VCC_SM_85 VCC_SM_86 VCC_SM_87 VCC_SM_88 VCC_SM_89 VCC_SM_90 VCC_SM_91 VCC_SM_92 VCC_SM_93 VCC_SM_94 VCC_SM_95 VCC_SM_96 VCC_SM_97 VCC_SM_98 VCC_SM_99 VCC_SM_100 VCC_SM_101 VCC_SM_102 VCC_SM_103 VCC_SM_104 VCC_SM_105 VCC_SM_106 VCC_SM_107 C U601G VCC_0 VCC_1 VCC_2 VCC_3 VCC_4 VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12 VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34 VCC_35 VCC_36 VCC_37 VCC_38 VCC_39 VCC_40 VCC_41 VCC_42 VCC_43 VCC_44 VCC_45 VCC_46 VCC_47 VCC_48 VCC_49 VCC_50 VCC_51 VCC_52 VCC_53 VCC_54 VCC_55 VCC_56 VCC_57 VCC_58 VCC_59 VCC_60 VCC_61 VCC_62 VCC_63 VCC_64 VCC_65 VCC_66 VCC_67 VCC_68 VCC_69 VCC_70 VCC_71 VCC_72 VCC_73 VCC_74 VCC_75 VCC_76 VCC_77 VCC_78 VCC_79 VCC_80 VCC_81 VCC_82 VCC_83 VCC_84 VCC_85 VCC_86 VCC_87 VCC_88 VCC_89 VCC_90 VCC_91 VCC_92 VCC_93 VCC_94 VCC_95 VCC_96 VCC_97 VCC_98 VCC_99 VCC_100 VCC_101 VCC_102 VCC_103 VCC_104 VCC_105 VCC_106 VCC_107 VCC_108 VCC_109 VCC_110 D +VCCP_GMCH U601F AA33 W33 P33 N33 L33 J33 AA32 Y32 W32 V32 P32 N32 M32 L32 J32 AA31 W31 V31 T31 R31 P31 N31 M31 AA30 Y30 W30 V30 U30 T30 R30 P30 N30 M30 L30 AA29 Y29 W29 V29 U29 R29 P29 M29 L29 AB28 AA28 Y28 V28 U28 T28 R28 P28 N28 M28 L28 P27 N27 M27 L27 P26 N26 L26 N25 M25 L25 P24 N24 M24 AB23 AA23 Y23 P23 N23 M23 L23 AC22 AB22 Y22 W22 P22 N22 M22 L22 AC21 AA21 W21 N21 M21 L21 AC20 AB20 Y20 W20 P20 N20 M20 L20 AB19 AA19 Y19 N19 M19 L19 N18 M18 L18 P17 N17 M17 N16 M16 L16 Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet 10 of 57 Reset IC PWRSW#_EC D AC_BAT_SYS +3VA_EC +3VA_EC PM_RSMRST# IT8511E VSUS_ON +1.8V +1.5V +2.5V +3V +5V +1V SUSB_ON SUSC_ON Delay 99ms SUSC#_PWR SUSB#_PWR 13 13 C 14 11 Calistoga ICH7_PWROK 11 CLK_EN# B To EC PM_SUSB# ICH7 VSUS_GD# IMVPOK# C PM_SUSC# PWROK VRMPWRGD 12 +3VSUS +5VSUS +12VSUS D PM_PWRBTN# EC +3VA Power On SWITCH H_PWRGD +5VLCM +2.5VREF PLT_RST# A/D_DOCK_IN +VCCP +0.9VS +1.5VS +2.5VS +3VS +5VS +12VS H_CPURST# CPU PWROK CLK Gen B Power On Sequence DELAY _ms 10 CPU_VRON 14 +VCORE A A PCMCIA Title : FLOWCHART ASUSALPHATeK COMPUTER INC Size Horng Chou Project Name Custom Date: Engineer: Rev TERESA Tuesday, February 06, 2007 1.1 Sheet 47 of 57 EC GPIO SETTING Pin D C A ICH7-M GPIO SETTING Signal Name Type Pin Signal Name Pin Name Type Pin Pin Name Signal Name Type 32 PWM 0/GPA0 BRIGHT_PWM O 48 GPH0 VSUS_ON_EC O AB18 GPIO00/BM _BUSY# PM _BM BUSY# I 33 PWM 1/GPA1 FAN_PWM O 54 GPH1 VSUS_GD# I C8 GPIO01/REQ5# PCI_REQ#5 I 36 PWM 2/GPA2 / O 55 GPH2 IM VPOK# I G8 GPIO02/PIRQE# PCI_INTE# I 37 PWM 3/GPA3 BAT_LOW_BEEP(Reserved) O 69 GPH3 PM _PWRBTN# O F7 GPIO03/PIRQF# PCI_INTF# I 38 PWM 4/GPA4 CHG_LED_UP# O 70 GPH4 SUSC_EC# O F8 GPIO04/PIRQG# PCI_INTG# I 39 PWM 5/GPA5 PWR_LED_UP# O 75 GPH5 SUSB_EC# O G7 GPIO05/PIRQH# PCI_INTH# I 40 PWM 6/GPA6 BATSEL_3S# O 76 GPH6 CPU_VRON O AC21 GPIO06 / I/O 43 PWM 7/GPA7 LCD_BACKOFF# O 105 GPH7 PM _RSM RST# O AC18 GPIO07 PM _THERM #_GPIO (Reserved) I 153 RXD/GPB0 NUM _LED O 148 GPI0 ICH_PWROK_EC O E21 GPIO08 EXTSM I# I 154 TXD/GPB1 CAP_LED O 149 GPI1 WATCHDOG# O E20 GPIO09 SATA_DET#0 I 162 GPB2 SCRL_LED O 152 GPI2 / A20 GPIO10 WLAN_SW#_ICH I 163 SM CLK0/GPB3 SM CLK_BAT I/0 155 GPI3 CHG_EN# O B23 SM BALERT#/GPIO11 SM B_ALERT# I 164 SM DAT0GPB4 SM DATA_BAT I/0 156 GPI4 PRECHG O F19 GPIO12 KBC_SCI# I PCI Device IDSEL# REQ/GNT# AD23 A CARDBUS AD17 B 1394 AD17 C CARD READER AD17 D D PCIE Device Bus MINI_CARD PE(T/R)(p/n)2 NEWCARD PE(T/R)(p/n)3 GA20/GPB5 A20GATE O 168 GPI5 BAT_LL# O E19 GPIO13 NEWCARD_DET# I KBRST#/GPB6 RCIN# O 174 GPI6 BAT_LEARN O R4 GPIO14 BAT_LL#_ICH (Reserved) I 165 GPB7 THRO_CPU O 109 GPI7 / E22 GPIO15 WLAN_LED# O 47 CLKOUT/GPC0 / O 99 DAC0/GPJ0 CHG_FULL_LED#_EC AC22 GPIO16 PM _DPRSLPVR O SM-Bus Device SM-Bus Address 169 SM CLK1/GPC1 SM B1_CLK I/0 100 DAC1/GPJ1 / D8 GPIO17/GNT5# PCI_GNT#5 O Clock Generator 1101001x ( D2 ) 170 SM DAT1/GPC2 SM B1_DAT I/0 101 DAC2/GPJ2 INVTER_DA O AC20 GPIO18/STPPCI# STP_PCI# O SO-DIMM 1010000x ( A0 ) 171 GPC3 / I 102 DAC3/GPJ3 BATSEL_2P# O AH18 GPIO19/SATA1GP / I SO-DIMM 1010001x ( A2 ) 172 TM RI0/WUI2/GPC4 ACIN_OC# I 97 GPJ4 / AF21 GPIO20/STPCPU# STP_CPU# O Thermal Sensor 1001100x ( 98 ) 175 GPC5 OP_SD# O 98 GPJ5 / AE19 GPIO21/SATA0GP / I A13 I O BAT_IN_OC# I CK32KOUT/GPC7 / O 26 RI1#/WUI0/GPD0 PM _SUSB# I 81 ADC0/GPK0 BAT0_AD 29 RI2#/WUI1/GPD1 PM _SUSC# I 82 ADC1/GPK1 / 30 LPCRST#/WUI4//GPD2 PLT_RST# I 83 ADC2/GPK2 AC_AD 31 ECSCI#/GPD3 ECSCI# O 84 ADC3/GPK3 / 41 GPD4 / 93 ADC8/GPK4 KB_ID0 I 42 GINT/GPD5 / 94 ADC9/GPK5 KB_ID0 I 62 TACH0/GPD6 FAN0_TACH 63 TACH1/GPD7 TM RI1/WUI3/GPC6 / REQ4#/GPIO22 PCI_REQ#4 AA5 LDRQ1#/GPIO23 / I R3 GPIO24 / D20 GPIO25 CB_SD# I A21 GPIO26 / B21 GPIO27 BTO_DEV0 I E23 GPIO28 NEWCARD_OFF# O C3 GPIO29/OC#5 USB_OC_5# I I A2 GPIO30/OC#6 NEWCARD_OC# I / O B3 GPIO31/OC#7 USB_OC_7# I / ADC4/GPE0 WLAN_SW#_EC(Reserved) I GPL0 / O AG18 GPIO32/CLKRUN# PM _CLKRUN# I/O 88 ADC5/GPE1 / I 11 GPL1 / O AC19 GPIO33/AZ_DOCK_EN# BTO_DEV1 I 89 ADC6/GPE2 / I 12 GPL2 / I U2 GPIO34/AZ_DOCK_RST# BTO_DEV2 I 90 ADC7/GPE3 / I 20 GPL3 / O AD21 GPIO35 / O PWRSW/GPE4 PWRSW#_EC I 21 GPL4 / AH19 GPIO36/SATA2GP / 44 WUI5/GPE5 / 106 GPL5 / AE19 GPIO37/SATA3GP PCB_ID0 I 24 LPCPD#/WUI6/GPE6 LID_EC# I 107 GPL6 / AD20 GPIO38 PCB_ID1 I O 108 AE20 GPIO39 PCB_ID2 I A14 GNT4#/GPIO48 PCI_GNT#4 O AG24 GPIO49/CPUPWRGD H_PWRGD O 25 CLKRUN#/WUI7/GPE7 / PS2CLK0/GPF0 / 22 ECSM I#/GPM EXTSM I# 111 PS2DAT0/GPF1 / 23 PWUREQ#/GPM / 114 PS2CLK1/GPF2 / I/0 85 KSO16/GPM / I/0 86 KSO17/GPM ID_EC (Reserved) 91 CTX/GPM / 92 CRX/GPM / 115 PS2DAT1/GPF3 / 116 PS2CLK2/GPF4 TPAD_CLK 117 PS2DAT2/GPF5 TPAD_DAT 118 PS2CLK3/GPF6 / 119 PS2DAT3/GPF7 / 113 FA16/GPG0 FA16 112 FA17/GPG1 FA17 104 FA18/GPG2 FA18 103 FA19/GPG3 / FA20/GPG4 THRM _CPU# FA21/GPG5 / 27 LPC80HL/GPG6 PM THERM # O 28 LPC80LL/GPG7 AC_APR_UC# I GPL7 / O C O 87 110 Interrupts 10/100 RTL8100CL 176 B Pin Name B I Indigo: the same as T12F Pink: different from T12F I I A PCMCIA Title : GPIO Setting ASUSALPHATeK COMPUTER INC Size Custom Horng Chou Rev TERESA Date: Tuesday, February 06, 2007 Engineer: Project Name 1.1 Sheet 48 of 57 TPC28T TPC28TTPC28TTPC28TTPC28TTPC28T TPC28T PT5034 PT5035PT5036PT5037PT5038PT5039 PT5040 +1.05VO 1 2 PC5028 0.033UF/16V MLCC/+/-10% PR5053 3.65KOhm PR5052 1 PC5009 1000PF/25V MLCC/+/-5% VCC_PRM PC5016 0.1UF/25V MLCC/+/-10% 2 PCE5007 330UF/2V PANASONIC/EEFSX0D331XE PCE5006 330UF/2V PANASONIC/EEFSX0D331XE for current balence ISEN2 PC5017 0.22UF/10V MLCC/+/-10% B 1 1 1 1 1 1 1 +VCORE 1 1 1 1 1 1 1 A 1% PCMCIA PCPU_GND2 Title : POWER_VCORE ASUSALPHATeK COMPUTER INC Close to Phase Inductor Size Engineer: Amos Yu Project Name Custom Date: PCE5003 330UF/2V PANASONIC/EEFSX0D331XE for current balence PCE5002 330UF/2V PANASONIC/EEFSX0D331XE 2 1% @ 10KOHM C5028 & C5029 for transient response PC5002 1000PF/25V MLCC/+/-5% PC5001 1UF/25V MLCC/+80%-20% c0805_h57 ISEN1 PC5008 1UF/25V MLCC/+80%-20% c0805_h57 PCE5005 15UF/25V 2 1 TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T PT5018PT5019PT5020PT5021PT5022PT5023PT5024PT5025PT5026PT5027PT5028PT5029PT5030PT5031PT5032PT5033 PC5024 4.7UF/6.3V MLCC/+/-10% PCPU_GND1 VSUM + PVCC 11KOhm 1% PC5029 0.33UF/10V MLCC/+/-10% + TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T PT5000PT5003 PT5004PT5005PT5006PT5007PT5008PT5009PT5010PT5011PT5012PT5013PT5014PT5015PT5016PT5017 PC5006 0.22UF/10V MLCC/+/-10% Close to Pin 18 PR5051 PR5055 AC_BAT_SYS (070129) For load line issue PR5040 1Ohm 1% PC5022 0.1UF/25V MLCC/+/-10% VCC_PRM PR5039 10KOhm 1% with Toko 10KOhm PR5049 3.32KOhm 1% PR5050 1KOhm 1% PCE5004 15UF/25V 2 PR5038 3.65KOhm 1% +5VS 1 2 C FOR LAYOUT PLACEMENT 1 1 R5049 for line PC5023 load 180PF/50V A 2 VSUM PC5021 0.01UF/50V MLCC/+/-10% + VCC_PRM PL5001 (070131) 0.36UH For colay CYNTEC/PCMC104T-R36MN SOP8 PD5001 EC31QS04 S PQ5007 SI4336DY_T1_E3 SOP8 4G S D PC5014 0.22UF/25V MLCC/+/-5% PR5048 27.4Ohm @ PR5047 100Ohm @ PR5045 0Ohm r0402 1 PR5046 10Ohm r0805_h24 2 VSSSENSE PCE5001 15UF/25V PQ5004 SI4336DY_T1_E3 TPC28T PT5002 PC5020 2.2UF/6.3V MLCC/+80%-20% 1 + VSUM 2 + PCPU_GND2 PC5005 0.22UF/10V MLCC/+/-10% + PQ5006 SI4392DY PR5044 10Ohm r0805_h24 PQ5005 SI4392DY @ PQ5000 SI4336DY_T1_E3 @ 4G PC5019 0.01UF/50V MLCC/+/-10% 10KOhm 1% @ 8 13 14 15 16 17 18 19 20 21 22 23 24 PR5036 2.7Ohm ISEN2 PC5018 0.01UF/50V MLCC/+/-10% PR5054 PCPU_GND2 49 48 47 46 45 44 43 42 41 40 39 38 37 PR5043 27.4Ohm @ PR5042 100Ohm PT5044 TPC28T @ TPC28T PT5042 PCPU_GND2 D 1 +5VS +VCORE PVCC PR5041 0Ohm r0402 PR5019 1Ohm 1% AC_BAT_SYS PCPU_GND1 PC5015 470PF/50V MLCC/+/-10% VCCSENSE PR5035 0Ohm r0402 @ (35A) PR5018 10KOhm 1% ISEN1 B 2 PR5034 1.82KOhm 1% 1 PT5043 TPC28T PR5033 0Ohm r0402 @ 2 1 PR5037 61.9KOhm 1% GND2 3V3 CLK_EN# DPRSTP# DPRSLPVR VR_ON VID6 VID5 VID4 VID3 VID2 VID1 VID0 PC5012 47PF/50V MLCC/+/-5% 1% 2 PR5031 4.42KOhm PR5032 1.5KOhm 1% BOOT1 UGATE1 PHASE1 PGND1 LGATE1 PVCC LGATE2 PGND2 PHASE2 UGATE2 BOOT2 NC 36 35 34 33 32 31 30 29 28 27 26 25 +VCORE S TPC28T PT5041 PC5011 390PF/50V MLCC/+/-5% PC5013 0.033UF/16V MLCC/+/-10% PR5020 3.65KOhm 1% PC5007 0.22UF/25V MLCC/+/-5% G PC5010 0.1UF/25V @ S 2 PR5026 2.7Ohm D PR5030 11KOhm 1% PGOOD PSI# PGD_IN RBIAS VR_TT# NTC SOFT OCSET VW COMP FB FB2 G 10 11 12 PSI# PU5000 ISL6262CRZ VDIFF VSEN RTN DROOP DFB VO VSUM VIN GND1 VDD ISEN2 ISEN1 VR_PWRGD 2 1 S D VCC_PRM PL5000 0.36UH CYNTEC/PCMC104T-R36MN PCPU_GND1 2 PR5024 0Ohm r0402 PR5028 499Ohm 1% @ +3VS (070131) For colay with Toko PD5000 EC31QS04 4G VR_VID6 VR_VID5 VR_VID4 VR_VID3 VR_VID2 VR_VID1 VR_VID0 2 1 PR5023 0Ohm r0402 PR5027 10KOHM @ Close to Phase Inductor SOP8 4G D PR5017 PR5016 PR5015 PR5014 PR5013 D PQ5003 SI4336DY_T1_E3 @ PC5003 0.047UF/50V MLCC/+/-10% @ D PCPU_GND1 PQ5002 SI4392DY TPC28T PT5001 S PR5022 0Ohm r0402 PR5025 147KOhm 1% PC5000 0.015UF/50V MLCC/+/-10% C PR5021 15.8KOhm 1% @ PCE5000 15UF/25V r0402 PQ5001 SI4392DY @ 1 +3VS PC5004 1UF/6.3V MLCC/+/-10% FOR LAYOUT PLACEMENT @ SOP8 40,60 VRM_PWRGD 1 PR5009 0Ohm r0402 CLK_EN# + @ 0Ohm r0402 0Ohm r0402 0Ohm r0402 r0402 0Ohm 0Ohm @ 47KOhm r0402_h16 + @ @ @ @ @ @ @ @ r0402 r0402 2 47KOhm r0402_h16 PR5010 0Ohm 47KOhm r0402_h16 PR5008 PR5012 MCH_OK 47KOhm r0402_h16 PR5006 PR5000 PR5056 0Ohm r0402 43,52 @ PR5004 VR_VID6 @ VR_VID5 2,17 H_DPRSTP# PM_PSI# 47KOhm r0402_h16 PR5007 0Ohm r0402 @ 5,19 STP_CPU# 1 PR5005 499Ohm 1% 7,19 PM_DPRSLPVR 1 VR_VID4 PR5011 100KOhm CPU_VRON VR_VID3 47KOhm r0402_h16 PR5003 63 CPU_VRON_PWR 29 PR5002 S @ D VR_VID2 47KOhm r0402_h16 G VR_VID1 PR5001 S AC_BAT_SYS D G VR_VID0 0Ohm D 1 AC_BAT_SYS Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet 50 of 57 2 PJP5103 TPC28T PT5101 PR5100 0Ohm TPC28T PT5121 2 +3VO +3VSUS 1MM_OPEN_5MIL 2 + PCE5105 150UF/4V PANASONIC/EEFCX0G151R c7343d_h87 @ + 2 PC5113 6800PF/50V MLCC/+/-10% PC5117 3300PF/50V MLCC/+/-10% @ PCE5104 150UF/4V PANASONIC/EEFCX0G151R c7343d_h87 PD5102 FS1J4TP PL5101 3.8UH Irat=6A PJP5101 (3A) 2 PR5123 2.2Ohm @ PQ5103 SI4800BDY 2 1 1 PC5118 270PF/50V MLCC/+/-10% 1 C 2 2 PR5114 18KOhm 1% S PR5113 16.9KOhm 1% (0.5A) PC5107 1UF/16V MLCC/+80%-20% TPC28T PT5102 D 40,60 3V_5V_PWRGD PC5119 270PF/50V MLCC/+/-10% G PR5117 30.1KOhm 1% +5VSUS S G PQ5102 SI4800BDY PR5116 330Ohm 1% + 1 PC5111 4.7UH/16V MLCC/+80-20% c1206_h49 Vref=0.85V AC_BAT_SYS +5VAO PC5110 0.1UF/50V MLCC/+/-10% + PJP5104 SHORT_PIN + PCE5100 100UF/6.3V PANASONIC/EEFCX0J101R c7343d_h87 18KOhm 1% @ +5VAO 2 PR5115 10KOhm 1% 1 18KOhm 1% @ +5VO F=450KHz PD5100 FS1J4TP PC5116 3300PF/50V MLCC/+/-10% @ PR5110 TPS51020 2 PR5109 D PC5109 PR5111 3300PF/50V 1.2KOhm MLCC/+/-10% 1% 1 1MM_OPEN_5MIL PC5108 0.1UF/25V MLCC/+80%-20% PQ5101 SI4800BDY 1 PC5100 0.01UF/50V MLCC/+/-10% PR5112 100KOhm @ 1 1 1 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 PCE5103 27UF/25V VBST1 OUT1_U LL1 OUT1_D OUTGND1 TRIP1 VIN TRIP2 VREG5 REG5_IN OUTGND2 OUT2_D LL2 OUT2_U VBST2 PR5122 2.2Ohm @ 3V_5V_PWRGD ENBL C PL5100 3.8UH Irat=6A PT5100 TPC28T INV1 COMP1 SSTRT1 SKIP# VO1_VDDQ DDR# GND REF_X ENBL1 ENBL2 VO2 PGOOD SSTRT2 COMP2 INV2 PU5100 10 11 12 13 14 15 2 PC5106 4700PF/50V MLCC/+/-10% PC5105 0.1UF/50V MLCC/+/-10% S G PR5108 100KOhm 1 D PR5107 10KOhm 1% PR5105 1.8KOhm 1% PJP5100 (6A) PC5104 1500PF/50V MLCC/+/-10% PR5106 0Ohm r0402 AC_BAT_SYS PT5120 TPC28T PCE5102 100UF/6.3V PANASONIC/EEFCX0J101R c7343d_h87 @ 1 +5VO S PR5104 0Ohm 1 PR5103 330Ohm 1% SUSB#_PWR D SHORT_PIN 2 PC5103 0.1UF/25V MLCC/+80%-20% PCE5101 27UF/25V PQ5100 SI4800BDY G 52,53,54,61,63 + D PR5102 49.9KOhm 1% PR5101 0Ohm 2 D PC5102 6800PF/50V MLCC/+/-10% AC_BAT_SYS 2 PC5101 1UF/25V MLCC/+80/-20% c1206_h49 AC_BAT_SYS (0.4A) PC5112 1UF/16V MLCC/+80%-20% B B +12VSUS EN NC or ADJ MIC5235YM5 4,25,29 VSUS_ON PC5115 1UF/25V MLCC/+80%-20% c0805_h57 1 1 PD5101 RB751V-40 4,29,38,41,60 FORCE_OFF# PR5119 95.3KOhm 1% FB=1.24V A VSUS_ON PR5120 100KOhm PR5124 100KOhm 63 VSUS_ON_PWR ENBL PR5121 1KOhm r0402 PCMCIA Title : POWER_SYSTEM VSUS_ON_PWR ASUSALPHATeK COMPUTER INC Size Date: Engineer: Amos Yu Project Name Custom 1 1 TPC28TTPC28TTPC28T PT5117PT5118PT5119 OUT GND TPC28TTPC28TTPC28TTPC28T PT5113PT5114PT5115PT5116 IN PR5118 845KOhm 1% 1 A +5VA Imax=100mA PU5101 2 1MM_OPEN_5MIL +12VSUS PC5114 0.1UF/25V MLCC/+80%-20% TPC28TTPC28TTPC28T PT5107PT5108PT5109 +3VO AC_BAT_SYS +5VO 1 +5VAO TPC28T PT5112 TPC28TTPC28TTPC28TTPC28T PT5103PT5104PT5105PT5106 TPC28T PT5111 PJP5102 TPC28T PT5110 Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet 51 of 57 AC_BAT_SYS 2 PCE5201 27UF/25V 1 G D S 1 +VCCP 2 2 2 PC5206 0.1UF/25V MLCC/+/-10% 100KOhm 18.7KOhm 1% 2 1 PC5212 0.01UF/50V MLCC/+/-10% PR5200 0Ohm r0402 PR5215 110KOhm 1% 2 PC5213 0.1UF/50V MLCC/+/-10% 1 PR5217 47KOhm 1% B 2 B 1 PR5216 75KOhm 1% + 3MM_OPEN_5MIL PR5209 0Ohm r0402 @ 60 1.05V_1.5V_PWRGD + PCE5203 150UF/4V PANASONIC/EEFCX0G151R c7343d_h87 @ 1% (070129) OCP 7.5A PR5213 PR5214 (070129) OCP 6.8A SUSB#_PWR 1% PC5209 0.1UF/25V MLCC/+/-10% VREF = 0.9V C PC5211 0.01UF/50V MLCC/+/-10% ISL6227CAZ_T PJP5202 PR5206 2KOhm (6A) PD5202 FS1J4TP 1 1 3MM_OPEN_5MIL PCE5200 150UF/4V PANASONIC/EEFCX0G151R c7343d_h87 2 10 11 12 13 14 PL5201 3.8UH Irat=6A PJP5204 SHORT_PIN GND LGATE1 PGND1 PHASE1 UGATE1 BOOT1 ISEN1 EN1 VOUT1 VSEN1 OCSET1 SOFT1 DDR VIN PR5212 100KOhm 1% VCC LGATE2 PGND2 PHASE2 UGATE2 BOOT2 ISEN2 EN2 VOUT2 VSEN2 OCSET2 SOFT2 PG2/REF PG1 PQ5204 SI4800BDY 1 PC5210 0.01UF/50V MLCC/+/-10% TPC28T PT5202 2 1% PR5211 0Ohm r0402 PC5203 0.1UF/50V MLCC/+/-10% 1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 2 PC5208 0.01UF/50V MLCC/+/-10% 1 PR5203 0Ohm PU5200 PR5208 6.65KOhm 1% 2 PC5204 0.1UF/50V MLCC/+/-10% G PR5205 2KOhm 1 PR5210 9.76KOhm 1% 51,53,54,61,63 +1.05VO D PR5207 0Ohm r0402 @ PR5204 0Ohm 2 + PJP5203 2 PC5207 0.1UF/25V MLCC/+/-10% C + PC5205 4.7UF/6.3V MLCC/+/-20% c0805_h57 S 3MM_OPEN_5MIL (070129) For power rating SHORT_PIN 1 PCE5206 100UF/2.5V PANASONIC/EEFCD0E101R c7343d_h75 @ + PJP5201 G PCE5204 100UF/2.5V PANASONIC/EEFCD0E101R c7343d_h75 PQ5202 SI4800BDY D PL5200 3.8UH Irat=6A PJP5200 +1.5VS S 3MM_OPEN_5MIL (6A) PQ5203 SI4800BDY 2 PD5200 FS1J4TP 1 1 PC5202 0.1UF/50V MLCC/+/-10% PCE5202 27UF/25V PR5202 10Ohm S PJP5205 PD5201 RB717F D +1.5VO PR5201 4.7Ohm SI4800BDY G + TPC28T PT5201 2 +5VO PQ5201 D PC5201 0.1UF/25V MLCC/+/-10% D PC5200 0.22UF/25V MLCC/+/-20% +3VS PR5218 100KOhm TPC28T PT5218 TPC28T PT5219 TPC28T PT5220 TPC28T PT5221 TPC28T PT5200 TPC28T PT5203 TPC28T PT5204 TPC28T PT5205 TPC28T PT5206 TPC28T PT5207 TPC28T PT5208 TPC28T PT5209 MCH_OK 43,50 1 1 1 1 1 +1.5VO +1.5VS +1.05VO PR5219 100KOhm 1 +3VO D +1.05VO 1 B TPC28T PT5222 TPC28T PT5223 TPC28T PT5224 TPC28T PT5225 TPC28T PT5210 TPC28T PT5211 TPC28T PT5212 TPC28T PT5213 TPC28T PT5214 TPC28T PT5215 TPC28T PT5216 TPC28T PT5217 1 1 1 1 1 PQ5205 PMBS3904 S G +VCCP 1 A PR5221 10KOhm 1% A E PCMCIA 2 PC5214 0.22UF/16V MLCC/+/-10% @ PQ5200 2N7002 11 C PR5220 4.7KOhm r0402_h16 1% Title : POWER_I/O_1.5VS & 1.05VS ASUSALPHATeK COMPUTER INC Size Amos Yu Project Name Custom Date: Engineer: Rev TERESA 1.1 Sheet Tuesday, February 06, 2007 52 of 57 2 +5VO AC_BAT_SYS PC5318 1UF/10V MLCC/+/-10% 2 +1.8V PJP5303 2 PC5316 10UF/10V MLCC/+80-20% c1206_h49 PCE5301 100UF/2.5V PANASONIC/EEFCD0E101R PC5317 2200PF/50V MLCC/+/-10% @ + SHORT_PIN 1 PD5301 FS1J4TP PC5307 0.1UF/25V MLCC/+/-10% C FB: 0.7V PR5314 0Ohm r0402 PC5315 10UF/6.3V MLCC/+/-10% c0805_h57 PR5313 10KOhm 1% @ 80mil B +1.8VO TPC28T PT5320 TPC28T PT5319 PT5314 PT5315 PT5316 PT5313 TPC28T PT5312 TPC28T PT5311 TPC28T PT5310 1 TPC28T PT5309 TPC28T PT5318 +1.8V +0.9VO TPC28T PT5317 TPC28T TPC28T PT5308 TPC28T TPC28T PT5307 TPC28T TPC28T PT5306 TPC28T TPC28T PT5305 TPC28T PT5304 PC5310 10UF/6.3V MLCC/+/-10% c0805_h57 TPC28T PT5303 TPC28T PT5302 +0.9VS PR5302 15.8KOhm 1% @ PC5311 MLCC/+/-10% 4700PF/50V @ TPC28T PT5300 TPC28T PT5324 TPC28T PT5323 2 AVDD PC5306 0.1UF/25V MLCC/+/-10% PC5314 10UF/6.3V MLCC/+/-10% c0805_h57 PC5320 10UF/6.3V MLCC/+/-10% c0805_h57 PC5313 0.1UF/25V MLCC/+/-10% c0805 TPC28T PT5322 1 1 3MM_OPEN_5MIL B (2A) TPC28T PT5321 PJP5302 (6A) 2 2 2 2 PR5311 10Ohm 1 PC5312 4700PF/50V MLCC/+/-10% PR5310 100KOhm 1% PJP5300 1 PC5309 1UF/25V MLCC/+80%-20% c0805_h57 3MM_OPEN_5MIL PR5306 12Ohm @ PQ5301 SI4800BDY 80mil 1 3MM_OPEN_5MIL PL5300 3.8UH Irat=6A PR5316 0Ohm r0402 @ PC5319 4700PF/50V MLCC/+/-10% @ +0.9VO +0.9VS PC5308 0.22UF/10V MLCC/+/-10% 2 +1.8VO (070115)solve current leakage PR5317 22KOhm 1% @ DL BST LX DH VIN OUT FB 2 1 PU5300 MAX8632ETI PR5309 36.5KOhm 1% PC5305 0.033UF/16V MLCC/+/-10% TON OVP/UVP REF ILIM POK1 POK2 STBY# PC5304 0.1UF/50V MLCC/+/-10% S SUSC#_PWR 2 21 20 19 18 17 16 15 G PR5304 22KOhm 1% C PJP5301 TPC28T PT5301 D GND2 TPO SHDN# AVDD SKIP# GND1 PGND1 VDD SS VTTS VTTR PGND2 VTT VTTI REFIN 2 60 DDR_PWRGD SUSB#_PWR +1.8VO PC5303 4.7UF/6.3V MLCC/+/-20% c0805_h57 PR5305 0Ohm 10 11 12 13 14 AVDD 29 28 27 26 25 24 23 22 PR5307 0Ohm r0402 @ PR5308 0Ohm r0402 51,52,54,61,63 + 1 PC5300 0.033UF/16V MLCC/+/-10% S PD5300 RB751V-40 1 2 PQ5300 SI4800BDY G 61,63 SUSC#_PWR PC5302 1UF/6.3V MLCC/+/-10% D PR5303 0Ohm r0402 @ PR5300 300KOhm 1% D AVDD 1 2 1 PCE5300 27UF/25V SUSB#_PWR PC5301 0.1UF/25V MLCC/+/-10% D PR5301 10Ohm PR5312 0Ohm r0402 @ PR5318 0Ohm r0402 A A PCMCIA Title : POWER_I/O_DDR & VTT ASUSALPHATeK COMPUTER INC Size Amos Yu Project Name Custom Date: Engineer: Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet 53 of 57 +3VAO +3VA TPC28T PT5406 TPC28T PT5407 PJP5400 1 2 1 +3VAO 1MM_OPEN_5MIL D D TPC28T PT5400 Vref = 1.24V +3VAO PU5401 1 MIC5235YM5 2 PD5402 MMBZ5228BPT @ 2 PR5405 10KOhm 1% Colay PD5401 UDZS5.1B PC5404 10UF/6.3V MLCC/+/-10% c0805_h57 EN NC or ADJ PR5404 16.9KOhm 1% GND PC5405 1UF/25V MLCC/+80%-20% c0805_h57 Imax=100mA OUT IN 1 AC_BAT_SYS C C +2.5VS PJP5403 PJP5404 SD# Vref=1.215V PC5407 1UF/6.3V MLCC/+/-10% 2 1MM_OPEN_5MIL PR5415 14.7KOhm 1% PC5408 4.7UF/6.3V MLCC/+/-10% FB VOUT GND +2.5VS PT5411 TPC28T +2.5VO VIN 1 PR5416 13.7KOhm 1% (0.15A) PC5409 10UF/10V MLCC/+80-20% c1206_h49 @ B PC5410 10UF/10V MLCC/+80-20% c1206_h49 @ PC5406 0.022UF/16V MLCC/+/-10% c0402 B 1 SUSB#_PWR 51,52,53,61,63 PT5412 TPC28T PR5414 560KOhm 1% PT5410 TPC28T PU5402 SI9183DT PT5409 TPC28T 2 1MM_OPEN_5MIL 1 +3V GND +RTC_PWR +5VAO PU5403 3.086V VOUT GND FB +RTC_PWR SD# SI9183DT Vref=1.215V PC5412 1UF/16V MLCC/+/-20% 2 A PR5418 154KOhm PR5417 1% 100KOhm r0402_h16 1% VIN A PC5411 4.7UF/6.3V MLCC/+/-10% PCMCIA Title : POWER_I/O_+3VA & +2.5V ASUSALPHATeK COMPUTER INC Size Amos Yu Project Name Custom Date: Engineer: Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet 54 of 57 PT5701 TPC28T PJP5704 SHORT_PIN PT5702 TPC28T POWER PATH & BAT_LEARN AC_BAT_SYS_IN (070131) For EMI issue PJP5705 SHORT_PIN PT5730 TPC28T AC_BAT_SYS_OUT 1 TPC28T AC_BAT_SYS PR5702 18KOhm 1% PQ5702 PC5701 0.01UF/50V MLCC/+/-10% PL5703 150Ohm/100Mhz D TPC8107 BAT PT5733 TPC28T BAT 2 TPC28T PT5717 TPC28T PT5718 TPC28T PT5719 TPC28T PT5720 BAT_CON PT5732 TPC28T D TPC28T G TPC28T S 1 TPC28T PR5701 20mOHM r1508 1% D G TPC8107 PD5700 1SS355 TPC28T D TPC8107 G S PT5731 TPC28T PT5710 PT5709 PT5708 D PT5707 1 PT5706 TPC28T TPC28T 1 TPC28T TPC28T A/D_DOCK_IN PQ5701 PQ5700 PT5705 PT5704 PC5700 0.047UF/50V MLCC/+/-10% PT5703 A/D_DOCK_IN S PT5700 30,41,59 PL5702 150Ohm/100Mhz CHG_PDL PR5700 6.8KOhm 1% CHG_PDS CHG_SRC TPC28T PT5711 CHG_SRC CHG_PDS PC5702 0.1UF/25V MLCC/+80%-20% AC_BAT_SYS_OUT PC5703 0.1UF/25V MLCC/+80%-20% AC_BAT_SYS_IN 1 1 PC5718 100PF/50V MLCC/+/-5% PC5719 100PF/50V MLCC/+/-5% 2 PCE5700 27UF/25V PC5712 0.047UF/50V MLCC/+/-10% CHG_GND B MAX8725_LDO 3 D PQ5707 2N7002 G AC_APR_UC PQ5721 47K TS# D PQ5710 2N7002 11 G S PC5716 0.22UF/16V MLCC/+/-10% C E PR5721 15KOhm 1% 41,59 PR5725 4.7KOhm @ PR5724 100KOhm 2 S S MAX8725_LDO G MAX8725_LDO PR5722 4.7KOhm 1% PQ5703 2N7002 11 11 CHG_EN# D S PKPRES# PR5723 100KOhm 1% G PC5715 1UF/16V MLCC/+80%-20% 3 PQ5706 2N7002 TPC28T PT5724 29 + 1 2 10KOhm SHORT_PIN PJP5703 PD5702 FS1J4TP SI4800BDY SHORT_PIN PQ5711 PKPRES# 29,30 BAT (3S#/4S) D 11 PRECHG 2 S 29 PC5717 0.1UF/25V MLCC/+/-10% 8 PJP5702 29 28 27 26 25 24 23 22 PR5717 20KOhm 1% PR5716 10KOhm 1% PC5714 0.1UF/25V MLCC/+/-10% PC5710 1UF/16V MLCC/+80%-20% PC5709 1UF/16V MLCC/+80%-20% 2 1 PR5715 30KOhm 1% 2 G PR5714 68.1KOhm 1% 1 11 PQ5705 2N7002 @ (070131) For EMI issue PR5706 25mOHM r1508 1% BATSEL_2P# D 2 AD_IINP PR5713 1.91KOhm 1% PL5700 10UH Irat=4.4A CHG_CCS CHG_CCV 10 11 CHG_CCI 12 13 PR5711 14 3.683V PR5712 36.5KOhm 1% @ B 1.594V 1.805V TPC28T PT5714 PQ5704 SI4431BDY MAX8725ETI 1 0.181V PR5710 16.5KOhm 1% PT5729 TPC28T PT5728 TPC28T 1 PT5727 TPC28T Precgarge current=150mA 2 2 VICTL< 0.8V or DCIN < 7V >Charger Disable PR5709 40.2KOhm 1% S PR5708 10KOhm 1% 21 20 19 18 17 16 15 DLOV DLO PGND CSIP CSIN BATT GND1 G PR5707 13.3KOhm 1% PC5707 1UF/25V MLCC/+80%-20% c0805_h57 D Mode pin : Vmode > 2.8V (trie to LDO pin) > Cells 2.0 > Vmode > 1.6V (floating) > Cells 0.8 > Vmode (trie to GND) > Learning mode 29 PC5708 4.7UF/25V MLCC/+/-20% c0805_h57 MAX8725_REF DCIN LDO ACIN REF GND/PKPRES# ACOK MODE PC5711 0.01UF/50V MLCC/+/-10% Vbatt = Cell * { Vref +[ (VCTL- 1.8V) / 9.52 ] } VCTL= 1.594V => Vbatt = 4.2V (4.20186V) IINP CLS ICTL VCTL CCI CCV CCS PU5700 REF : 4.2235V LDO : 5.4V PR5703 33Ohm r0805_h24 GND2 PDL PDS CSSP CSSN SRC DHI DHIV MAX8725_REF PR5704 100KOhm 1% TPC28T PT5713 CHG_GND D => Ichg = 1.5A G PR5705 100KOhm PD5701 1SS355 MAX8725_LDO S Rsense(CHG)=0.025 ohm Charge Current Ichg = [0.075V/Rsense(CHG)]*[VICTL/3.6V] PC5706 1UF/25V MLCC/+/-10% CHG_GND PT5712 TPC28T C + PCE5701 27UF/25V MAX8725_LDO 1% A/D_DOCK_IN A/D_DOCK_IN => R5708=10K,R5714=68.1K VICTL= 1.805V PC5704 0.1UF/25V MLCC/+/-10% Adapter Iin(max) = [0.075V/Rsense(ADin)]*[VCLS/VREF] Rsense(ADin)=0.02 ohm VCLS= 3.683V => Iin(max)=3.27A => Constant Power = 19 * 3.27 = 62.13W PC5713 0.1UF/25V MLCC/+80%-20% C PC5705 0.1UF/25V MLCC/+/-10% AC_BAT_SYS CHG_PDL AC_IN Threshold 2.048Vmax A/D_DOCK_IN > 17.44V active (070129) B S A UMC4N @ PR5726 470KOhm D PQ5720 2N7002 11 @ PCMCIA Title : Size Custom Date: Engineer: ASUSALPHATeK COMPUTER INC S G PR5720 470KOhm 3 2 G BATSEL_3S# 29 2N7002 11 C BAT_LEARN E BAT_LEARN PQ5709 29 D 47K 47K B 10K A POWER_CHARGER Amos Yu Project Name Rev TERESA Tuesday, February 06, 2007 1.1 Sheet 57 of 57 BATTERY IN DETECT ADAPTER IN DETECT D D +3VA A/D_DOCK_IN 29,30 PQ5900A UM6K1N TS# PC5901 0.1UF/25V MLCC/+80%-20% 1 41,57 PR5903 10KOhm 1% B PQ5902 E PMBS3904 PQ5900B UM6K1N C PR5900 100KOhm PR5902 237KOhm 1% 1 29,30 ACIN_OC# BAT_IN_OC# PR5901 100KOhm TPC28T PT5901 TPC28T PT5900 C PC5900 1000PF/25V MLCC/+/-5% C +2.5VREF B B +5VO 1 TPC28T PT5902 PR5904 1KOhm PC5902 1UF/10V MLCC/+/-10% 2 PC5905 1UF/10V MLCC/+/-10% LM4040BIM3 PU5901 1 1 TPC28T PT5904+2.5VREF A A PCMCIA Title : ASUSALPHATeK COMPUTER INC Size Date: POWER_DETECT Amos Yu Project Name Custom Engineer: Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet 59 of 57 D D POWER GOOD DETECTER +3VO +3VS PR6024 100KOhm FORCE_OFF# SHORTPIN PD6002 40,51 3V_5V_PWRGD PQ6010A UM6K1N C PQ6010B UM6K1N 2 @ PT6007 TPC28T @ SHORTPIN PJP6002 52 1.05V_1.5V_PWRGD SHORTPIN PJP6001 PR6021 560KOhm C PD6000 1SS355 PR6022 100KOhm 53 DDR_PWRGD @ 2 PJP6000 40,50 VRM_PWRGD 4,29,38,41,51 SUSB# 25,30,34,37,40,61 PC6007 4.7UF/6.3V MLCC/+/-10% RB751V_40 TPC28T PT6003 TPC28T PT6004 TPC28T PT6005 TPC28T PT6006 VRM_PWRGD DDR_PWRGD 3V_5V_PWRGD 1.05V_1.5V_PWRGD B B A A PCMCIA Title : ASUSALPHATeK COMPUTER INC Size Date: POWER_PROTECT Amos Yu Project Name Custom Engineer: Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet 60 of 57 SUSC#_PWR POWER G PC6100 0.1UF/25V MLCC/+/-10% SUSB#_PWR PR6101 1KOhm r0402 D 1 53,63 SUSC#_PWR (2.5A) PR6106 1KOhm r0402 1 +5V 1 PC6102 3900PF/50V MLCC/+/-10% TPC28T PT6119 TPC28T PT6109 PC6107 0.1UF/25V MLCC/+/-10% PR6102 0Ohm SUSC# 26,37,40 TPC28T PT6108 PC6101 0.01UF/50V MLCC/+/-10% DRAIN_2 SOURCE_3 SOURCE_4 GATE_2 TPC28T PT6105 TPC28T PT6114 FDW2501NZ PR6110 100KOhm 1% TPC28T PT6125 C E 10K B 47K PR6104 100KOhm 1% C E 47K (0.01A) B PQ6105 UMC4N SUSC#_PWR +12V 47K TPC28T PT6124 C TPC28T PT6123 +12VSUS 51,52,53,54,63 SUSB# 1 S D PR6100 10KOhm 1% 2 PQ6106 N DRAIN_1 SOURCE_1 SOURCE_2 GATE_1 1 TPC28T TPC28T PT6106 PT6107 C TPC28T PT6104 (0.5A) +3V 25,30,34,37,40,60 D +5VO TPC28T PT6103 1 +3VO TPC28T PT6102 PQ6100 PMN45EN TPC28T TPC28T PT6100 PT6101 SUSB#_PWR POWER SI4800BDY B PQ6108 N DRAIN_1 SOURCE_1 SOURCE_2 GATE_1 1 +5VO B PR6107 0Ohm TPC28T PT6118 +5VS (3.2A) PC6105 0.1UF/25V MLCC/+/-10% PR6108 100KOhm 1% TPC28T PT6121 E +12VS B PQ6104 UMC4N 10K B A PR6109 100KOhm 1% PCMCIA Title : POWER_LOAD SWITCH C E 47K 47K (0.01A) 47K C PC6106 0.033UF/16V MLCC/+/-10% TPC28T PT6122 SUSB#_PWR (2A) PC6104 0.01UF/50V MLCC/+/-10% TPC28T PT6120 +12VSUS PR6105 300KOhm 1% +3VS PC6103 0.1UF/25V MLCC/+/-10% TPC28T PT6117 DRAIN_2 SOURCE_3 SOURCE_4 GATE_2 FDW2501NZ A 1 TPC28T TPC28T PT6115 PT6116 TPC28T PT6113 G S D TPC28T PT6112 PQ6102 1 +3VO TPC28T PT6111 TPC28T PT6110 ASUSALPHATeK COMPUTER INC Size Date: Amos Yu Project Name Custom Engineer: Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet 61 of 57 A/D_DOCK_IN MAX8725 (Controllor) TPC8107 (SWITCH) AC_BAT_SYS D BAT D TPC8107 (SWITCH) SUSC#_PWR VSUS_ON MIC5235BM (Regulator) +12VSUS (100mA) UMC4N (SWITCH) +12V UMC4N (SWITCH) +12VS SUSB#_PWR +3VA +3VAO MIC5235BM (Regulator) +3VSUS +12V +3VO (3.0A) PMN451N (SWITCH) C TPS51020 FORCE_OFF# SUSC#_PWR +12VS (Controllor) SI4800BDY (SWITCH) SUSB#_PWR +3V (0.5A) +12V FDW2501NZ (SWITCH) +5V (2.5A) +12VS FDW2501NZ (SWITCH) +5VS (3.2A) +5VAO B +1.5VO +5VO C +2.5VREF LM4040BIM (Regulator) +5VSUS +5VO (6A) SI9183DT (Regulator) +2.5VS (0.1A) +3VS (2A) 3V_5V_PWRGD VSUS_ON +2.5VO SI9183DT (Regulator) +RTC_PWR B +1.5VS (6.0A) ISL6227CAZ (Controllor) SUSB#_PWR +1.05VO +VCCP (6.0A) 1.05V_1.5V_PWRGD +1.8VO +5VO SUSB#_PWR SUSC#_PWR MAX8632 (Controllor) +0.9VO +1.8V (6A) +0.9VS (1.0A) DDR_PWRGD +5VS & +3VS A A +VCORE (35A) CPU_VRON VR_VID0~VR_VID6, STP_CPU#, PM_DPRSLPVR, MCH_OK, PM_PSI#,VCCSENSE,VSSSENSE ISL6262CRZ (Controllor) PCMCIA Title : POWER_FLOWCHART VRM_PWRGD, CLK_PWR_GD# ASUSALPHATeK COMPUTER INC Size Amos Yu Project Name Custom Date: Engineer: Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet 62 of 57 D D AC_BAT_SYS AC_BAT_SYS 12,41,50,51,52,53,54,57 +3VA +3VA 4,12,22,29,37,38,40,41,54,59 +5VA +5VA 51 +5VO +5VO 51,52,53,59,61 +3VO +3VO 51,52,60,61 +3VSUS +3VSUS 18,19,20,25,29,30,34,35,40,51 +5VSUS +5VSUS 20,30,36,51 +3V 12,18,26,37,43,44,54,61 +3VS 4,5,7,9,11,12,13,14,15,19,20,21,22,25,26,27,28,29,30,33,37,40,43,50,52,60,61 FOR POWER TEST PJP6300 +3VA +3V +3VS 1 2 CPU_VRON_PWR 50 SGL_JUMP @PJP6301 1 2 SUSB#_PWR SUSB#_PWR 51,52,53,54,61 SGL_JUMP +12VSUS +12V +12VS +12VSUS 51,61 +12V 37,61 +12VS 12,13,22,33,37,61 +5V 16,30,36,37,44,61 @ PJP6302 C +5V 2 SUSC#_PWR SUSC#_PWR 53,61 SGL_JUMP C @ PJP6303 +5VS +5VS 4,13,19,20,21,22,28,29,30,34,37,38,50,61 +2.5VO +2.5VO 54 +2.5VS +2.5VS 9,37,54 +1.8VO +1.8VO 53 +1.8V +1.8V 7,10,14,15,16,37,53 +VCCP +VCCP 2,6,9,20,52 1 2 VSUS_ON_PWR VSUS_ON_PWR 51 SGL_JUMP @ +VCCP_AGTL+ +VCCP_AGTL+ 2,3,5,6,9 +VCCP_GMCH +VCCP_GMCH 9,10 +VCCP_ICH B +0.9VS BAT +2.5VREF +VCORE BAT_CON +RTC_PWR +VCCP_ICH 17,20 +0.9VS 16,37,53 BAT 30,57 +2.5VREF 59 +VCORE 3,50 B BAT_CON 41,57 +RTC_PWR 20,54 A A PCMCIA Title : POWER_SIGNAL ASUSALPHATeK COMPUTER INC Size Amos Yu Project Name Custom Date: Engineer: Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet 63 of 57 +5V_LED_BD +5VSUS_LED_BD 1 (070201)change into 80.6ohm Changed to AMBER & GREEN LED D R7002 80.6Ohm Changed to AMBER & GREEN LED +5VS_HD_LED R7001 680Ohm D +5V_LED_BD R7004 150Ohm R7005 150Ohm LEFT & RIGHT Button remove to TP BOARD 1 Change to Green LED Change to AMBER LED HDD LED7003 ORANGE&GREEN + WLAN LED7001 ORANGE LED7004 GREEN PWR_LED#_LB New added SW for Teresa SUSPEND_LED#_LB SW7001 WLAN_LED#_LB HDD_LED#_LB 1000PF/50V C7006 1000PF/50V C7007 @ C7002 @ 1 C7004 @ C7001 C C7008 1000PF/50V @ SLIDE_SWITCH_3P 1000PF/50V @ C7008 Removed NP_NC1 2 NP_NC2 C CHG_LED#_LB C7004 C7006 Removed CHG_FULL_LED#_LB C7007 C7002 Removed WLAN_SW#_LB 3 2 + ORANGE GREEN ORANGE GREEN LED7002 ORANGE&GREEN CHG PWR (070117)change LED C7001 Removed 1000PF/50V 1000PF/50V @ LED_BD_GND LED_BD_GND LED_BD_GND LED_BD_GND LED_BD_GND LED_BD_GND CON to T/P remove to TP BOARD 070115 Change pin define +5VS_HD_LED LED_BD_GND IR receive module removed +5VSUS_LED_BD +5V_LED_BD CON7001 HDD_LED#_LB C7005 C7003 2 SIDE1 10 11 SIDE2 12 13 14 B B 1 WLAN_LED#_LB CHG_LED#_LB PWR_LED#_LB SUSPEND_LED#_LB WLAN_SW#_LB 10 CHG_FULL_LED#_LB 11 12 0.1UF/10V @ FPC_CON_12P 0.1UF/10V @ TO M/B LED_BD_GND LED_BD_GND H7001 H7002 NP_NC GND1 GND4 GND2 GND3 CR276X295D91N NP_NC1 GND5 NP_NC2 GND4 GND2 GND3 D91N&D98N A A LED_BD_GND LED_BD_GND DETAIL: Q PCMCIA DETAIL: S Title : LED Board ASUSALPHATeK COMPUTER INC Size Potter_Huang Project Name Custom Date: Engineer: Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet 70 of 57 TERESA SCHEMATIC V1.0 Content PAGE Content PAGE SYSTEM PAGE REF D C B D 99 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 33 34 35 36 37 38 40 41 43 44 45 CONTENT BLOCK DIAGRAM CELERON CPU (1) CELERON CPU (2) THERMAL SENSOR & FAN CLOCK GENERATOR Calistoga GMCH (1) Calistoga PCIE (2) Calistoga DDR2 (3) Calistoga POWER (4) Calistoga GND (5) Calistoga Strapping (6) LVDS & INVERTER CONNECTOR CRT CONNECTOR DDR2 SO-DIMM0 DDR2 SO-DIMM1 DDR2 ADDRESS TERMINATION ICH7-M (1/4) LPC/IDE/CPU IF ICH7-M (2/4) PCI/USB/DMI ICH7-M (3/4) PM/GPIOs ICH7-M (4/4) Power AUDIO CODEC-AD1986A AUDIO AMP MIC JACK ISA ROM NEWCARD MINI CARD WLAN CONTROL SATA HDD & ODD EC IT8511TE-1 EC IT8511TE-2/LED&TP CON MEDIA CARD SLOT LAN_RTL8100CL RJ45/RJ11/MDC USB CONN x3 DISCHARGE CIRCUIT SWITCH/LED POWER-ON SEQUENCE DC IN & BATT IN PCI CARDBUS RICOH R5C847 R5C847/PCMCIA SOCKET A SCREW HOLE 46 47 48 HISTORY POWER ON FLOWCHART GPIO SETTING POWER PAGE REF 50 51 52 53 54 57 59 60 61 62 63 POWER_VCORE POWER_SYSTEM POWER_I/O_1.5VS & 1.05VS POWER_I/O_DDR & VTT POWER_I/O_+3VAO & +2.5VS POWER_CHARGER POWER_DETECT POWER_PROTECT POWER_LOAD SWITCH POWER_FLOWCHART POWER_SIGNAL C DAUGHTER BOARD 70 LED BOARD B A A PCMCIA Title : Content & History ASUSALPHATeK COMPUTER INC Size Date: Horng Chou Project Name Custom Engineer: Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet 99 of 57 ... Engineer: Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet 12 of 57 CRT OUT (061206,EMI) Add L1307, L1308, L1309 (070205) tune performance changed to 09G023821009 0.082uH New addition for Teresa +5VS_CRT... Yonah CPU (2) ASUSALPHATeK COMPUTER INC Size Horng Chou Project Name Custom Date: Engineer: Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet of 57 Fan Speed Control +5VS +3VS +3VA +5VS +3VS +3VA... Do Not Stuff r0402 @ VSUS_ON R416 R415 1 R414 @ C407 R413 R412 T402 Do Not Stuff B 1 1 +3VS Rev TERESA 1.1 Tuesday, February 06, 2007 Sheet of 57 +VCCP_AGTL+ Control net Request R501 Net name