circuit design with vhdl mit press ebook
Circuit Design with VHDL Volnei A Pedroni TLFeBOOK Circuit Design with VHDL TLFeBOOK TLFeBOOK Circuit Design with VHDL Volnei A Pedroni MIT Press Cambridge, Massachusetts London, England TLFeBOOK 2004 Massachusetts Institute of Technology All rights reserved No part of this book may be reproduced in any form by any electronic or mechanical means (including photocopying, recording, or information storage and retrieval) without permission in writing from the publisher This book was set in Times New Roman on 3B2 by Asco Typesetters, Hong Kong and was printed and bound in the United States of America Library of Congress Cataloging-in-Publication Data Pedroni, Volnei A Circuit design with VHDL/Volnei A Pedroni p cm Includes bibliographical references and index ISBN 0-262-16224-5 (alk paper) VHDL (Computer hardware description language) Electronic circuit design System design I Title TK7885.7.P43 2004 621.39 5—dc22 2004040174 10 TLFeBOOK To Claudia, Patricia, Bruno, and Ricardo TLFeBOOK TLFeBOOK Contents Preface xi I CIRCUIT DESIGN 1 Introduction 1.1 About VHDL 1.2 Design Flow 1.3 EDA Tools 1.4 Translation of VHDL Code into a Circuit 1.5 Design Examples 3 Code 2.1 2.2 2.3 2.4 2.5 2.6 Structure Fundamental VHDL Units LIBRARY Declarations ENTITY ARCHITECTURE Introductory Examples Problems 13 13 13 15 17 17 22 Data 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 Types Pre-Defined Data Types User-Defined Data Types Subtypes Arrays Port Array Records Signed and Unsigned Data Types Data Conversion Summary Additional Examples Problems 25 25 28 29 30 33 35 35 37 38 38 43 Operators and Attributes 4.1 Operators 4.2 Attributes 4.3 User-Defined Attributes 4.4 Operator Overloading 47 47 50 52 53 TLFeBOOK viii Contents 4.5 4.6 4.7 4.8 GENERIC Examples Summary Problems 54 55 60 61 65 65 67 69 78 81 84 Concurrent Code 5.1 Concurrent versus Sequential 5.2 Using Operators 5.3 WHEN (Simple and Selected) 5.4 GENERATE 5.5 BLOCK 5.6 Problems Sequential Code 6.1 PROCESS 6.2 Signals and Variables 6.3 IF 6.4 WAIT 6.5 CASE 6.6 LOOP 6.7 CASE versus IF 6.8 CASE versus WHEN 6.9 Bad Clocking 6.10 Using Sequential Code to Design Combinational Circuits 6.11 Problems 91 91 93 94 97 100 105 112 113 114 118 121 Signals and Variables 7.1 CONSTANT 7.2 SIGNAL 7.3 VARIABLE 7.4 SIGNAL versus VARIABLE 7.5 Number of Registers 7.6 Problems 129 129 130 131 133 140 151 State 8.1 8.2 8.3 159 159 160 168 Machines Introduction Design Style #1 Design Style #2 (Stored Output) TLFeBOOK Contents 8.4 8.5 ix Encoding Style: From Binary to OneHot Problems 181 183 Additional Circuit Designs 9.1 Barrel Shifter 9.2 Signed and Unsigned Comparators 9.3 Carry Ripple and Carry Look Ahead Adders 9.4 Fixed-Point Division 9.5 Vending-Machine Controller 9.6 Serial Data Receiver 9.7 Parallel-to-Serial Converter 9.8 Playing with a Seven-Segment Display 9.9 Signal Generators 9.10 Memory Design 9.11 Problems 187 187 191 194 198 202 208 211 212 217 220 225 II SYSTEM DESIGN 231 10 Packages and Components 10.1 Introduction 10.2 PACKAGE 10.3 COMPONENT 10.4 PORT MAP 10.5 GENERIC MAP 10.6 Problems 233 233 234 236 244 244 251 11 Functions and Procedures 11.1 FUNCTION 11.2 Function Location 11.3 PROCEDURE 11.4 Procedure Location 11.5 FUNCTION versus PROCEDURE Summary 11.6 ASSERT 11.7 Problems 253 253 256 265 266 270 270 271 12 Additional System Designs 12.1 Serial-Parallel Multiplier 12.2 Parallel Multiplier 275 275 279 TLFeBOOK .. .Circuit Design with VHDL TLFeBOOK TLFeBOOK Circuit Design with VHDL Volnei A Pedroni MIT Press Cambridge, Massachusetts London, England TLFeBOOK 2004 Massachusetts Institute... reviews and comments TLFeBOOK I CIRCUIT DESIGN TLFeBOOK TLFeBOOK 1.1 Introduction About VHDL VHDL is a hardware description language It describes the behavior of an electronic circuit or system, from... A Circuit design with VHDL/ Volnei A Pedroni p cm Includes bibliographical references and index ISBN 0-262-16224-5 (alk paper) VHDL (Computer hardware description language) Electronic circuit design