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Chapter Memory Management 4.1 Basic memory management 4.2 Swapping 4.3 Virtual memory 4.4 Implementation issues 4.5 Segmentation CuuDuongThanCong.com https://fb.com/tailieudientucntt Memory Management CuuDuongThanCong.com https://fb.com/tailieudientucntt Memory Management • Ideally programmers want memory that is – large – fast – non volatile • Memory hierarchy – small amount of fast, expensive memory – cache – some medium-speed, medium price main memory – gigabytes of slow, cheap disk storage • Memory manager handles the memory hierarchy CuuDuongThanCong.com https://fb.com/tailieudientucntt Basic Memory Management Logical vs Physical Address Space • The concept of a logical address space that is bound to a separate physical address space is central to proper memory management – Logical address – generated by the CPU; also referred to as virtual address – Physical address – address seen by the memory unit CuuDuongThanCong.com https://fb.com/tailieudientucntt Basic Memory Management Monoprogramming without Swapping or Paging Three simple ways of organizing memory - an operating system with one user process CuuDuongThanCong.com https://fb.com/tailieudientucntt Basic Memory Management Multiprogramming with Fixed Partitions • Fixed memory partitions – (a) separate input queues for each partition – (b) single input queue CuuDuongThanCong.com https://fb.com/tailieudientucntt Basic Memory Management Dynamic relocation using a relocation register CuuDuongThanCong.com https://fb.com/tailieudientucntt Basic Memory Management Relocation and Protection • Cannot be sure where program will be loaded in memory – address locations of variables, code routines cannot be absolute – must keep a program out of other processes’ partitions • Use base and limit values – address locations added to base value to map to physical addr – address locations larger than limit value is an error CuuDuongThanCong.com https://fb.com/tailieudientucntt Basic Memory Management Relocation and Protection • Relocation registers used to protect user processes from each other, and from changing operatingsystem code and data – Base register contains value of smallest physical address – Limit register contains range of logical addresses – each logical address must be less than the limit register – MMU maps logical address dynamically CuuDuongThanCong.com https://fb.com/tailieudientucntt Basic Memory Management HW address protection with base and limit registers 10 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Implementation Issues Separation of Policy and Mechanism Page fault handling with an external pager CuuDuongThanCong.com https://fb.com/tailieudientucntt 42 Virtual Memory Segmentation 43 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Segmentation (1) • One-dimensional address space with growing tables • One table may bump into another CuuDuongThanCong.com https://fb.com/tailieudientucntt 44 Virtual Memory Segmentation (2) Allows each table to grow or shrink, independently 45 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Segmentation (3) Comparison of paging and segmentation CuuDuongThanCong.com https://fb.com/tailieudientucntt 46 Virtual Memory Implementation of Pure Segmentation (4) (a)-(d) Development of checkerboarding (e) Removal of the checkerboarding by compaction 47 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Segmentation with Paging: Pentium (1) 48 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Segmentation with Paging: Pentium (2) A Pentium selector GDT (Global Descriptor Table), LDT (Local Descriptor Table) 49 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Segmentation with Paging: Pentium (3) 50 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Segmentation with Paging: Pentium (4) • Pentium code segment descriptor • Data segments differ slightly 51 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Segmentation with Paging: Pentium (5) 52 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Segmentation with Paging: Pentium (6) Conversion of a (selector, offset) pair to a linear address 53 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Segmentation with Paging: Pentium (7) Mapping of a linear address onto a physical address 54 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Segmentation with Paging: Pentium (8) 55 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Segmentation with Paging: Pentium (9) Level Protection on the Pentium 56 CuuDuongThanCong.com https://fb.com/tailieudientucntt ... speed up paging 30 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Page Fault If there is a reference to a page, Just not in memory: page fault, Trap to operating system: Get... process 34 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Page Replacement 35 CuuDuongThanCong.com https://fb.com/tailieudientucntt Virtual Memory Page Replacement Algorithms 36 ... https://fb.com/tailieudientucntt Swapping (3) • (a) Allocating space for growing data segment • (b) Allocating space for growing stack & data segment 13 CuuDuongThanCong.com https://fb.com/tailieudientucntt

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