Hệ Nhúng: introduction to embedded systems a cyber physical systems approach

Copyright c 2011-2012 Edward Ashford Lee & Sanjit Arunkumar Seshia All rights reserved First Edition, Version 1.08 ISBN 978-0-557-70857-4 Please cite this book as: E A Lee and S A Seshia, Introduction to Embedded Systems - A Cyber-Physical Systems Approach, LeeSeshia.org, 2011 This book is dedicated to our families Contents Preface xi Introduction 1.1 Applications 1.2 Motivating Example 1.3 The Design Process 1.4 Summary 15 I Modeling Dynamic Behaviors 17 Continuous Dynamics 19 2.1 2.2 2.3 Newtonian Mechanics Actor Models Properties of Systems 20 25 29 2.4 2.5 Feedback Control Summary 32 37 Exercises 38 v Discrete Dynamics 41 3.1 Discrete Systems 42 3.2 The Notion of State 46 3.3 Finite-State Machines 47 3.4 Extended State Machines 57 3.5 Nondeterminism 63 3.6 Behaviors and Traces 66 3.7 Summary 70 Exercises 71 Hybrid Systems 77 4.1 Modal Models 78 4.2 Classes of Hybrid Systems 82 4.3 Summary 98 Exercises 100 Composition of State Machines 107 5.1 Concurrent Composition 109 5.2 Hierarchical State Machines 124 5.3 Summary 128 Exercises 130 Concurrent Models of Computation 133 6.1 Structure of Models 135 6.2 Synchronous-Reactive Models 136 6.3 Dataflow Models of Computation 146 6.4 Timed Models of Computation 160 6.5 Summary 168 Exercises 169 vi Lee & Seshia, Introduction to Embedded Systems II Design of Embedded Systems 175 Embedded Processors 177 7.1 Types of Processors 179 7.2 7.3 Parallelism 187 Summary 204 Exercises 205 Memory Architectures 207 8.1 Memory Technologies 208 8.2 Memory Hierarchy 210 8.3 Memory Models 219 8.4 Summary 224 Exercises 225 Input and Output 227 9.1 9.2 I/O Hardware 228 Sequential Software in a Concurrent World 240 9.3 The Analog/Digital Interface 250 9.4 Summary 259 Exercises 260 10 Multitasking 269 10.1 Imperative Programs 272 10.2 Threads 276 10.3 Processes and Message Passing 289 10.4 Summary 294 Exercises 295 11 Scheduling 297 11.1 Basics of Scheduling 298 Lee & Seshia, Introduction to Embedded Systems vii 11.2 Rate Monotonic Scheduling 304 11.3 Earliest Deadline First 309 11.4 Scheduling and Mutual Exclusion 314 11.5 Multiprocessor Scheduling 319 11.6 Summary 323 Exercises 325 III Analysis and Verification 331 12 Invariants and Temporal Logic 333 12.1 Invariants 335 12.2 Linear Temporal Logic 337 12.3 Summary 345 Exercises 347 13 Equivalence and Refinement 351 13.1 Models as Specifications 352 13.2 Type Equivalence and Refinement 354 13.3 Language Equivalence and Containment 356 13.4 Simulation 362 13.5 Bisimulation 370 13.6 Summary 372 Exercises 373 14 Reachability Analysis and Model Checking 379 14.1 Open and Closed Systems 380 14.2 Reachability Analysis 382 14.3 Abstraction in Model Checking 389 14.4 Model Checking Liveness Properties 392 14.5 Summary 397 viii Lee & Seshia, Introduction to Embedded Systems Exercises 400 15 Quantitative Analysis 401 15.1 Problems of Interest 403 15.2 Programs as Graphs 405 15.3 Factors Determining Execution Time 410 15.4 Basics of Execution Time Analysis 416 15.5 Other Quantitative Analysis Problems 425 15.6 Summary 427 Exercises 429 IV Appendices 431 A Sets and Functions 433 A.1 Sets 433 A.2 Relations and Functions 434 A.3 Sequences 438 Exercises 441 B Complexity and Computability 443 B.1 Effectiveness and Complexity of Algorithms 444 B.2 Problems, Algorithms, and Programs 447 B.3 Turing Machines and Undecidability 449 B.4 Intractability: P and NP 455 B.5 Summary 459 Exercises 460 Bibliography 461 Notation Index 477 Index 479 Lee & Seshia, Introduction to Embedded Systems ix x Lee & Seshia, Introduction to Embedded Systems Notation Index x|t≤τ ¬ ∧ ∨ L(M) := VCC =⇒ Gφ Fφ Uφ Xφ La (M) λ B = {0, 1} N = {0, 1, 2, · · · } Z = {· · · , −1, 0, 1, 2, · · · } R R+ A⊆B restriction in time negation conjunction disjunction language assignment supply voltage implies globally eventually until next state language accepted by an FSM empty sequence binary digits natural numbers integers real numbers non-negative real numbers subset 29 50 50 50 68 51 230 338 340 341 342 341 359 360 433 433 433 433 433 434 477 NOTATION INDEX 2A 0/ A\B A×B (a, b) ∈ A × B A0 f: A→B f:A B g◦ f fn: A → A f (a) fˆ : 2A → 2B (A → B) BA πI πˆ I f |C A∗ AN / {0}, / {0, / {0}}, / ···} ω = {0, ω A A∗∗ ✷ 478 powerset empty set set subtraction cartesian product tuple singleton set function partial function function composition function to a power identity function image function set of all functions from A to B set of all functions from A to B projection lifted projection restriction finite sequences infinite sequences von Neumann numbers infinite sequences finite and infinite sequences empty cell 434 434 434 434 434 434 434 434 435 435 435 435 435 435 437 438 437 438 438 439 439 438 450 Lee & Seshia, Introduction to Embedded Systems Index ω-regular language, 361 n-tuple, 434 1080p, 185 32-bit architecture, 214, 219 3D graphics, 187 64-bit architecture, 214 8-bit architecture, 214 6800, 180 6811, 180 8051, 180 8080, 180 8086, 182 80386, 182 A-440, 38 abstract interpretation, 424, 426 abstraction, xiv, 12, 14, 116, 353, 389 acceleration, 21 acceleration of gravity, 91 acceptance cycle, 395 accepting computation, 450, 456 accepting state, 359, 361, 393, 450 accumulator, 188, 196 acquire a lock, 282 action, 51, 274 action-reaction law, 24 active high logic, 230, 233 active low logic, 230 actor, 26, 77, 108, 134, 164, 354 actor function, 146 actor model for state machines, 78 actor models, 25 Ada, 324 adaptive antennas, 200 ADC, 213, 251 adder, 28 address space, 211, 221 address translation, 211, 289 ADL, xix AGV, 93 Aiken, Howard H., 213 Airbus, 3, 145 Alcatel, 180 algorithm, 444 479 INDEX aliasing distortion, 258 alignment, 219 allocation, 222 alphabet, 360 ALU, 192 AMD, 179, 182, 187 AMI, 183 amplifier, 231 analog, 228, 251 analog comparator, 251 analog to digital converter, 251 analysis, 8, 331 Android, 284 anti-aircraft gun, API, 241, 276 Apple, 180, 284 application program interface, 276 arithmetic logic unit, 192 ARM, 180, 220 ARM CortexTM , 211, 213, 228, 241, 245, 262 ARM instruction set, 243 ARM Limited, 180 arrival of tasks, 300, 311, 313 arrival time, 301 assignment, 51, 83, 477 assignment rule, 435 assignment to a processor, 299 associative memory, 218, 219 asymptotic complexity, 446, 455 asynchronous, 146, 234 asynchronous composition, 109, 114, 247 Atmel, 180, 260 Atmel AVR, 9, 180, 235, 260 Atom, Intel, 179, 182 atomic operation, 14, 117, 118, 243, 247, 274, 280 480 atomic proposition, 337 ATSC, 185, 252, 280 audio, 183, 251 auto increment, 183 autocoding, 272 automata, 82 automated guided vehicle, 93 automatic variable, 223 automotive, 182 automotive safety, AVR, 180, 260 Băuchi automaton, 361, 393 Băuchi, Julius Richard, 361 balance equation, 150 bare iron, 272, 276 baseband processing, 182 basic block, 406 baud, 236 BCET, 403 BDD, 399 behavior, 67, 74, 357, 369, 376 Bell Labs, 58, 183, 399 best-case execution time, 403 BIBO stable, 31 big endian, 220 big O notation, 446 bijective, 436, 441 binary decision diagram, 399 binary digits, 433, 477 binary point, 201, 203 binary search, 445 bipolar transistor, 233 bisimilar, 371 bisimulates, 372 bisimulation, 363, 371 bisimulation relation, 371, 372 bit banding, 214 Lee & Seshia, Introduction to Embedded Systems INDEX bit-reversed addressing, 183 BlackBerry OS, 284 BLAST, 399 Blefuscu, 220 block, 216 block diagrams, 167 blocked, 300, 314 blocking reads, 157 blocking writes, 158 Bogen, Alf-Egil, 180 Boolean satisfiability, 399, 413, 457 boundary scan, 237 bounded buffers, 149 bounded liveness, 346 bounded model checking, 399 bounded-input bounded-output stable, 31 branching-time logic, 342 breakpoint, 237 brittle, xiv, 320 Broadcom, 180 bus, 238 bus arbiter, 239 bus master, 239 byte, 219 C data type, 235 C programming language, 189, 272 c54x, 195, 196 c55x, 199 c6000, 199 c62x, 199 c64x, 199, 201 c67x, 199 C#, 289 cache, 13, 204, 215, 414 cache constraints, 423 cache hit, 217 cache line, 216 cache miss, 215, 217 cache organization, 216 cache set, 215 calculus of communicating systems, 158 call edge, 408 call graph, 425 callback, 272 callee function, 408 caller function, 408 Cantor’s diagonal argument, 448, 454 carrier sense multiple access, 239 cartesian product, 434, 439, 478 cascade composition, 26, 119, 148 causal, 29 CCS, 158 CD, 180, 210, 251 CEGAR, 392, 399 cellular base stations, 200 central processing unit, 179 Centronics, 238 certificate, 456 certification, 381 CFG, 406 char, 219 chattering, 50, 52 chip, 178 chrominance, 186 Church, Alonzo, 452 Church-Turing thesis, 452, 455 circuit design, 110 circular buffer, 183, 188, 196 Cirrus Logic, 180 CISC, 195, 200 classical mechanics, 19 clock, 82, 110, 139 clock signal, 136, 162 closed system, 380, 383, 397 Lee & Seshia, Introduction to Embedded Systems 481 INDEX CMOS, 233 code generation, 272 codomain, 137, 251, 434 coil, 181 ColdFire, 180 color, 185, 197 color channels, 186 communicating sequential processes, 158 communication event, 135 compact disc, 251 compiler, 190 complete, 353 completeness, 456 complex instruction set computer, 195 complexity, 446 complexity class, 455 Complexity theory, 443 component, 134 compositional, 112, 116, 142 computability theory, 443 computable function, 452 computable set, 453 computably enumerable set, 453 computation tree, 69 computation tree logic, 342 computed branch, 192 concurrent, 134, 175, 187, 269 condition variable, 292 conditional branch, 192 conditional branch instruction, 194 conditioning filter, 253 conflict miss, 218 conjunction, 50, 338, 477 consistent, 152 constant time, 446 constructive, 143, 160, 163 consumer electronics, 200 482 contact, 181 content-addressable memory, 218 context switch time, 306 continuous, 42 continuous state, 84, 90, 91 continuous-time model of computation, 165 continuous-time signal, 21, 24, 25, 29, 43, 78, 79, 164 continuous-time system, 25 contrapositive, 339 control hazard, 194 control law, control system, control-flow graph, 406, 407 controller, 93 convolution, 256 cooperative multitasking, 279 coordination language, 145 core, 209 coroutines, 157 CortexTM , ARM, 211, 213, 228, 241, 245, 262 countable, 449 countably infinite, 449 counterexample, 339, 381, 392 counterexample-guided abstraction refinement, 392 counting semaphore, 293 CPS, xii, 1, 12 CPU, 179 critical path, 319, 320 critical section, 159, 282 crosswalk, 60, 63, 72 cryptographic algorithm, 405 CSMA, 239 CSP, 158 CTL∗ , 342 Lee & Seshia, Introduction to Embedded Systems INDEX cyber-physical system, xii, 1, 4, 12, 160, determinate, xiv, 57, 68, 137, 138, 294 228 deterministic, 56, 112, 140, 374, 451 cybernetics, deterministic Turing machine, 451, 455 cyberspace, device driver, 248, 284 cycle-accurate simulator, 425 DEVS, 162 Cypress Semiconductor, 180 DFS, 396 Cyrix, 182 differential equation, 9, 19, 77, 213 digital, 228 DAC, 252 digital signal, 251 Dallas Semiconductor, 180 digital signal processor, 182, 183 data hazard, 193 digital television, 200 dataflow, xiii, xix, 54, 120, 146, 159, 160 digital to analog converter, 252 dataflow analysis, 190 Dijkstra, Edsger W., 293 dB, 254 Dirac delta function, 256, 257 DB-25, 238 direct memory access, 239 DB-9, 234 direct-mapped cache, 217 DDF, 153 directed cycles, 32 DE, 162 discrete, 42, 44, 74 deadline, 298, 302, 326 discrete dynamics, 42, 47, 66 deadline monotonic, 324 discrete event, 43 deadlock, 149, 152, 283, 289, 317, 320 discrete signal, 44, 135 deallocate, 222 discrete state, 84 debugging, 237 discrete system, 42, 139 decibels, 254 discrete-event systems, 162 decidable, 153, 454 discrete-time Fourier transform, 255 decidable set, 453 disjunction, 50, 338, 477 decision problem, 448, 452, 453, 456 disk drive, 210, 211 decision procedure, 454, 456 disk drive controllers, 183 decode pipeline stage, 192 DM, 324 default transition, 53, 53, 57, 347 DMA, 239 defragmentation, 222 DMA controller, 239 delay, 30, 163 DoD, 324 delay line, 184 domain, 137, 434 delayed branch, 194 double, 219 delta function, 256, 257 DRAM, 208, 211, 213 design, 8, 175 driver-assist system, 182 design time, 299, 303 DSP, xix, 182, 183, 192, 195, 198, 200, 228 desired part, 253 Lee & Seshia, Introduction to Embedded Systems 483 INDEX DSP processors, 182 DSP1, 183 DTFT, 255 duty cycle, 230 DVD, 210 dynamic dataflow, 153 dynamic memory allocation, 222 dynamic priority, 302, 311, 325, 326 dynamic RAM, 208 dynamics, xiii, 12, 17, 19, 82 earliest deadline first, 311 earliest due date, 309 ECU, 402 EDD, 309 EDF, 311, 312, 325, 326 EDF*, 313 edge triggered, 245 EEPROM, 209 effective, 444 effectively computable, 449, 452, 455 EIA, 234 Eindhoven University of Technology, 293 electrical domain, 231 electrical isolation, 231 Electronics Industries Association, 234 Embedded Linux, 284 embedded software, xi embedded systems, xi empty cell, 450, 478 empty sequence, 360, 477 empty set, 434, 478 enabled, 48, 301 energy, 254 energy conservation, 50 energy:of a discrete-time signal, 255 engine controller, 190 484 environment, 45, 51, 63, 66, 93, 112, 116, 381 error signal, 32 error trace, 381 Esterel, 145 Esterel Technologies, 145 event queue, 162 event triggered, 45, 51, 263 eventually, 341, 477 exception, 240 execute pipeline stage, 192 execution action, 134 execution count, 416 execution time, 301 execution trace, 68, 72, 337, 362, 369 execution-time analysis, 402 exhaustive search, 142 explicit pipeline, 193 exponential time, 446 extended state machine, 57, 60, 83, 108, 111, 117, 125, 170, 273, 357 f=ma, 89 factorial time, 446 fairness, 279, 395 fast Fourier transforms, 195 fault handler, 43 feasibility analysis, 324 feasible path, 413 feasible schedule, 302, 305, 308 feature extraction, 182 feedback, 4, 29, 32, 123, 136, 149, 169 feedback control, fetch pipeline stage, 192 FFT, 183, 195 fidelity, 12, 37 field-programmable gate array, 204 FIFO, 219, 292 Lee & Seshia, Introduction to Embedded Systems INDEX file system, 284, 290 filtering, 182 final state, 359, 450 finally, 341 finish time, 301 finite and infinite sequences, 438, 478 finite impulse response, 183 finite sequences, 438, 448, 450, 452, 453, 478 finite-state machine, 47, 81, 337, 382, 449 FIR, 183, 184, 188, 195 two dimensional, 186 FireWire, 237 firing, 163 firing function, 138, 141, 146 firing rule, 147 firmware, 209 first-in, first-out, 219, 292 fixed point, 138, 141, 181 fixed priority, 302, 304, 306, 308, 325, 326 fixed-point number, 13, 201 fixed-point semantics, 138 flash memory, 180, 210, 229 FlexRay, 160 flight control, 145 flight envelope protection, flip flop, 214 floating-point, 199 floating-point standard, 203 fly-by-wire, font, 284 force, 21 formal specification, 334 formal verification, 15, 380, 397 forward Euler, 165 forwarding, 193 Fourier transform, 255 FPGA, 204 fragmentation, 222 frame, 182 frame rate, 280 free, 222 FreeRTOS, 284 Freescale, 180 Freescale 6811, 180 Freescale ColdFire, 180 frequency analysis, 182 FSM, 47, 134, 159, 245 fully-associative cache, 219 fully-dynamic scheduler, 299 fully-static scheduler, 299 function, 434, 478 function composition, 435, 478 function pointer, 242, 273, 275 function to a power, 478 game consoles, 280 games, 182, 187 garage counter, 57 garbage collection, 222 garbage collector, 222, 427 gasoline engine, 190 GB, 211 general-purpose computing, 178 general-purpose I/O, 230 general-purpose OS, 284 Geode, 179 geometric series identity, 102 get, 349 GHz, 182 gigabytes, 211 Gill, Helen, xii, global variable, 223, 241, 273, 282, 295, 409 globally, 340, 477 Lee & Seshia, Introduction to Embedded Systems 485 INDEX hold a lock, 282 Holzmann, Gerard, 399 Hopper, Grace M., 213 Horn’s algorithm, 311 HP-IB, 239 Hu level scheduling, 319 HVAC, 50 hybrid system, 9, 42, 78 hybrid systems modeling, 20 hysteresis, 50, 52, 71, 83, 232 Hz, 179 Google, 284 goto, 155 GPIB, 239 GPIO, 213, 230, 238, 251 GPU, 187, 201 graph, 435, 439 graphical user interface, 284 graphics, 183, 187 graphics processing unit, 187 gravity, 91 grayscale, 186 guard, 48 GUI, 284 Gulliver’s Travels, 220 H8, 180 halting computation, 450 halting problem, 410, 454 handheld device, 284 hard deadline, 302 hard real-time scheduling, 197, 302 hardware interrupt, 240 Harvard architecture, 183, 192, 211, 213 hash compaction, 399 heap, 222, 223, 275 heap analysis, 427 heartbeat, 394 heating element, 230 helicopter, 24 Hennessy, John, 180 Hertz, 179 heterogeneous multicore, 200 Hewlett Packard, 198, 239, 284 hexadecimal notation, 220 hierarchical FSM, 124, 247 higher-order actor, 155 history transition, 127 Hitachi H8, 180 486 I2 C, 237 I/O, 228 IBM, 180, 213 IBM PC, 182, 238 icons, 27 IDE, 228, 235 identity function, 435, 478 IEEE 1149.1, 237 IEEE 754, 200, 203, 219 IEEE floating point standard, 219 IEEE-1284, 238 IEEE-488, 239 ill formed, 141 ILP, 195, 423, 457 image, 387, 436 image computation, 387 image function, 435, 478 imperative, 126, 134, 154, 155, 189, 272, 298, 353 implicit path enumeration, 417 implies, 338, 477 importance, 324 impulse response, 255 inconsistent, 152 incremental garbage collection, 222 inductive coupling, 232 Lee & Seshia, Introduction to Embedded Systems INDEX industrial automation, 181, 241 inelastic, 91 Infineon Technologies, 180 infinite sequences, 438, 478 infinitely often, 344, 361, 395 initial segment, 146 initial state, 48, 55 initially at rest, 34 injective, 436 inlining, 409 insidious error, 287, 289, 292 instruction memory, 192 instruction set architecture, 178, 214 instruction-level parallelism, 195 instrumentation, 182, 187 int, 219 integer linear program, 423, 457 integers, 433, 477 integral equation, 19 integrality, 423 integrated development environment, 228 Intel, 187, 198, 284 Intel 80386, 182 Intel 8051, 180 Intel 8080, 180 Intel 8086, 182 Intel Atom, 179, 182 Intel x86, 178 intensity, 185 inter-integrated circuit, 237 interchange argument, 309, 311 interleaving semantics, 114, 116, 118 interlock, 193 interrupt, 117, 198, 236, 240, 251, 276, 285, 303, 308 interrupt controller, 213, 244 interrupt handler, 240 interrupt service routine, 240, 304 interrupt vector, 244 interrupt vector table, 244 intractable, 458 invariant, 11, 334, 335, 424 inverse, 437 IPET, 417 iPhone OS, 284 ISA, 178, 180, 182, 214, 243 ISA bus, 238, 239 ISR, 240, 304 IT, Jackson’s algorithm, 309 Java, 189, 222, 289 Jensen, E Douglas, 324 jiffy, 262, 279, 303 Joint Test Action Group, 237 Jonathan Swift, 220 JTAG, 237 Kahn process network, 156 Kahn, Gilles, 156 kernel, 284 kHz, 180 kinetic energy, 91 Kleene closure, 360 Kleene star, 360 Kleene, Stephen, 360 LabVIEW, 20, 54, 156, 160, 167, 170 ladder logic, 181 language, 68, 353, 357, 360, 393, 477 language accepted by an FSM, 359, 360, 361, 477 language containment, 14, 358, 359 language equivalence, 357 language refinement, 358 Lee & Seshia, Introduction to Embedded Systems 487 INDEX last-in, first-out, 220 localization reduction, 389, 392 lock, 281, 299 latch, 192 logarithmic time, 446 latency, 270 logic analyzer, 424 lateness, 303, 309, 311–313 logical address, 215 latest deadline first, 313 logical connectives, 338 law of conservation of bits, 202 logical execution time, 160 LCD display, 214 logical flow constraints, 419 LDF, 313 logical system, 12 LDM instruction, 243 loose bound, 403, 419 least-recently used, 219 low-level control, 93 level triggered, 245 LP, 419 LG, 180 LRU, 219 LIDAR, 182 LTI, 31, 253, 255 LIFO, 220 LTL, 337, 342, 359, 361, 377 lifted, 436, 438, 441 LTL formula, 339, 382 lifted projection, 438, 478 luminance, 186 Lilliput, 220 Luminary Micro, 213, 228, 229, 231, 245 linear phase, 196 Lustre, 145 linear program, 419 linear programming, 419 MAC, 239 linear search, 445 Mac OS X, 284 linear systems, 30 machine learning, 182 linear temporal logic, 337, 352, 353, 382, machine vision, 200 397 magnetic core memory, 209 linear time, 446 makespan, 303, 319, 326 linear time-invariant system, 31 malloc, 222, 275, 281, 283, 296 linear-time logic, 342 Mark I, 213 linked list, 273, 275, 292 marking, 159 Linux, 279, 284 Markov chain, 342 list scheduler, 319 Markov decision process, 342 little endian, 220 Mars Pathfinder, 314, 315 liveness property, 346, 392, 394 Marvell Technology Group, 180 LM3S8962, 229 mask ROM, 209 LM3S8962 controller, 213, 245 Masuoka, Fujio, 210 local variable, 221, 223, 273 matching game, 364, 371 localization, 7, MathScript, 167 MathWorks, 20, 160, 167 localization abstraction, 389 488 Lee & Seshia, Introduction to Embedded Systems INDEX MATLAB, 167 model, 12 model checking, 361, 380, 397 MATRIXx, 167 model of computation, 134, 272 McMillan, Kenneth, 399 model-order reduction, 23 Mealy machine, 58 modeling, 8, 17 Mealy, George H., 58 modem, 183, 234 mechanics, 20 modular, 112 media-access control, 239 modular exponentiation, 405 medical electronics, 182 moment of inertia tensor, 22 medical imaging, 180, 200 momentum, 90 memory addresses, 219 Moore machine, 58, 162 memory allocation, 284 Moore, Edward F., 58 memory consistency, 117, 286 motion control, 179 memory fragmentation, 222 motor, 230 memory hierarchy, 208, 210 Motorola, 180 memory leak, 222 Motorola 6800, 180 memory management unit, 215 Motorola ColdFire, 180 memory map, 211, 212 mph, 93 memory model, 219, 286 multi-issue instruction streams, 190 memory pipeline stage, 192 multicore, 200, 209, 298 memory protection, 221, 221, 284, 289 memory-mapped register, 213, 230, 231, 235, multiply-accumulate instruction, 196 multiprocessor scheduler, 298 240, 242, 245 multitasking, 270, 298 memoryless, 30, 167 multitasking operating system, 190 message passing, 284, 290, 296 multithreaded programming, 282 Microchip Technology, 180 music, 180 microcomputer board, 229 musical instrument digital interface, 237 microcontroller, 179, 228, 235 must-may analysis, 144 microkernel, 272, 284, 285, 303 mutex, 281, 284, 292, 293, 295, 299, 303, MicroSD, 214 335 Microsoft Windows, 284 mutual exclusion, 159, 281, 293, 294, 299, MIDI, 237 300, 314, 322, 353 MIPS, 180 MMU, 215, 289 NAND flash, 210 mobile operating system, 284 National Instruments, 20, 156, 160, 167 MoC, 134 National Science Foundation, xii, modal model, 81, 162 National Television System Committee, 185 natural numbers, 433, 448, 477 mode, 81, 84 Lee & Seshia, Introduction to Embedded Systems 489 INDEX NEC, 180, 183 observable trace, 68, 362 observer pattern, 272 negation, 50, 338, 477 Occam, 158 nested depth-first search, 396 ODE, 20, 42, 163 netbook, 179, 182 off-line scheduler, 299 network fabric, Ohm’s law, 231 network flow, 417 OMAP, 200 network stack, 284 OMAP4440, 201 neural impulse propagation, 232 omega-regular language, 361, 393 Newton’s cradle, 161 on-line scheduler, 299 Newton’s second law, 21, 89 one-to-one, 44, 393, 436 Newton’s third law, 24 onto, 436 Newtonian mechanics, 20 open collector, 232, 233, 234, 245 Newtonian time, 161 open drain, 233, 233 next state, 341, 477 open system, 380 no-op, 193 OpenMP, 288 noise, 253 operating system, 272, 284, 303 non-montonic, 320 operational semantics, 164 non-negative real numbers, 433, 477 operations research, 324 non-preemptive, 300 non-preemptive priority-based scheduler, 302 optical media, 210 optimal with respect to feasibility, 302, 304, non-volatile memory, 209, 210 306, 308, 311, 313 nonblocking write, 157 opto-isolator, 231 nondeterministic, 64, 114, 159, 353, 358 order preserving, 44 nondeterministic FSM, 64, 362, 366, 371, ordering, 299 455 ordinary differential equation, 20 nondeterministic Turing machine, 455 OS, 284 NOR flash, 210 OS X, 284 normally closed, 181 out-of-order execution, 193, 198, 244 normally open, 181 overflow, 202 Norwegian Institute of Technology, 180 NP, 456 P, 456 NP-complete, 413, 456 P versus NP, 458 NP-hard, 319, 423, 456 PA RISC processor, 198 NTSC, 185, 280 page fault, 215 NVIDIA, 180, 187 PAL, 280 NXP, 180, 200 Palm OS, 284 Nyquist-Shannon sampling theorem, 252, 257Palm, Inc., 284 490 Lee & Seshia, Introduction to Embedded Systems INDEX parallel, 187 Parallel ATA, 238 parallel interface, 238 parameter, 59, 223 Parseval’s theorem, 255 partial function, 57, 146, 434, 452, 478 partial recursive functions, 453 partial-order reduction, 399 partially ordered time, 161 pass by reference, 223 pass by value, 223 Pathfinder, 314, 315 pause time, 222 payload, 275, 292 PC, 192 PCI, 238, 239 PCI Express, 237 PDA, 195, 284 pedestrian, 72 Pentium, 198 performance, 190, 270, 303 period, 162, 304 peripheral bus, 238, 239 peripherals, 213 permuting elements of a tuple, 437 personal digital assistants, 195 Petri nets, 159 Petri, Carl Adam, 159 phase alternating line, 280 Philips, 200 physical address, 215 physical plant, physical system, 12, 19 PIC, 180 pipeline, 13, 191, 192 pipeline bubble, 193 pipeline hazard, 193 PIT, 242 pitch, 21 pixel, 185 pixels, 182 place, 159 plant, 93 platform, 5, 402 PLC, 181 PN, 156 Pnueli, Amir, 342 pointer, 219, 222 polynomial time, 419, 446, 456 popping off a stack, 220 port, 25, 45, 78, 111, 354 portable, 242, 276 POSIX threads, 276 postcondition, 336, 349 power, 254 power amplifier, 231 power rail, 181 power systems engineering, 110 PowerPC, 180, 220 powerset, 434, 435, 439, 478 precedence constraints, 299, 300 precedence graph, 312, 460 preconditions, 300 predicate, 48, 51, 337, 399 predicate abstraction, 399 preemption, 300, 308 preemptive priority-based scheduler, 302 preemptive transition, 126, 247 print-on-demand service, printed circuit board, 213 printer port, 238 printing press, priority, 54, 119, 302 priority ceiling, 317 Lee & Seshia, Introduction to Embedded Systems 491 ... initial value i = 0, that the Scale actor is always linear, and that the cascade of any two linear actors is linear We can trivially extend the definition of linearity to actors with more than... Instructors At Berkeley, we use this text for an advanced undergraduate course called Introduction to Embedded Systems A great deal of material for lectures and labs can be found via the main web page... Seshia, Introduction to Embedded Systems INTRODUCTION can prevent certain causes The systems that this are good examples of cyberphysical systems In traditional aircraft, a pilot controls the aircraft