Filter Realizations

CHAPTER 6 Filter Realizations 6.1 INTRODUCTION Once we have obtained the transfer function of an FIR or IIR filter that approxi- mates the desired specifications in the frequency domain or the time domain, our next step is to investigate as many filter structures as possible, before we decide on the optimal or suboptimal algorithm for actual implementation or applica- tion. A given transfer function can be realized by several structures or what we will call “circuits,” and they are all equivalent in the sense that they realize the same transfer function under the assumption that the coefficients of the transfer function have infinite precision. But in reality, the algorithms for implementing the transfer function in hardware depend on the filter structure chosen to realize the transfer function. We must also remember that the real hardware has a finite number of bits representing the coefficients of the filter as well as the values of the input signal at the input. The internal signals at the input of multipliers and the signals at the output of the multipliers and adders also are represented by a finite number of bits. The effect of rounding or truncation in the addition and multiplications of signal values depends on, for example, the type of rep- resentation of binary numbers, whether they are in fixed form or floating form, or whether they are in sign magnitude or two-complementary form. The effects of all these finite values for the number of bits used in hardware implemen- tation is commonly called “finite wordlength effects,” which we will study in Chapter 7. In this chapter we develop several methods for realizing the FIR and IIR filters by different structures. The analysis or simulation of any transfer function can be easily done on a general-purpose computer, personal computer, or worksta- tion with a high number of bits for the wordlength. We can also investigate the performance of noncausal systems or unstable systems on personal computers. Simulation of the performance of an actual microprocessor or a digital signal processor (DSP chip) by connecting it to the PC, a development kit that contains the microprocessor or the DSP chip, is far preferable to designing and building Introduction to Digital Signal Processing and Filter Design, by B. A. Shenoi Copyright © 2006 John Wiley & Sons, Inc. 303 304 FILTER REALIZATIONS the digital filter hardware with different finite wordlength and testing its perfor- mance. Of course, extensive analysis (simulation) of a given filter function under other design criteria such as stability, modularity, pipeline architecture, and noise immunity is also carried out on a personal computer or workstation using very powerful software that is available today. It is true that a real hardware can be programmed to implement a large number of algorithms, by storing the data that represent the input signals and coefficients of the filter in a memory. But remember that it can implement an algorithm only in the time domain, whereas programming it to find the frequency response is only a simulation. Three algorithms in the time domain that we have discussed in earlier chapters are the recursive algorithm, convolution sum, and the FFT algorithm. It is the difference equations describing these algorithms that have to be implemented by real digital hardware. Consider the general example of an IIR filter function: H(z) =  M n=0 b(n)z −n 1 +  N n=1 a(n)z −n (6.1) The corresponding linear difference equation that implements it directly is N  k=0 a(k)y(n − k) = M  k=0 b(k)x(n − k); a(0) = 1 (6.2) It can then be rewritten in the form of a recursive algorithm as follows: y(n) =−a(1)y(n − 1) + a(2)y(n − 2) + a(3)y(n − 3) +···+a(N)y(n − N) + b(0)x(n) + b(1)x(n − 1) +···+b(M)y(n − M) (6.3) This recursive algorithm can be easily programmed on a general-purpose microprocessor, a computer, or a full-function DSP chip. The filter function we have obtained can be configured on these devices and convolution between its unit impulse response h(n) and the input signal is the actual process used by the hardware to produce the output. The convolution sum is given by y(n) = ∞  k=0 h(k)x(n − k) (6.4) In the following pages, it will be shown that this transfer function (6.1) can be realized by several structures. We must remember that the algorithms used to implement them in the time domain will vary for the different structures. All the equivalent structures realize the same transfer function only under infinite precision of the coefficients; otherwise their performance depends on the number of bits used to represent the coefficients, as well as the input signal and the form for representing the binary numbers. The same statement can be made for the FIR FILTER REALIZATIONS 305 realization of an FIR filter function treated in the next section. The purpose of realizing different structures and studying the effects of quantization is to find the best possible structure that has the minimum quantization effect on the output of the system. 6.2 FIR FILTER REALIZATIONS Example 6.1: Direct Form Given the transfer function of an FIR filter as H(z) =  M n=0 h(n)z −n ,letus consider its equivalent algorithm for the output, for example, when M = 4: y(n) = h(0)x(n) + h(1)x(n − 1) + h(2)x(n − 2) + h(3)x(n − 3) + h(4)x(n − 4) (6.5) We have already discussed one structure employed to implement this algorithm in Chapter 5, and because the coefficients of the multipliers in it are directly available as the coefficients h(n) in H(z), it is called the direct form I structure and is shown in Figure 6.1. Whenever we have a structure to implement an FIR or an IIR filter, an equiv- alent structure can be obtained as its transpose by the following operations: 1. Interchanging the input and the output nodes 2. Replacing adders by pickoff nodes and vice versa 3. Reversing all paths Using these operations, we get the transpose of the structure of Figure 6.1 as Figure 6.2. This is known as direct form II structure; remember that this (direct form II) structure will be called direct form I transposed structure in the next chapter. X(z) z −1 z −1 z −1 z −1 Y(z) h(0) h(1) h(2) h(3) h(4) Σ Σ Σ Σ Figure 6.1 Direct form I of an FIR filter. 306 FILTER REALIZATIONS h(4) h(3) h(2) h(1) h(0) Y(z) ΣΣΣΣ z −1 z −1 z −1 z −1 X(z) Figure 6.2 Direct form II of an FIR filter. Example 6.2: Cascade Form If we have an FIR filter of high order, it may be realized as a cascade of FIR filters of lower order, preferably as second-order filters when the order is even or the cascade of second-order filters and one first-order filter when the order is odd. We factorize the given FIR filter function H(z) =  M n=0 h(n)z −n in the form H(z) = ⎧ ⎪ ⎪ ⎪ ⎪ ⎨ ⎪ ⎪ ⎪ ⎪ ⎩ h(0)   M/2 m=1  1 + h(1m)z −1 + h(2m)z −2   when M is even h(0)  (1 + h(10)z −1 )  (M−1)/2 m=1  1 + h(1m)z −1 + h(2m)z −2   when M is odd (6.6) A cascade realization of this equation when M = 5 is shown in Figure 6.3, and its transpose is shown in Figure 6.4. X(z) h(0) Σ Σ Σ Σ Σ z −1 z −1 z −1 z −1 z −1 h(10) h(11) h(21) h(22) h(12) Y(z) Figure 6.3 Cascade connection of an FIR filter. FIR FILTER REALIZATIONS 307 Σ Σ Σ z −1 z −1 z −1 X(z) h(10) h(22) h(12) Σ Σ z −1 z −1 h(21) h(11) h(0) Y(z) Figure 6.4 Transpose of the cascade connection shown in Figure 6.3. Example 6.3: Polyphase Form This realization is based on the polyphase decomposition of the FIR transfer function and is illustrated by choosing the following example: H 1 (z) = h(0) + h(1)z −1 + h(2)z −2 + h(3)z −3 + h(4)z −4 + h(5)z −5 + h(6)z −6 + h(7)z −7 + h(8)z −8 (6.7) This can be expressed as the sum of two subfunctions, shown below: H 1 (z) =  h(0) + h(2)z −2 + h(4)z −4 + h(8)z −8  +  h(1)z −1 + h(3)z −3 + h(5)z −5 + h(7)z −7  =  h(0) + h(2)z −2 + h(4)z −4 + h(8)z −8  + z −1  h(1) + h(3)z −2 + h(5)z −4 + h(7)z −6  (6.8) Let us denote A 0 (z) =  h(0) + h(2)z −2 + h(4)z −4 + h(8)z −8  and A 1 (z) =  h(1)z −1 + h(3)z −3 + h(5)z −5 + h(7)z −7  = z −1  h(1) + h(3)z −2 + h(5)z −4 + h(7)z −6  Since the polynomials in the square brackets contain only even-degree terms, we denote A 0 (z) = A 0 (z 2 ) and A 1 (z) = z −1 A 1 (z 2 ). Hence we express H 1 (z) = A 0 (z 2 ) + z −1 A 1 (z 2 ). A block diagram showing this realization is presented in Figure 6.5(a), where the two functions A 0 (z 2 ) and A 1 (z 2 ) are subfilters connected in parallel. 308 FILTER REALIZATIONS X(z) z −1 A 0 (z 2 ) A 1 (z 2 ) (a)(b) z −1 z −1 Y(z) Y(z) Σ Σ Σ X(z) B 0 (z 3 ) B 1 (z 3 ) B 2 (z 3 ) Figure 6.5 Polyphase structures of FIR filters. X(z) h(0) h(2) h(4) h(6) h(8) Y(z) Σ Σ Σ Σ h(7) h(5) h(3) h(1) z −2 z −2 z −1 z −2 z −2 Figure 6.6 Polyphase realization of an FIR filter H 1 (z). FIR FILTER REALIZATIONS 309 These filters can be realized in either the direct form I or direct form II as described earlier and illustrated in Figures 6.1 and 6.2, respectively. But there would be 8 unit delays in building A 0 (z) and 7 unit delays in z −1 A 1 (z),which adds up to 15 unit delay elements. We prefer to realize a circuit that would require a minimum number of unit delays that is equal to the order of the filter. A realization that contains the minimum number of delays is defined as a canonic realization. To reduce the total number of delays to 8, we cause the two subfilters to share the unit delays in order to get a canonic realization. Such a circuit realization is shown in Figure 6.6. Example 6.4 Consider the same example and decompose (6.7) as the sum of three terms: H(z) =  h(0) + h(3)z −3 + h(6)z −6  + z −1  h(1) + h(4)z −3 + h(7)z −6  + z −2  h(2) + h(5)z −3 + h(8)z −6  = B 0 (z 3 ) + z −1 B 1 (z 3 ) + z −2 B 2 (z 3 ) (6.9) A block diagram for implementing this decomposition is shown in Figure 6.5b. A canonic realization of (6.9) is shown in Figure 6.7 and its transpose in Figure 6.8, each of which uses 8 unit delay elements. The FIR filter of order 8 chosen in (6.7) can be decomposed as the sum of four subfilters in the form H(z) = C 0 (z 4 ) + C 1 (z 4 ) + C 2 (z 4 ) + C 3 (z 4 ) and can be realized by a canonic circuit. In general, an FIR function of order N (i.e. h(n) = 0forn>N)canbe decomposed in the polyphase form with M subfilters connected in parallel as follows H(z) = M−1  m=0 z −m E m (z M ) (6.10) where E m (z) = (N +1)/M  n=0 h(Mn + m)z −n (6.11) 6.2.1 Lattice Structure for FIR Filters FIR filters can be realized in structures called lattice structures shown later in the chapter in Figure 6.17a and its transpose, in Figure 6.17b—for an example of a third-order filter. We will describe the design of these structures using a MATLAB function in Section 6.5. 310 FILTER REALIZATIONS Σ Σ Σ z −1 z −3 z −3 z −1 X(z) Y(z) h(0) h(3) h(6) h(1) h(7) h(4) h(8) h(5) h(2) Figure 6.7 Polyphase structure of an FIR filter function H 2 (z). 6.2.2 Linear Phase FIR Filter Realizations When the FIR filter has a linear phase, its coefficients are symmetric or antisym- metric, and hence the number of multipliers is reduced by almost half. For the symmetric FIR filter of order N , the samples of the unit impulse response that are the same as the multiplier coefficients satisfy the condition h(n) = h(N − n) and it known as a type I FIR filter. The FIR filter with antisymmetric coefficients satisfies the condition h(n) =−h(N − n) and is known as the type II FIR filter. Example 6.5 Let us consider the example of a type I FIR filter, of order N = 6: H 3 (z) = h(0) + h(1)z −1 + h(2)z −2 + h(3)z −3 + h(4)z −4 + h(5)z −5 + h(6)z −6 (6.12) = h(0) + h(1)z −1 + h(2)z −2 + h(3)z −3 + h(2)z −4 + h(1)z −5 + h(0)z −6 = h(0)(1 + z −6 ) + h(1)(z −1 + z −5 ) + h(2)(z −2 + z −4 ) + h(3)z −3 (6.13) By sharing the multipliers, we get the realization shown in Figure 6.9, which uses only four multipliers. It is still a canonic realization that uses six delay elements. FIR FILTER REALIZATIONS 311 X(z) z −3 z −1 z −1 z −3 h(2) h(5) h(8) h(7) h(4) h(1) h(6) h(3) h(0) Y(z) Σ Σ ΣΣ Σ Figure 6.8 Transpose of the polyphase structure shown in Figure 6.7. z −1 z −1 z −1 z −1 z −1 z −1 X(z) h(1) h(2) h(3) Y(z) Σ Σ Σ Σ h(0) ΣΣ Figure 6.9 Direct-form structure of type I linear phase FIR filter function H 3 (z). 312 FILTER REALIZATIONS X(z) z −1 z −1 z −1 z −1 z −1 h(1) h(2) h(3) Y(z) z −1 z −1 Σ Σ Σ Σ Σ Σ Σ h(0) Figure 6.10 Direct-form structure of type II linear phase FIR filter function H 4 (z). Example 6.6 If we consider a type II FIR filter of order 7, its transfer function is given by H 4 (z) = h(0) + h(1)z −1 + h(2)z −2 + h(3)z −3 + h(3)z −4 + h(2)z −5 + h(1)z −6 + h(0)z −7 (6.14) = h(0)(1 + z −7 ) + h(1)(z −1 + z −6 ) + h(2)(z −2 + z −5 ) + h(3)(z −3 + z −4 ) (6.15) This is realized by the canonic circuit shown in Figure 6.10, thereby reducing the total number of multipliers from 7 to 4. Similar cost saving is achieved in the realization of FIR filters with antisymmetric coefficients. 6.3 IIR FILTER REALIZATIONS In constructing several equivalent structures of an FIR filter, we used the direct- form decomposition of the filter transfer function as the product of second-order sections connected in cascade, polyphase decomposition, and transpose for each structure obtained by them. We used the symmetry of the coefficients of linear phase FIR filters to reduce the number of delay elements. We can also generate their transpose forms. Using similar strategies, in this section we present several structures for the IIR filters. [...]... axis([0.0 1.0 0.0 1.0]) title(’MAGNITUDE OF LP FILTER FROM THE TWO ALLPASS FILTERS’) ylabel(’Magnitude’) xlabel(’Normalized frequency’) H=0.5*(A1-A2); % HIGHPASS FILTER FROM THE TWO ALLPASS FILTERS [numhp,denhp]=tfdata(H,’v’); [h2,w]=freqz(numhp,denhp,256); H2=abs(h2); figure plot(w/pi,H2);grid axis([0.0 1.0 0.0 1.0]) title(’MAGNITUDE OF HP FILTER FROM THE TWO ALL PASS FILTERS’) ylabel(’Magnitude’) xlabel(’Normalized... [N,Wn]=cheb2ord(Wp,Ws,Ap,As); M=mod(N,2); if M==0 N=N+1 end 336 FILTER REALIZATIONS [b,a]=cheby2(N,As,Wn); end if ftype==4 disp(’Elliptic Lowpass Filter ) [N,Wn]=ellipord(Wp,Ws,Ap,As); M=mod(N,2); if M==0 N=N+1 end [b,a]=ellip(N,Ap,As,Wn); end [h0,w]=freqz(b,a,256); H0=abs(h0); plot(w/pi,H0);grid axis([0.0 1.0 0.0 1.0]) title(’MAGNITUDE OF SPECIFIED LP FILTER ) ylabel(’Magnitude’) xlabel(’Normalized frequency’)... Chebyshev II and (4) for Elliptic filters’); ftype=input(’’); if ftype==1 disp(’Butterworth Lowpass Filter ); [N,Wn]=buttord(Wp,Ws,Ap,As); M=mod(N,2); if M==0 N=N+1 end [b,a]=butter(N,Wn); end if ftype==2 disp(’Chebyshev I Lowpass Filter ) [N,Wn]=cheb1ord(Wp,Ws,Ap,As); M=mod(N,2); if M==0 N=N+1 end [b,a]=cheby1(N,Ap,Wn); end if ftype==3 disp(’Chebyshev II Lowpass filter ) [N,Wn]=cheb2ord(Wp,Ws,Ap,As);... cutoff frequency Wp . Digital Signal Processing and Filter Design, by B. A. Shenoi Copyright © 2006 John Wiley & Sons, Inc. 303 304 FILTER REALIZATIONS the digital filter. CHAPTER 6 Filter Realizations 6.1 INTRODUCTION Once we have obtained the transfer function