Capacitance-voltage measurement and analysis of organic MIS capacitor nonvolatile memory

The studies of fabricatation, measurement and analysis of an organic metal-insulator-semiconductor (MIS) memory capacitor with a floating-gate like of Cytop polymer and photogate dielectric are reported in this paper. The storage mechanism is analyzed and discussed through hysteresis in capacitance-voltage measurements at different applied frequencies and DC voltages.

Nghiên cứu khoa học công nghệ CAPACITANCE-VOLTAGE MEASUREMENT AND ANALYSIS OF ORGANIC MIS CAPACITOR NONVOLATILE MEMORY Dao Thanh Toan* Abstract: The studies of fabricatation, measurement and analysis of an organic metal-insulator-semiconductor (MIS) memory capacitor with a floating-gate like of Cytop polymer and photogate dielectric are reported in this paper The storage mechanism is analyzed and discussed through hysteresis in capacitance-voltage measurements at different applied frequencies and DC voltages When applying an electric field, the electrons would be charged and discharged on the Cytop layer Memory states of the MIS devices can be programmed or erased by applying a voltage pulse of 10 V under ultraviolet light irradiation Furthermore, capacitance-time relationships are checked with a remaining strored electron of 98 % after more than 15 h These results reveal that the proposed MIS capactior is promising to use as a digital nonvolatile memory cell Keywords: MIS capactior; Organic semiconductor; Floating-gate; Hysteresis; Nonvolatile memory; Electronic component fabrication and analysis INTRODUCTION In recent years, organic nonvolatile memory devices have been of considerable interest in basic researches and industrial manufactures owning to potential applications for use in electronics as data storage media and CMOS component [1-2] Particularly, study on metal-insulator-semiconductor (MIS) structure, a simple and convenient method to deeply understanding the mechanism of a memory effect in a transistor memory [3, 4], has been extensively done in inorganic electronics [3, 5, 6] and recently in organic electronics [4, 7-9] A charge storage media is one of the most important memory elements In terms of device manufacturing, up to now, charge storage materials such as gold nanoparticle [7, 8], C60 [9], an ion-doped polymer [10], a floating-gate metal [11], aluminum nanoparticle [12], and chargeable polymers [13-15] have been used to obtain a memory effect in organic devices Among of them, the chargeable polymer is highly promising for fabrication of new generation of memory devices based on all organic materials using a solution process Recently, charge storage materials of poly(vinyl alcohol) [13], poly(-methylstyrene) [14] and poly(9,9-dioctylfluorene) [15] were reported as a floating-gate like in the organic transistor nonvolatile structure In previous work [2,16], we have realized a charge trapping (or floating-gate effect) of electrets polymer of Cytop and applied in a high performance tunable CMOS circuit This paper demonstrates the additional experiments on organic MIS memory device using Cytop polymer as a charge storage media and photocharge generation molecules of DPA–CM dispersed in a polymer matrix of PMMA as a gate dielectric layer Electrons are generated in the gate dielectric layer and charged or discharged on the Cytop layer under irradiance of ultraviolet (UV) light and external electric fields Experimental data indicated that the capacitance of the MIS memory capacitor was modulated by storing electrons in the Cytop floating-gate layer EXPERIMENTAL METHOD MIS capacitor devices were designed and fabricated with a device structure shown in Fig 1a Glass substrates coated with a 150 nm bottom electrode layer of indium tin oxide (ITO) were cleaned using ultrasonication, followed by UV-O3 treatment, acting as the gate electrode PMMA and DPA-CM were dissolved in a chloroform solvent at a 10:1 molar Tạp chí Nghiên cứu KH&CN quân sự, Số 49, 06 - 2017 61 Kỹ thuật điều khiển & Điện tử ratio of a monomer unit of PMMA to DPA-CM at a total concentration of 1.45 wt % [2] A gate dielectric layer of PMMA and DPA-CM was prepared by spin-coating from the solution on the ITO layer, and placed immediately on a heater kept at 100oC for 60 to dry On the top of the composite dielectric, a charge storage layer of Cytop (CTL-809A, Asahi Glass, Japan) was spin-coated using a 0.5 wt% solution (CT-Solv.180) and then dried at 100oC for h The thicknesses of the gate dielectric layer and the Cytop layer were measured to be 250 and 15 nm, respectively by a KEYENCE VN-8000 Nanoscale Hybrid Microscope A 30 nm thin film of pentacene (Aldrich, USA, purified by vacuum sublimation twice) was vacuum-deposited on the Cytop layer at a deposition rate of 0.02 nm s− To complete the devices, a 50 nm Au layer was vacuum-evaporated on top of the pentacene layer at a rate of 0.03 nm/s through a shadow mask with an opening with an area of 0.0495 cm2 All vacuum deposition processes were carried out at a pressure of 2×10-6 torr A capacitor without Cytop was also fabricated as a reference device Top electrode Semiconductor layer Floating-gate like (a) Photoactive insulator Bottom transparent electrode (b) SCS 4200 IEEE488 standard Impedance meter (Agilent 4284A LCR) Kelvin probe MIS capacitor Figure (a) Schematic structure of MIS capacitor (b) Experimental setup to measure capacitance-voltage of MIS capacitor The electrical characteristics of the capacitors were done with an Agilent 4284A LCR meter with a sweep step of 0.6 V/s and a Keithley 3390 pulse generator The devices were illuminated by an Omron ZUV ultraviolet irradiator (λ=365 nm) from a glass substrate side Those instruments were synchronously controlled by Keithley SCS 4200 semiconductor characterization system as shown in Fig 1b All measurements were performed in a dry nitrogen atmosphere at room temperature RESULTS AND DISCUSSION Figure 2(a) shows the capacitance-voltage (C-V) properties of the devices Typical ptype MIS capacitor inversion-depletion-accumulation characteristics were obtained when the bottom ITO electrode voltage was applied from a positive voltage of 10 V to a negative voltage of 10 V and accumulation-depletion-inversion as reversible sweeping under light illumination with an intensity of 0.64 mW/cm2 62 D T Toan, “Capacitance-voltage measurement and… capacitor nonvolatile memory.” Nghiên cứu khoa học công nghệ Figure (a) C-V curves of memory devices under UV light in swing range of 10 V Inset shows the model of operating mechanism for forward sweep (right-side figure) backward sweep (left-side figure), where  symbol means accumulated holes in the pentacene semiconducting layer; (b) C-V curves of memory devices under dark and reference device under UV light; (c) C-V characteristics of insulator with a device structure of ITO (150 nm)/PMMA+DPA-CM (250 nm)/ Cytop (15 nm)/Au (50 nm) Inset shows current density (CD) of ITO (150 nm)/PMMA+DPA-CM (250 nm)/Au (50 nm) device versus electric fields at different UV light intensities As can be seen in Fig 2(a), behavior of the C-V curves was similar to those of MIS memory devices reported in literature [3-11] The observed hysteresis suggests that electrons generated from DPA-CM under UV irradiation were trapped in the Cytop layer (see the inset of Fig 2(a)) To support this conclusion, the device without Cytop was tested Tạp chí Nghiên cứu KH&CN quân sự, Số 49, 06 - 2017 63 Kỹ thuật điều khiển & Điện tử under the same experimental condition As shown in Fig 2(b), no hysteresis appeared in this reference device This result was also consistent with that of study on the charge trapping at interface of pentacene and PMMA reported by Mabrook at el [Ref 4] Thus, the use of the Cytop layer in the MIS devices was responsible for obtaining such hysteresis One possible mechanism is considered either dipole polarization of the gate dielectric or charge storage of electrons in the Cytop layer On other aspect, the C-V curves of the ITO/PMMA+DPA-CM/ Cytop/Au gate capacitor as shown in Fig 2(c) were also examined C-V characteristics are expected to exhibit hysteresis if the dipole polarization exists [18] However, no hysteresis was observed from this device This result clearly confirms that the memory effect is attributed to electron storage in the Cytop layer In current memory capacitor devices, the PMMA+DPA-CM layer acts as a normal insulator under dark, but acts as a charge generation source under UV light Evidently, the observed C-V characteristics of the MIS devices under dark did not exhibit hysteresis (see Fig 2(b)) In order to obtain the further evidence of this consideration, the current densities of the ITO/PMMA+DPA-CM/Au device were measured and presented in the inset of Fig 2(c) Under the UV light, charge separation states of DPA-CM molecules appeared [2,17] and the photoexcitons were appeared and transferred from one molecule to another by an external electric field Consequently, the current densities intensified with increasing light intensities and electric fields The electrical symmetry of the characteristics obtained here indicated electron-hole pairs generated Those experimental phenomena signify that the Cytop layer behaves like a floatinggate in flash memory devices, which are widely reported in literature [8,11] As shown in the insets of Fig 2(a), injected photoelectrons would be trapped/detrapped on the Cytop layer under bottom electrode negative bias/positive bias Accumulation of holes in the active layer of pentacene was modulated by the electron storage in the Cytop layer In other words, the effective distance of the MIS capacitor also was modified by such charge storage, causing the hysteresis in the C-V curves Figure Dependence of C-V characteristics of devices on (a) sweep voltages and UV (b) light intensities (c) Effects of frequency in memory window and capacitance Figure 3(a) shows the C-V characteristics measured for various sweeping voltage ranges In general, capacitance in the accumulation region and the memory window VFb (defined as a different in flat-band voltage between forward and backward sweep direction) increased as increasing the sweep voltage ranges When the voltages were swept from to 7 V, to 8 V, to 9 V, 10 to 10 V, and 11 to 11 V and reversely under the UV light irradiation with an intensity of 0.64 mW/cm2, the VFb of 4.2, 5.4, 6.6, 7.2 and 8 V were obtained, respectively The dependence of C-V characteristics on UV light intensities was investigated and shown in Fig 3(b) The observation is in good 64 D T Toan, “Capacitance-voltage measurement and… capacitor nonvolatile memory.” Nghiên cứu khoa học công nghệ agreement with that observed in the inset of Fig 2(b) Use of higher UV light intensities means higher conductance in the PMMA+DPA-CM layer This made the speed of photoelectrons injection (the forward sweep) and ejection (the backward sweep) faster, resulting in the narrower memory windows and larger saturated capacitance values Figure 3(c) exhibits effect of frequency in devices characteristics The memory window was larger at higher frequencies But, the accumulation capacitance rapidly decreased with increasing frequency while the inversion capacitance was almost constant, resulting in decrease in the ration of accumulation to inversion capacitance This phenomenon can be elucidated by low cut-off frequency of pentacene semiconductor-based devices demonstrated by T Miyadera et al [Ref 19] The optimized frequency used in the present devices was found to be kHz Figure Charge retention time characteristics of MIS memory devices charged/discharged by pulse voltage of -10 V/10 V to bottom electrode under light power of 0.64 mW/cm2 for 0.5 s The on-state and off-state capacitance were measured at a zero DC bias with a frequency of kHz and an AC voltage of 500 mV Each curve composed of 2×103 points, indicating very good reliability Capacitance versus time is the basic characteristics to evaluate a possibility nonvolatile application to MIS memory devices [5,10] Charging and discharging of the devices were obtained by applying pulse voltages of 10 V and 10 V to the bottom ITO electrode under a light power of 0.64 mW/cm2 for 0.5 s while the top electrode was grounded, resulting in higher (on-state) and lower (off-state) capacitance, respectively As shown in Fig 4, margins of the on-state and off-state capacitance were continuously measured as a function of time at a zero DC bias with a frequency of kHz and an AC voltage of 500 mV The off-state capacitance was stable while the on-state capacitance just slightly decreased The decrease in on-state capacitance can be explained by a leaking away of charge effect in a floating-gate memory [1] The ratio of the on-state and off-state capacitance remained 98 % after more than 15 h operation, indicating good retention of charges The retention time result can be comparable with a previous report [7], where only 82 % charge of the programmed MIS capacitor memory with gold nanoparticles is stored at the same elapsed time of 15 h On the other hand, Ramer et al [20] succeeded in reading and distinguishing the binary value of “0” or ‘1” of a capacitor memory with a low capacitive margin of 0.34 (off-state= 3.42 pF; on-state=3.76 pF, as presented in Fig in Ref 20) Under the light of that study, a reading circuit can conveniently detect the information storage in current MIS capacitor memory thanks to its large capacitive difference of 1.9 (off-state=10.4 nF/cm2; on-state=12.3 nF/cm2, as shown in Fig 4) CONCLUSION In summary, the MIS capacitor memory with a floating-gate like of Cytop polymer embedded in a photocharge generation source of DPA-CM has fabricated and characteirzed The memory effect was attributed to charge storage on the Cytop layer The width of memory window was dependent on the range of sweep voltages, UV light Tạp chí Nghiên cứu KH&CN quân sự, Số 49, 06 - 2017 65 Kỹ thuật điều khiển & Điện tử intensities and applied frequencies The ratio of on-state and off-state capacitance of the memory remained 98 % after more than 15 h operation The achieved results suggest that a Cytop floating-gate has a potential to use a charge storage media This study provides basis knowledge for further developing all-organic-based nonvolatile memory elements Acknowledgments: This work was funded by Vietnam National Foundation for Science and Technology Development (NAFOSTED) under grant number “103.99-2013.13" and International Information Science Foundation, 2016, Tokyo, Japan (grant no 2016.1.3.126) Author would like to thank Prof H Sakai, JAIST, Japan for providing facilities of semiconductor component manufacturing REFERENCES [1] T Sekitani, T Yokota, U Zschieschang, H Klauk, S Bauser, K Takeuchi, M Takamiya, T Sakurai, and T Someya, “Organic nonvolatile memory transistors for flexible sensor arrays”, Science Vol 326, pp 1516-1519, (2009) [2] T.T.Dao et al, “Controllable threshold voltage in organic complementary logic circuits with an electron-trapping polymer and photoactive gate dielectric layer”, ACS Applied Materials & Interfaces, Vol 8, pp.18249-18255, (2016) [3] J H Jung, J Y Jin, I Lee, and T W Kim, “Memory effect of ZnO nanocrystals embedded in an insulating polyimide layer”, Appl Phys Lett Vol 88, pp.112107, (2006) [4] M F Mabrook, Y Yun, C P Pearson, D A Zeze, and M C Petty, “Charge storage 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K Henkel, I Paloumpa, and D Schmeiβer, “Organic field effect transistors with ferroelectric hysteresis”, Thin Solid Films, Vol 515, pp.7683-7687, (2007) [19] T Miyadera, T Minari, K Tsukagoshi, H Ito, and Y Aoyagi, “Frequency response analysis of pentacene thin-film transistors with low impedance contact by interface molecular doping”, Appl Phys Lett., Vol 91, pp.013512, (2007) [20] O G Ramer, J Drab, D Robinson, and D Nishimoto, “Ferroelectric capacitor nondestructive readout memory”, Integrated Ferroelectrics, Vol 11, pp.171-177 (1995) TĨM TẮT ĐO VÀ PHÂN TÍCH ĐẶC TÍNH ĐIỆN DUNG- ĐIỆN ÁP CỦA BỘ NHỚ KHƠNG MẤT DỮ LIỆU HỮU CƠ VỚI CẤU TRÚC TỤ ĐIỆN MIS Bài báo trình bày nghiên cứu việc chế tạo, đo đạc phân tích kết nhớ điện dung kim loại-cách ly-bán dẫn (MIS) hữu với polymer Cytop kiểu cực cổng thả điện môi tích cực quang Cơ chế lưu trữ phân tích thảo luận thơng qua đặc tính trễ đường đặc tính điện dung- điện áp tần số điện áp chiều khác Khi có điện trường ngồi cực tính khác tác động vào nhớ, điện tích nạp phóng lớp cực cổng thả Cytop Trạng thái nhớ lập trình hay xóa xung điện áp 10 V chiếu tia cực tím Hơn nữa, đặc tính khơng liệu kiểm tra thơng qua phép đo điện dung-thời gian với 98 % điện tích lữu trữ sau 15 đo liên tiếp Các kết cho thấy điện dung MIS nghiên cứu có triển vọng việc sử dụng tế bào nhớ số không liệu Từ khóa: Tụ điện MIS; Bán dẫn hữu cơ; Cực cổng thả nổi; Trễ, Bộ nhớ không liệu; Chế tạo phân tích đặc tính linh kiện điện tử Nhận ngày 12 tháng năm 2017 Hoàn thiện ngày 01 tháng năm 2017 Chấp nhận đăng ngày 20 tháng năm 2017 Address: Faculty of Electrical-Electronic Engineering, University of Transport and Communications, No 3, Cau Giay Street, Lang Thuong, Dong Da, Hanoi, Vietnam * Corresponding author: daotoan@utc.edu.vn Tạp chí Nghiên cứu KH&CN quân sự, Số 49, 06 - 2017 67 ... IEEE488 standard Impedance meter (Agilent 4284A LCR) Kelvin probe MIS capacitor Figure (a) Schematic structure of MIS capacitor (b) Experimental setup to measure capacitance-voltage of MIS capacitor. .. illumination with an intensity of 0.64 mW/cm2 62 D T Toan, Capacitance-voltage measurement and capacitor nonvolatile memory. ” Nghiên cứu khoa học công nghệ Figure (a) C-V curves of memory devices under... current MIS capacitor memory thanks to its large capacitive difference of 1.9 (off-state=10.4 nF/cm2; on-state=12.3 nF/cm2, as shown in Fig 4) CONCLUSION In summary, the MIS capacitor memory