SECOND EDITION ARM ASSEMBLY LANGUAGE Fundamentals and Techniques SECOND EDITION ARM ASSEMBLY LANGUAGE Fundamentals and Techniques William Hohl Christopher Hinds ARM, Inc., Austin, Texas Boca Raton London New York CRC Press is an imprint of the Taylor & Francis Group, an informa business CRC Press Taylor & Francis Group 6000 Broken Sound Parkway NW, Suite 300 Boca Raton, FL 33487-2742 © 2015 by William Hohl and Christopher Hinds CRC Press is an imprint of Taylor & Francis Group, an Informa business No claim to original U.S Government works Version Date: 20140915 International Standard Book Number-13: 978-1-4822-2986-8 (eBook - PDF) This book contains information obtained from authentic and highly regarded sources Reasonable efforts have been made to publish reliable data and information, but the author and publisher cannot assume responsibility for the validity of all materials or the consequences of their use The authors and publishers have attempted to trace the copyright holders of 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granted a photocopy license by the CCC, a separate system of payment has been arranged Trademark Notice: Product or corporate names may be trademarks or registered trademarks, and are used only for identification and explanation without intent to infringe Visit the Taylor & Francis Web site at http://www.taylorandfrancis.com and the CRC Press Web site at http://www.crcpress.com To our families Contents Preface xv Acknowledgments xxi Authors xxiii Chapter An Overview of Computing Systems 1.1 Introduction 1.2 History of RISC 1.2.1 ARM Begins 1.2.2 The Creation of ARM Ltd 1.2.3 ARM Today 1.2.4 The Cortex Family 10 1.2.4.1 The Cortex-A and Cortex-R Families 10 1.2.4.2 The Cortex-M Family 11 1.3 The Computing Device 12 1.4 Number Systems 15 1.5 Representations of Numbers and Characters 18 1.5.1 Integer Representations 18 1.5.2 Floating-Point Representations 21 1.5.3 Character Representations 23 1.6 Translating Bits to Commands .24 1.7 The Tools 25 1.7.1 Open Source Tools 27 1.7.2 Keil (ARM) 27 1.7.3 Code Composer Studio 28 1.7.4 Useful Documentation 30 1.8 Exercises 30 Chapter The Programmer’s Model 33 2.1 Introduction 33 2.2 Data Types 33 2.3 ARM7TDMI 34 2.3.1 Processor Modes .34 2.3.2 Registers 35 2.3.3 The Vector Table 38 2.4 Cortex-M4 39 2.4.1 Processor Modes .40 2.4.2 Registers 40 2.4.3 The Vector Table 42 2.5 Exercises 43 vii viii Contents Chapter Introduction to Instruction Sets: v4T and v7-M 45 3.1 Introduction 45 3.2 ARM, Thumb, and Thumb-2 Instructions .46 3.3 Program 1: Shifting Data .46 3.3.1 Running the Code 47 3.3.2 Examining Register and Memory Contents 49 3.4 Program 2: Factorial Calculation 51 3.5 Program 3: Swapping Register Contents 53 3.6 Program 4: Playing with Floating-Point Numbers 54 3.7 Program 5: Moving Values between Integer and FloatingPoint Registers 55 3.8 Programming Guidelines 56 3.9 Exercises 57 Chapter Assembler Rules and Directives 59 4.1 Introduction 59 4.2 Structure of Assembly Language Modules 59 4.3 Predefined Register Names 63 4.4 Frequently Used Directives 63 4.4.1 Defining a Block of Data or Code 63 4.4.1.1 Keil Tools 64 4.4.1.2 Code Composer Studio Tools 65 4.4.2 Register Name Definition 66 4.4.2.1 Keil Tools 66 4.4.2.2 Code Composer Studio 66 4.4.3 Equating a Symbol to a Numeric Constant .66 4.4.3.1 Keil Tools 67 4.4.3.2 Code Composer Studio 67 4.4.4 Declaring an Entry Point 67 4.4.5 Allocating Memory and Specifying Contents 68 4.4.5.1 Keil Tools 68 4.4.5.2 Code Composer Studio 69 4.4.6 Aligning Data or Code to Appropriate Boundaries .70 4.4.6.1 Keil Tools 70 4.4.6.2 Code Composer Studio 71 4.4.7 Reserving a Block of Memory 71 4.4.7.1 Keil Tools 71 4.4.7.2 Code Composer Studio 71 4.4.8 Assigning Literal Pool Origins 72 4.4.9 Ending a Source File 72 4.5 Macros 73 4.6 Miscellaneous Assembler Features 74 4.6.1 Assembler Operators 74 4.6.2 Math Functions in CCS 76 4.7 Exercises 77 Appendix D ************************************************************** * * Forward declaration of the default fault handlers * ************************************************************** global myStart, myStack, ResetISR, Vecs, _c_int00, _main ************************************************************** * Interrupt vector table ************************************************************** .sect “.intvecs” Vecs: word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word myStack + 0x400 _main NmiSR FaultISR IntDefaultHandler IntDefaultHandler IntDefaultHandler 0 0 IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; The initial stack pointer The reset handler The NMI handler The hard fault handler The MPU fault handler The bus fault handler The usage fault handler Reserved Reserved Reserved Reserved SVCall handler Debug monitor handler Reserved The PendSV handler The SysTick handler GPIO Port A GPIO Port B GPIO Port C GPIO Port D GPIO Port E UART0 Rx and Tx UART1 Rx and Tx SSI0 Rx and Tx I2C0 Master and Slave PWM Fault PWM Generator PWM Generator PWM Generator Quadrature Encoder ADC Sequence ADC Sequence ADC Sequence ADC Sequence Watchdog timer 409 410 .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; word ; word ; word ; word ; .word IntDefaultHandler ; .word IntDefaultHandler ; Appendix D Timer subtimer A Timer subtimer B Timer subtimer A Timer subtimer B Timer subtimer A Timer subtimer B Analog Comparator Analog Comparator Analog Comparator System Control (PLL OSC BO) FLASH Control GPIO Port F GPIO Port G GPIO Port H UART2 Rx and Tx SSI1 Rx and Tx Timer subtimer A Timer subtimer B I2C1 Master and Slave Quadrature Encoder CAN0 CAN1 CAN2 Ethernet Hibernate USB0 PWM Generator uDMA Software Transfer uDMA Error ADC1 Sequence ADC1 Sequence ADC1 Sequence ADC1 Sequence I2S0 External Bus Interface GPIO Port J GPIO Port K GPIO Port L SSI2 Rx and Tx SSI3 Rx and Tx UART3 Rx and Tx UART4 Rx and Tx UART5 Rx and Tx UART6 Rx and Tx UART7 Rx and Tx Reserved Reserved Reserved Reserved I2C2 Master and Slave I2C3 Master and Slave Appendix D .word IntDefaultHandler ; .word IntDefaultHandler ; word ; word ; word ; word ; word ; word ; word ; word ; word ; word ; word ; word ; word ; word ; word ; word ; word ; word ; word ; word ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; word ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; .word IntDefaultHandler ; 411 Timer subtimer A Timer subtimer B Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Timer subtimer A Timer subtimer B Wide Timer subtimer A Wide Timer subtimer B Wide Timer subtimer A Wide Timer subtimer B Wide Timer subtimer A Wide Timer subtimer B Wide Timer subtimer A Wide Timer subtimer B Wide Timer subtimer A Wide Timer subtimer B Wide Timer subtimer A Wide Timer subtimer B FPU PECI LPC I2C4 Master and Slave I2C5 Master and Slave GPIO Port M GPIO Port N Quadrature Encoder Fan Reserved GPIO Port P (Summary or P0) GPIO Port P1 GPIO Port P2 GPIO Port P3 GPIO Port P4 412 Appendix D .word word word word word word word word word word word word word word word word word word sect “.myCode” myStart: ; ; ; ; ; ; ; ; ; ; IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler IntDefaultHandler ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; GPIO Port P5 GPIO Port P6 GPIO Port P7 GPIO Port Q (Summary or Q0) GPIO Port Q1 GPIO Port Q2 GPIO Port Q3 GPIO Port Q4 GPIO Port Q5 GPIO Port Q6 GPIO Port Q7 GPIO Port R GPIO Port S PWM Generator PWM Generator PWM Generator PWM Generator PWM Fault Set sysclk to DIV/4, use PLL, XTAL_16 MHz, OSC_MAIN system control base is 0x400FE000, offset 0x60 bits [26:23] = 0x3 bit [22] = 0x1 bit [13] = 0x0 bit [11] = 0x0 bits [10:6] = 0x15 bits [5:4] = 0x0 bit [0] = 0x0 All of this translates to 0x01C00540 MOVW MOVT MOVW MOVW MOVT STR r0, r0, r2, r1, r1, r1, #0xE000 #0x400F #0x60 ; offset 0x060 for this register #0x0540 #0x01C0 [r0, r2] ; write the register’s contents ; ; MOVW MOVT MOVW LDR ORR STR r6, r6, r7, r1, r1, r1, #0xE000 #0xE000 #0x604 [r0, r7] #0x1 [r0, r7] ; ; ; ; enable timer0 - RCGCTIMER p 321, base 0x400FE000 offset - 0x604 bit NOP NOP NOP NOP NOP ; give myself clocks per spec 413 Appendix D MOVW MOVT MOVW LDR ORR STR r8, r8, r7, r1, r1, r1, #0x0000 ; #0x4003 ; #0x4 ; [r8, r7] ; #0x21 ; [r8, r7] configure timer0 to be one-shot, p.698 GPTMTnMR base 0x40030000 offset 0x4 bit 5 = 1, 1:0 = 0x1 LDR ORR STR r1, [r8] r1, #0x4 r1, [r8] MOVW r7, #0x30 ; set the match value at MOV r1, #0 ; since we’re counting down STR r1, [r8, r7] ; offset - 0x30 MOVW LDR ORR STR r7, r1, r1, r1, #0x18 ; [r8, r7] ; #0x10 ; [r8, r7] ; set bits in the GPTM Interrupt Mask Register p 714 - base: 0x40030000 offset - 0x18, bit MOVW MOVT MOVW MOV STR r6, r6, r7, r1, r1, #0xE000 ; #0xE000 ; #0x100 ; #(1 [...]... corporate note, in 1998 ARM Holdings PLC was floated on the London and New York Stock Exchanges as a publicly traded company 9 An Overview of Computing Systems v7 Cortex-A15 APPLICATION Cortex-A12 EMBEDDED Cortex-A9 CLASSIC v6 Cortex-A8 v5 ARM1 1MP Cortex-A5 v6-M v7-M v4 ARM9 26 ARM1 176 Cortex-R7 SC000 SC300 SC100 ARM9 68 ARM1 136 Cortex-R5 Cortex-M1 Cortex-M4 Cortex-A57 ARM7 TDMI ARM9 46 ARM1 156T2 Cortex-R4... interested in assembly language, but a reference for coding in ARM assembly language, which ultimately helps in using any assembly language In this edition we also include an introduction to Code Composer Studio (from Texas Instruments) alongside the Keil RealView Microcontroller Development Kit Appendices A and B cover the steps involved in violating just about every programming rule, so that simple assembly. .. handset market, and ARM was the processor powering these devices While TI supplied a large portion of the cellular market’s silicon, there were other ARM partners doing the same, including Philips, Analog Devices, LSI Logic, 10 ARM Assembly Language PrairieComm, and Qualcomm, with the ARM7 as the primary processor in the offerings (except TI’s OMAP platform, which was based on the ARM9 ) Application Specific... 377 Chapter 18 Mixing C and Assembly 379 18.1 Introduction 379 18.2 Inline Assembler 379 18.2.1 Inline Assembly Syntax 382 18.2.2 Restrictions on Inline Assembly Operations 384 18.3 Embedded Assembler 384 18.3.1 Embedded Assembly Syntax 386 18.3.2 Restrictions on Embedded Assembly Operations 387 18.4 Calling between C and Assembly 387 18.5 Exercises... technology, and computer technology is no exception Since the First Edition of ARM Assembly Language: Fundamentals and Techniques was published in 2009, ARM Limited and its many partners have introduced a new family of embedded processors known as the Cortex-M family ARM is well known for applications processors, such as the ARM1 1, Cortex-A9, and the recently announced Cortex-5x families, which provide... Here a skilled programmer or system designer with a knowledge of assembly language is a valuable asset * † ARM 2009 Annual Report, www.a rm.com/annualreport09/business-review ARM 2012 Annual Report, see www.a rm.com Preface xvii In the second edition, we focus on the Cortex-M4 microcontroller in addition to the ARM7 TDMI While the ARM7 TDMI still outsells the Cortex-M family, we believe the Cortex-M... designs Throughout the 1990s, ARM continued to make improvements to the architecture, producing the ARM8 , ARM9 , and ARM1 0 processor cores, along with derivatives of these cores, and while it’s tempting to elaborate on these designs, the discussion could easily fill another textbook However, it is worth mentioning some highlights of this decade Around the same time that the ARM9 was being developed, an... 25 years, holding design positions at Motorola (now Freescale Semiconductor), AMD, and ARM While at ARM he was the primary author of the ARM VFP floating-point architecture and led the design of the ARM1 0 VFP, the first hardware implementation of the new architecture Most recently he has joined the Patents Group in ARM, identifying patentable inventions within the company and assisting in patent litigation... debugging a part was often very difficult and involved adding large amounts of extra hardware to a system The ARM7 TDMI expanded the original ARM7 design to include new hardware specifically for an external debugger (the initials “D” and “I” stood for Debug and ICE, or In-Circuit 8 ARM Assembly Language ABE A[31:0] Address register Address incrementer Incrementer P C Register bank A L U B U S A PC Update... processor cores, ARM began acquiring other companies focusing on all of these specific areas In 2003, ARM purchased Adelante Technologies for data engines (DSP processors, in effect) In 2004, ARM purchased Axys Design Automation for new hardware tools and Artisan Components for standard cell libraries and memory compilers In 2005, ARM purchased Keil Software for microcontroller tools In 2006, ARM purchased ... CLASSIC v6 Cortex-A8 v5 ARM1 1MP Cortex-A5 v6-M v7-M v4 ARM9 26 ARM1 176 Cortex-R7 SC000 SC300 SC100 ARM9 68 ARM1 136 Cortex-R5 Cortex-M1 Cortex-M4 Cortex-A57 ARM7 TDMI ARM9 46 ARM1 156T2 Cortex-R4 Cortex-M0... only a textbook for those interested in assembly language, but a reference for coding in ARM assembly language, which ultimately helps in using any assembly language In this edition we also include... SECOND EDITION ARM ASSEMBLY LANGUAGE Fundamentals and Techniques SECOND EDITION ARM ASSEMBLY LANGUAGE Fundamentals and Techniques William Hohl Christopher Hinds ARM, Inc., Austin, Texas