Investigation of thickness and orientation effects on the III v DG UTB FET a simulation approach

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Investigation of thickness and orientation effects on the III v DG UTB FET a simulation approach

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INVESTIGATION OF THICKNESS AND ORIENTATION EFFECTS ON THE III-V DOUBLE-GATE ULTRA-THIN-BODY FET: A SIMULATION APPROACH GUO YAN (M.ENG, NUS) A THESIS SUBMITTED FOR THE DEGREE OF MASTER OF ENGINEERING DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING NATIONAL UNIVERSITY OF SINGAPORE 2013 ACKNOWLEDGEMENT I would like to take this opportunity to express my profound gratitude and sincere appreciation to my research supervisor, Professor Liang Gengchiau for his patient research guidance and training for me during the course of my master’s study I am greatly indebted to his sharing of knowledge and strict research attitude Without his timely help, strong encouragement, and constructive feedback, much of my research would not be possible I also want to thank Professor Yeo Yin-Chia for his valuable suggestions from an experimentalist’s perspective and insightful discussions during my study I want to thank my senior Dr Lam Kai-Tak for his assistance of research work during my master’s candidature as well I TABLE OF CONTENTS ACKNOWLEDGEMENT .I TABLE OF CONTENTS II ABSTRACT III LIST OF TABLES IV LIST OF FIGURES V Chapter Introduction 1.1 MOSFET evolution 1.2 MOSFET physics 1.2.1 Operation principle 1.2.2 Scaling theory 1.3 MOSFET challenges, limitations and solutions 1.3.1 Short channel effect and structure innovation 1.3.2 Mobility bottleneck and III-V compound semiconductors 1.4 Chapter Motivation, solution and overview of thesis 10 Methodology and Theory 13 2.1 Overview 13 2.2 Tight-binding method 13 2.2.1 Assumption underlying the TB method 14 2.2.2 Choice of basis set 15 2.2.3 Derivation and application to 3D, strain and UTB 16 2.3 Top-of-barrier model for ballistic transport 19 2.4 Self-consistent calculation for charge and potential 21 2.4.1 Capacitive model 21 2.4.2 Atomistic model 23 Chapter Simulation Results and Discussions - Orientation Effect 26 Chapter Simulation Results and Discussions - Body Thickness Effect 34 Chapter Conclusion & Future Work 44 5.1 conclusions 44 5.2 Future works 45 Reference 47 Appendices 50 II ABSTRACT III-Vs with their improved transport properties, along with novel double-gate ultra-thin-body (DG-UTB) design, could effectively enhance the performance of the nanoscale MOS devices In this work, we adopt the sp3d5s* tight-binding model and top-of-barrier model to study the orientation and body thickness effects on the III-V DG-UTB device performance The work consists of two parts: (1) the III-V comparisons of ballistic transport in different transport direction/surface orientation and voltage scaling of CMOS based on ITRS standard; (2) the body thickness effect on the GaSb UTB device performance and the analysis of electrostatics of UTB with different thickness In the first part, we find that at EOT = 1.0 nm, InAs has a good performance due to the high injection velocity and Si has poor ballistic performance in (111) and (011) surfaces due to the heavy valleys in the electron transport When EOT = 0.5 nm, InAs degrades to the worst performance in all directions, owning to the lack of states GaSb along [0-11]/(011) has the highest current among all combinations because of the states projected from the low L-valley We also find in the ballistic conditions, Vdd could be scaled down to as low as 0.5 V for CMOS logic based on ITRS 2022 specifications In the second part we observe that 24-AL GaSb has the largest ON-state current for both EOT = 1.0 nm (SiO2) and EOT = 0.16 nm (HfO2) due to the higher injection velocity and larger electron density While the performance of 12-AL device suffers from the heavier carrier mass at EOT = 1.0 nm, it recovered by using HfO2 as the oxide layer due to the improved density of states III LIST OF TABLES Table Constant-Field Scaling of MOSFET Device and Circuit Parameters Table The effective masses calculated for the lowest four conduction bands (Г1, Г2, Г3, and Г4) for UTB FET with body thickness of 12 AL and the lowest two conduction bands (Г1 and Г2) for UTB FETs with body thicknesses of 24 AL, 36 AL and 48 AL at the Г valley of VG = 0.4 V and VG = 0.8 V The effective mass of bulk GaSb at the Г valley is also shown in the first row for comparison 36 IV LIST OF FIGURES Figure 1-1 Projection of transistor size up to year 2022 (Source: www.pingdom.com) Figure 1-2 MOSFET at three operation modes: (a) subtreshold (b) linear (c) onset of saturation (d) saturation with different terminal bias applied and the inversion layer shown Figure 2-1 Top-of-barrier model schematic One parabolic band is drawn at the top of energy barrier for illustration Uscf is the the self-consistent potential at the top of the barrier 20 Figure 2-2 Flow of simulation steps involving Poisson equation and tight-binding model in self-consistent calculation and the relation with E-k and transport data 23 Figure 3-1 (a) The DG-UTB structure simulated in this work (b) (001) surface atomic arrangement with transport directions [100] and [110] (c) (111) surface atomic arrangement with transport directions [-110] (d) (011) surface atomic arrangement with transport directions [100] and [110] are shown with both top view (top) and side view (bottom) 26 Figure 3-2 (a) ID-VG of GaSb is plotted (linear and log) with the electrical parameters indicated Ion comparisons of Si, GaSb and InAs along [100]/(001), [110]/(001), [110]/(111), [100]/(011) and [0-11]/(011)directions are shown with (b) EOT = 1.0 nm (c) EOT = 0.5 nm and (d) EOT = 0.16 nm 27 Figure 3-3 The 1-D band structure of UTB of Si, GaSb and InAs along (a) [100]/(001) direction (b) [-110]/(111) direction Their lowest band effective mass are shown in the plot 28 Figure 3-4 The 2-D DOS of Si, GaSb and InAs in (a) (001) surface (b) (111) surface and (c) (011) surface with their respective lowest energy adjusted to eV in the plot 29 Figure 3-5 The 2-D energy contour of (a) Si (b) GaSb and (c) InAs in (011) surface with the transport directions shown 31 Figure 3-6 The 1-D band structure of UTB of Si, GaSb and InAs along (a) [100]/(011) direction (b) [0-11]/(011) direction Their lowest band effective mass are shown 32 Figure 4-1 (a) The double-gate (DG) ultra-thin-body (UTB) n-MOSFET structure simulated in this work The inset shows the x-axis in the [100] or transport direction and the z-axis in the [001] or the confinement direction (b) Atomic representation of the UTB The atoms are arranged and repeated through the UTB channel having a (001) surface The brown and purple (color online) spheres represent the group V and group III atoms, respectively (c) Chart illustrating the procedures for the selfconsistent atomistic simulation 34 V Figure 4-2 (a) ID-VG (in log scale) characteristics, (b) Average injection velocity, (c) Electron density, and (d) Gate capacitance computed for FETs with body thicknesses of 12 AL (1.83 nm), 24 AL (3.65 nm), 36 AL (5.48 nm) and 48 AL (7.32 nm) The gate dielectric is SiO2 (ε = 4.0, EOT = 1.0 nm) In (d) the oxide capacitance is represented by a horizontal line In all plots we keep VD = 0.8 V and IOFF = 0.1 μA/μm 35 Figure 4-3 Band structures plotted along Г-X direction with SiO2 as the gate dielectric for FET with body thickness of (a) 12 AL at VG = 0.4 V, (b) 12 AL at VG = 0.8 V, (c) 24 AL at VG = 0.4 V, and (d) 24 AL at VG = 0.8 V The source Fermi level Efs is represented by a dotted line at E = eV in each plot 38 Figure 4-4 ID-VG (in log scale) characteristics, (b) Average injection velocity, (c) Electron density, and (d) Gate capacitance computed for FETs with body thicknesses of 12 AL (1.83 nm), 24 AL (3.65 nm), 36 AL (5.48 nm) and 48 AL (7.32 nm) The gate dielectric is HfO2 (ε = 25.0, EOT = 0.16 nm) In (d) the oxide capacitance is represented by a horizontal line In all plots we keep VD = 0.8 V and IOFF = 0.1 μA/μm 39 Figure 4-5 Band structures plotted along Г-X direction with HfO2 (EOT = 0.16 nm) as the oxide layer at Vg = 0.8 V for FETs with body thickness of (a) 12 AL, (b) 24 AL, (c) 36 AL, and (d) 48 AL The source Fermi level Efs is represented as a dot line at E = eV in each plot 40 Figure 4-6 Electron density distribution computed along the confinement direction (zdirection) for different layers with (a) SiO2 (EOT = 1.0 nm) (b) HfO2 (EOT = 0.16 nm) as the oxide layer at VG = 0.8 V The thicknesses of all FETs are normalized to Shape code: FETs with body thicknesses of (circle) 12 AL, (square) 24 AL, (triangle) 36 AL and (x-shape) 48 AL 41 Figure 4-7 (a) Comparison of ON-state current at VG = 0.8 V among different FETs and (b) Comparison of intrinsic delay at VG = 0.8 V among FETs with different ALs for SiO2 (EOT = 1.0 nm, tOX = 1.0 nm), HfO2 (EOT = 0.16 nm, tOX = 1.0 nm) and the practical oxide limit HfSiO (EOT = 0.5 nm, tOX= 2.0 nm) as the oxide layers, respectively 42 VI Chapter Introduction 1.1 MOSFET evolution Since 1925 when Mr Lilienfeld had introduced the concept and basic principle of “field-effect-transistor”, the first metal-oxide-semiconductor-field-effecttransistor (MOSFET) had yet been demonstrated until 1959 when the scientists in the Bell Lab then invented the first MOSFET as an offshoot to the patented FET design [1] Over the past 50 years, MOSFET has evolved from its primitive type to many sophisticated variations, thanks to the improvement of performance due to scaling During this period, MOSFET has downsized in an exponential manner and the rate is predicted by the famous Moore’s law [2] In 1965, Gordon Moore predicted that the number of transistors per integrated circuits doubles every 24 months The printed gate length of MOSFET has scaled from the 100 μm to 25 nm; the later refers to the 22 nm node [3], which is the first time where the gate length is not necessarily smaller than the technology node designation, according to International Technology Roadmap for Semiconductors (ITRS) The first consumer-level CPU deliveries of this size started in April 2012 1.2 MOSFET physics 1.2.1 Operation principle The current of an MOSFET is due to the flow of charge in the inversion layer or channel region adjacent to the oxide-semiconductor interface [4] Fig 2(a) shows an n-channel enhancement mode MOSFET A positive gate voltage induces the electron inversion layer, which then connects the n-type source and drain regions The source terminal is the source of carriers that flow through the channel to the drain terminal, while the conventional current enters the drain and leaves the source MOSFET operation could be divided into three modes, i.e., subthreshold mode, linear mode and saturation mode In Figure 1-1 Projection of transistor size up to year 2022 (Source: www.pingdom.com) the subthreshold region, VGS < Vth, there is no connection between source and drain, so that the drain current is approximately zero if VDS is small The inversion layer charge is a function of the gate voltage, and gate voltage can modulate the channel conductance, which determines the drain current When respectively The increase in injection velocity is due to the lighter effective masses of the thicker GaSb UTB structure of reduced quantum confinement Table summarizes the effective mass of all subbands below Efs at Γ-valley for VG = 0.4 V and 0.8 V It is noted that the effective mass values change at the different gate biases for the same thickness, due to the non-uniform potential on each atomic site with the effect of charge filling simulated in the current study Models that assume a constant effective mass or a uniform potential at each atomic site may not capture such subtle effects which play a role in carrier transport in a UTB device Table The effective masses calculated for the lowest four conduction bands (Г1, Г2, Г3, and Г4) for UTB FET with body thickness of 12 AL and the lowest two conduction bands (Г1 and Г2) for UTB FETs with body thicknesses of 24 AL, 36 AL and 48 AL at the Г valley of VG = 0.4 V and VG = 0.8 V The effective mass of bulk GaSb at the Г valley is also shown in the first row for comparison m* = 0.041 m0 at Г valley Bulk GaSb Ultra-thin GaSb Body thickness in atomic layer (AL) VG = 0.4 V VG = 0.8 V 12-AL Г1 0.1051 m0 0.1038 m0 Г2 0.0889 m0 0.0885 m0 Г3 Not applicable for transport 0.2555 m0 (slightly off- Г valley) Г4 Not applicable for transport 0.1607 m0 Г1 0.0695 m0 0.0691 m0 Г2 0.0643 m0 0.0604 m0 Г1 0.0581 m0 0.0575 m0 Г2 0.0567 m0 0.0564 m0 Г1 0.0530 m0 0.0523 m0 Г2 0.0528 m0 0.0527 m0 24-AL 36-AL 48-AL   36 As the body thickness increases, the effective mass decreases, resulting in the higher average injection velocities for the GaSb FET with 48-AL thickness, as shown in Fig 4-2 (b) However, the density of states of 2D material is generally proportional to the effective mass In principle a thicker material has a lower carrier density Therefore, FETs with body thicknesses of 36 AL and 48 AL have lower carrier densities as compared to the thinner FETs, cf Fig 42 (c) In addition, the small quantum capacitance (CQ) of the ultrathin GaSb also has a major role in affecting device performance From the classical point of view, effects of CQ can be ignored for bulk materials as it is much larger than the oxide capacitance (COX) The gate capacitance (CG) of bulk devices can thus be estimated by a simple serial capacitance model, 1/ CG = 1/ CQ + 1/ COX, which is dominated by COX Therefore, the carrier density is only a function of COX and VG – VT, where VT is the threshold voltage On the contrary, due to the smaller dimension, the CQ of nanoscale devices is determined by the density of states of materials and could be much smaller than their bulk counterpart For this work, CG is evaluated by dQ/dVG where Q is the charge in the channel, shown in Fig 4-2 (d) It is observed that at VG = 0.8 V, CG for all body thicknesses are lower than COX, indicating that the contribution of CQ is important Specifically, due to the involvement of only a few subbands in the transport, the CG of thicker materials, e.g body thicknesses of 36 AL and 48 AL, are lower than that of the thinner thicknesses, i.e the ability of the gate to increase the carrier density in the channel is lower for the thicker materials As a result of the competition between the three parameters of density of state, gate capacitance and injection velocity, ION decreases as the GaSb body thickness increases Furthermore, it is interesting to note that instead of obtaining the maximum currents in the GaSb UTB MOSFET of 12-AL thickness, the FET with 24-AL thickness has the maximum current among these samples 37 Figure 4-3 Band structures plotted along Г-X direction with SiO2 as the gate dielectric for FET with body thickness of (a) 12 AL at VG = 0.4 V, (b) 12 AL at VG = 0.8 V, (c) 24 AL at VG = 0.4 V, and (d) 24 AL at VG = 0.8 V The source Fermi level Efs is represented by a dotted line at E = eV in each plot To understand this phenomenon, band structures of GaSb UTBs with 12-AL and 24-AL thicknesses are further examined at VG = 0.4 and 0.8 V in Fig 4-3 (a)-(d), with the source chemical potential Efs set at eV There are two bands for spin-up and spin-down electrons below Efs for both thicknesses at VG = 0.4 V On the other hand, at VG = 0.8 V, there are bands below Efs for the FET with 12 AL and only two bands below Efs for the FET with 24 AL Based on these observations, one would assume that FET with 12 AL at VG = 0.8 V would have a larger current as more bands are available for electron transport However, due to the small injection velocity related to their heavy effective masses, the FET with 12-AL thickness has a lower current than the FET with 38 24-AL thickness As shown in Table 2, the effective masses of the 3rd and 4th conduction bands are 2-3 times larger than the effective masses of the 1st and 2nd bands, resulting in a significantly lower average injection velocity of 1.6x107 cm/s as shown in Fig 4-2 (b) Figure 4-4 ID-VG (in log scale) characteristics, (b) Average injection velocity, (c) Electron density, and (d) Gate capacitance computed for FETs with body thicknesses of 12 AL (1.83 nm), 24 AL (3.65 nm), 36 AL (5.48 nm) and 48 AL (7.32 nm) The gate dielectric is HfO2 (ε = 25.0, EOT = 0.16 nm) In (d) the oxide capacitance is represented by a horizontal line In all plots we keep VD = 0.8 V and IOFF = 0.1 μA/μm Next, we examine the transfer characteristics of GaSb DG-UTB FETs with a high-permittivity gate dielectric of HfO2, as shown in Fig 4-4(a), to study the competing effects of CQ and COX in Fig 4-4(d) The drain currents of all devices are significantly enhanced from the previous SiO2 cases because of increased gate control caused by higher electrical field in the channel 39 Similarly, the band structures are investigated for different thicknesses under different gate biases Figure 4-5 Band structures plotted along Г-X direction with HfO2 (EOT = 0.16 nm) as the oxide layer at Vg = 0.8 V for FETs with body thickness of (a) 12 AL, (b) 24 AL, (c) 36 AL, and (d) 48 AL The source Fermi level Efs is represented as a dot line at E = eV in each plot As shown in Fig 4-5, at VG = 0.8 V the energy separation between Fermi level position and the lowest conduction band of 12-AL GaSb is 200 meV, while this value in the SiO2 case is only 80 meV This difference indicates that for the gate dielectric with high permittivity, the large COX allows the electric field to penetrate deeper into the center of the channel As a result, more electrons can be transported through the higher energy bands away from the valley, leading to a much varied carrier injection velocity profile as a function of VG For example, the FET with thickness of 48 AL has the highest injection velocity among all FETs at low VG (e.g., 0.2 V) but the lowest at high VG (e.g., 40 0.8V) Furthermore, the CG of all devices shown in Fig 4-4(d) are well below the COX, i.e CQ and COX are comparable in HfO2 devices as opposed to the much larger CQ than COX in the SiO2 cases This indicates that the device is not operated under the classical limit Figure 4-6 Electron density distribution computed along the confinement direction (zdirection) for different layers with (a) SiO2 (EOT = 1.0 nm) (b) HfO2 (EOT = 0.16 nm) as the oxide layer at VG = 0.8 V The thicknesses of all FETs are normalized to Shape code: FETs with body thicknesses of (circle) 12 AL, (square) 24 AL, (triangle) 36 AL and (x-shape) 48 AL Moreover, the strong electric field using high-κ materials also leads to another important effect: in the FET with thicker body thickness such as 48 AL shown in Fig 4-6, the charges are accumulated towards the top and bottom surfaces of the channel and the UTB FET of thickness of 48 AL starts to lose the feature of body inversion For SiO2 cases, carrier distributions along the four body thicknesses of the FETs indicate body inversion due to the quantum confinement effect, as shown in Fig 4-6(a) For the case of HfO2, FETs with 12-, 24-, and 36-AL thicknesses form body inversion while the FET of 48 AL has higher carrier distribution at the top and bottom surfaces due to the stronger electric field from the gate being able to change the potential surface of GaSb easily and to generate inversion charges at the surfaces As a result, this effect plays an important role in reducing the currents in the GaSb UTB FETs with thicker body thicknesses as well 41 Figure 4-7 (a) Comparison of ON-state current at VG = 0.8 V among different FETs and (b) Comparison of intrinsic delay at VG = 0.8 V among FETs with different ALs for SiO2 (EOT = 1.0 nm, tOX = 1.0 nm), HfO2 (EOT = 0.16 nm, tOX = 1.0 nm) and the practical oxide limit HfSiO (EOT = 0.5 nm, tOX= 2.0 nm) as the oxide layers, respectively Fig 4-7 (a) compares the ION as a function of body thickness with the different gate dielectric materials Based on the previous discussion, it can be seen that the simulated FETs with EOT = 1.0 nm and EOT = 0.16 nm represent the device under the classical and quantum limits, respectively, and the FETs with EOT = 0.5 nm represent a case in between As shown in Fig 4-7 (a), the largest ION exceeds the least ION for different ALs by as large as 40% for EOT = 0.16 nm while this value is only 10% for EOT = 1.0 nm, indicating that high-κ gate dielectric has a significant influence on the thickness-dependent device performance The ION increases by times from 4.8 to 20 mA/μm for FET with 12 AL whereas this improvement is only about times from 4.4 to 12 mA/μm for the FET with 48 AL when high-κ (HfO2) gate dielectric replaces the low-κ (SiO2) gate dielectric This suggests that the usage of highκ gate dielectric to improve the device performance works more effectively for FETs with thinner body thickness These comparisons justify the advantage of using thinner channel layers for high-κ gate dielectric because of enhancement 42 in body inversion Lastly, the intrinsic delay of UTB MOSFETs is investigated with these four different thicknesses using the formula  int  (Cgs  Cgd ) Vdd ID  QON  QOFF ID (4.1) , where Cgs and Cgd are the intrinsic components of the capacitances, and QON(OFF) and ID are the number of charge at the ON (OFF) state and the drain current under Vdd = 0.8 V calculated from our transport model Intrinsic delay presents the time which electrons take to travel through the intrinsic region, and in logic devices it characterizes the speed of a transistor to switch between the ON- and OFF-states If ID is simplified to be the product of charge density Q and average injection velocity vinj, it can be expected that the intrinsic delay is inversely proportional to vinj Similarly, the intrinsic delay is found as a function of the body thickness at different EOT conditions as shown in Fig 47 (b) It follows the trend of the reverse of injection velocity VG = 0.8 V in Fig 4-2 (b) and Fig 4-4 (b), i.e., FET with thickness of 12 AL > 48 AL > 24 AL > 36 AL for EOT = 1.0 nm and FET with thickness of 48 AL > 12 AL > 36 AL > 24 AL for EOT = 0.16nm Furthermore, we also found that the change of the intrisic delay for FET of 48 AL with the different oxide conditions is smaller than the values in the FETs of 12 AL, 24 AL and 36 AL It also confirmed that FET of 48 AL is operated closer to the classical limitation and conditions compared to other cases, and furhtermore, its velocity is almost constant, indicating that with the different conditions of EOT, the major change is on the carrier density However, the other cases might involve the change of the velocity casued non-parabolic bandstructure capacitance effects 43 structure and quantum Chapter Conclusion & Future Work 5.1 conclusions In this thesis the research work on III-V and Si double-gate UTB MOSFETs are conducted In the first half, the ballistic currents of Si, GaSb and InAs double-gate UTB structures are compared in multiple surface orientations and along different transport directions The orientations and directions are commonly adopted in semiconductor fabrication, so this work is intended to provide physical insights and modeling perspective for experimentalists who are conducting similar research work In the second half, the DG UTB thickness effect on the UTB MOSFET’s ballistic performance is emphasized, and the charge and potential profile is highlighted to offer the detailed explanations on the unique and outstanding properties of DG-UTB with the potential III-V material GaSb as the channel material According to the results from the investigation on channel orientation for DGUTB, InAs is found to be least direction dependent because it has the isotropic Г-valley The current of InAs also degrades to the worst when EOT is decreased to 0.5 nm and 0.16 nm due to poor DOS GaSb have the best current performance in [-110]/(111) and [0-11]/(011) because of the state contribution from L-valley Si has good performance only in (001) surface and perform much worse in the other two surfaces because of lack of Г- and L-valley In overall, InAs appears to be the least orientation dependent material with the highest electron velocity Si has the advantage of density of states but suffers from the heavy effective mass and thus performs worse in the large EOT cases GaSb is a little bit complex and its performance is highly dependent on the orientation because of its close Г-L energy difference and the effect on valley projection By choosing the correct orientation and direction, the ballistic performance of GaSb could much outperform Si and GaSb 44 In terms of the UTB body thickness effect, the performances of UTB MOSFET of different AL FETs are precisely analyzed based on the band structure effects resulted from quantum quantization In SiO2 cases, thicker layers are found to have smaller current because their effective masses are normally larger However, because 12-AL suffers from the heavy low-energy bands, the 24-AL device exhibits the largest drive current When the dielectric constant is increased, the devices operated in quantum limits, and more subbands are used for transport As a result, 12-AL has the largest electron density and the injection velocity is much improved, and the performance gap between 12-AL and 24-AL devices is reduced Electrons tend to accumulate towards the surface of the UTB structure when high-κ material is used and this phenomenon is believed to further degrade the drive current if scatterings are introduced The improved electrostatics increases the ON-state current for almost times, but affect little on the intrinsic delay, especially for the 48-AL FET Therefore, we believe that the thickness and dielectric effect should be carefully taken into consideration in the practical design of DG-UTB MOSFET, according to the specific requirements 5.2 Future works There is a list of possible future works related to this research, as presented below:  Nanowire-based device simulation: DG-UTB is not the only innovative structure for the future MOSFET device design There is another branch of structures which is nanowire-based 3-D MOSFET The most famous example is probably Intel’s 3-D FinFET transistor manufactured at 22nm in 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Physical Review B, vol 19, pp 793-805, 1979 D A Papaconstantopoulos and M J Mehl, "The Slater-Koster tight-binding method: a computationally efficient and accurate approach," Journal of Physics-Condensed Matter, vol 15, pp R413-R440, Mar 19 2003 P Vogl, H P Hjalmarson, and J D Dow, "A Semi-Empirical Tight-Binding Theory of the Electronic-Structure of Semiconductors," Journal of Physics and Chemistry of Solids, vol 44, pp 365-378, 1983 49 Appendices Journal Publication [1] Yan Guo, Kai-Tak Lam, Yee-Chia Yeo, Gengchiau Liang, “Effect of body thickness on the electrical performance of ballistic n-channel GaSb double-gate ultrathin-body transistor”, IEEE Transactions on Electron Devices, submitted, in review [2] Yan Guo, Yee-Chia Yeo, Gengchiau Liang, “Comparisons of orientation effect on Si, GaSb and InAs NMOS UTB device performance”, IEEE Transactions on Electron Devices, in submission Conference Publication [1] Y Guo, K.-T Lam, Y.-C Yeo, and G Liang, "Ultimate performance projection of ballistic III-V ultra-thin body MOSFETs," IEEE International Nanoelectronics Conference (INEC), Singapore, Jan - 4, 2013 [2] Y Guo, Y.-C Yeo, and G Liang, "Voltage scaling limits of Si, GaSb and InAs DG-UTB FETs benchmarked against ITRS metrics for year 2026," IEEE International Electron Devices Meeting 2013, submitted, in review [3] K H Goh, Y Guo, X Gong, G Liang, and Y.-C Yeo, "Near ballistic sub-7nm In0.53Ga0.47As junctionless FET featuring 1nm extremely-thin channel and raised S/D structure," IEEE International Electron Devices Meeting 2013, submitted, in review 50 [...]... semiconductors has a crucial demand for future electronics devices There are various reports on the orientation effects on Si and III- V nanowire performance, but not many reports on the III- V UTB orientation investigations Neither the data is incomplete, nor is the explanation limited [11, 24, 26-28] Therefore we try to provide a systematic analysis of the orientation effect on the Si and III- V UTB performance... double-gate ultra-thinbody (DG- UTB) , which is a hybrid of UTB SOI and Multi-gate FET The 8 benefit of this structure is that it allows the undoped channel for low random variation due to minimization of random dopant fluctuations Based on literature, undoped device has the benefit of the lowest measured random VT variation value Overall, with the combined advantages of UTB SOI and multi-gate structures, DG- UTB. .. have huge advantage in the transistor speed, people raise concerns about the low electron concentration because III- V usually has lighter effective mass than Si However, this problem can be mitigated by thinning channel The nonparabolic conduction bands and the electron quantization significantly increase the effective mass The high vinj and reasonable electron concentration render III- V transistor... at the lowest energy while GaSb and InAs has only one The degeneracy counteracts the disadvantage of the heavy effective mass of the lowest band in Si, and therefore all three materials have similar magnitudes of current In the [110]/(001) direction, m* of Si and InAs are slightly decreased and m* of GaSb is slightly increased compared to the ones in the [100]/(001) The increased value for GaSb is mainly... square of the tight-binding wavefunction to get the spatial charge profile Sum of all charge profiles over the entire 2-D k-space (usually 1st Brillion zone) gives the charge profile along the thickness The charge is then feed back to the Poisson equation to calculate the corrections to the potential profile Then the corrected potential is used again to calculate the 2-D band structure and the above... (a) we plot the band structures of the Si, GaSb and InAs along [100]/(001) direction, with their lowest conduction band at E = 0.2 eV In the [100]/(001) direction, the effective mass of the lowest conduction band, m*, 27 for Si, GaSb and InAs are 0.1638 m0, 0.0878 m0 and 0.0733 m0 respectively Si has almost the twice of the effective mass value of GaSb and InAs However, Si has 2 degenerated bands at... channel and thus provide more accurate band structure information The schematic of this model is illustrated as below Figure 2-2 Flow of simulation steps involving Poisson equation and tight-binding model in self-consistent calculation and the relation with E-k and transport data 23 The basic theory behind this approach is that the diagonal elements in a realspace representation give us the electron... power However, there are factors which do not scale neither by the dimensions nor the voltage The reason is that these factors are linked to the thermal voltage kT/q and the silicon band gap Eg, which do not change with scaling The parameters affected by the former factors include the subthreshold voltage and the inversion layer thickness, and the parameters affected by the later ones include the built-in... combination of atomic orbitals (LCAO) historically [33] and Slater et al first proposed it as a semi-empirical approach by treating the Hamiltonian matrix elements as the disposable constants The SlaterKoster’s concept to treat the TB approach as an interpolation scheme has been widely accepted to investigate the semiconductors, both elemental and compound [34] In 2.2.1 the theory and assumptions of TB... adjust the on- site energies and off-diagonal interaction terms The off-diagonal interaction terms are modified by the bond length, reflected in the Slater-Koster two-center integrals  V 'ia jc d    0  Via jc  d  (2.12) d and d0 are the strained and unstrained bond length and η is the coefficient according to the Harrison’s scaling law and its value is bond dependent V 'ia jc and Via jc represent ... degenerated bands at the lowest energy while GaSb and InAs has only one The degeneracy counteracts the disadvantage of the heavy effective mass of the lowest band in Si, and therefore all three materials... direction and the z-axis in the [001] or the confinement direction (b) Atomic representation of the UTB The atoms are arranged and repeated through the UTB channel having a (001) surface The brown and. .. 12 AL and only two bands below Efs for the FET with 24 AL Based on these observations, one would assume that FET with 12 AL at VG = 0.8 V would have a larger current as more bands are available

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