Fabrication and characterization of semiconductor nanowires for thermoelectric application 1 2

Fabrication and Characterization of Semiconductor Nanowires for Thermoelectric Application Kwok Wai Keung A Thesis Submitted to the Department of Electrical and Computer Engineering in Partial Fulfilment of the Requirement for the Degree of Master of Engineering National University of Singapore 2011 i Abstract In this dissertation, the fabrication and characterization of germanium (Ge) and silicon (Si) nanowires are presented. Ge nanowires were grown using the vapour-liquid-solid (VLS) method while Si nanowires were fabricated by catalytic etching. The nanowires were then characterized in terms of their electrical resistivity and thermal conductivity. The 3! method was used to measure the thermal conductivity of the Ge nanowires. It was found that the thermal conductivity of the Ge nanowire was reduced by about 6 times as compared to bulk Ge. Catalytic etching using a metal catalyst was used to fabricate Si nanowires in this project. The mechanism of the catalytic etching fabrication technique is of interest since several details of the exact mechanism are still not clear. Different thicknesses of metals were investigated as a bi-layer blocking layer to test how these would affect the etching process. In order to understand better the catalytic etching mechanism, XPS and Auger SEM was used to find out if Si atoms diffused through the metal catalyst during the etching. It was found that there is no significant diffusion of Si from the underlying substrate through the metal catalyst during the catalytic etching process. It is therefore likely that catalytic etching of Si took place at the interface between the metal catalyst layer and the Si substrate, rather than at the interface between metal catalyst and the etchant solution as the latter would require Si atoms to diffuse from the underlying substrate through the metal catalyst to the metal-solution interface. ii Acknowledgements I would like to show appreciation and gratitude to my thesis supervisor A/Prof Chim Wai Kin for his support and guidance. He has been an inspiring and patient supervisor who encourages me to try various approaches in the research and experimental work. He also gave me invaluable advices that will be extremely useful for my career in future. I would also like to thank Huang Jin Quan, Huang Zhi Qiang and Chiam Sing Yang who have given me great support and guidance in the analysis of my experimental results. Without the knowledge of these two veterans, my work will not be as smooth. I would also like to give special thanks to a few research students from CICFAR1 who taught me how to do several processes such as the e-beam lithography and wire bonding. Zi Qian, Wang Rui and Liu Dan in particular were selfless in divulging their important experiences gained from many rounds of processes. They are really nice people. Lastly, I would like to thank my family. For many nights, I was required to run germanium samples late at night as germanium nanowires tend to oxidize quickly and the machine is more available at night. My family only got to see me a few nights per week during the really busy period. They gave me strong support and had been my source of energy and fighting spirit during the rough times. iii Table of Content Abstract ............................................................................................................................ i" Acknowledgements ......................................................................................................... ii" Table of Content ............................................................................................................ iii" List of Figures ............................................................................................................... vii" List of Tables ............................................................................................................... xiv" Chapter 1" Introduction and Motivation ...................................................................... 1" 1.1" Background ..................................................................................................... 1" 1.2" Efficiency of a thermoelectric material........................................................... 3" 1.3" Opportunity in semiconductor nanowires ....................................................... 4" 1.4" Organization of thesis ..................................................................................... 4" Chapter 2" Literature Review....................................................................................... 6" 2.1" The early development of thermoelectrics .................................................... 6" 2.2" Factors affecting thermoelectric properties in nanowires ............................. 6" 2.2.1" Effect of nanoscale geometries on thermal conductivity and Seebeck coefficient in laboratory created nanowires .................................................... 7" 2.2.2 Effect of surface roughness on the thermal conductivity of large area wafer-scale arrays of nanowires...................................................................... 9" 2.2.3" Choice of materials on electrical resistivity ...................................... 10" 2.2.4" Keeping power factor #$%# while lowering thermal conductivity .... 10" 2.3" Growth mechanism and different synthesis techniques of germanium nanowires .............................................................................................................. 11" 2.3.1" Growth mechanism of germanium nanowires .................................. 11" iv 2.3.2 Different nanowire synthesis techniques ............................................. 18" 2.4 Fabrication of silicon nanowires by catalytic etching..................................... 21" 2.4.1 Introduction .......................................................................................... 21" 2.4.2" Methods to deposit the metal catalyst ............................................... 23" 2.5 Methods to test the thermal conductivity of nanoscale thermoelectric materials ............................................................................................................................... 27" 2.5.1 3! method ............................................................................................ 28" 2.5.2 Thermoreflectance Method .................................................................. 36" 2.5.3 Suspended sample-attached T-type nanosensor method...................... 40" 2.5.4 Suspended microstructure method ....................................................... 43" 2.5.5 Scanning thermal microscope (SThM) with 3! method ..................... 45" Chapter 3" 3.1" Experimental Details ................................................................................ 48" Four-point probe structure test device ........................................................ 48" 3.2 Sample preparation ......................................................................................... 50" 3.2.1 Si substrate for Ge nanowire growth ................................................... 50" 3.2.2 Si substrate for dispersing Ge nanowire and depositing the contacting electrodes ...................................................................................................... 52" 3.2.3 Si substrate for investigation on the catalytic etching mechanism ...... 53" 3.3 Ge nanowire growth ........................................................................................ 54" 3.4 Scanning electron microscope examination.................................................... 55" 3.5 Nanowire integration ...................................................................................... 57" 3.6 Optical microscope examination..................................................................... 58" v 3.7 Electron beam lithography .............................................................................. 60" 3.8 Electrode deposition........................................................................................ 63" 3.9 Probe station and parameter analyzer characterization ................................... 65" 3.10 Thermal conductivity measurement .............................................................. 66" 3.11 Ceramic heater setup for temperature dependence characterization of thermal conductivity........................................................................................................... 68" 3.12 X-ray photoelectron spectroscopy (XPS) ..................................................... 69" 3.13 Auger electron spectroscopy (AES).............................................................. 70" Chapter 4" Thermal conductivity characterization of Ge Nanowires ........................ 72" 4.1 Introduction .................................................................................................. 72" 4.2 Verification of the 3! method setup with platinum microwire ................... 72" 4.3 Results and discussion ................................................................................. 76" 4.3.1 Ge nanowire (GeNw) growth on Si (111) substrate .................................... 76" 4.3.2 Effect of annealing on contact resistance..................................................... 82" 4.3.3 Effect of the process time on GeNw sample ................................................ 86" 4.4 Final result on thermal conductivity of GeNw ............................................... 89" 4.5 Summary ......................................................................................................... 92" Chapter 5" Investigation on the Catalytic Etching Mechanism of Silicon............... 93" 5.1 Introduction ..................................................................................................... 93" 5.2 Effect of the metal film thickness on the etching process .............................. 94" 5.3 XPS results on the catalytic etching mechanism ............................................ 97" 5.4 AES results to further investigate the catalytic etching mechanism ............... 99" vi 5.4 Effect of the size of the metal mask on the etched structure ........................ 103" 5.5 Summary ....................................................................................................... 106" Chapter 6" Conclusion ............................................................................................. 107" 6.1 Conclusion ............................................................................................... 107" 6.2 Recommendations for future work .......................................................... 107" References ................................................................................................................... 109" vii List of Figures Figure 1 In situ TEM images recorded during the process of nanowire growth. (a) Au nanoclusters in solid state at 500&C. (b) Alloying initiates at 800&C, at this stage Au exists in mostly solid state. (c) Liquid Au/Ge alloy. (d) The nucleation of Ge nanocrystal on the alloy surface. (e) Ge nanocrystal elongates with further Ge condensation and eventually a wire forms (f). (g) Several other examples of Ge nanowire nucleation, (h,i) TEM images showing two nucleation events on a single alloy droplet [46]. ..................... 13" Figure 2 (a) Schematic illustration of vapor-liquid-solid nanowire growth mechanism including three stages: (I) alloying, (II) nucleation, and (III) axial growth. The three stages are projected onto the conventional Au-Ge binary phase diagram (b) to show the compositional and phase evolution during the nanowire growth process [46]. ...................................................................... 13" Figure 3 High-resolution scanning electron microscopy (HRSEM) images of (a) the crude Ge nanowire synthesis product, (b) redeposited and purified Ge nanowires [48]. ............................................................................................. 16" Figure 4 (a) Under optimum growth conditions of Ge nanowires, growth of one nanowire per Au seed is achieved. (b) Under-growth at low temperature and (c) over-growth at high temperature [50]...................................................... 17" Figure 5 SEM image on as-grown germanium nanowires.................................... 18" viii Figure 6 SEM image of germanium nanowires after vacuum thermal treatment. The scale bar corresponds to 1 µm. The images were taken on either JEOL 6400 or JEOL JSM6430 field emission SEM operated at 5 keV [51]. ......... 19" Figure 7 Cross-sectional SEM images of the pores bored in a Si(100) sample with (a) a single spherical Au particle, (b) an aggregate composed of two Au particles, and (c) an aggregate composed of a large number of Au particles after etching in an aqueous solution containing 2.6 mol/dm3 HF and 8.1 mol/dm3 H2O2 for 1 hour. Insets show their corresponding enlarged images of the bottom parts of pores [71]................................................................... 24" Figure 8 Schematics of the Si nanowire catalytic etching fabrication process. [76] ....................................................................................................................... 25" Figure 9 Schematic of the SiNW fabrication process. (a) AAO membrane is transferred onto the surface of a Si substrate. (b) Evaporation of Cr/Au nanodots through the AAO pores forming the blocking metal nanodots on Si. (c) Removal of the AAO template before the subsequent deposition of a thin Au layer that will act as the etching catalyst. (d) Anisotropic etching and formation of SiNWs by immersing the sample in HF/H2O2. ...................... 26" Figure 10 Illustration of the four-probe configuration for measuring the specific heat and thermal conductivity of a rod- or filament-like specimen is shown. The specimen is heat sunk to the sapphire substrate through the four electric contacts, but the part in-between the two inner voltage contacts needs to be suspended to allow the temperature variation. A high vacuum is needed and ix a thermal shielding is preferred to eliminate the radial heat current from the specimen to the environment [6]................................................................... 29" Figure 11 The amplitude reaches a maximum as !" → 0, i.e., when the thermal wavelength # >> L, where λ is defined as λ = √(α/2ω) and α = k/$Cp. The amplitude decreases to zero along the line of the averaged temperature accumulation when !" >> 1 (# '>" >5+-0:" ,)'" ?+*.'33" */" 0$0*@-+'" :+*@,)!" A$B" C5" 0$0*.&53,'+3"-0"3*&->"3,$,'"$,"DEE$F!"A%B"C&&*1-0:"-0-,-$,'3"$,"GEE$FH"$,",)-3"3,$:'"C5"'I-3,3"-0" 2*3,&1"3*&->"3,$,'!"A.B"J-K5->"C5LM'"$&&*1!"A>B"#)'"05.&'$,-*0"*/"M'"0$0*.+13,$&"*0",)'"$&&*1" 35+/$.'!" A'B" M'" 0$0*.+13,$&" '&*0:$,'3" @-,)" /5+,)'+" M'" .*0>'03$,-*0" $0>" '4'0,5$&&1" $" @-+'" /*+23"A/B!"A:B"N'4'+$&"*,)'+"'I$2?&'3"*/"M'"0$0*@-+'"05.&'$,-*0H"A)H-B"#+*?&',"6OP8!" " 9-:5+'" 7" A$B" N.)'2$,-." -&&53,+$,-*0" */" 4$?*+Q&-K5->Q3*&->" 0$0*@-+'" :+*@,)" 2'.)$0-32" -0.&5>-0:",)+''"3,$:'3R"A;B"$&&*1-0:H"A;;B"05.&'$,-*0H"$0>"A;;;B"$I-$&":+*@,)!"#)'",)+''"3,$:'3" $+'" ?+*S'.,'>" *0,*" ,)'" .*04'0,-*0$&" C5QM'" %-0$+1" ?)$3'" >-$:+$2" A%B" ,*" 3)*@" ,)'" .*2?*3-,-*0$&"$0>"?)$3'"'4*&5,-*0">5+-0:",)'"0$0*@-+'":+*@,)"?+*.'33"6OP8!" Literature Review 14 (I) Alloying process (Figure 1 a-c and Figure 2, stage I): Au clusters remain in the solid state up to the maximum experimental temperature 900oC if there is no Ge vapour condensation. With increasing amount of Ge vapour condensation and dissolution, Ge and Au form an alloy and liquefy. The volume of the alloy droplets increases, and the elemental contrast under TEM examination decreases (due to dilution of the heavy metal Au with the lighter element Ge). The alloy composition crosses sequentially, from left to right, a biphasic region (solid Au and Au/Ge liquid alloy) and a single phase region (liquid). This alloying process can be depicted as an isothermal line in the Au-Ge phase diagram as shown in Figure 2(b). (II) Nucleation (Figure 1 d-e and Figure 2, stage II): Once the composition of the alloy crosses the second liquidus line, it enters another biphasic region (Au/Ge alloy and Ge crystal). This is where nanowire nucleation starts. Knowing the alloy volume change, it is estimated that the nucleation generally occurs at Ge weight percentage of 50-60%. This value differs from the composition calculated from the equilibrium phase diagram which indicates the first precipitation of Ge crystal should occur at 40% Ge (weight) and 800oC. This difference indicates that the nucleation indeed occurs in a supersaturated alloy liquid. Occasionally, it can be observed that two Ge nanocrystals precipitate from single alloy droplets and create two liquid/solid interfaces (Figure 1 h and i). The finite volume of the alloy liquid, on the order of 10-17 cm-3, limits the number of possible heterogeneous nucleation events, unlike those of microscopic systems where tens or hundreds of whiskers can be observed on single alloy droplet [44]. (III) Axial growth (Figure 1 d-f and Figure 2, stage III): Once the Ge nanocrystal Literature Review 15 nucleates at the liquid/solid interface, further condensation/dissolution of Ge vapour into the system will increase the amount of Ge crystal precipitation from the alloy. The incoming Ge species prefer to diffuse to and condense at the existing solid/liquid interface, primarily due to the fact that less energy will be involved with the crystal step growth as compared with secondary nucleation events in a finite volume. Consequently, secondary nucleation events are efficiently suppressed, and no new solid/liquid interface will be created. The existing interface will then be pushed forward (or backward) to form a nanowire (Figure 1f and Figure 2b). After the system cools, the alloy droplets solidify on the nanowire tips. Generally, the diameters of the nanowires are larger than the sizes of the initial clusters by several nanometers due to the Au/Ge alloying process. This allows one to control the diameter of the Ge nanowire by depositing catalysts of different sizes. 2.3.1.2 Supercritical Fluid-Liquid-Solid (SFLS) mechanism The SFLS synthesis of Ge and Si nanowires follows very similar procedures as the VLS mechanism. The method relies on the thermal degradation of an organosilane or organogermane precursor in the presence of sterically stabilized gold nanoparticles. A precursor solution composed of alkanethiol passivated Au nanoparticles and a liquid germanium precursor is injected through a six-way valve into preheated and pre-pressurized supercritical hexane typically at 375°C and 20 MPa in a titanium reactor [47]. The high precursor solubility and the high particle concentrations in the supercritical fluid environment permit the synthesis of large quantities of single-crystal nanowires. Germanium nanowires synthesized under such conditions have diameters ranging from 5 to 30 nm with lengths of the order of several micrometers. Figure 3(a) Literature Review 16 shows the as-formed Ge nanowire material deposited on a Si substrate during the synthesis. The Ge nanowires in Figure 3(b) were deposited from an ethanol suspension. Their length is shorter because many of the nanowires were broken by sonication during dispersion. 9-:5+'"T"U-:)Q+'3*&5,-*0"3.$00-0:"'&'.,+*0"2-.+*3.*?1"AUVN"?5+-/-'>"M'"0$0*@-+'3"6OG8!" Also worth mentioning is the ability to control the nanowire growth direction by the SFLS method [48]. Ge and Si nanowires synthesized by SFLS at 375°C predominantly grow in the [110] growth direction. Si nanowires produced by Lieber and co-workers at 440°C mostly have [111] direction for larger diameter wires [49]. Based on supersaturation criterion, a shift in the predominant growth direction from [110] to [111] is expected as the level of supersaturation in the alloy seed droplet increases. The conclusion is that the SFLS method offers better control over nanowire sizes since they are essentially controlled by the size of the growth seed. Controlling size of the nanowire is very important because it appears to have a direct relationship with thermal conductivity and consequently the thermoelectric figure-of-merit when its diameter is in the nanoscale. Also, this is critical for their potential implementation Literature Review 17 into nanoscale electronic and optoelectronic devices. 9-:5+'" O" A$B" W0>'+" *?,-252" :+*@,)" .*0>-,-*03" */" M'" 0$0*@-+'3H" :+*@,)" */" *0'" 0$0*@-+'" ?'+"C5"3''>"-3"$.)-'4'>!"A%B"W0>'+Q:+*@,)"$,"&*@",'2?'+$,5+'"$0>"A.B"*4'+Q:+*@,)"$,")-:)" ,'2?'+$,5+'"6DE8!" Korgel et al. found a large size distribution of the as-produced Ge nanowires from the VLS process, presumably due to Au nanoparticle aggregation in the solution and uncontrolled deposition of Ge on the surfaces of the nanowires. Another disadvantage of the VLS method is that growth of nanowires from large Au seed particles appears to be diffusion-limited. At higher temperatures, the feeding of the Ge precursor could be rapid while the diffusion of the feedstock atoms in Au may not be sufficiently high to supersaturate a large particle. Rather, smaller regions of the Au cluster are supersaturated rapidly, which leads to nucleation and growth of smaller nanowires from the parent Au particle as shown in Figure 4(c). Too low a growth temperature causes low yield (Figure 4(b)), thus temperature is important for optimal growth of nanowires (Figure 4(a)). It seems that the diffusion limitation for the growth of large nanowires and the size-dependent growth of nanowires is general to the synthesis of various nanowire materials by the VLS mechanism. In addition, sophisticated purification and assembly techniques have yet to be developed to effectively utilize this method because it is not directly compatible with existing semiconductor technologies. Literature Review 18 2.3.2 Different nanowire synthesis techniques 2.3.2.1 Gas-phase-based Vapour Transport Method Ge nanowires were grown via a sealed-tube vapour transport process [51]. A 30-mg Ge and 7-mg GeI4 mixture was put at one end of a quartz tube (diameter 0.5 inch, length 3 inch), and a gold coated (001) Si substrate was put at the opposite end of the tube. The substrate was coated with 50-200 Å thick gold thin films using the Desktop II Denton sputtering system. The tube was flushed with N2 and evacuated to 30 mTorr. It was then sealed and heated to 1000-1100°C. The temperature gradient between the source material and the substrate was controlled to 100-200°C. After 30 minutes of the transport reaction, the furnace was air cooled to room temperature. Fluffy brownish products were collected on the Si substrate surface. Figure 5 shows a typical scanning electron microscope (SEM) image of the as-grown nanowires. It was found that the substrate surface was covered with pure nanowires with diameters ranging from 5 to 300 nm. 9-:5+'"D"N"A.B"$0"$::+':$,'" .*2?*3'>"*/"$"&$+:'"052%'+"*/"C5"?$+,-.&'3"$/,'+"',.)-0:"-0"$0"$K5'*53"3*&5,-*0".*0,$-0-0:" 7!P"2*&L>2T"U9"$0>"G!("2*&L>2T"U7Z7"/*+"(")*5+!";03',3"3)*@",)'-+".*++'3?*0>-0:"'0&$+:'>" -2$:'3"*/",)'"%*,,*2"?$+,3"*/"?*+'3"6\(8!" " 2.4.2.2 Sputter metal after patterning by RIE etch on AAO As a top-down approach, metal-assisted catalytic etching of a Si substrate with nanosphere lithography is considered a promising solution to achieve precisely positioned and aligned SiNWs with good control of diameter, length, spacing and density, avoiding the high-cost and low-throughput of conventional lithographic processes [76, 77]. In this method, a hexagonal array of nanospheres acts as a patterning mask on a Si substrate, resulting in a thin deposited metallic film with an array of holes. The part of the Si substrate that is in contact with the metal is selectively etched, leaving behind regular arrays of SiNWs. The diameter of the SiNWs follow the size of holes in the metal film or effectively the diameter of the nanospheres. The length of the SiNWs is determined by the etch time. However this approach of using nanospheres as the mask to produce a thin metal film with holes is difficult to fabricate SiNWs with diameter smaller than 20 nm. Recently Z.P. Huang et al. demonstrated the use of anodized aluminium oxide (AAO) as a mask to perform Literature Review 25 reactive ion etching (RIE) such that etch pits will be created on a Si substrate [76]. This was followed by an evaporation of a layer of Au or Ag. The metal film will have pores due to the etch pits on the substrate created by RIE. The diameter of the pores in the metal film caused by the etch pits decreases as a function of increased deposition time. The Si substrate with the patterned thin metal film can then be immersed in an aqueous solution of HF and H2O2 for etching to fabricate SiNWs. Figure 8 shows the schematic of the Si nanowire catalytic etching fabrication process. 9-:5+'"G"N.)'2$,-.3"*/",)'"N-"0$0*@-+'".$,$&1,-."',.)-0:"/$%+-.$,-*0"?+*.'33!"6\P8" 2.4.2.3 Metal nanodot arrays as a hard mask blocking material Also starting with AAO as the template, J.Q. Huang et al. [79] demonstrated that precise control of the diameter of fabricated SiNWs is also possible with the use of a blocking metal that does not catalyze the etching reaction to effectively block the chemical etching from taking place on areas that the blocking metal covers. Similar to other methods, an AAO was first deposited on a Si substrate. A layer of Cr (10nm) was deposited as a blocking metal. This was followed by a layer of Au (30nm) to protect the Cr from oxidation. After removing the AAO, a thin layer of Au or Ag (acting as the catalyst metal) was evaporated on the sample surface. The area that was covered by the thin layer of Au will be etched while the area covered by Cr/Au dots will be Literature Review 26 protected from the chemical etching, leaving behind SiNWs. The diameter and density of the SiNWs can be adjusted by tuning the size of the holes in the AAO. The process is shown schematically in Figure 9 below. 9-:5+'"]"N.)'2$,-."*/",)'"N-^_"/$%+-.$,-*0"?+*.'33!"A$B"CCZ"2'2%+$0'"-3",+$03/'++'>"*0,*" ,)'" 35+/$.'" */" $" N-" 35%3,+$,'!" A%B" *,3" *0" N-!" A.B" V'2*4$&" */" ,)'" CCZ" ,'2?&$,'" %'/*+'" ,)'" 35%3'K5'0,">'?*3-,-*0"*/"$",)-0"C5"&$1'+",)$,"@-&&"$.,"$3",)'"',.)-0:".$,$&13,!"A>B"C0-3*,+*?-." ',.)-0:"$0>"/*+2$,-*0"*/"N-^_3"%1"-22'+3-0:",)'"3$2?&'"-0"U9LU7Z7!" 2.4.2.4 Metal deposition by thermal evaporation This is the most conventional technique to deposit a thin metal catalyst layer for the chemical etching reaction [72]. Metal particles or metal rods are melted in a container boat and evaporated in a vacuum environment. The evaporated metal will be directly deposited onto the sample in the vacuum chamber. Literature Review 27 2.4.2.5 Metal deposition by electroless metal deposition Some metals like Ag can be deposited directly on a Si substrate by immersion in a HF/AgNO3 plating solution for 10 seconds to 1 minute depending on the thickness of metal film required [80]. Owing to the strong galvanic displacement reaction between Si and highly reactive HF/AgNO3, Ag will be reduced and deposited evenly on the Si substrate. If the Si substrate is immersed in the HF/AgNO3 solution for a longer period of time, the substrate can be exposed to the catalytic etching reaction. This is one of the common ways to fabricate silicon nanowires of random diameter in a random array. There will be a layer of silver dendrite film formed which can be removed by immersing in nitric acid. 2.5 Methods to test the thermal conductivity of nanoscale thermoelectric materials It is difficult to experimentally measure the properties of nanowires because non-ideal factors have much more significant influence on low-dimensional devices as compared with bulk materials, e.g., the large contact resistance between the nanowire and electrodes [81]. Recently, there have been several methods developed to improve the contact resistance which include etching wires on the substrate, applying epoxy by probe manipulation, using indium pads, and the focused-ion-beam (FIB) method. Li et al. [82] and Shi et al. [83] used the FIB technique to improve the contact for their nanowire sample and were able to measure the thermal conductance, electrical conductance, and the Seebeck coefficient of a single silicon nanowire and carbon nanotube. We will review some of the mainstream methods which researchers use nowadays to measure thermal conductivity. Two thermometry methods, the 3! and Literature Review 28 thermoreflectance methods, are discussed in the first half of this section while the second half covers three direct methods, namely the sample-attached T-type nanosensor method, suspended microstructure method and the scanning thermal microscope (SThM) with 3! method. 2.5.1 3! method Introduction The 3! method [84-87] uses a narrow-band detection technique and therefore gives a relatively better signal-to-noise ratio. In this method, the nanowire specimen itself serves as both a heater and at the same time as a temperature sensor, if it is electrically conductive and with a temperature-dependent electric resistance. Feeding an ac electric current of the form (I0 sin !t) into the specimen creates a temperature fluctuation on it at a frequency of 2!, and accordingly a resistance fluctuation at 2!. This further leads to a voltage fluctuation at 3! across the specimen. Based on the one-dimensional heat-conduction equation and using a modern digital lock-in amplifier, one is able to obtain both the specific heat and the thermal conductivity of a rod- or filament-like specimen simultaneously [6]. One-dimensional heat conduction equation and its solution Figure 10 shows a schematic of a four-probe configuration for thermal conductivity measurement on a uniform rod- or filament-like specimen. The two outer probes are used for feeding an electric current, and the two inner ones are for measuring the voltage across the specimen. It is required that (1) the specimen in-between the two Literature Review 29 voltage probes be suspended to allow the temperature fluctuation; (2) all the probes have to be highly thermal conductive to heat sink the specimen at these points to the underlying sapphire substrate; and (3) the specimen has to be maintained in a high vacuum and the whole setup has to be heat shielded to the substrate temperature to minimize the radial heat loss through gas convection and radiation. 9-:5+'" (E" ;&&53,+$,-*0" */" ,)'" /*5+Q?+*%'" .*0/-:5+$,-*0" /*+" 2'$35+-0:" ,)'" 3?'.-/-." )'$," $0>" ,)'+2$&" .*0>5.,-4-,1" */" $" +*>Q" *+" /-&$2'0,Q&-X'" 3?'.-2'0" -3" 3)*@0!" #)'" 3?'.-2'0" -3" )'$," 350X",*",)'"3$??)-+'"35%3,+$,'",)+*5:)",)'"/*5+"'&'.,+-.".*0,$.,3H"%5,",)'"?$+,"-0Q%',@''0" ,)'",@*" " -00'+"4*&,$:'".*0,$.,3"0''>3",*"%'"353?'0>'>",*"$&&*@",)'",'2?'+$,5+'"4$+-$,-*0!" C")-:)"4$.552"-3"0''>'>"$0>"$",)'+2$&"3)-'&>-0:"-3"?+'/'++'>",*"'&-2-0$,'",)'"+$>-$&")'$," .5++'0,"/+*2",)'"3?'.-2'0",*",)'"'04-+*02'0,"6P8!" In such a configuration and with an ac electrical current of the form (I0 sin !t) passing through the specimen, the heat generation and diffusion along the specimen can be described by the following partial differential equation with the stated initial and boundary conditions: ! !2 $C p T(x, t) " # 2 T (x, t ) !t !x Literature Review 30 I o2 sin 2 "t [R + R' (T ( x, t ) ! To )] = LS T (0, t ) = To T ( L, t ) = To T ( x,!") = To (2.3) (2.4) where Cp, I0, k, R, and $ are the specific heat, amplitude (peak) of the ac current, thermal conductivity, electric resistance and mass density of the specimen, respectively. At the substrate temperature T0, R’= (dR/dT)T0 . L is the length of the specimen between the voltage contacts and S is the cross sectional area of the specimen. From the initial and boundary conditions, the following important condition can be obtained [6]: I o2 R' L '.+'$3'3",*"h'+*"$&*0:",)'"&-0'"*/",)'"$4'+$:'>",'2?'+$,5+'"$..525&$,-*0"@)'0"`a" " cc" " (" " Ab"ii"JB"6P8!$ The 3! voltage fluctuation across the specimen is given as follows: V3! & 4 I 3 % e % e' L ( )3 , $ 4# 1 + (2!" ) 2 S (2.7) After substituting all the known values, one will be able to find the thermal conductivity k from equation (2.7). Literature Review 32 The high and low frequency limit When the specimen is extremely short, it will become frequency independent at the low frequency limit. One can only measure the thermal conductivity of the specimen but lose the information on specific heat. To an accuracy of about 1.2% , V3# takes the form [6]: 4 I 3 RR' L 1 V3% " = 3 IR' ! o # 4$S # ("# ! 0) (2.8) When the specimen is long and thin, at the high frequency limit one can only measure the heat capacity but lose the information on thermal conductivity. V3# takes the form for this situation [6]: V3! I 3 RR ' = 4!" C p LS (2.9) (#$ " !) Error due to radial heat loss In order to minimize the error due to radial heat loss, the following condition must be met: g! -$:+$2"*/",)'",)'+2$&".*0>5.,-4-,1"2'$35+'2'0,"3',5?!"C">-:-,$&"&*.XQ-0" $2?&-/-'+"NVGTE"*+"NVGDE"@$3".)*3'0",*"2'$35+'",)'"T`"4*&,$:'!"#)'"(`"4*&,$:'"/+*2",)'" 3-0'" *5," */" ,)'" &*.XQ-0" $2?&-/-'+" @$3" %**3,'>" -0,*" $0" $." .5++'0," %1" $" 3-2?&'" '&'.,+*0-." .-+.5-," A&*@'+" ?$0'&B" %'/*+'" %'-0:" /'>" -0,*" ,)'" 3?'.-2'0!" #)'" /''>%$.X" +'3-3,*+" Vk" 3)*5&>" %'" 0'$+&1" ,'2?'+$,5+'" -0>'?'0>'0," ,*" ?+'4'0," -," /+*2" :'0'+$,-0:" $" T`" .*2?*0'0," -0" ,)'" .5++'0,"6P8!" Figure 12 shows the block diagram of the thermal conductivity measurement setup. All the filters on the lock-in amplifier were turned off and the dc coupled input mode was selected to ensure the observation of a true frequency dependence of V3!. Before measuring the 3! signal, the phase of the lock-in amplifier was adjusted to zero according to the 1! voltage component. The phase angle of V3! is then -) if R’ < 0 or (180°- )) if R’ > 0 according to Eq. (2.11). V3! % 4 I 3 LRR ' $ 4#S 1 + (2!" ) 2 (2.11) A simple electronic circuit (the lower panel of Figure 12) was used to convert the 1! Literature Review 35 sine wave voltage from the sine out of the lock-in amplifier to an ac current, which was then fed into the specimen. There are two ways to perform the measurement. Firstly, the substrate of the specimen is maintained at a fixed temperature, and then the frequency dependence of V3! is measured. In this way, one can check the I3 and the 1/.(1+(2!")2) dependencies of V3! as well as the relation tan ) = 2!". Choice of suitable current bias I Because V3! $ I3, one will get a much larger V3# signal by using a larger current bias I. However, there are three reasons for not using a very large I. Firstly, a small current bias is required by Eq. (2.5). Secondly, radiation heat loss will be significant when the temperature modulation is large, as Eq. (2.10) indicates. Thirdly, excessive heat accumulation on the specimen would create a considerably large temperature gradient at the silver paste contacts, which might violate the boundary condition in Eq. (2.4). In all the above-mentioned cases, the expected relation of V3! $ I3 will not result. On the other hand, the expected relation will also be violated if I is too small so that V3! becomes comparable to or smaller than the 3! signals that come from the current or other sources. If the 3! voltage is too small to measure, then one has to increase the current for creating a larger temperature fluctuation. In some cases, the actual (averaged) temperature of the specimen has to be corrected afterwards by comparing the resistance of the specimen measured with the larger current and that measured with a much smaller one. In the second method of measurement, the temperature of the substrate is slowly Literature Review 36 ramped up or down at a fixed rate. Meanwhile the working frequency of the lock-in amplifier is switched between a few set values. The electric current is adjusted roughly to maintain a fixed dc temperature fluctuation (i.e., ~1 K). The whole process, including the temperature ramping, parameters adjusting and frequency switching, can be controlled by a personal computer. 2.5.2 Thermoreflectance Method Introduction In the thermoreflectance method, the temperature difference across the nanowire was measured and then the thermal resistance was calculated [88]. With these values and the dimension of the nanowire, one can calculate the thermal conductivity. The thermoreflectance imaging technique is based on temperature dependence of the reflection coefficient of the material. In other words, the temperature change will result in a reflected light intensity change. The normalized change in reflection per unit temperature is defined as the thermoreflectance constant, which is of the order of 10-5 for metals. Due to such a small signal, the detected signal is measured with a lock-in amplifier. The thermoreflectance measurement is a reliable noncontact temperature-measurement technique and the system could achieve lateral resolution of 0.5 (m and temperature resolution of 0.1˚C. Test structure The microdevice used for external electrical connection for an individual nanowire was fabricated by the standard IC fabrication process. The device consisted of two adjacent silicon nitride (SiN) membranes suspended with five silicon–nitride beams Literature Review 37 [88]. A platinum thermometer resistance (PTR) coil was deposited on each membrane. The PTR was connected to Pt bonding pads on the substrate via Pt leads on the long SiN beams. An additional Pt electrode was put on each membrane opposite the other, providing electrical contact for the Si nanowire itself. Figure 13 illustrates a schematic picture of the microdevice. 9-:5+'"(T"N.)'2$,-."?-.,5+'"*/"2-.+*>'4-.'"/*+"0$0*@-+'"'&'.,+-.$&".*00'.,-*0"6GG8!" Measurement procedures The as-grown Si nanowires were dispersed in an isopropanol solution. The nanowire suspension is drop-casted on top of the microdevice and spun to dry. One wire was placed across the bridge between two electrodes. The FIB technique was used to achieve better electrical and thermal contact between the nanowire and electrodes. After all these steps, the sample was ready for the heat-transfer study. Figure 14 shows a scanning electron micrograph (SEM) image of a silicon nanowire bridging the two Pt electrodes [88]. To prevent air convection influence on the heat conduction measurements, the sample was put in a cryostat chamber which was kept in high vacuum at ~10-4 to 10-5 torr. First, the thermoreflectance coefficient of the sample Literature Review 38 was calibrated. The sample was placed on top of a temperature-controlled stage. When the stage temperature was tuned, the reflected light was measured at the same time. In this way, the normalized change in reflection per unit temperature or the thermoreflectance constant (Cth) can be obtained. 9-:5+'"(O"N[...]... for 36 minutes Au-catalyzed Ge nanowires were grown on Si(0 01) and Si (11 1) by CVD over the temperature range of 320 -380°C, probably by the VLS process [ 52] High-resolution transmission electron microscopy confirms that many of the nanowires grow epitaxially along the "11 1# directions of the Si substrate and the nanowires contain few defects Au-containing nanoparticles are found at the tips of the nanowires. .. locations 1 and 2 after ion etch Approximately 1 nm of material from the sample surface was removed after the ion etch 10 3" Figure 51 SEM image of the nanosize Cr/Au mask 10 4" Figure 52 A high magnification image of the nanosize Cr/Au mask 10 4" Figure 53 SEM image of the triangular pillar structure after catalytic etching for 40 seconds 10 5 xiv List of Tables Table 1. 1 Theoretical... represents 2 mm [ 82] 44" Figure 18 Schematic setup of the thermal probe [90] 46" Figure 19 Schematic setup of the scanning thermal microscope [90] 47" Figure 20 Schematic cross section of the 4-point probe test device 48" Figure 21 Schematic electrical diagram of a 4-point probe measurement 49" Figure 22 Block diagram of the evaporator system 51" Figure 23 SEM micrograph of individual... 52" Figure 24 (a) Setup for GeNW growth, and (b) temperature profiles for GeNW growth 55" Figure 25 SEM image of typical Ge nanowires grown by the VLS process 57" Figure 26 Measurements of the location of the selected Ge nanowire were recorded in x and y coordinates with the center of the marker as the origin 59" Figure 27 Pattern of the 4 electrodes drawn after e-beam exposure and. .. 2. 2 .1 Effect of nanoscale geometries on thermal conductivity and Seebeck coefficient in laboratory created nanowires As explained previously, thermal conductivity has to be low in order to achieve a high thermoelectric figure -of- merit (ZT) Boukai and colleagues fabricated rectangular Si nanowires having a cross section of 20 nm by 20 nm [17 ] The small size and two-dimensional confinement give the nanowires. .. direction by the SFLS method [48] Ge and Si nanowires synthesized by SFLS at 375°C predominantly grow in the [11 0] growth direction Si nanowires produced by Lieber and co-workers at 440°C mostly have [11 1] direction for larger diameter wires [49] Based on supersaturation criterion, a shift in the predominant growth direction from [11 0] to [11 1] is expected as the level of supersaturation in the alloy seed... Review 6 Chapter 2 Literature Review 2 .1 The early development of thermoelectrics For three decades since 19 60, there has been little attention on thermoelectrics in the scientific research community until the US Department of Defense (DoD) started to show interest in the potential of thermoelectric materials for new types of application in the 19 90s A few years later, a great deal of interest in the... that contained both semiconductor precursors and growth seed materials Ge nanowires were grown via the VLS mechanism 2. 4 Fabrication of silicon nanowires by catalytic etching 2. 4 .1 Introduction One-dimensional materials are important components for applications in fields of electronics and photonics A lot of attention has been put on silicon nanowire because of various prospective applications such as... Theoretical efficiency limits of various thermoelectric materials [2] 2" Introduction and Motivation 1 Chapter 1 Introduction and Motivation 1. 1 Background Crude oil consists of mineral deposits formed deep under the earth or sea bed Fossil fuels and its refined products have been the engine that helps sustain global economic growth for many centuries However, oil production of the world is now peaking... conductivities of Ge nanowires It is, therefore, important to experimentally validate these theoretical predictions to understand the underlying physics This is why there is a motivation for researching on the thermal conductivity of Ge nanowires which will be used in my test structure for this project 2. 3 Growth mechanism and different synthesis techniques of germanium nanowires 2. 3 .1 Growth mechanism of germanium ... of germanium nanowires 11 " 2. 3 .1" Growth mechanism of germanium nanowires 11 " iv 2. 3 .2 Different nanowire synthesis techniques 18 " 2. 4 Fabrication of silicon nanowires by... Introduction and Motivation 1" 1. 1" Background 1" 1. 2" Efficiency of a thermoelectric material 3" 1. 3" Opportunity in semiconductor nanowires 4" 1. 4" Organization of. .. 4" Chapter 2" Literature Review 6" 2 .1" The early development of thermoelectrics 6" 2. 2" Factors affecting thermoelectric properties in nanowires 6" 2. 2 .1" Effect of nanoscale