Fast response controller for a stepping inductance based voltage regulator module

FAST RESPONSE CONTROLLER FOR A STEPPING INDUCTANCE BASED VOLTAGE REGULATOR MODULE CAO XIAO NATIONAL UNIVERSITY OF SINGAPORE 2006 FAST RESPONSE CONTROLLER FOR A STEPPING INDUCTANCE BASED VOLTAGE REGULATOR MODULE CAO XIAO (B.Eng., Wuhan University, P.R.China) A THESIS SUBMITTED FOR THE DEGREE OF MASTER OF ENGINEERING DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING NATIONAL UNIVERSITY OF SINGAPORE 2006 Acknowledgments I am extremely thankful and express my sincere gratitude to my research supervisor Prof Ramesh Oruganti, for his guidance, support and encouragement for my graduate research I appreciate Prof Oruganti’s outstanding expertise in solving theoretical and practical issues related to power electronics with ease He has been a great teacher and mentor in helping me gain extensive knowledge in power electronics, and also keen interest towards my research I am also extremely thankful to my colleagues: Dr Kanakasabai Viswanathan, Xu Xinyu, Deng Heng, Kong Xin, Yin Bo, Yang Yuming, Krishna Mainali, Wu Xinhui, Wang Wei, Chen Yu, Ravinder Pal Singh, Marecar Hadja, Vasanth Subramanyam, Wei Guannan, Qin Meng, Zhou Haihua and Buddharaju, Kavitha Devi from Power Electronics Laboratory and Electrical Machines and Drives Laboratory, who have supported me throughout and made NUS a wonderful place to work I would like to thank laboratory officer, Mr Teo Thiam Teck from the Center for Power Electronics He has always been with me in resolving my day to day problems in the laboratory I appreciate his selfless help and dedication in making the laboratory a nice place to work I I express my gratitude to my parents, who have always supported me I would have never reached so far in life without their constant encouragement and support Last but not the least, I would like to express my appreciation and love to my wife, Ms Hu Ni, for being so understanding and supportive throughout II Table of Contents Table of Contents SUMMARY VII LIST OF TABLES X LIST OF FIGURES XI CHAPTER INTRODUCTION 1.1 Research Background 1.2 Requirements for Voltage Regulator for Microprocessor 1.2.1 Fast Dynamic Performance for Load-Induced Transients 1.2.2 Good Steady-State Performance 1.2.3 Small Size and Low Cost 1.2 Focus of this Thesis 10 1.3 Organization of this Thesis 10 CHAPTER A LITERATURE SURVEY 12 2.1 VRM Topologies for Future Microprocessors 12 2.1.1 Synchronous Buck Converter 12 2.1.2 Multiphase Buck Converter 13 2.1.3 Multiphase Buck Converter with Coupled Inductor 16 2.1.4 Tapped-Inductor Buck Converter 21 III Table of Contents 2.1.5 2.2 2.3 Some Other Topologies with Active Clamp 23 Control Methods for VRM 25 2.2.1 V2 control 26 2.2.2 Hysteresis Control 28 2.2.3 Adaptive Voltage Position Control 30 2.2.4 Digital Control Methods 31 Chapter Conclusions 32 CHAPTER VRM DESIGN CHALLENGE 33 3.1 VRM Transient Analysis 33 3.2 VRM Steady-State Operation Analysis 38 3.2.1 Output Voltage Ripple 39 3.2.2 MOSFET Power Losses Analysis 46 3.3 VRM Design Trade-Offs 50 3.4 Chapter Conclusions 52 CHAPTER FAST RESPONSE CONTROL FOR STEPPING INDUCTANCE BASED VOLTAGE REGULATOR MODULE 53 4.1 Stepping Inductance VRM (SI-VRM) 54 4.2 Problems with Existing Controller 56 4.3 Proposed Control Scheme 58 4.4 Stepping Inductance-Analysis and Design 62 IV Table of Contents 4.5 Simulation Results with the Proposed Control Scheme 67 4.6 Experimental Results with the Proposed Control Scheme 70 4.7 Chapter Conclusions 76 CHAPTER SMALL-SIGNAL ANALYSIS AND CONTROLLER DESIGN FOR STEPPING INDUCTANCE VOLTAGE REGULATOR MODULE 78 5.1 SI-VRM Switching Frequency Estimation 79 5.1.1 Reasons for Choosing Hysteresis Controller for the Inner Loop 79 5.1.2 Estimation of the Switching Frequencies 80 5.2 Small-Signal Model of SI-VRM 86 5.2.1 Control-to-Output Transfer Function of SI-VRM 86 5.2.2 Experimental Verification of the Transfer Function 88 5.3 Dual Gain Controller for SI-VRM 91 5.3.1 Dual Gain Controller-Motivation 91 5.3.2 Dual Gain Controller Implementation 94 5.3.3 Experimental Results with Dual Gain Controller 96 5.4 Simulation and Experimental Results 99 5.5 Chapter Conclusions 108 CHAPTER CONCLUSIONS AND FUTURE WORK 109 6.1 Summary and Conclusions of the Thesis 111 6.1.1 Analysis of VRM Transient and Steady State Operation 111 6.1.2 Fast Response Control Scheme for SI-VRM 111 V Table of Contents 6.1.3 Small-Signal Model and Dual Gain Controller for SI-VRM 112 6.2 Future Work 113 6.2.1 Duty Cycle Extension 113 6.2.2 Loss Analysis during Load-Induced Transients 114 BIBLIOGRAPHY 116 APPENDIX A MOSFET POWER LOSS CALCULATION 124 A.1 Control MOSFET Losses Calculation 124 APPENDIX B MATLAB-SIMULINK MODELS OF SI-VRM AND CONTROLLER SCHEMES 126 B.1 SI-VRM Simulink Model 126 B.2 Control Scheme for Auxiliary Switches 127 B.3 Control Scheme for Main Switches 128 APPENDIX C HARDWARE IMPLEMENTATION OF SI-VRM AND CONTROL SCHEMES 129 C.1 SI-VRM Hardware Implementation 129 C.2 Fast Response Controller for SI-VRM 130 APPENDIX D INJECTION CIRCUIT FOR HP4194A PHASE-GAIN ANALYZER 131 VI Summary Summary With the development of advanced microprocessor technology, voltage regulator modules (VRM) for future microprocessors are required to achieve both good dynamic and steady state performances These requirements include high efficiency, fast dynamic response, small size and small output voltage ripple Stepping inductance based VRM (SI-VRM) proposed in [17]-[18] is a possible solution for this challenge The focus of this thesis is to investigate the proper usage of SI-VRM from the points of both controller design and circuit design In this thesis, several existing VRM topologies and control methods to improve dynamic performance of VRM are first discussed It was noted that the existing solutions will be difficult to meet the requirements imposed by future microprocessors As a result, it is necessary to bring out a VRM solution with potential for better dynamic and steady-state performances compared to the existing solutions Since the basic challenge of a VRM design is the trade-off between dynamic performance and steady state performance of the VRM, in-depth analyses of VRM load-induced transient and steady-state operation are prerequisites for designing a high performance VRM The SI-VRM concept is available in literature and has the potential to solve the above problem In SI-VRM, a coupled inductor replaces the output inductor of the VII Summary conventional synchronous buck converter During steady state, the secondary side of the coupled inductor is kept open and the large self inductance works as the output inductor Therefore, a low switching frequency can be used, which also leads to low losses During load-induced transients, the large inductor is effectively shorted and only a small leakage inductor is left in the circuit By reducing the output inductor value, fast response can be achieved During the transient process, the energy level in the inductor must be externally adjusted so as to meet the new load requirement While the topology has potential for improved performance, the control method proposed earlier, however, suffers from several shortcomings such as large voltage ripple during transients, the interruption of inductor current and a long transient duration To overcome these problems, a novel fast response control method is proposed in this thesis for the SI-VRM In the proposed control scheme, the main switches of the SI-VRM are used only for output voltage regulation The auxiliary switches are solely employed to adjust the energy stored in the large inductor during load-induced transient, also known as the inductor current recovery period The switching frequency of the converter is increased when operating under load-induced transients to keep the output voltage ripple small with the small inductor A current hysteresis control method has been adopted to automatically change the switching frequency under this condition With the proposed control method, the SI-VRM is capable of achieving small output voltage ripple during transients In fact, all of the problems encountered with the previous controller for the SI-VRM are solved VIII Bibliography [19] F C Lee, “Voltage Regulator Module for Future Generation of Processors”, Tutorial Notes, Sixteenth VPEC Power Electronics Seminar, Virginia Tech, 1-115, September 1998 [20] M T Zhang, M M Jovanovic and F C Lee, “Analysis and Evaluation of Interleaving Techniques in Forward Converters,” IEEE Trans Power Electron, VOL 13, NO 4, pp690-698, 1998 [21] X Zhou, X Zhang, J Liu, P Wong, J Chen, H Wu, L Amoroso, F C Lee and D Y Chen, "Investigation of candidate VRM topology for future microprocessors," in Proc IEEE APEC, 1998, pp 145-150 [22] Xunwei Zhou, Pit-Leong Wong, Peng Xu, Fred C Lee and Huang, A.Q, “Investigation of candidate VRM topologies for future microprocessors”, IEEE Trans Power Electron, VOL 15, NO 6, pp1172-1182, NOV 2000 [23] Xunwei Zhou, Peng Xu, and Fred C Lee, “A Novel Current-Sharing Control Technique for Low-Voltage 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Switching Power Supplies,” Unitrode Power Supply design Seminar manual, SEM-700, 1990 [59] Tang Wei, “Average Current-Mode Control and Charge Control for PWM Converters”, Ph.D Dissertation, Virginia Polytechnic Institute and State University, 122 Bibliography 1994 [60] Robert W Erickson and Dragan Maksimovic, “Fundamentals of Power Electronics- Second Edition”, Kluwer Academic Publishers, 2001 [61] Rais Miftakhutdinov, “An Analytical Comparison of Alternative Control Techniques for Powering Next Generation Microprocessors” Texas Instrument Corp Online available: http://focus.ti.com/lit/ml/slup168/slup168.pdf 123 APPENDIX A MOSFET POWER LOSS CALCULATION A.1 Control MOSFET Losses Calculation Based on [14], the major losses in the Control MOSFET are the conduction loss and the switching loss These two parts can be calculated as follows: Conduction loss: Pcon = I on ⋅ Rds ( on ) ⋅ D (A.1) Switching loss: Pswiching = I on ⋅ Vin ⋅ Qsw ⋅f Ig (A.2) TABLE A.1 THE INFINEON MOSFET PARAMETERS Infineon SPP80N03S2L-03 Infineon SPD100N03S2L-04 Vin (Input voltage) 12V D (Duty cycle) 0.142 Ion (MOSFET on state current) 40A Vg (Drive voltage) 12V Ig (Drive current) 3A Rds(on) (MOSFET on-resistance) 2.8mΩ 4.2 mΩ Qoss (Output charge: Coss× Vg) 28.8nC 11.8nC Qsw (MOSFET switching charge) 66.5nC 27.3nC Qg (Gate charge) 166nC 67.5nC Qrr (Reverse recovery charge) 108nC 56nC Based on (A.1), (A.2) and parameters shown in Table A.1, the conduction loss and the switching loss in Control MOSFET can be calculated and be shown in Fig A.1 124 (a) (b) Fig A.1 Control MOSFET losses (a) with Infineon SPP80N03S2L-03 for Control MOSFET; (b) with lower rated MOSFET (Infineon SPD100N03S2L-04) for Control MOSFET 125 APPENDIX B MATLAB-SIMULINK MODELS OF SI-VRM AND CONTROLLER SCHEMES B.1 SI-VRM Simulink Model Fig B.1 SI-VRM simulink model The coupled inductor shown in Fig B.1 is realized by “Mutual Inductance Model” in Simulink Changing the parameters of “self-impedance” and “mutual impedance” is able to adjust the leakage inductance and magnetizing inductance of coupled inductor All the MOSFET blocks in this simulation are realized by an ideal 126 switch paralleled with a diode The parameters of switch are set according to MOSFET datasheet Fig B.2 MOSFET model B.2 Control Scheme for Auxiliary Switches Fig B.3 Auxiliary switches control scheme Simulink model 127 B.3 Control Scheme for Main Switches Fig B.4 illustrates the single gain controller Simulink model for SI-VRM In Fig B.5, there are two gains, namely K1 and K2 in voltage loop controller An ideal switch can select these two gains in different situations The switch is controlled by transient signal generated in Fig B.3 Fig B.4 Single gain controller used for SI-VRM simulink model Fig B.5 Dual gain controller used for SI-VRM simulink model 128 APPENDIX C HARDWARE IMPLEMENTATION OF SI-VRM AND CONTROL SCHEMES C.1 SI-VRM Hardware Implementation VS1 VS2 10FL20Z 10FL20Z Gate_S2 Gate_S1 SPP80N03S2L APT20M38BVF M1 V1 M2 ia sensor 25mohm Load 0.5ohm C=2050uF Gate_M2 Vo sense + Lo=5.8uH Lr1=150nH; Lr2=130nH ia sense+ Gate_M1 5Vdc Phase SPP80N03S2L S2 S1 Step load APT20M38BVF SPP80N03S2L Vo sense iL sensor 2.5mohm iL sense Fig C.1 SI-VRM hardware implementation 129 C.2 Fast Response Controller for SI-VRM Controller 390pF 0.047uF 22k 6.8k Vo sense - Hysteresis comparator OPAMP 1.5k 6.8k OUT Vo sense + OPAMP VCC + OUT 7.5k + 6.8k OUT - 15pF + Gate_M1 ISL6612 Control signal for M1 GND OUT OPAMP 7.5k Vref 1.7V VCC 2.7k + 6.8k MOSFET driver ISL6612 Phase 11k 39k - Gate_M2 OPAMP 150k - 39k OPAMP 52k 3.9k Step-up load transient signal OUT iL sense 0.1k + 3.9k 15pF + Vref 150k + - OPAMP 5.9k 100k Step-up load transient signal OUT OUT OPAMP OPAMP - 1.6V 0.1k Step-down load transient signal OUT + 15pF 52k 52k 360k 3.9k OPAMP 0.1k OUT ia sense + VCC + Transf ormer current ia cross zero signal OUT 3.9k 15pF - 360k OPAMP 0.1V 0 MOSFET driver IR2210 Step-down load transient signal OR VCC AND Control signal for S2 HIN Gate_S2 HO AND VB U19 NOT NOT Vss VS2 VS2 +5V NME0515D Transf ormer current ia cross zero signal 0V +15V U21 AND NOT NOT MOSFET driver IR2210 VCC OR Step-up load transient signal AND 2 1 Control signal for S1 HIN Gate_S1 HO VB Vss +5V VS1 VS2 NME0515D 0V +15V Fig C.2 Fast controller for SI-VRM- Hardware implementation 130 APPENDIX D INJECTION CIRCUIT FOR HP4194A PHASE-GAIN ANALYZER In this thesis, input-to-output transfer function and loop transfer function of SIVRM are measured by HP4194A Phase-Gain Analyzer In order to inject the small disturbance to close loop system, an inject circuit which meets the following criteria is needed 1) To avoid the effect of inserted circuit to original circuit, high input impedance is required 2) The small signal travels in one direction only 3) The output voltage is equal to the output voltage at operation point Fig D.1 The injection circuit for HP 4194A 131 The circuit in Fig D.1 satisfies all requirements Resistance looking into A is very high Also, the small signal is confined to only a single path The variable resistor can be used to adjust the gain such that Va equals Vb at operation point 132 ... Kanakasabai Viswanathan, Xu Xinyu, Deng Heng, Kong Xin, Yin Bo, Yang Yuming, Krishna Mainali, Wu Xinhui, Wang Wei, Chen Yu, Ravinder Pal Singh, Marecar Hadja, Vasanth Subramanyam, Wei Guannan,... capacitors are paralleled as output filter In this case, the equivalent output capacitor has a very low ESR and the output voltage ripple has a parabolic waveform instead of a linear ramp Providing a. .. parasitics between the voltage regulator and PC motherboard The difference between a Voltage Regulator Module (VRM) and a Voltage Regulator Down (VRD) is based on how the power supply is installed