Stabilization and control of unstable time delay systems

STABILIZATION AND CONTROL OF UNSTABLE TIME DELAY SYSTEMS LEE SEE CHEK NATIONAL UNIVERSITY OF SINGAPORE 2012 STABILIZATION AND CONTROL OF UNSTABLE TIME DELAY SYSTEMS LEE SEE CHEK (B.Eng. (Hons., 1st Class) UTM, M.Sc. NUS) A THESIS SUBMITTED FOR THE DEGREE OF DOCTOR OF PHILOSOPHY DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING NATIONAL UNIVERSITY OF SINGAPORE 2012 I Abstract Control theories and designs for stable delay-free systems have been well developed in research society and widely adopted in industry. Study of time delay systems remains a hot research topic while the unstable systems are gaining great attention from researchers recently. Control of unstable delay systems is the most challenging and difficult case and becomes a research frontier in process control, and its progress is yet at a preliminary stage. Unlike stable systems, simply detuning the controller is not a trivial solution to achieve stability of the closed loop. PID and lead-lag controllers are the two most popular type of controllers used in industrial control (often in single loop configuration). In this thesis, the Nyquist stability criterion, combined with some algebraic analysis, is used to perform frequency domain analysis which then leads to the establishment of stabilizabilty conditions and controller design parameterization. Particularly, for all-pole process, and first order processes with zero dynamics, both necessary and sufficient stabilizability conditions are derived and presented. Stabilizability conditions (necessary and/or sufficient) for more complex processes with zero dynamics are also derived. As seen from the PID stabilizability results in the literature, whether a first-order unstable time delay process can be stabilized or not, depends on the time delay magnitude. When the normalized time delay exceeds 2, a PID controller has no stabilization solution. In this thesis, a controller of higher order form is developed and stabilization is achieved for the time delay beyond such bound. The method used to derive such a stabilizer is either internal model control (IMC) principle or genetic algorithm. Performance of a control system is also as important as stabilization. A stabilized unstable process may exhibit large overshoot, prolonged settling time, poor disturbance response, etc. In this thesis, an IMC-like scheme is proposed for better performance and stabilization. The scheme can suit a wide range of processes with an arbitrary high-order of stable lags and permits a larger time delay bound. Simulation results show a better performance than other comparable schemes from literature. Unstable multivariable (MIMO) systems exists and pose a more difficult control problem than that of a single variable (SISO) case due to the interactions from other loops. II In this thesis, a design scheme for multiloop P/PI/PD/PID control has been developed for a MIMO system that contains a combination of stable and unstable loop. The stabilizability and controller design for SISO case developed in the earlier part of the thesis is used in MIMO multiloop controller design. Gershgorin band principle is used to ensure the interactions of other loops are within the range such that the stability achieved for each individual closed loop is still maintained. The schemes and results presented in this thesis have both practical values and theoretical contributions to the newly emerged research interest in control research of unstable system and dynamics. III Acknowledgments I would like to express my thanks to all the tutors, colleagues, friends, and family for their support of my research and life. During the period of my PhD program, I benefited and learned much from them, especially when I met obstacles. First of all, I want to thank my supervisor Prof. Wang Qing-Guo for his patient guidance and advice on my research, writing and presentation throughout my PhD studies. His uncompromising research attitude and stimulating advice helped me in overcoming obstacles in my research. Without him, I would not be able to finish the work here. I also wish to take this opportunity to thank Prof. Lee Tong Heng, Prof. Ben. Chen, Assoc. Prof. Xiang Cheng and Prof. Xu Jianxin for their courses which built up my fundamentals on the theory of control. Besides, I am grateful to my colleagues for their constant support and encourage. Finally, I would like to express my gratitude to my mother and my family for their consistent support. Without their encouragement and love, I may not complete my research during the period at the university. Contents List of Figures VIII List of Tables X Introduction 1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Organization of the thesis . . . . . . . . . . . . . . . . . . . . . . . . . . . PID Stabilization for Unstable All-Pole Time Delay Processes 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Problem formulation and preliminaries . . . . . . . . . . . . . . . . . . . . 10 2.3 P/PI controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.4 PD/PID controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.5 Conclusion 25 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PID/lead-lag Stabilization for Unstable Processes with A Zero 26 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.2 Problem Formulation and Preliminaries . . . . . . . . . . . . . . . . . . . 28 3.3 First-order processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 IV V Contents 3.3.1 P controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.3.2 PI controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.3.3 PD/PID controller . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 3.3.4 Lead-lag controller . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 3.4 Second-Order Processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 3.5 Higher-Order Processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 3.5.1 P/PI controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 3.5.2 PD/PID controller . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 3.6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 High-Order Stabilizer for First-Order Unstable Processes with Large Time Delay 58 4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 4.2 Problem Formulation and Preliminaries . . . . . . . . . . . . . . . . . . . 60 4.2.1 Approach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 4.3 The IMC Principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 4.4 Pole Placement via Genetic Algorithm . . . . . . . . . . . . . . . . . . . . 68 4.5 Conclusion 74 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . An IMC-like Compensation Scheme for Better Stabilization and Performance 76 5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 5.2 Control Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 5.3 Controller Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 5.3.1 83 Inner Loop Controller K . . . . . . . . . . . . . . . . . . . . . . . . VI Contents 5.3.2 Outer Loop Controller C . . . . . . . . . . . . . . . . . . . . . . . 86 5.4 Internal Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 5.5 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 5.6 Conclusion 99 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multiloop PID Controller Design for Unstable Delay Processes 102 6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 6.2 Problem Formulation and Preliminaries . . . . . . . . . . . . . . . . . . . 104 6.3 Approach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 6.4 6.5 6.6 6.3.1 Stable gll (s) [1] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 6.3.2 Unstable gll (s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 P/PD controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 6.4.1 Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 6.4.2 Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 6.4.3 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 PI/PID controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 6.5.1 Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 6.5.2 Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 6.5.3 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Conclusion Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 121 7.1 Main Findings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 7.2 Suggestions for further work . . . . . . . . . . . . . . . . . . . . . . . . . . 123 Bibliography 125 Contents VII Appendix A 132 Appendix B 133 Published/Submitted Papers 135 List of Figures 2.1 Unity output feedback. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.2 ¯ = 0.5. . . . . . . . . . . . . . . . . . . . Stabilization for G(s) of (2.16), L 19 2.3 ¯ = 5.5. . . . . . . . . . . . . . . . . . . . Stabilization for G(s) of (2.16), L 24 3.1 P controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 3.2 Stabilizable delay bound L for α ≥ . . . . . . . . . . . . . . . . . . . . . 37 3.3 PI controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 3.4 Lead-lag controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 3.5 P/PI controller for G(s) of (3.43) . . . . . . . . . . . . . . . . . . . . . . . 51 3.6 PD/PID controller for G(s) of (3.43) . . . . . . . . . . . . . . . . . . . . . 56 4.1 ˆ C stabilizing G(s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 4.2 Multiplicative uncertainty model . . . . . . . . . . . . . . . . . . . . . . . 63 4.3 Stabilization under the proposed IMC principle . . . . . . . . . . . . . . . 65 4.4 ¯ e−jωL − np (jω) dp (jω) TGC ˆ (jω) plotted over ω . . . . . . . . . . . . . . . . . . 68 4.5 Step response from IMC design . . . . . . . . . . . . . . . . . . . . . . . . 69 4.6 Step response of perturbed G(s) stabilized by C(s) . . . . . . . . . . . . . 69 4.7 4.8 ¯ e−jωL − np (jω) dp (jω) TGC ˆ (jω) plotted over ω . . . . . . . . . . . . . . . . . . 73 Step response from genetic algorithm design . . . . . . . . . . . . . . . . . 74 VIII Chapter 6. Multiloop PID Controller Design for Unstable Delay Processes 6.6 120 Conclusion The design of decentralised P/PI/PD/PID controller for a more general multivariable process where the diagonal processes may be unstable with time delay is discussed. The design method is based on Gershgorin band and is restricted to diagonal dominant systems. The stabilizing controller parameters are parametrized. Simulation examples are given too. Chapter Conclusions 7.1 Main Findings A. PID/lead-lag stabilization for unstable time delay processes The stabilizability conditions by P/PI/PD/PID and lead-lag controllers are investigated and established explicitly. For all pole unstable processes which has no zero dynamics, the stabilizability conditions obtained are both necessary and sufficient, and depends on the maximum allowable time delay bound. For processes with zero dynamics, the stabilizability conditions obtained are more complicated and not complete except for a simple first-order case. The design and parameterization of stabilizing controllers are also presented. B. High-order stabilizer of first-order unstable processes with large time delay The stabilzation of first-order unstable plant with time delay beyond the stabilizable range of PID controller is made possible via the use of a higher-order controller. The stabilization solution starts with approximating the infinite dimensional time delay model into a finite order rational model through Pade approximation of the time delay, 121 Chapter 7. Conclusions 122 followed by synthesis of higher-order stabilizer either through IMC principle or genetic algorithm. A theorem that works similiar to the robust stability criterion is used to assess the stabilizability of the synthesized controller to the actual plant. C. An IMC-like compensation scheme for better stabilization and performance An IMC-like scheme is proposed where it overcomes the constraints brought by the stable lags in stabilizing an unstable delay plant. It is shown through numeric simulation to be effective in achieving stabilization and good performance for the unstable delay process where the process order may not be limited to low-order type. Regardless of the plant order, the proposed scheme is able to achieve stabilization and control for the normalized dead time up to a bound of 2. In comparison, the other schemes in the literature have limitations due to the stable lags and thus can only tolerate a comparatively smaller normalized dead time. D. Multiloop PID controller design for unstable delay processes The design of decentralised P/PI/PD/PID controller for a more general multivariable process where the diagonal processes could be unstable plus time delay is formulated and parameterized. The design method is based on Gershgorin band and suits the popular diagonally dominant MIMO problems. The results can be useful for designing multiloop controllers for a MIMO unstable system which could be formed by several stable and unstable process(es) interacting with each other. It effectively avoids the need to neglect process interactions in a MIMO system which designs only SISO controllers that could affect performance and even stability. Chapter 7. Conclusions 7.2 123 Suggestions for further work A. Nonlinear control for unstable time delay processes Recently, nonlinear control for processes is becoming an active research area. Various techniques such as backstepping control, sliding mode control, adaptive control are developed. The extension of the proposed nonlinear control methods to unstable processes such as a first-order type, is in great interest and demand. For example, the stabilizability conditions of nonlinear control to a first-order time delay processes is not known yet. With a nonlinear control scheme, can it stabilize a time delay bound larger than (PID stabilizable time delay bound)? And the Lyapunov stability theorem can be a choice to formulate stability analysis since the linear analysis tools such as Nyquist stability theorem, Hermite Biehler, root locus, etc are no longer applicable in a nonlinear case. B. Unstable time delay processes with nonlinearities In some cases, linearization of a process to obtain a linear model may be unacceptable and can result in less than satisfactory control design especially for processes with significant nonlinear behaviors. Input saturation is an example, where its presence may affect the performance of a controlled open loop unstable system and even the closed loop stability in view of the fact that control of such system may need a larger control input than that of a stable process. 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Gan, “Tuning of multiloop Proportional-IntegralDerivative controllers based on gain and phase margin specifications,” Industrial & Engineering Chemistry Research, vol. 36, pp. 2231–2238, 1997. Bibliography 131 [54] A. Georgiou, C. Georgakis, and W. L. Luyben, “Control of a multivariable open-loop unstable process,” Industrial & Engineering Chemistry Research, vol. 28, no. 10, pp. 1481–1489, 1989. [55] H. H. Rosenbrock, Computer-aided Control System Design. Academic Press, 1974. [56] J. M. Maciejowski, Multivariable Feedback Design. Addison-Weiley Publishing Company, 1989. [57] S. C. Lee, Q.-G. Wang, and C. Xiang, “Stabilization of all-pole unstable delay processes by simple controllers,” J. Proc. Contr., vol. 20, no. 2, pp. 235–239, 2010. Appendix A Since KL > is necessary, ΦQ5 (0) = −π. Suppose otherwise that max(Φ Q5 (ω)) ≤ −π, then the Nyquist plot departs upwards from the negative real axis, ω = 0, with phase decrease. Due to time delay, there always exists ω ∗ > such that ΦQ5 (ω ∗ ) = −3π. Then, for any ω such that ΦQ5 (ω) < −3π, that is, −Lω < −2π − arctan(ω) − arctan(αω) − arctan(aω) + arctan(bω) from (3.25) for G(s) with α > 0, it follows from (3.26) with the fact of ω 1+ω ω ≤ max( 1+ω 2) = d ΦQ (ω) = dω < that αω aω bω ω + + − − Lω ω + ω + α2 ω + a2 ω + b2 ω 1 1 + + − − Lω , ω 2 and using −Lω < −2π − arctan(ω) − arctan(αω) − arctan(aω) + arctan(bω) from (3.25) reduces the above to d ΦQ (ω) < dω < ω ω − 2π − arctan(ω) − arctan(αω) − arctan(aω) + arctan(bω) − 2π < 0, indicating that the phase keeps decreasing and the resulting encirclement around the critical point will be always clockwise if any, which excludes any possibility of the anticlockwise encirclement of the critical point. A similiar discussion applies to case of α < 0. Therefore max(ΦQ5 (ω)) > −π is necessary for closed-loop stability. 132 Appendix B Proof: a > − α + γα, under α > 0, L ≥ 2. Note b γα, and a < γ, from an earlier discussion. It follows from (3.25) and (3.26) that ω χ(ω) α a γα + + − − L dω 2 2 1+ω 1+α ω 1+a ω + γ α2 ω (.1) = ΦQ5 (ω) − ΦQ5 (0) = ΦQ5 (ω) + π. Then max(ΦQ5 (ω)) > −π is equivalent to χ(ω) > for some positive frequency ω. Consider two cases as follows. Case 1: α ≤ 1. Define a1 χ1 (ω) ω 1+ω + α 1+α2 ω One sees that χ1 (ω) < ω − α, and a2 + a1 1+a2 ω a − a1 . Let χ(ω) − L dω, and χ2 (ω) + α + a1 − L dω = due to L ≥ 2. Also, χ2 (ω) < ω a−a1 1+(a−a1 )2 ω ω ω χ1 (ω) + χ2 (ω), where a−a1 1+a2 ω − γα 1+γ α2 ω dω. + α + (1 − α) − L dω ≤ 0, ∀ω > 0, dω − ω γα 1+γ α2 ω dω = arctan((a − a1 )ω) − arctan(γαω). Since χ1 (ω) < 0, χ(ω) > only if χ2 (ω) > 0. This in turn requires a−a1 > γα, due to the fact that arctan(x) > arctan(y) when x > y. Thus a > 1−α+γα. Case 2: α > 1. Note if γ > 1, we have from (3.26) that d dω ΦQ5 (ω)|ω=0 = 1+α+a−b−L ≤ + α + a − γα − < + α + γ − γα − < α + γ − γα − = α + γ(1 − α) − < 0, since one sees that α + γ(1 − α) < α + (1 − α) = 1. Then Φ Q5 (0+ ) < ΦQ5 (0) = −π, 133 134 Bibliography and one can verify that ΦQ5 (ω) < −π, ∀ω > 0. Thus consider < γ ≤ only in α 1+α2 ω setting value for b, where b = γα. Express ω χ(ω) = 1+ω γα 1+γ α2 ω dω + L dω < ω γα 1+α2 ω + ω 1+ω + α−γα 1+α2 ω + a 1+a2 ω = − γα 1+α2 ω γα 1+γ α2 ω α−γα a + 1+α ω + 1+a2 ω − L dω < + + (α − γα) + a − L dω ≤ ω + α−γα . 1+α2 ω One sees that − L dω = ω 1+ω ω γα 1+α2 ω − α−γα a + 1+α ω + 1+a2 ω − + (α − γα) + a − dω. It is thus clear that a > − α + γα is required to have χ(ω) > 0. Proof: a > − |α| + γ|α|, under −1 < α < 0, L ≥ 2(1 − |α|). Note b γ|α|, and a < γ, from an earlier discussion. Similiarly, from (3.25) and (3.26), we need ω ρ(ω) 1+ω Define a1 ω |α| γ|α| a − 1+α ω + 1+a2 ω − 1+γ α2 ω − L dω > 0, to have max(ΦQ5 (ω)) > −π. − |α| > 0, and a2 a1 1+a2 ω ω − L2 dω, and ρ2 (ω) sees that ρ1 (ω) < ρ2 (ω) < ω γ|α| 1+γ α2 ω dω < 1+ω ω − a1 − |α| 1+ω L − ω a−a1 1+(a−a1 )2 ω a − a1 . Let ρ(ω) 1+ω |α| γ|α| a−a1 L − 1+α dω. One ω + 1+a2 ω − 1+γ α2 ω − ω − |α| − (1 − |α|) dω = 0, ∀ω > 0. Also, dω ≤ L dω + dω− ρ1 (ω) + ρ2 (ω), where ρ1 (ω) ω a−a1 1+a2 ω ω γ|α| 1+γ α2 ω − γ|α| 1+γ α2 ω dω < + ω a−a1 1+a2 ω − dω = arctan((a−a1 )ω)−arctan(γ|α|ω). Since ρ1 (ω) < 0, ρ(ω) > only if ρ2 (ω) > 0. This in turn requires a − a1 > γ|α|, due to the fact that arctan(x) > arctan(y) when x > y. Thus a > − |α| + γ|α|. Published/Submitted Papers The author has contributed to the following publications: Journal Papers [1] Qing-Guo Wang, Zhiping Zhang, Karl Johan Astrom and See Chek Lee, “Guaranteed dominant pole placement with PID controllers”, Journal of Process Control, vol. 19(2). pp. 349-352, 2009. [2] See Chek Lee, Qing-Guo Wang and Cheng Xiang, “Stabilization of all-pole unstable delay processes by simple controllers”, Journal of Process Control, vol. 20(2). pp. 235 − 239, 2010. [3] See Chek Lee and Qing-Guo Wang, “Stabilization conditions for a class of unstable delay processes of higher order”, Journal of the Taiwan Institute of Chemical Engineers, vol. 41(4). pp. 440-445, 2010. [4] See Chek Lee, Qing-Guo Wang and Le Binh Nguyen, “Stabilizing control for a class of delay unstable processes”, ISA Transactions, vol. 49(3). pp. 318-325, 2010. [5] See Chek Lee, Qing-Guo Wang, Wei Xing Zheng and N. Sivakumaran,“Stabilization and control of general unstable processes with large dead time”, Transactions of the Institute of Measurement and Control, vol. 32(3). pp. 286-306, 2010. 135 [...]... involved and only first-order delay system is addressed Huang and Chen [2] proved upper bounds on delay for stabilization by P and PD control X Lu [5] investigated stabilization of several popular unstable (including integral) delay processes by simple controllers (PID or its special cases), established explicit and complete stabilizability results in terms of the upper limit of time delay size, and developed... processes of order two and larger, we derive some necessary and/ or sufficient stabilizability conditions Some of these are illustrated with examples C High-order stabilization of first-order unstable processes with large time delay A common type of unstable process is in a first order form with time delay For stabilization by a conventional PID controller, there is a limit in which beyond some time delay bound,... multiloop controller for unstable MIMO processes thus deserves attention 1.2 Contributions In this thesis, stabilization of unstable all-pole time delay processes of arbitrary order is investigated using simple controllers The work is then extended to processes with zero dynamics For the common first-order unstable processes with time delay beyond the stabilizable range of a conventional PID controller,... stabilization and control performance for unstable time delay processes Multiloop P/PI/PD/PID controller design for multivariable unstable delay processes is discussed in Chapter 6 In Chapter 7, general conclusions are drawn and expectations for further works are presented Chapter 2 PID Stabilization for Unstable All-Pole Time Delay Processes 2.1 Introduction Due to the popularity of simple controllers... P/PI stabilization, and less than 2 for PD/PID stabilization Beyond such time delay bound, to our best knowledge, no current research has solution for stabilization Could a higher-order controller stabilize beyond the PID time delay Chapter 1 Introduction 3 bound? Higher-order controller has not really been studied in the stabilizability aspect of such problems In fact, the use of high-order controller... transportation delays in the inflows to the reactor The temperature control problem described thus becomes a control problem of an unstable time delay process In such a case of temperature control of the reactor, stability is the key requirement which cannot be compromised Unlike the case of stable processes, stability cannot be achieved just by detuning the feedback controller gain A sufficient large controller... The design method is based on Gershgorin band and is restricted to diagonally dominant systems The stabilizing controller are parameterized Simulation examples are given to illustrate the design 1.3 Organization of the thesis This thesis is organized as follows Stabilization of unstable time delay processes by simple controllers are treated in Chapters 2, 3 and 4 Chapter 2 considers all-pole processes... the stabilization solution using a higher-order controller An IMC-like compensation scheme is also proposed for better stabilization and control performance Multiloop controller design for unstable MIMO system is also presented In particular, the thesis has investigated the following areas: A PID stabilization for unstable all-pole time delay processes Based on the Nyquist stability theorem, the stabilization. .. an unstable delay process in a basic feedback loop before a high-level controller can work for better performance However stabilizability conditions for such processes is a very challenging topic Huang and Chen [2] used the root locus to study the stabilizability problem of unstable delay processes using simple controllers and showed that the normalized time delay should be less than 1 for P/PI controller,... explicit characterization of the boundary of the stabilizing PID parameter region, and the maximal stabilizable time delay for some typical yet simple processes still remains 9 Chapter 2 PID Stabilization for Unstable All-Pole Time Delay Processes 10 obscure Hwang and Hwang [4] applied the D-partition method to characterize the stability domain in the space of system and controller parameters The stability . STABILIZATION AND CONTROL OF UNSTABLE TIME DELAY SYSTEMS LEE SEE CHEK NATIONAL UNIVERSITY OF SINGAPORE 2012 STABILIZATION AND CONTROL OF UNSTABLE TIME. UNIVERSITY OF SINGAPORE 2012 I Abstract Control theories and designs for stable delay- free systems have been well developed in research society and widely adopted in industry. Study of time delay systems. unstable systems are gaining great attention from researchers recently. Control of unstable delay systems is the most challenging and difficult case and becomes a research frontier in process control,