Sơ đồ Mainboard MSI -7204

1 1 2 2 3 3 4 4 5 5 A A B B C C D D System Chipset: Expansion Slots: Intel (R) Lakeport (GMCH) + ICH7 Chipset CPU: On Board Chipset: PCI 2.3 SLOT * 2 BIOS FWH EEPROM- 4M Azalia Codec RLK- ALC882 7.1+2 channel LPC Super I/O W83637HF Intel Lakeport (945P)- GMCH (North Bridge) Intel - up to 3.8G(Single core) & 3.2G(Dual core) LAN RTL8100C/8110S(B) Intel ICH7/7R (South Bridge) Main Memory: DDR II * 4 (Max 4GB) Intersil PWM: Controller: HIP6316 4 Phase Driver: ISL6614ACB * 1 + ISL6612ACBZT *2 PCI EXPRESS X16 SLOT * 1 CLOCK ICS954119DF Intel LGA775 Processor PCI Routing Table 1394 VIA- VT6307/8 with PHY BLOCK DIAGRAM ICH7 18 Intel LGA775 6 , 7 , 8 , 9 2 COVER SHEET 13 17 16 IEEE1394 VT-6308P 3 , 4 , 5 Title ICS954119DF Clock Gen 10,11,12 Intel Lakeport Page 1 Azalia Codec (ALC882) LAN - RTL8100C/8110S(B) LPC I/O - W83627EHF MS-7204 Version 0A 14 15FWH/FAN/SATA PCI Slot 2 LAN PCI Device INTERRUPTIDSEL REQ/GNT AD16 1 A E 2 (Add MEDION SPEC) AD20 0 B 3 1394. AD19 4 D AD18 PCI Slot 1 AD17 C 5FAD21 PCI EXPRESS X1 SLOT * 1 SATA *4 30 29 MS7 ACPI Controller BTX ,Front Panel,IDE 28 24 Misc 26 23 27 22 21 USB CONNECTORS DDR II DIMM 3 & 4 Channel B Intersil 6316 4Phase DDR II VTT Decoupling DDR II DIMM 1 & 2 Channel A 20 HISTORY 25PCI -Express X16 Slot & X1 Slot PCI Slot 1,2 Azalia Codec (ALC882)-2 19 PCIRST & POWER OK MAP 31 POWER MAP 32 MS-7204 0A COVER SHEET A3 133Wednesday, July 13, 2005 Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. 1 1 2 2 3 3 4 4 5 5 A A B B C C D D Block Diagram Intel LGA775 Processor Lakeport-945P ICH7 VRM 10.1 2 DDR II Modules PCI EXPRESS X16 Connector IDE Primary RLK Azalia Codec LPC SIO Keyboard Mouse Floopy Parallel Serial PCI Slot 1 UltraDMA 33/66/100 USB LPC Bus USB Port0~ 7 PCI Slot 2 DIMM CHANNEL A USB2.0 PCI FWH FSB W83627EHF LAN RLK 8100C/8110S(B) 1394 PCI 2 DDR II Modules DIMM CHANNEL B P.6~9 P.3~5 P.10~12 SERIAL ATA2 P.14 P.14 P.14 P.19 P.14 P.18 P.18 P.16 P.17 P.26 P.30 P.18 P.20 P.21 P.15 P.23 P.23 P.28 P.25 P.18 4-Phase PWM Intersil 6316 SERIAL ATA1 DMI MS7 ATX1 VRM_GD VTT_PWG H_PWRGD PLRST# PCIRST_ICH7# SLP_S4# SLP_S3# PWR_GD VID_GD PCIRST_SLOT# PCIRST_BUF# RSMRST# HD_RST# PWR_OK FP_RST#SW_ON# JFP1 VRM_GD RSMRST# PCIRST_BUF# PCIRST_ICH6# PCIRST_BUF# HD_RST# PCIRST_SLOT# PWR_GD H_CPURST# P.18 IDE Primary P.18 VIA VT6308P MS-7204 0A BLOCK DIAGRAM A3 233Wednesday, July 13, 2005 Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. 1 1 2 2 3 3 4 4 5 5 A A B B C C D D VID Pull-Up Resistor The signal VID_SELECT(previously known as FC16, land number AN7) on the processor socket should have a 62 ohm 5% pull-down resistor to ground. CPU SIGNAL BLOCK PLACE RESISTORS OUTSIDE SOCKET CAVITY IF NO ROOM FOR VARIABLE RESISTOR DON'T PLACE LL_ID[]1:0]=00 for the P4 processor in the 775-land package. The LL_ID[]1:0] signals are used to select the correct loading slope for the processor. ITPCLK[0:1] are copies of BCLK that are used only in processor systems where no debug port is implemented on the system board. MSI PLACE BPM TERMINATION NEAR CPU 2 TABLE 0 FSB FREQUENCY0 1 0 133 MHZ (533) 267 MHZ (1067) 0 0 1 BSEL 0 0 1 0 200 MHZ (800) MS-7204 0A Intel LGA775 CPU - Signals MICRO-STAR INt'L CO., LTD. 333Wednesday, July 13, 2005 Title Size Document Number Rev Date: Sheet of H_A#18 H_REQ#1 H_D#37 H_BPM#0 H_TDO H_TESTHI9 H_D#59 H_REQ#4 H_D#9 H_D#6 H_D#55 H_A#5 H_A#22 H_D#1 H_TMS H_D#2 H_A#15 H_D#56 H_FORCEPH H_D#34 H_COMP2 VID2 VSS_VRM_SENSE H_A#8 H_TESTHI1 H_REQ#3 H_D#26 H_A#11 H_A#24 H_A#9 H_D#61 H_D#17 H_COMP0 H_COMP3 H_D#49 H_D#45 H_A#29 H_D#28 H_D#10 H_D#63 H_D#39 H_D#47 H_COMP1 H_D#22 H_A#25 H_TESTHI13 H_D#12 H_COMP4 H_D#5 H_D#54 H_TESTHI10 H_TESTHI0 H_D#38 H_A#6 VTT_OUT_RIGHT H_TESTHI2_7 VTT_OUT_LEFT H_D#15 H_D#50 H_A#31 H_A#12 LL_ID1 H_A#13 H_A#14 H_D#52 H_D#32 RSVD_G6 H_D#7 H_D#18 VID1 H_TESTHI11 H_D#62 H_D#11 GTLREF_SEL H_D#33 H_D#57 H_TDI H_D#25 H_A#26 VID3 H_D#8 H_TCK H_A#30 LL_ID1 H_D#30 VID4 VID2 VID5 H_D#29 H_D#27 H_D#53 H_A#23 H_D#23 H_D#58 VID0 H_D#46 VID5 H_A#7 H_A#20 H_TRST# H_D#51 H_BPM#5 H_D#36 H_D#35 H_D#20 H_A#17 H_TESTHI8 H_D#14 H_D#41 VID1 H_D#13 H_D#16 H_D#3 H_REQ#0 H_D#21 H_D#43 H_D#40 VID0 H_D#44 H_D#19 H_BPM#2 H_BPM#1 H_A#16 H_D#60 H_D#4 H_A#10 H_D#24 H_BPM#3 H_REQ#2 VID4 H_A#19 H_COMP5 H_A#27 H_A#3 H_TESTHI12 VCC_VRM_SENSE H_D#42 H_A#28 H_BPM#4 H_D#31 H_D#48 VID3 H_D#0 H_A#21 VTT_OUT_LEFT H_A#4 H_TRST# H_TMS H_BPM#4 H_BPM#3 H_BPM#2 H_TCK H_BPM#1 H_TDI H_TDO VTT_OUT_RIGHT H_BPM#5 H_BPM#0 VTT_OUT_RIGHT VTT_OUT_RIGHT H_FORCEPH 27 H_DEFER#6 H_HIT#6 H_A20M#10 H_IGNNE#10 H_REQ#[0 4] 6 H_DSTBN#1 6 H_BPRI#6 H_DSTBP#3 6 H_DSTBP#0 6 H_BR#0 4,6 H_DBI#06 H_INIT#10 H_DBSY#6 H_INTR 10 CPU_GTLREF1 4 H_RS#0 6 H_DSTBN#0 6 H_RS#2 6 H_DSTBP#1 6 VCC_VRM_SENSE 27 VID4 27 VTT_OUT_LEFT 4 VID1 27 ICH_H_SMI#10 H_PWRGD4,10 TRMTRIP#4,10 H_DSTBP#2 6 H_FSBSEL24,8,13 H_HITM#6 H_IERR#4 H_DRDY#6 H_ADS#6 VID5 27 H_A#[3 31]6 H_DBI#36 VID3 27 VID2 27 H_FERR#4,10 H_DSTBN#3 6 H_ADSTB#1 6 H_ADSTB#0 6 MCH_GTLREF_CPU 6 VID0 27 H_THERMDA14 H_BNR#6 H_CPURST#4,6 H_PROCHOT#4,27 H_DBI#26 H_FSBSEL04,8,13 VTIN_GND14 CPU_GTLREF0 4 CK_H_CPU# 13 H_STPCLK#10 H_DBI#16 H_D#[0 63]6 H_NMI 10 VTT_OUT_RIGHT 4,5 VSS_VRM_SENSE 27 H_FSBSEL14,8,13 H_TRDY#6 CK_H_CPU 13 H_DSTBN#2 6 H_RS#1 6 H_LOCK#6 V_FSB_VTT R309 X_62R0402 U11A _ZIF-SOCK775-15u-in AJ6 AJ5 AH5 AH4 AG5 AG4 AG6 AF4 AF5 AB4 AC5 AB5 AA5 AD6 AA4 Y4 Y6 W6 AB6 W5 V4 V5 U4 U5 T4 U6 T5 R4 M4 L4 M5 P6 L5 AC2 AN3 AN4 AN5 AN6 AJ3 AK3 AM5 AL4 AK4 AL6 AM3 AL5 AM2 B15 C14 C15 A14 D17 D20 G22 D22 E22 G21 F21 E21 F20 E19 E18 F18 F17 G17 G18 E16 E15 G16 G15 F15 G14 F14 G13 E13 D13 F12 F11 D10 E10 D7 E9 F9 F8 G9 D11 C12 B12 D8 C11 B10 A11 A10 A7 B7 B6 A5 C6 A4 C5 B4 H1 AG3 AF2 AG2 AD2 AJ1 AJ2 G5 J6 K6 M6 J5 K4 W2 P1 H5 G4 G3 F24 G24 G26 G27 G25 F25 W3 F26 AK6 G6 G28 F28 A3 F5 B3 U3 U2 F3 R1 G2 T1 A13 J17 H16 H15 J16 AD5 R6 C17 G19 E12 B9 A16 G20 G12 C8 L1 K1 A8 G11 D19 C20 F2 AB2 AB3 R3 M3 AD3 P3 H4 B2 C1 E3 D2 C3 C2 D4 E4 G8 G7 AD1 AF1 AC1 AG1 AE1 AL1 AK1 M2 AE8 AL2 N2 P2 K3 L2 AH2 N5 AE6 C9 G10 D16 A20 Y1 V2 AA2 G29 H30 G30 N1 G23 B22 A22 A19 B19 B21 C21 B18 A17 B16 C18 AM7 H2 AN7 H29 J2 T2 E24 A35# A34# A33# A32# A31# A30# A29# A28# A27# A26# A25# A24# A23# A22# A21# A20# A19# A18# A17# A16# A15# A14# A13# A12# A11# A10# A9# A8# A7# A6# A5# A4# A3# DBR# VCC_SENSE VSS_SENSE VCC_MB_REGULATION VSS_MB_REGULATION ITP_CLK1 ITP_CLK0 VID6# VID5# VID4# VID3# VID2# VID1# VID0# D53# D52# D51# D50# D49# D48# D47# D46# D45# D44# D43# D42# D41# D40# D39# D38# D37# D36# D35# D34# D33# D32# D31# D30# D29# D28# D27# D26# D25# D24# D23# D22# D21# D20# D19# D18# D17# D16# D15# D14# D13# D12# D11# D10# D9# D8# D7# D6# D5# D4# D3# D2# D1# D0# GTLREF0 BPM5# BPM4# BPM3# BPM2# BPM1# BPM0# PCREQ# REQ4# REQ3# REQ2# REQ1# REQ0# TESTHI12 TESTHI11 TESTHI10 TESTHI9 TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0 FORCEPH RSVD BCLK1# BCLK0# RS2# RS1# RS0# AP1# AP0# BR0# COMP3 COMP2 COMP1 COMP0 DP3# DP2# DP1# DP0# ADSTB1# ADSTB0# DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0# LINT1/NMI LINT0/INTR DBI0# DBI1# DBI2# DBI3# EDRDY# IERR# MCERR# FERR#/PBE# STPCLK# BINIT# INIT# RSP# DBSY# DRDY# TRDY# ADS# LOCK# BNR# HIT# HITM# BPRI# DEFER# TDI TDO TMS TRST# TCK THERMDA THERMDC THERMTRIP# GND/SKTOCC# PROCHOT# IGNNE# SMI# A20M# TESTI_13 RSVD RESERVED0 RESERVED1 RESERVED2 RESERVED3 RESERVED4 RESERVED5 BOOTSELECT LL_ID0 LL_ID1 BSEL0 BSEL1 BSEL2 PWRGOOD RESET# D63# D62# D61# D60# D59# D58# D57# D56# D55# D54# RSVD GTLREF1 VID_SELECT GTLREF_SEL COMP4 COMP5 CS_GTLREF R310 680R TP11 R278 60.4R1%0402 C378 X_C0.1U16Y0402 TP18 RN348P4R-680R 1 3 5 7 2 4 6 8 R287 60.4R1%0402 R183 62R0402 TP16 TP20 TP8 R271 60.4R1%0402 C371 C0.1U16Y0402 R304 62R0402 TP2 TP10 R290 62R0402 R289 60.4R1%0402 TP12 R184 62R0402 R315 62R0402 R281 62R0402 R284 62R0402 R204 60.4R1%0402 R298 62R0402 RN33 8P4R-62R0402 1 3 5 7 2 4 6 8 R321 X_62R0402 R308 62R0402 R274 62R0402 R291 X_62R0402 R272 X_62R0402 R275 62R0402 R305 X_0R0402 R303 X_62R0402 R296 60.4R1%0402 RN31 8P4R-62R0402 1 3 5 7 2 4 6 8 C377 C2.2U16X1206 C370 C0.1U16Y0402 TP22 R301 62R0402 R313 680R 1 1 2 2 3 3 4 4 5 5 A A B B C C D D VccPLL for Ssmithfield define the support future processor. TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET FSB GENERIC DECOUPLING CPU signal termination 1.25V VTT_PWRGOOD 100mA 100mA VTT_PWG SPEC : High > 0.9V Low < 0.3V Trise < 150ns CAPS FOR FSB GENERIC MSI GTLREF VOLTAGE SHOULD BE 0.63*VTT = 0.756V FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS AND CEDAR MILL ARE SUPPORTED PLACE AT ICH END OF ROUTE PLACE AT CPU END OF ROUTE MS-7204 0A Intel LGA775 CPU - Power MICRO-STAR INt'L CO., LTD. 433Wednesday, July 13, 2005 Title Size Document Number Rev Date: Sheet of CPU_GTLREF0VTT_OUT_RIGHT VTT_OUT_RIGHT VTT_PWG VTT_OUT_RIGHT VTT_OUT_LEFT VTT_PWG H_FSBSEL0 H_FSBSEL1 H_IERR# H_VSSA H_VCCA TRMTRIP# H_VCCIOPLL H_FSBSEL2 H_PROCHOT# H_CPURST# H_BR#0 H_PWRGD H_FERR# CPU_GTLREF1 H_VSSA H_VCCA H_VCCIOPLL VTT_OUT_LEFT VTT_OUT_RIGHT VTT_OUT_LEFT VID_GD#26,27 H_FSBSEL1 3,8,13 H_FSBSEL0 3,8,13 H_FSBSEL2 3,8,13 CPU_GTLREF0 3 CPU_GTLREF1 3 H_PROCHOT# 3,27 H_CPURST# 3,6 H_PWRGD 3,10 H_BR#0 3,6 TRMTRIP# 3,10 H_FERR# 3,10 H_IERR# 3 VTT_OUT_RIGHT3,5 VTT_OUT_LEFT3 V_FSB_VTT V_FSB_VTT VCCP VCCP VCCP VCC5_SB V_FSB_VTT V_FSB_VTT V_FSB_VTT V_FSB_VTT V_FSB_VTT L5 10uH/8/125mA/Rdc=0.7 R285 124R1%0402 C224 C10U10Y0805 R320 1KR0402 C221 C0.1U16Y0402 L6 10uH/8/125mA/Rdc=0.7 R276 62R0402 C229 C22U10X50805 R279 124R1%0402 R277 10R0402 U11B _ZIF-SOCK775-15u-in F29 AH27 AH26 AH25 AH22 AH21 AH19 AH18 AH15 AH14 AH12 AH11 AG9 AG8 AG30 AG29 AG28 AG27 AG26 AG25 AG22 AG21 AG19 AG18 AG15 AG14 AG12 AG11 AF9 AF8 AF22 AF21 AF19 AF18 AF15 AF14 AF12 AF11 AE9 AE23 AE22 AE21 AE19 AE18 AE15 AE14 AE12 AE11 AD8 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AC8 AC30 AC29 AC28 AC27 AC26 AC25 AC24 AC23 AB8 AA8 AH28 AH29 AH30 AH8 AH9 AJ11 AJ12 AJ14 AJ15 AJ18 AJ19 AJ21 AJ22 AJ25 AJ26 AJ8 AJ9 AK11 AK12 AK14 AK15 AK18 AK19 AK21 AK22 AK25 AK26 AK8 AK9 AL11 AL12 AL14 AL15 AL18 AL19 AL21 AL22 AL25 AL26 AL29 AL30 AL8 AL9 AM11 AM12 AM14 AM15 AM18 AM19 AM21 AM22 AM25 AM26 AM29 AM30 AM8 AM9 AN11 AN12 AN14 AN15 AN18 AN19 AN21 AN22 AN25 AN26 AN29 AN30 AN8 AN9 J10 J11 J12 J13 J14 J15 J18 J19 J20 J21 J22 J23 J24 J25 J26 J27 J28 J29 J30 J8 J9 K23 K24 K25 K26 K27 K28 K29 K30 K8 L8 M23 M24 M25 M26 M27 M28 M29 M30 M8 N23 N24 N25 N26 N27 N28 N29 N30 N8 P8 R8 T23 T24 T25 T26 T27 T28 T29 T30 T8 U23 U24 U25 U26 U27 U28 U29 U30 U8 V8 W23 W24 W25 W26 W27 W28 W29 W30 W8 Y23 Y24 Y25 Y26 Y27 Y28 Y29 Y30 Y8 D23 A25 A26 A27 A28 A29 A30 B25 B26 B27 B28 B29 B30 C25 C26 C27 C28 C29 C30 D25 D26 D27 D28 D29 D30 AM6 AA1 J1 F27 A23 B23 C23 1 2 3 4 RSVD VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCCPLL VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTTPWRGD VTT_OUT_RIGHT VTT_OUT_LEFT VTT_SEL VCCA VSSA VCC-IOPLL HS1 HS2 HS3 HS4 Q37 N-MMBT3904_NL_SOT23 R306 62R0402 R318 680R0402 C231 X_C1U10X C362 C220P25N0402 R189 0R0805 C230 X_C10U10Y0805 C222 C10U10Y0805 R283 62R0402 R286 X_100R0402 R316 130R1%0402 R273 10R0402 C369 C1U6.3Y50402/80-20% R182 62R0402 R282 210R1%0402 C219 C0.1U16Y0402 C223 C10U10Y0805 R322 10KR0402 C364 C1U6.3Y50402/80-20% R280 210R1%0402 R288 62R0402 RN20 8P4R-470R0402 1 3 5 7 2 4 6 8 C384 X__C1U6.3Y50402/80-20% C220 C0.1U16Y0402 C363 C220P25N0402 1 1 2 2 3 3 4 4 5 5 A A B B C C D D MSI 2005 Mainstream/Value FMB platform 2005 Performance FMB platform MSID0 0 NC MSID1 0 0 MS-7204 0A Intel LGA775 CPU - GND MICRO-STAR INt'L CO., LTD. 533Wednesday, July 13, 2005 Title Size Document Number Rev Date: Sheet of MSID0 MSID1 H_COMP7 H_COMP6 VTT_OUT_RIGHT V_FSB_VTT U11C _ZIF-SOCK775-15u-in A12 A15 A18 A2 A21 A24 A6 A9 AA23 AA24 AA25 AA26 AA27 AA28 AA29 AA3 AA30 AA6 AA7 AB1 AB23 AB24 AB25 AB26 AB27 AB28 AB29 AB30 AB7 AC3 AC6 AC7 AD4 AD7 AE10 AE13 AE16 AE17 AE2 AE20 AE24 AE25 AE26 AE27 AE28 AE29 AE30 AE5 AE7 AF10 AF13 AF16 AF17 AF20 AF23 AF24 AF25 AF26 AF27 AF28 AF29 AF3 AF30 AF6 AF7 AG10 AG13 AG16 AG17 AG20 AG23 AG24 AG7 AH1 AH10 AH13 AH16 AH17 AH20 AH23 AH24 AH3 AH6 AH7 AJ10 AJ13 AJ16 AJ17 AJ20 AJ23 AJ24 AJ27 AJ28 AJ29 AJ30 AJ4 AJ7 AK10 AK13 AK16 AK17 AK2 AK20 AK23 AK24 AK27 AK28 AK29 AK30 AK5 AK7 AL10 AL13 AL16 AL17 AL20 AL23 AL24 AL27 AL28 AL3 AL7 AM1 AM10 AM13 AM16 AM17 AM20 AM23 AM24 AM27 AM28 AM4 AN1 AN10 AN13 AN16 AN17 AN2 AN20 AN23 AN24 AN27 AN28 B1 B11 B14 B17 B20 B24 B5 B8 C10 C13 C16 C19 C22 C24 C4 C7 D12 D15 D18 D21 D24 D3 D5 D6 D9 E11 E14 E17 E2 E20 E25 E26 E27 E28 E29 E8 F10 F13 F16 F19 F22 F4 F7 G1 H10 H11 H12 H13 H14 H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 H27 H28 H3 H6 H7 H8 H9 J4 J7 K2 Y3 AE3 AE4 D1 D14 E23 E5 E6 E7 F23 F6 B13 J3 N4 P5 V1 W1 AC4 Y7 Y5 Y2 W7 W4 V7 V6 V30 V3 V29 V28 V27 V26 V25 V24 V23 U7 U1 T7 T6 T3 R7 R5 R30 R29 R28 R27 R26 R25 R24 R23 R2 P7 P4 P30 P29 P28 P27 P26 P25 P24 P23 N7 N6 N3 M7 M1 L7 L6 L30 L3 L29 L28 L27 L26 L25 L24 L23 K7 K5 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS COMP6 COMP7 RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD IMPSEL# RSVD RSVD RSVD RSVD MSID[1] MSID[0] RSVD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS TP14 TP3 R300 60.4R1%0402 TP13 R295 62R0402 TP4 R311 60.4R1%0402 R299 62R0402 R302 X_62R0402 VTT_OUT_RIGHT3,4 1 1 2 2 3 3 4 4 5 5 A A B B C C D D HD_SWING S/B 0.22*VTT HSWING VOLTAGE "10mil trace 7mil space" place divider resistors near VTT. MSI CAP for GTLREF inputs GMCH use 12mil trace, isolate W 15mil space. CAPS SHOULD BE PLACED NEAR MCH PIN 124 OHM OVER 210 RESISTORS GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V MS-7204 0A Intel Lakeport - CPU Signals MICRO-STAR INt'L CO., LTD. 633Wednesday, July 13, 2005 Title Size Document Number Rev Date: Sheet of HXSWING H_REQ#4 H_A#25 H_REQ#2 H_REQ#0 H_A#9 H_A#13 H_D#13 H_D#16 H_RS#0 H_D#47 H_D#9 H_A#5 H_D#27 H_D#23 H_A#10 H_A#22 H_D#35 H_D#33 HXRCOMP H_A#3 HXSWING H_D#18 H_D#0 H_D#45 H_D#61 H_D#36 H_REQ#1 H_D#48 H_D#40 H_D#55 H_D#44 H_D#25 H_D#52 H_D#58 H_D#1 H_A#29 H_RS#2 H_D#5 H_D#49 H_A#16 H_D#2 H_D#3 H_D#19 H_D#20 H_A#26 H_A#15 H_D#37 H_A#23 H_D#32 H_D#6 H_D#4 HXSCOMP H_D#62 H_D#17 V_FSB_VTT H_D#31 H_D#15 MCH_GTLREF_CPU H_A#21 H_D#7 H_D#42 H_D#63 H_D#14 H_D#38 H_A#17 H_D#43 H_D#22 H_D#46 H_D#57 H_A#18 H_A#12 H_D#56 H_A#19 H_A#27 H_D#12 H_A#28 H_D#21 H_D#11 H_D#26 H_RS#1 HXSCOMP H_D#8 H_D#34 H_D#30 H_D#29 H_D#50 H_DBI#2 H_DBI#1 H_D#60 H_D#41 H_A#11 H_D#51 H_DBI#0 H_D#54 H_A#4 H_D#10 H_D#28 ICH_SYNC# H_D#24 H_DBI#3 H_D#59 H_D#39 H_A#8 H_A#7 H_A#24 H_A#14 H_A#20 H_A#6 H_A#31 H_D#53 H_REQ#3 H_A#30 MCH_GTLREF_CPU H_D#34 3 H_D#63 3 H_D#12 3 H_DSTBN#1 3 H_D#32 3 H_A#203 H_D#44 3 H_D#6 3 H_A#233 H_D#62 3 H_D#59 3 H_A#73 H_TRDY#3 H_D#49 3 H_D#23 3 H_D#54 3 H_D#48 3 H_DSTBP#3 3 H_DBSY#3 PWR_GD11,26 H_D#55 3 H_REQ#23 H_A#243 H_D#20 3 H_D#13 3 H_ADS#3 H_RS#13 H_A#303 H_DSTBN#0 3 H_ADSTB#03 H_DSTBN#2 3 H_DSTBP#0 3 H_D#50 3 H_A#83 H_D#24 3 H_ADSTB#13 H_D#17 3 H_D#26 3 H_A#213 H_D#56 3 H_A#313 H_D#45 3 H_BR#03,4 CK_H_MCH13 H_BPRI#3 H_D#7 3 H_BNR#3 H_REQ#13 H_DSTBN#3 3 H_D#51 3H_DEFER#3 H_LOCK#3 H_D#25 3 H_D#40 3 H_RS#23 H_D#27 3 H_D#8 3 H_A#153 H_CPURST#3,4 H_D#57 3 H_D#9 3 H_D#46 3 H_D#35 3 H_A#253 H_D#4 3 H_DRDY#3 PLTRST#10 H_REQ#43 H_A#263 H_D#14 3 H_REQ#03 H_A#273 H_D#41 3 H_D#28 3 H_D#0 3 H_D#21 3 H_RS#03 H_A#163 H_HIT#3 H_D#47 3 H_D#36 3 H_A#93 H_D#30 3 H_A#223 H_A#103 H_A#113 H_D#10 3 H_A#33 H_D#15 3 H_D#1 3 H_D#5 3 H_A#183 H_A#173 H_A#123 H_D#42 3 H_A#43 H_D#60 3 H_D#37 3 H_A#53 H_D#18 3 H_D#31 3 H_D#29 3 CK_H_MCH#13 H_D#52 3 H_D#22 3 H_A#133 H_D#38 3 H_D#11 3 H_DSTBP#1 3 H_D#16 3 H_D#2 3 ICH_SYNC#11 H_D#33 3 H_A#283 H_A#293 H_D#43 3 H_HITM#3 H_A#193 H_D#61 3 H_D#58 3 H_D#19 3 H_REQ#33 H_A#63 H_D#53 3 H_D#39 3 H_A#143 H_DSTBP#2 3 H_D#3 3 H_DBI#3 3 H_DBI#1 3 H_DBI#0 3 H_DBI#2 3 MCH_GTLREF_CPU 3 V_1P5_CORE V_FSB_VTT V_FSB_VTT V_1P5_CORE V_FSB_VTT R244 10R0402 C315 X_C220P25N0402 C305 C0.1U16Y0402 U14A (INTEL-QG82945G-A2-LF) P41 M39 P42 M42 N41 M40 L40 M41 K42 G39 J41 G42 G40 G41 F40 F43 F37 E37 J35 D39 C41 B39 B40 H34 C37 J32 B35 J34 B34 F32 L32 J31 H31 M33 K31 M27 K29 F31 H29 F29 L27 M24 J26 K26 G26 H24 K24 F24 E31 A33 E40 D37 C39 D38 D33 C35 D34 C34 B31 C31 C32 D32 B30 D30 K40 A38 E29 B32 K41 L43 F35 G34 J27 M26 E34 B37 N17 P17 P18 P20 P21 AA22 AB21 AB22 AB23 AC22 AD14 AF6 AF7 AF8 AF9 AF10 AF11 AF12 AF13 AF14 AF30 AG2 AG3 AG4 AG5 AG6 AG7 AG8 AG9 AG10 AG11 AG12 AG13 AG14 AH1 AH2 AH4 AJ5 AJ13 AJ14 AK2 AK3 AK4 AK14 AK15 AK20 R15 R17 R18 R20 R21 R23 R24 U15 U17 U18 U19 U20 U21 U22 U23 U24 U25 U26 V15 V17 V18 V19 V20 V21 V22 V23 V25 V27 W17 W18 W19 W20 W22 W24 W26 W27 Y15 J39 K38 J42 K35 J37 M34 N35 R33 N32 N34 M38 N42 N37 N38 R32 R36 U37 R35 R38 V33 U34 U32 V42 U35 Y36 Y38 AA37 V32 Y34 M36 V35 F38 AA41 D42 U39 U40 W42 E41 D41 K36 G37 E42 U41 W41 P40 W40 U42 V41 Y40 T40 Y43 T43 M31 M29 AJ9 C30 AJ12 M18 A28 C27 B27 D27 AC30 AK21 AJ23 AJ26 AL29 AL20 AJ21 AL26 AK27 AJ29 AG29 V30 AA30 BC43 BC42 BC2 BC1 BB43 BB2 BB1 BA2 AW26 AW2 AV27 AV26 E35 C42 C2 B43 B42 B41 B3 B2 A42 M17 AA35 AA42 AA34 AA38 L15 M15 U27 R27 A43 M11 AG25 AG26 AG27 AJ24 AJ27 AK40 AL39 AW17 AW18 AY14 BC16 AD30 AC34 Y30 Y33 AF31 AD31 U30 V31 Y17 Y18 Y19 Y21 Y23 Y25 Y27 AA15 AA17 AA18 AA19 AA20 D28 HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63# KDINV_0# HDINV_1# HDINV_2# HDINV_3# HD_STBP0# HD_STBN0# HD_STBP1# HD_STBN1# HD_STBP2# HD_STBN2# HD_STBP3# HD_STBN3# VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31# HAD_STB0# HAD_STB1# HPCREQ# HBREQ0# HBPRI# HBNR# HLOCK# HADS# HREQ0# HREQ1# HREQ2# HREQ3# HREQ4# HHIT# HHITM# HDEFER# HTRDY# HDBSY# HDRDY# HEDRDY# RS0# RS1# RS2# HCLKP HCLKN PWROK HCPURST# RSTIN# ICH_SYNC# HRCOMP HSCOMP HSWING HDVREF RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC VCC RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC HACCVREF C316 X_C2.2P25N0402 R241 62R0402 TP23 R248 16.9R1% R233 124R1%0402 R237 210R1%0402 R228 301KR1%0402 R232 84.5R1%0402-LF R245 60.4R1%0402 C292 C0.01U25X0402 1 1 2 2 3 3 4 4 5 5 A A B B C C D D MSI PLACE CLOSE TO MCH MS-7204 0A Intel Lakeport - Memory Signals MICRO-STAR INt'L CO., LTD. 733Wednesday, July 13, 2005 Title Size Document Number Rev Date: Sheet of MAA_A12 SDQ_A32 SDQ_B49 SDQ_A26 SDQ_B2 SDQ_B28 SCKE_A2 SDQ_B11 SDQ_A27 SDQ_B4 MAA_A4 SDQ_B9 SDQ_B56 MAA_A0 SDQ_A33 SDM_A4 SDM_B0 SBS_B1 MAA_B11 SDQ_B12 SDQ_B47 SCKE_A3 SCS_B#1 RAS_B# SDQ_B5 SDQ_A24 CAS_A# SDQ_A15 SDQ_B25 SDQ_B54 SDM_A6 SDM_B1 SDQ_B59 SBS_A0 SDQ_A38 SDQ_A23 MAA_B2 SDQ_A61 SDQ_B37 SDQ_A50 SMPCOMP_P MAA_A3 SDM_A3 SDQ_A41 SCS_B#2 MAA_B13 SDQ_B32 SDQ_B57 SDQ_A52 SDM_B5 SDQ_B26 SDQ_B48 SDQ_B22 SDQ_A59 MAA_B4 SDQ_A29 SMPCOMP_P MAA_A5 SDQ_B1 SDQ_B30 MAA_B6 SDQ_B36 SCKE_B2 SDQ_A20 SMPCOMP_N SDQ_B61 SDQ_A2 SBS_A2 SDQ_A48 SDQ_A14 SDQ_B42 RAS_A# SDQ_B3 SDQ_A17 SDQ_B7 SDM_A1 SDQ_B58 SDQ_A54 MCH_VREF_A SDQ_A62 SBS_B0 SDQ_B44 SCS_B#3 SDQ_A12 SDQ_B39 SDQ_B55 SDQ_B38 SDQ_A21 SDM_A5 SDQ_A4 SDQ_A25 SDM_B3 SDQ_A6 SDQ_A43 SDQ_B46 SDQ_A35 SDQ_B18 SDQ_A8 SDM_A0 MAA_B10 SDQ_B8 SDQ_A9 SDQ_A30 SDQ_B21 SDQ_A3 SDM_B7 MAA_B12 SDQ_B20 SDQ_B27 SDQ_A36 SDQ_A47 SDQ_A16 SDQ_A60 SDQ_B29 SDQ_A34 SDQ_B23 SDQ_A11 SDQ_A13 MAA_B8 SDQ_B15 SDQ_B24 SDQ_B40 SDQ_B14 SDQ_A18 SDQ_B35 MAA_A1 SCS_B#0 SDQ_A46 SDQ_A10 CAS_B# SDQ_A40 SDQ_A58 SDM_B6 MAA_B0 SDQ_A56 SDQ_A53 SDQ_B50 MAA_A2 MAA_A7 MAA_B3 WE_A# SDQ_B43 MCH_VREF_B MAA_A10 SDM_A7 MAA_A9 SDQ_A45 SDQ_B17 SDQ_A49 SCKE_A0 SMPCOMP_N MAA_A6 MAA_A8 SDQ_B6 SDQ_A31 SDQ_A55 SDQ_B31 MAA_A11 SDQ_B53 SDM_A2 SDQ_B13 SDQ_B10 MAA_B9 SCKE_A1 SDQ_A1 SDQ_B41 WE_B# SDQ_A5 SDQ_B45 SDQ_B0 SDQ_A42 SBS_B2 SDQ_B62 SDQ_B34 SDQ_A28 SDQ_A19 SDQ_B60 MAA_B1 SDQ_A22 SDQ_A63 SDQ_B51 SDQ_A57 SDQ_A51 SDQ_A0 SDM_B4 SDQ_B52 SBS_A1 SDQ_B19 SCKE_B1 SDQ_A37 MAA_B5 SDM_B2 SDQ_A7 MAA_B7 SDQ_A39 SDQ_B16 MAA_A13 SDQ_B33 SDQ_A44 SDM_A[0:7] SCKE_A[0 3] SCKE_B3 SCKE_B0 SDQ_B63 MCH_VREF_A MCH_VREF_B SCS_A#021,23 MAA_A1221,23 MAA_B4 22,23 MAA_B11 22,23 SCS_B#0 22,23 SCS_A#321,23 MAA_B6 22,23 RAS_A#21,23 MAA_A821,23 MAA_B7 22,23 RAS_B# 22,23 MAA_B5 22,23 SCS_B#2 22,23 SBS_B1 22,23 WE_A#21,23 SCS_A#121,23 MAA_B9 22,23 MAA_A221,23 CAS_B# 22,23 SBS_A121,23 MAA_A521,23 MAA_B10 22,23 SCS_B#3 22,23 MAA_A1021,23 MAA_A1121,23 MAA_A121,23 SBS_A021,23 SCS_A#221,23 MAA_B2 22,23 MAA_A421,23 MAA_A621,23 SBS_B0 22,23 MAA_A321,23 MAA_B0 22,23 WE_B# 22,23 MAA_B13 22,23 MAA_B1 22,23 MAA_B12 22,23 MAA_B3 22,23 SCS_B#1 22,23 SDM_B[0 7]22 MAA_A721,23 SBS_B2 22,23 MAA_A1321,23 SBS_A221,23 SCKE_B[0 3]22,23 MAA_B8 22,23 MAA_A021,23 MAA_A921,23 CAS_A#21,23 SDM_A[0:7]21 SCKE_A[0:3]21,23 SCLKA021 SCLKA121 SCLKA221 SCLKA321 SCLKA421 SCLKA521 SCLKA#021 SCLKA#121 SCLKA#221 SCLKA#321 SCLKA#421 SCLKA#521 SDQS_A021 SDQS_A121 SDQS_A221 SDQS_A321 SDQS_A421 SDQS_A521 SDQS_A621 SDQS_A721 SDQS_A#021 SDQS_A#121 SDQS_A#221 SDQS_A#321 SDQS_A#421 SDQS_A#521 SDQS_A#621 SDQS_A#721 SDQ_B[0 63]22 SODT_A021,23 SODT_A121,23 SODT_A221,23 SODT_A321,23 SCLKB0 22 SCLKB1 22 SCLKB2 22 SCLKB3 22 SCLKB4 22 SCLKB5 22 SCLKB#0 22 SCLKB#1 22 SCLKB#2 22 SCLKB#3 22 SCLKB#4 22 SCLKB#5 22 SDQS_B0 22 SDQS_B1 22 SDQS_B2 22 SDQS_B3 22 SDQS_B4 22 SDQS_B5 22 SDQS_B6 22 SDQS_B7 22 SDQS_B#0 22 SDQS_B#1 22 SDQS_B#2 22 SDQS_B#3 22 SDQS_B#4 22 SDQS_B#5 22 SDQS_B#6 22 SDQS_B#7 22 SDQ_A[0 63]21 SODT_B0 22,23 SODT_B1 22,23 SODT_B2 22,23 SODT_B3 22,23 VCC_DDR VCC_DDR VCC_DDR R258 1KR1%0402 C356 C0.1U10Y R255 1KR1%0402 C335 C0.1U25Y C345 C0.1U10Y U14B (INTEL-QG82945G-A2-LF) BA40 AW41 BA41 AW40 BA23 AY24 BB23 BB22 BB21 BA21 AY21 BC20 AY19 AY20 BA18 BA19 BB18 BA22 BB17 BA17 AW42 AY42 AV40 AV43 AU40 AW23 AY23 AY17 AL11 AW7 AP13 AP23 AR29 AR38 AJ39 AD39 AM8 AM6 AV7 AR9 AV13 AT13 AU23 AR23 AT29 AV29 AP36 AM35 AG34 AG32 AD36 AD38 AM29 AM27 AV9 AW9 AL38 AL36 AP26 AR26 AU10 AT10 AJ38 AJ36 AM4 BB37 BA39 BA35 AY38 BA34 BA37 BB35 BA32 AW32 BB30 BA30 AY30 BA27 BC28 AY27 AY28 BB27 AY33 AW27 BB26 BC38 AW37 AY39 AY37 BB40 BC33 AY34 BA26 AU4 AR2 BA3 BB4 AY11 BA10 AU18 AR18 AU35 AV35 AP42 AP40 AG42 AG41 AC42 AC41 BB32 AY32 AY5 BB5 AK42 AK41 BA31 BB31 AY6 BA5 AH40 AH43 AC40 AP3 AP2 AU3 AV4 AN1 AP4 AU5 AU2 AW3 AY3 BA7 BB7 AV1 AW4 BC6 AY7 AW12 AY10 BA12 BB12 BA9 BB9 BC11 AY12 AM20 AM18 AV20 AM21 AP17 AR17 AP20 AT20 AP32 AV34 AV38 AU39 AV32 AT32 AR34 AU37 AR41 AR42 AN43 AM40 AU41 AU42 AP41 AN40 AL41 AL42 AF39 AE40 AM41 AM42 AF41 AF42 AD40 AD43 AA39 AA40 AE42 AE41 AB41 AB42 BB25 AY25 BC24 BA25 AL6 AL8 AP8 AP9 AJ11 AL9 AM10 AP6 AU7 AV6 AV12 AM11 AR5 AR7 AR12 AR10 AM15 AM13 AV15 AM17 AN12 AR13 AP15 AT15 AM24 AM23 AV24 AM26 AP21 AR21 AP24 AT24 AU27 AN29 AR31 AM31 AP27 AR27 AP31 AU31 AP35 AP37 AN32 AL35 AR35 AU38 AM38 AM34 AL34 AJ34 AF32 AF34 AL31 AJ32 AG35 AD32 AC32 AD34 Y32 AA32 AF35 AF37 AC33 AC35 BA14 AY16 BA13 BB13 AL5 AJ6 AM3 AJ8 AG40 AP39 AT34 AP18 BB10 AY2 AR3 AM2 SBCS0# SBCS1# SBCS2# SBCS3# SBRAS# SBCAS# SBWE# SBMA0 SBMA1 SBMA2 SBMA3 SBMA4 SBMA5 SBMA6 SBMA7 SBMA8 SBMA9 SBMA10 SBMA11 SBMA12 SBMA13 SBODT0 SBODT1 SBODT2 SBODT3 SBBA0 SBBA1 SBBA2 SBDM0 SBDM1 SBDM2 SBDM3 SBDM4 SBDM5 SBDM6 SBDM7 SBDQS0 SBDQS0# SBDQS1 SBDQS1# SBDQS2 SBDQS2# SBDQS3 SBDQS3# SBDQS4 SBDQS4# SBDQS5 SBDQS5# SBDQS6 SBDQS6# SBDQS7 SBDQS7# SBCLK0 SBCLK0# SBCLK1 SBCLK1# SBCLK2 SBCLK2# SBCLK3 SBCLK3# SBCLK4 SBCLK4# SBCLK5 SBCLK5# SMVREF0 SACS0# SACS1# SACS2# SACS3# SARAS# SACAS# SAWE# SAMA0 SAMA1 SAMA2 SAMA3 SAMA4 SAMA5 SAMA6 SAMA7 SAMA8 SAMA9 SAMA10 SAMA11 SAMA12 SAMA13 SAODT0 SAODT1 SAODT2 SAODT3 SABA0 SABA1 SABA2 SADQS0 SADQS0# SADQS1 SADQS1# SADQS2 SADQS2# SADQS3 SADQS3# SADQS4 SADQS4# SADQS5 SADQS5# SADQS6 SADQS6# SADQS7 SADQS7# SACLK0 SACLK0# SACLK1 SACLK1# SACLK2 SACLK2# SACLK3 SACLK3# SACLK4 SACLK4# SACLK5 SACLK5# SADM7 SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8 SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43 SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63 SACKE0 SACKE1 SACKE2 SACKE3 SBDQ0 SBDQ1 SBDQ2 SBDQ3 SBDQ4 SBDQ5 SBDQ6 SBDQ7 SBDQ8 SBDQ9 SBDQ10 SBDQ11 SBDQ12 SBDQ13 SBDQ14 SBDQ15 SBDQ16 SBDQ17 SBDQ18 SBDQ19 SBDQ20 SBDQ21 SBDQ22 SBDQ23 SBDQ24 SBDQ25 SBDQ26 SBDQ27 SBDQ28 SBDQ29 SBDQ30 SBDQ31 SBDQ32 SBDQ33 SBDQ34 SBDQ35 SBDQ36 SBDQ37 SBDQ38 SBDQ39 SBDQ40 SBDQ41 SBDQ42 SBDQ43 SBDQ44 SBDQ45 SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63 SBCKE0 SBCKE1 SBCKE2 SBCKE3 MCH_SRCOMP0 MCH_SRCOMP1 SMOCDCOMP1 SMOCDCOMP0 SADM6 SADM5 SADM4 SADM3 SADM2 SADM1 SADM0 SMVREF1 C334 C0.1U25Y R252 80.6R1%0402 R256 1KR1%0402 R250 80.6R1%0402 C323 C0.1U25Y R253 1KR1%0402 1 1 2 2 3 3 4 4 5 5 A A B B C C D D I = 1.5A MCH MEMORY DECOUPLING I = 60mA I = 55mA I = 55mA I = 45mA I = 45mA CAPS for specific core MCH 133 MHZ (533) BSEL 1 1 00 1 200 MHZ (800) 2 FSB FREQUENCY 00 267 MHZ (1067) 0 0 TABLE 0 0 State Description SDVO and PCI-e operating simultaneously HIGH Only SDVO or PCI-e operating EXP_SLR (R46 and Normal high) LOW State Description Only SDVO or PCI-e operating EXP_EN SDVO and PCI-e operating simultaneously LOW HIGH I = 70mA MSI should be connected MS-7204 0A Intel Lakeport PCI-Express MICRO-STAR INt'L CO., LTD. 833Wednesday, July 13, 2005 Title Size Document Number Rev Date: Sheet of V_1P5_PCIEXPRESS EXP_EN SEL1 SEL0 SDVO_CTRL_DATA SDVO_CTRL_CLK V_2P5_DAC_FILTERED VCCA_GPLL VCCA_MPLL HSYNC VSYNC EXTTS GPCOMP VCCA_DPLLB VCCA_DPLLA V_1P5_PCIEXPRESSVCCA_DPLLB VCCA_HPLLVCCA_HPLL VCCA_MPLL VCCA_HPLL VCCA_DPLLA V_1P5_PCIEXPRESS VCCA_GPLL V_1P5_PCIEXPRESS SEL2 EXPSLR EXP_EN EXP_EN EXP_A_RXP_125 EXP_A_RXP_225 EXP_A_RXP_325 EXP_A_RXP_425 EXP_A_RXP_525 EXP_A_RXP_625 EXP_A_RXP_725 EXP_A_RXP_825 EXP_A_RXP_925 EXP_A_RXP_1025 EXP_A_RXP_1125 EXP_A_RXP_1225 EXP_A_RXP_1325 EXP_A_RXP_1425 EXP_A_RXP_1525 EXP_A_RXN_025 EXP_A_RXN_125 EXP_A_RXN_225 EXP_A_RXN_325 EXP_A_RXN_425 EXP_A_RXN_525 EXP_A_RXN_625 EXP_A_RXN_725 EXP_A_RXN_825 EXP_A_RXN_925 EXP_A_RXN_1025 EXP_A_RXN_1125 EXP_A_RXN_1225 EXP_A_RXN_1325 EXP_A_RXN_1425 EXP_A_RXN_1525 SDVO_CTRL_DATA25 SDVO_CTRL_CLK25 H_FSBSEL03,4,13 H_FSBSEL13,4,13 H_FSBSEL23,4,13 EXP_A_TXP_0 25 EXP_A_TXP_1 25 EXP_A_TXP_2 25 EXP_A_TXP_3 25 EXP_A_TXP_4 25 EXP_A_TXP_5 25 EXP_A_TXP_6 25 EXP_A_TXP_7 25 EXP_A_TXP_8 25 EXP_A_TXP_9 25 EXP_A_TXP_10 25 EXP_A_TXP_11 25 EXP_A_TXP_12 25 EXP_A_TXP_13 25 EXP_A_TXP_14 25 EXP_A_TXP_15 25 EXP_A_TXN_0 25 EXP_A_TXN_1 25 EXP_A_TXN_2 25 EXP_A_TXN_3 25 EXP_A_TXN_4 25 EXP_A_TXN_5 25 EXP_A_TXN_6 25 EXP_A_TXN_7 25 EXP_A_TXN_8 25 EXP_A_TXN_9 25 EXP_A_TXN_10 25 EXP_A_TXN_11 25 EXP_A_TXN_12 25 EXP_A_TXN_13 25 EXP_A_TXN_14 25 EXP_A_TXN_15 25 CK_PE_100M_MCH13 CK_PE_100M_MCH#13 DMI_TXP0 10 DMI_TXP2 10 DMI_TXN0 10 DMI_TXP3 10 DMI_TXN3 10 DMI_TXN2 10 DMI_TXN1 10 DMI_TXP1 10 DMI_RXP110 DMI_RXN210 DMI_RXP310 DMI_RXP210 DMI_RXN110 DMI_RXP010 DMI_RXN010 DMI_RXN310 EXP_EN_HDR EXP_A_RXP_025 VCC_DDR VCC_DDR V_2P5_MCH V_2P5_MCH V_2P5_MCH V_1P5_CORE VCC_DDR V_1P5_CORE V_1P5_CORE V_1P5_CORE V_1P5_CORE V_1P5_CORE V_1P5_CORE V_1P5_CORE V_1P5_CORE V_2P5_MCH V_1P5_CORE V_2P5_MCH V_2P5_MCH V_FSB_VTT V_2P5_MCH C262 C1U10X + C252 .CD220U10EL7 12 R220 1KR1%0402-1 CP7 X_COPPER C406 C10U10Y0805 R216 X_220R0402 U14C (INTEL-QG82945G-A2-LF) H15 J15 N20 N18 D17 C17 F17 G17 K17 J17 H18 J18 J20 G2 J1 J3 K4 L4 M4 M2 N1 P2 T1 T4 AC12 AC11 A20 D14 C13 A13 B12 A11 B10 C10 C9 A9 B7 D7 A6 D6 B5 E2 F1 G12 F12 D11 D12 J13 H13 E10 F10 J9 H10 F7 F9 C4 D3 G6 J6 K9 K8 F4 G4 M6 M7 K2 L1 U11 U10 R8 R7 P4 N3 Y10 Y11 B14 B16 F15 E15 F21 H21 L20 AK17 AL17 K21 AK18 L21 L18 B23 E27 J23 K23 L23 M23 N23 P23 A24 B24 B25 B26 C23 D24 D25 E23 E24 E26 AA26 AB17 AB18 AB19 AB20 AB24 AB25 AB26 AB27 AC15 AE20 AV23 AW20 AY41 BB16 BB20 BB24 F23 AD23 AD25 AD26 AE17 AE18 AE22 AE24 AE26 AE27 AF15 AF17 AV18 AV21 AV31 AV42 AW13 AW15 AW21 AW24 AW29 AW34 AW35 BB28 BB33 BB38 BC26 BC31 BC35 BB42 BC13 BC18 BC22 C25 C26 D23 F27 G23 H23 AW31 AC17 AC18 AC20 AD17 AD19 AD21 AC24 AC26 AC27 AD15 AA24 Y7 Y8 AA9 AA10 AA6 AA7 AC9 AC8 U4 U2 V1 V3 W4 W2 Y1 AA2 AB1 Y4 AA4 AB3 AC4 H20 C21 B20 C19 B19 B17 D19 C18 B18 A18 AF21 AF23 AF25 AF26 AF27 AF29 AG15 AG17 AG18 AG19 AG20 AG21 AG22 AG23 AG24 AJ15 AJ17 AJ18 AJ20 AE4 AE3 AE2 AD12 AD10 AD8 AD6 AD5 AD4 AD2 AD1 AC13 AC6 AC5 AA13 AA5 Y13 V13 V9 V10 V7 V6 V5 U13 U8 U7 U6 R13 R11 R10 R5 N12 N11 N10 N9 N7 N5 AK23 N21 AY43 BC40 K18 F20 AF19 DREFCLKINN DREFCLKINP DDC_CLK DDC_DATA HSYNC VSYNC RED RED# GREEN GREENB BLUE BLUE# EXTTS# EXPATXP8 EXPATXN8 EXPATXP9 EXPATXN9 EXPATXP10 EXPATXN10 EXPATXP11 EXPATXN11 EXPATXP12 EXPATXN12 EXPATXP13 EXP_COMPO EXP_COMPI IREF EXPATXP0 EXPATXN0 EXPATXP1 EXPATXN1 EXPATXP2 EXPATXN2 EXPATXP3 EXPATXN3 EXPATXP4 EXPATXN4 EXPATXP5 EXPATXP6 EXPATXN5 EXPATXN6 EXPATXP7 EXPATXN7 EXPARXP0 EXPARXN0 EXPARXP1 EXPARXN1 EXPARXP2 EXPARXN2 EXPARXP3 EXPARXN3 EXPARXP4 EXPARXN4 EXPARXP5 EXPARXN5 EXPARXP6 EXPARXN6 EXPARXP7 EXPARXN7 EXPARXP8 EXPARXN8 EXPARXP9 EXPARXN9 EXPARXP10 EXPARXN10 EXPARXP11 EXPARXN11 EXPARXP12 EXPARXN12 EXPARXP13 EXPARXN13 EXPARXP14 EXPARXN14 EXPARXP15 EXPARXN15 GCLKP GCLKN SDVOCTRLDATA SDVOCTRLCLK BSEL0 BSEL1 BSEL2 RSV_TP[0] RSV_TP[1] EXP_SLR RSV_TP[3] RSV_TP[4] RSV_TP[5] VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VTT VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VTT VTT VTT VTT VTT VTT VCCSM VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC DMI RXP0 DMI RXN0 DMI RXP1 DMI RXN1 DMI RXP2 DMI RXN2 DMI RXP3 DMI RXN3 EXPATXN13 EXPATXP14 EXPATXN14 EXPATXP15 EXPATXN15 DMI TXP0 DMI TXN0 DMI TXP1 DMI TXN1 DMI TXP2 DMI TXN2 DMI TXP3 DMI TXN3 XORTEST VCCAHPLL VCCAMPLL VCCADPLLA VCCADPLLB VCCA_EXPPLL VCC2 VCCADAC VCCADAC VSSA_DAC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP VCC_EXP RSV_TP[2] RSV_TP[6] VCCSM VCCSM ALLZTEST EXP_EN VCC R206 1R1% C258 C0.1U16Y0402 R111 X_0R0402 C394 C0.1U16Y0402 CP6 X_COPPER R217 X_220R0402 C332 C10U10Y0805 L12 1U500m_0805 C326 C10U10Y0805 C375 C0.1U16Y0402 L13 600L200m_500-1 R222 10KR R211 0R1206 R247 24.9R1% C286 C0.1U16X0402 L14 600L200m_500-1 C285 _C1U6.3Y50402/80-20% R218 10KR0402 R226 10KR0402 C266 C10U10Y0805 C260 C0.1U16Y0402 R210 1R1% R230 10KR R221 1KR + C255 CD100U25EL11 12 + C253 .CD220U10EL7 12 R214 1.1KR1%0402 R215 10KR0402 C407 C10U10Y0805 L10 10U125m_0805-1 C294 C0.1U16X0402 + C254 CD220U10EL7 R229 1KR R223 10KR0402 TP21 R219 X_1.1KR1%0402 C0.01U16X0402 C264 C393 C10U10Y0805 L9 180L1500m_90 C295 C0.1U16X0402 C379 C10U10Y0805 C263 C10U10Y0805 C261 C10U10Y0805 L11 10U125m_0805-1 1 1 2 2 3 3 4 4 5 5 A A B B C C D D MSI MS-7204 0A Intel Lakeport - GND MICRO-STAR INt'L CO., LTD. 933Wednesday, July 13, 2005 Title Size Document Number Rev Date: Sheet of U14D (INTEL-QG82945G-A2-LF) A16 A22 A26 A31 A35 B6 B9 B11 B13 B21 B22 B28 B33 B38 C3 C5 C7 C12 C14 C22 C40 D2 D10 D16 D20 D21 E3 E4 E7 E9 E12 E13 E17 E18 E20 E21 E32 F2 F6 F13 F18 F26 F34 F42 G3 G5 G7 G9 G10 G13 G15 G18 G20 G24 G27 G29 G31 G32 G35 G38 H12 H17 H26 H27 H32 J2 J5 J7 J10 J12 J21 J24 K20 K15 K13 K12 K10 K7 K6 K5 K3 J43 J38 J29 L31 L29 L26 L24 L13 L12 L2 K39 K37 K34 K32 K27 M37 M35 M21 M20 M13 M10 M9 M8 M5 M3 L42 N36 N33 N31 N29 N27 N26 N24 N15 N13 N8 N6 N2 R9 R6 P30 P29 P27 P26 P24 P15 P14 P3 N43 N39 D5 R12 R14 R30 R31 R34 R37 R39 T2 T42 U3 U5 U9 U12 U14 U31 U33 U36 U38 V2 V8 V11 V12 V14 V34 V36 V37 V38 V39 V43 W3 Y2 Y5 Y6 Y9 Y12 Y14 Y31 Y35 Y37 Y39 Y42 AA3 AA8 AA11 AA12 AA14 AA21 AA23 AA31 AA33 AA36 AB2 AB43 AC2 AC3 AC7 AC10 AC14 AC21 AC23 AC31 AC36 AC37 AC38 AC39 AD7 AD9 AD11 AD13 AD33 AD35 AD37 AD42 AF1 AF2 AF3 AF5 AF33 AF36 AF38 AF43 AG30 AG31 AG33 AG36 AG37 AG38 AG39 AH42 AJ7 AJ10 AJ30 AJ31 AJ33 AJ35 AJ37 AK24 AK26 AK29 AK30 AL1 AL2 AL3 AL7 AL10 AL12 AL13 AL15 AL18 AL21 AL23 AL24 AL27 AL32 AL33 AE19 AD29 AD27 AD24 AD22 AD20 AD18 AC29 AC25 AC19 AA29 AA27 AA25 Y29 Y26 Y24 Y22 Y20 W25 W23 W21 V29 V26 V24 U29 R29 R26 D43 D1 A40 A4 BC9 BB41 BB39 BB34 BB19 BB14 BB11 BB6 BB3 BA42 BA4 AW10 AV37 AV17 AV10 AV2 AU34 AU32 AU29 AU26 AU24 AU21 AU20 AU17 AU15 AU13 AU12 AU9 AU6 AT31 AT27 AT26 AT23 AT21 AT18 AT17 AT12 AR43 AR39 AR37 AR32 AR24 AR20 AR15 AR6 AR1 AP38 AP34 AP29 AP12 AP10 AP7 AN42 AN31 AN27 AN26 AN24 AN23 AN21 AN20 AN18 AN17 AN15 AN13 AN4 AN2 AM39 AM37 AM36 AM33 AM9 AM7 AM5 B4 G21 AL43 AL37 AP5 AF20 AF22 AF24 AY1 BC4 AF18 AE21 AE23 AE25 L17 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 1 1 2 2 3 3 4 4 5 5 A A B B C C D D MSI If SPI not be used, should be NC 1 0 Flash cycles routed to PCI 1 1 Flash cycles routed to LPC 0 1 Flash cycles routed to SPI GNT5 GNT4 Closer ICH7 5/7/20 MS-7204 0A Intel ICH7 - PCI & DMI & CPU & IRQ MICRO-STAR INt'L CO., LTD. 10 33Wednesday, July 13, 2005 Title Size Document Number Rev Date: Sheet of PCIRSTICH# R_PLTRST# KBRST# PGNT#5 PGNT#4 PGNT#5 HSO_CN1 SERIRQ SERIRQ PGNT#4 KBRST# HSO_CP1 A20GATE A20GATE AD016,17,28 AD116,17,28 AD216,17,28 AD316,17,28 AD416,17,28 AD516,17,28 AD616,17,28 AD716,17,28 AD816,17,28 AD916,17,28 AD1016,17,28 AD1116,17,28 AD1216,17,28 AD1316,17,28 AD1416,17,28 AD1516,17,28 AD1616,17,28 AD1716,17,28 AD1816,17,28 AD1916,17,28 AD2016,17,28 AD2116,17,28 AD2416,17,28 AD2516,17,28 AD2616,17,28 AD2716,17,28 AD2816,17,28 AD2916,17,28 AD3016,17,28 AD3116,17,28 AD2216,17,28 AD2316,17,28 C_BE#016,17,28 C_BE#116,17,28 C_BE#216,17,28 C_BE#316,17,28 DEVSEL#16,17,28 FRAME#16,17,28 IRDY#16,17,28 TRDY#16,17,28 STOP#16,17,28 PAR16,17,28 LOCK#28 SERR#16,28 PERR#16,17,28 PCI_PME#16,17,28 ICH_PCLK13 PREQ#028 PREQ#128 PREQ#216,28 PREQ#328 PREQ#417,28 PREQ#528 PGNT#028 PGNT#128 PGNT#216 PGNT#328 PGNT#417 PGNT#528 PIRQ#A28 PIRQ#B28 PIRQ#C16,28 PIRQ#D17,28 PIRQ#E28 PIRQ#F28 PIRQ#G28 PIRQ#H28 SERIRQ14 IDE_IRQ24 CK_PE_100M_ICH# 13 CK_PE_100M_ICH 13 DMI_RXN0 8 DMI_RXP0 8 DMI_TXN0 8 DMI_TXP0 8 HSI_N1 25 HSI_P1 25 HSO_N1 25 HSO_P1 25 PLTRST# 6 H_A20M# 3 H_FERR# 3,4 H_IGNNE# 3 H_INIT# 3 FWH_INIT# 15 H_INTR 3 H_NMI 3 ICH_H_SMI# 3 H_STPCLK# 3 KBRST# 14 A20GATE 14 TRMTRIP# 3,4 H_PWRGD 3,4 PCIRST_ICH#25,26 DMI_TXP1 8 DMI_TXN1 8 DMI_RXN1 8 DMI_RXP1 8 DMI_TXP2 8 DMI_TXN2 8 DMI_RXN2 8 DMI_RXP2 8 DMI_TXP3 8 DMI_TXN3 8 DMI_RXN3 8 DMI_RXP3 8 VCC3 VCC3 V_DMI C271 C0.1U16X0402 R193 33R0402-2 C246 C10P25N0402 R1911KR0402-1 PCI INTERFACE INTERRUPT CPULAN PCI EXPRESSDIRECT MEDIA ICH 7 PART 1/3 SPI U10A (INTEL-NH82801GR-A1-LF) E18 C18 A16 F18 E16 A18 E17 A17 A15 C14 E14 D14 B12 C13 G15 G13 E12 C11 D11 A11 A10 F11 F10 E9 D9 B9 A8 A6 C7 B6 E6 D6 B15 C12 D12 C15 A12 F16 A7 F14 F15 E10 E11 B10 C9 B19 A9 B18 W1 W3 Y2 Y1 V3 U3 U5 V4 T5 U7 V6 V7 E7 D16 D17 F13 A14 D8 D7 C16 C17 E13 A13 C8 AH21 A3 B4 C5 B5 E27 E28 F25 F26 V26 V25 U28 AH28 AG27 AG26 AG22 AF22 AF25 AH24 AF23 AH22 AG23 AE22 U27 AG21 AF26 G8 F7 F8 G7 AH16 AG24 H26 H25 G28 G27 K26 K25 J28 J27 M26 M25 L28 L27 Y26 Y25 W28 W27 AB26 AB25 AA28 AA27 AD25 AD24 AC28 AC27 C25 D25 AE28 AE27 A4 A23 B1 B8 B11 B14 B17 B20 B26 B28 C2 C6 D10 D13 D18 D21 D24 E1 E2 E8 E15 F3 F4 F5 F12 F27 F28 G1 G2 G5 G6 G9 G14 G18 G21 G24 G25 G26 H3 H4 H5 C26 P5 P2 P6 R2 P1 P26 P25 N28 N27 T25 T24 R28 R27 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE0# C/BE1# C/BE2# C/BE3# DEVSEL# FRAME# IRDY# TRDY# STOP# PAR PLOCK# SERR# PERR# PME# PCICLK PCIRST# EE_CS EE_DIN EE_DOUT EE_SHCLK LAN_CLK LAN_RSTSYNC LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2 GNT0# GNT1# GNT2# GNT3# GPIO48/GNT4# GPIO17/GNT5# REQ0# REQ1# REQ2# REQ3# GPIO22/REQ4# GPIO1/REQ5# SERIRQ PIRQA# PIRQB# PIRQC# PIRQD# PETP_1 PETN_1 PERP_1 PERN_1 DMI_0RXN DMI_0RXP DMI_0TXN A20M# CPUSLP# FERR# IGNNE# INIT# INTR NMI SMI# STPCLK# RCIN# A20GATE DMI_0TXP INIT3_3V# THRMTRIP# GPIO2/PIRQE# GPIO3/PIRQF# GPIO4/PIRQG# GPIO5/PIRQH# IDEIRQ GPO49/CPUPWRGD PERN_2 PERP_2 PETN_2 PETP_2 PERN_3 PERP_3 PETN_3 PETP_3 PERN_4 PERP_4 PETN_4 PETP_4 DMI_1RXN DMI_1RXP DMI_1TXN DMI_1TXP DMI_2RXN DMI_2RXP DMI_2TXN DMI_2TXP DMI_3RXN DMI_3RXP DMI_3TXN DMI_3TXP DMI_ZCOMP DMI_IRCOMP DMI_CLKN DMI_CLKP VSS_0 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 PLTRST# SPI_MOSI SPI_MISO SPI_CS# SPI_CLK SPI_ARB PERN_5 PERP_5 PETN_5 PETP_5 PERN_6 PERP_6 PETN_6 PETP_6 R1901KR0402-1 R262 10KR0402 R209 24.9R1% R259 10KR0402 R268 10KR0402 C267 C0.1U16X0402 R205 33R0402-2 [...]... SM_LINK0 SM_LINK1 SMB_ALERT# LINK_ALERT# 14,15 14,15 14,15 14,15 14 14 Y1 single source Y3 32.768KHZ12.5P_D-1 RTCX2 R246 10MR1%0402 D C310 C18P50N0402 MSI MICRO-STAR INt'L CO., LTD Title Intel ICH7 - LPC & ATA & USB & GPIO Size Document Number Rev MS-7204 Date: 1 2 3 4 Wednesday, July 13, 2005 0A Sheet 5 11 of 33 1 2 3 4 5 Vcc1_5_B = 0.74A Vcc1_5_A = 0.97A 1.05V POWER AD4 AD7 AD8 AD11 AD15 AD19 AD23... AC17 AC6 AC7 AC8 AD10 AD6 AE10 AE6 AF10 AF5 AF6 AF9 AG5 AG9 AH5 AH9 F17 G17 H6 H7 J6 J7 T7 S5 POWER C342 F6 C337 C0.1U16Y0402 D 5VREF C358 MSI C0.1U16Y0402 MICRO-STAR INt'L CO., LTD Title Intel ICH7 - POWER Size Document Number Date: Wednesday, July 13, 2005 Rev 0A MS-7204 1 2 3 4 Sheet 5 12 of 33 1 2 3 Clock Generator - ICS954119DF S2 2 X_COPPER 1 FB2 X_80L3_100_0805 C180 C0.1U25Y CPUCLKT0 CPUCLKC0 43... 8P4R-0R0402 X_220R R178 VIDGD 220R Q25 N-MMBT3904_NL_SOT23 B E 2 R176 X_330R D D MICRO-START INT'L CO.,LTD Title ICS954119DF Clock Gen Size A3 Date: 1 2 3 4 Document Number Wednesday, July 13, 2005 Rev MS-7204 0A Sheet 5 13 of 33 1 2 3 LPC SUPER I/O W83627EHF 4 5 SERIAL PORT 1 VCC3 U8 VTIN_GND R156 VCC5 +12V 22.1KR1% R159 56KR1% R157 R158 VCCP 105 106 107 108 109 110 10KR1% 10KR1% VTIN_GND VTIN_GND 15... C200 28 12 48 VCC3 GA20M KBRST GP26/KDAT GP27/KCLK GP24/MDAT GP25/MCLK SI/BEEP 3VSB VBAT VBAT_SIO C GP34/RSTOUT4# GP36 GP35 GP55/SUSLED GP61/DCDA# CPUFANIN0 GP66/DSRA# CPUFANOUT0 GP63/SINA CPUFANIN1/GP21 /MSI GP65/HEFRAS/RTSA# CPUFANOUT1/GP20/MSO GP62/PENKBC/SOUTA SYSFANIN GP67/CTSA# SYSFANOUT GP64/PENROM/DTRA# AUXFANIN0 GP60/RIA# AUXFANIN1/SO GP41/DCDB# AUXFANOUT GP46/DSRB# CASEOPEN# GP43/IRRX/SINB RSTOUT3#/GP33/SDA... C2200P50N D AUDIO-CDIN1X4 R235 VTIN_GND VTIN_GND 2 CP3 10KR0402 1 X_COPPER 2 CP4 NOTE: LOCATE CLOSE STATUS PANEL 1 X_COPPER MICRO-START INT'L CO.,LTD Title LPC I/O - W83627EHF Size Document Number Custom MS-7204 Date: 2 1KR 8 6 4 2 CONN-FDD(3)(5)V C0.1U25Y C0.1U25Y C0.1U25Y C0.1U16Y0402 R154 INDEX# MOA# JIR1 C169 VCC5_SB DRVDEN0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 F2 WAKE ON RING CP5 R155 R144... C63 C0.1U50X D D MICRO-START INT'L CO.,LTD Title 1394_VT6308P HOST CONTROLER IDSEL REQ/GNT INTERRUPT -AD19 # 4 PIRQ#D 2 3 4 Document Number Date: 1 Size A3 Wednesday, July 13, 2005 Rev MS-7204 2.00 Sheet 5 17 of 33 1 2 3 4 5 ALC882 CODEC JAUD1is failure footprint, should be used COM_PORT AVDD5 FRONT AUDIO R390 8.2KR R353 10R0402 R358 10R0402 C47P50N0402 C441 1 2 3 4 5 6 7 8 9 10 11 12... CD10U16EL5 AVDD5_ADJ R338 300R1% S4 X_COPPER 2 1 D S5 1 X_COPPER 2 S3 X_COPPER 2 1 D MICRO-START INT'L CO.,LTD Title Azalia CODEC(CMI9880L) Size A3 Date: 1 2 3 4 Document Number Wednesday, July 13, 2005 Rev MS-7204 0A Sheet 5 18 of 33 1 2 3 4 5 Audio Connector FRONT_OUT_R EC57 CD100U16EL11 1+ 2 FRNT_OUT_R FRONT_OUT_L 1+ A 18 FRONT_OUT_R 18 FRONT_OUT_L AUDIO1A (Upper) D4 D3 D2 D1 G2 2 FRNT_OUT_L 18 18 C480 C1U16Y0805... from 0.1uF to 0.01uF by RTL suggested R261 change from 47K to 75ohm by RTL suggested MICRO-START INT'L CO.,LTD Title Azalia ALC882-2 Size A3 Date: 1 2 3 4 Document Number Wednesday, July 13, 2005 Rev MS-7204 0A Sheet 5 19 of 33 1 2 3 POWER CIRCUIT FOR USB PORT 0,1,2,3 4 5 POWER CIRCUIT FOR USB PORT 4,5,6,7 white SVCC2 SVCC3 SVCC1 USB_STR1 FS3 F1 USB_STR F-MINISMDM260 11 R117 27KR R129 1KR OC#1 C237 C0.1U25Y... USBGND X_COPPER 1 CP12 2 D X_COPPER 1 CP13 2 SVCC1 X_COPPER 1 D D10 X_IPC220CZ6 /SO6 MICRO-START INT'L CO.,LTD Title USB CONNECTORS Size A3 Date: 1 2 3 4 Document Number Wednesday, July 13, 2005 Rev MS-7204 0A Sheet 5 20 of 33 C 2 5 8 11 14 17 20 23 26 29 32 35 38 41 44 47 50 65 66 79 82 85 88 91 94 97 MAA_A0 MAA_A1 MAA_A2 MAA_A3 MAA_A4 MAA_A5 MAA_A6 MAA_A7 MAA_A8 MAA_A9 MAA_A10 MAA_A11 MAA_A12 MAA_A13... RC1 NC NC/TEST NC DIMM1 3 VCC3 VDDSPD 2 VCC_DDR VDDSPD 1 D DIMM-240_ORG MICRO-START INT'L CO.,LTD Title DDRII DIMM 1 & 2 CHANNEL A Size A3 Date: 1 2 3 4 Document Number Wednesday, July 13, 2005 Rev MS-7204 0A Sheet 5 21 of 33 C 2 5 8 11 14 17 20 23 26 29 32 35 38 41 44 47 50 65 66 79 82 85 88 91 94 97 188 183 63 182 61 60 180 58 179 177 70 57 176 196 174 173 MAA_B0 MAA_B1 MAA_B2 MAA_B3 MAA_B4 MAA_B5 . 62R0402 RN20 8P4R-470R0402 1 3 5 7 2 4 6 8 C384 X__C1U6.3Y50402/80-20% C220 C0.1U16Y0402 C363 C220P25N0402 1 1 2 2 3 3 4 4 5 5 A A B B C C D D MSI 2005 Mainstream/Value FMB platform 2005 Performance FMB platform MSID0 0 NC MSID1 0 0 MS-7204 0A Intel LGA775 CPU - GND MICRO-STAR INt'L. FSB GENERIC MSI GTLREF VOLTAGE SHOULD BE 0.63*VTT = 0.756V FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS AND CEDAR MILL ARE SUPPORTED PLACE AT ICH END OF ROUTE PLACE AT CPU END OF ROUTE MS-7204 0A Intel. implemented on the system board. MSI PLACE BPM TERMINATION NEAR CPU 2 TABLE 0 FSB FREQUENCY0 1 0 133 MHZ (533) 267 MHZ (1067) 0 0 1 BSEL 0 0 1 0 200 MHZ (800) MS-7204 0A Intel LGA775 CPU - Signals MICRO-STAR