8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. MS-7131 100 Cover Sheet Custom 130Wednesday, November 24, 2004 MS(7131) Intel LGA775 Processor System Chipset: Expansion Slots: Intel (R) Grantsdale (GMCH) + ICH6 Chipset CPU: On Board Chipset: PCI SLOT * 2 BIOS FWH EEPROM Intel LGA775 Intel ICH6 (South Bridge) Controller: RT8800+RT9602 PWM: CLOCK ICS 954119 Main Memory: DDR * 2 (Max 2GB) AC'97 Codec ALC655 LPC Super I/O W83627THF LAN RTL8100C Version 100 Intel Grantsdale - GMCH (North Bridge) CNR SLOT * 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 Cover Sheet 1 Block Diagram POWER MAP GPIO/MEMORY/PCI/HW STRAPPING Intel LGA775_Signals Intel LGA775_Power Intel LGA775_GND Intel Grantsdale_CPU Intel Grantsdale_Memory Intel Grantsdale_PCI EXPRESS Intel Grantsdale_GND DDR DIMM 1 & 2 DDR Termination Resistors ICH6_PCI, DMI, CPU, IRQ ICH6_LPC, ATA, USB, GPIO ICH6_POWER ICS954119 & FWH & FDD LPC I/O_W83627THF AC97 Audio_ALC6555 AGP Slot & FAN PCI Slot 1 & 2 IDE, SATA & CNR USB CONNECTORS ACPI CONTROLLER_MS7 ATX & Front Panel & VGA VRM10.1_RT8800B LAN_RTL8100C Jumper Setting / Manual Part History AGP 1X 3.3V SLOT * 1 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. MS-7131 100 Block Diagram Custom 230Wednesday, November 24, 2004 Block Diagram USB Port 4 USB Port 3 USB Port 2 USB Port 1 Intel LGA775 Processor 2 DDR Modules AC'97 Codec LPC SIO Keyboard Mouse Floopy Parallel PCI Slot 1 Winbond RT9602 2-Phase PWM USB Port 5 83627THF CNR Slot UltraDMA 33/66/100 USB AC'97 Link DMI IDE 64bit DDR Channel 1 Channel 2 PCI CNTRL PCI ADDR/DATA LPC Bus DIMM USB Port 6 USB Port 7 RTL8100C 64bit DDR SATA 915 GV Grantsdale ICH6 USB Port 0 Flash Connector AGP 3.3V FSB PCI Slot 2 Serial TDP = 84 W VR_TDC = 68 A Icc(max) = 78 A Prescott Tcase = [P x 0.28] + 44.2 Socket loadline = 1.4 mOhm VR tolerance = +/- 25 mV 2004 Mainstream/Value FMB (Mainstream 2 through bottom of Value segment) 910 GL 915GV: 133MHz and 200MHz 910GL: 133MHz 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. MS-7131 100 POWER MAP Custom 330Wednesday, November 24, 2004 - 560mA - TBD A Gransdale GMCH 1.2V VCC_CPU - 1.88A 1.5V SATA 1.5V Core - 430mA ICH6 *1.5V PCI Express DDR DIMM & TERMINATOR 1.3V VTT_DDR - 1.0A -4.0A2.6V VCC_DDR (S3) -160mA (S0,S1) 2.6V VCC_DDR 1.2V FSB Vtt - 78A - 3.5A Prescott 0.8375V - 1.6000V Core 2-Phase Switch 0.8375V-1.6000V VCCP 78A RT8800B VRM 10.1 2.6V DDR I/O -4.0A -250mA(S3)2.6V DDR I/O (S0,S1) - 1.0A1.2V FSB Vtt FWH +3.3V (S0,S1) - 107mA +3.3Vaux +5V +3.3V +12V PCI slot x3 - 20mA +3.3Vaux - 0.5A - 7.6A - 375mA - 5.0A (no wake) (wake) 3.3V Linear VCC3_SB 1.5A V_FSB_VTT MS7 Regulator Linear1.2V 5.0A 1.0A1.3V VTT_DDR W83310DS Linear 8.0A2.6V Linear (S0,S1) (S3) VCC_DDR 570mA 2.5V Linear V_2P5_MCH 100mA (Integrated) 1.5V Core - 9.7A1.5V Core - 1.4A*1.5V PCI Express (Discrete) - 7.7A *2.5V DAC - TBD A - 0.07A 2.5V HV - 330mA+3.3V VccSus (G3) - 5uARTC - 180mA 5VrefSus +3.3V - TBD A - TBD A5VRef ATX POWER +3.3V+5V+12V +5VSB Battery 3V Switch 14A MS6+ Regulator V_1P5_CORE 1.5V 5VDUAL1,2 5V Linear USB +5V - 4A(S0,S1) +5V (S3) - 20mA PS2 - 345mA+5V (S0,S1) +5V (S3) - 2.0mA 22mA (include 1X AGP slot) 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. MS-7131 100 GPIO/MEMORY/PCI/HW STRAPPING Custom 430Wednesday, November 24, 2004 O I I I/O I/O I I O OD 5V 5V 5V 5V 5V 5V 3.3V 3.3V 3.3V_SB 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 5V 3.3V_SB 3.3V_SB 3.3V_SB 3.3V_SB 3.3V_SB 3.3V_SB 3.3V_SB 3.3V_SB 3.3V_SB 3.3V_SB GPIO 7 GPIO 8 GPIO 9 GPIO 10 GPIO 11 GPIO 12 GPIO 13 GPIO 14 GPIO 16 I I I I I I I Function GPIO 15 I O I GPIO 20 GPIO 26 GPIO 21 GPIO 19 OGPIO 18 GPIO 23 GPIO 24 GPIO 25 O O GPIO 17 O O I/O I/O I/O GPIO 28 GPIO 31 GPIO 27 I/O GPIO 33 GPIO 29 GPIO 30 I GPIO 32 REQ#6 pull-up to VCC5 with 2.7K Power Pin E8 D9 C7 C6 AD19 AE19 M3 R1 D23 W6 C23 M2 C25 C24 R6 D8 AC21 AB21 F6 AD22 AD21 V3 AD20 P5 R3 T3 AF17 AE18 AG18 AF19 AF18 AF20 AC18 B7 ICH6 F7 P4 E7 AG25 GPIO 34 GPIO 40 GPIO 41 GPIO 48 GPIO 49 FWH Function GPI 0 PD_DETI TypeGPIO Pin REQ#5 pull-up to VCC5 with 2.7K,and connect to RTL8100C I GPIO Pin I Type GPIO 6 I I GPIO 1 GPIO 4 GPIO 0 GPIO 3 GPIO 5 GPIO 2 I I I PIRQ#E pull-up to VCC5 with 2.7K PIRQ#F pull-up to VCC5 with 2.7K PIRQ#G pull-up to VCC5 with 2.7K PIRQ#H pull-up to VCC5 with 2.7K GPI6 pull-up to VCC3 with 10K GPI7 pull-up to VCC3 with 10K GPI8 pull-up to VCC3_SB with 10K OC#3_4 connect to USB connector OC#3_4 connect to USB connector OC#3_4 connect to USB connector OC#3_4 connect to USB connector SMB_ALERT# pull-up to VCC3_SB with 10K PS_DETECT pull-up to VCC3 with 10K SIO_PME# connect to LPC I/O NC PGNT#5 connect to RTL8100C NC BIOS_WP# connect to FWH NC NC NC NC pull-up to VCC3 with 10K directly pull-up to VCC3 with 10K directly pull-up to VCC3 with 10K directly pull-up to VCC3 with 10K directly pull-down to GND with 1K directly (enable internal 2.5V VRM) NC NC NC NC NC NC PREQ#4 pull-up to VCC5 with 2.7K NC H_PWRGD pull-up to VTT_OUT_LEFT with 100 ohm,and connect to CPU VCPU I/O I PLTRST# Grandstale,MS7 Signals Target IDE LAN, Super I/O PCI slot 1,2,AGP SlotPCIRST#2 PCI RESET DEVICE HD_RST# PCIRST#1 PCIRST_ICH5# FWH PCI Configuration AGP Slot INTB# PCI_REQ#0 DEVICE PCI_GNT#0 INTA# INTB# PCICLK1 AD17 PCI_REQ#1 AGP_CLK PCICLK2 INTD# AD16 PCI_GNT#2 INTC# PCI_GNT#1 PCI Slot 1 PCI_REQ#5 LAN INTB# INTA# PCI_REQ#2PCI Slot 2 INTH# INTA# AD27 PCI_GNT#5 INT Pin REQ#/GNT# AD19 AD18 LAN_CLK IDSEL INTC# INTD# CLOCK (1-2)CLEAR (2-3)NORMAL RTCRST JUMPER SETTING A4H MCLK_B2/MCLK_B#2 MCLK_A2/MCLK_A#2 MCLK_A0/MCLK_A#0 MCLK_A1/MCLK_A#1A0H ADDRESS DDR DIMM Config. CLOCK DIMM 2 MCLK_B1/MCLK_B#1 DIMM 1 MCLK_B0/MCLK_B#0 DEVICE 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 D D C C B B A A HD#58 HD#59 H_COMP4 H_COMP5 HD#60 HA#3 HD#61 H_BPM#1 H_BPM#5 H_BPM#3 H_BPM#2 H_BPM#4 H_BPM#0 HD#62 HD#1 HD#63 HD#2 HD#3 HD#4 HA#4 HA#5 HA#6 HD#5 HA#7 HA#8 HD#6 H_TRST# HA#9 HA#10 HD#7 HA#11 HA#12 HD#8 HA#13 HA#14 HD#9 HA#15 HA#16 HD#10 HA#17 HA#18 HD#11 HA#19 HA#20 HA#21 HD#12 HA#22 HA#23 H_TDO H_TDI H_BPM#1 H_BPM#0 HD#13 HA#24 H_BPM#3 H_BPM#5 H_BPM#2 H_BPM#4 HA#25 HD#14 HA#26 HA#27 HD#15 HA#28 HA#29 HA#30 HD#16 VID0 HA#31 HD#17 H_TMS H_COMP0 HD#18 HREQ#1 H_EDRDY HREQ#2 HREQ#3 HREQ#4 HRS#1 HRS#2 HD#19 HDBI#1 HDBI#2 HDBI#3 H_PCREQ# RSVD_G6 RSVD_AK6 H_COMP3 H_COMP2 HD#20 CPU_BOOT HD#21 VTT_OUT_RIGHT HD#22 HD#23 HD#24 HD#25 HD#26 VID1 VID4 VID2 VID3 HD#27 HD#28 H_TESTHI11 HD#29 GTLREF_SEL HD#30 H_TESTHI10 HD#31 HD#32 HRS#0 HD#33 HDBI#0 H_COMP1 HD#34 H_TCK H_TESTHI8 H_TESTHI9 HD#35 HD#36 HD#37 HD#38 HD#39 VID5 VID2 VID4 VID0 VID1 VID3 HD#40 HD#41 HD#42 VTT_OUT_RIGHT HD#43 HD#44 VTT_OUT_RIGHT HD#45 HD#46 HD#0 HD#47 H_TESTHI2_7 HD#48 H_TESTHI12 HD#49 HD#50 H_TDI H_TDO H_TMS H_TRST# H_TCK HD#51 HD#52 HD#53 CPU_GTLREF HD#54 CPU_CLK# VTT_OUT_LEFT HD#55 CPU_CLK VID5 HD#56 HREQ#0 H_TESTHI0 H_TESTHI1 HD#57 V_FSB_VTT CPU_CLK# 17 CPU_CLK 17 INTR 14 NMI 14 HRS#[0 2] 8 H_PCREQ# 8 CPU_GTLREF 6 HREQ#[0 4] 8 VTT_OUT_RIGHT 6 H_BR#0 6,8 VTT_OUT_LEFT 6 HADSTB#1 8 HADSTB#0 8 HDSTBP#3 8 HDSTBP#2 8 HDSTBP#1 8 HDSTBP#0 8 HDSTBN#3 8 HDSTBN#2 8 HDSTBN#1 8 HDSTBN#0 8 VID326 VID126 VID426 VID226 VID026 VID526 H_FSBSEL06,10,17 H_FSBSEL16,10,17 H_FSBSEL26,10,17 CPU_TMPA18 TRMTRIP#14 H_PROCHOT#6 HD#[0 63]8 H_EDRDY8 H_IERR#6 FERR#14 HDBSY#8 HDRDY#8 HADS#8 HLOCK#8 HBNR#8 HIT#8 HITM#8 STPCLK#14 HINIT#14 HBPRI#8 HDEFER#8 IGNNE#14 SMI#14 A20M#14 SLP#14 H_PWRGD6,14 H_CPURST#6,8 HDBI#[0 3]8 HA#[3 31]8 HTRDY#8 Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. MS-7131 100 Intel LGA775_Signals Custom 530Wednesday, November 24, 2004 CPU SIGNAL BLOCK remove PLACE BPM TERMINATION NEAR CPU PLACE RESISTORS OUTSIDE SOCKET CAVITY IF NO ROOM FOR VARIABLE RESISTOR DON'T PLACE Chipset does not support extended addressing over 4GB,leave A[35:32]# unconnected. TP7 R67 62R TP10 C51 C0.1U25Y R68 60.4R1% R64 X_1KR TP8 C54 C0.1U25Y R80 100R1% R73 X_62R TP6 R27 X_62R R129 60.4R1% U8A ZIF-SOCK775-15u A35# AJ6 A34# AJ5 A33# AH5 A32# AH4 A31# AG5 A30# AG4 A29# AG6 A28# AF4 A27# AF5 A26# AB4 A25# AC5 A24# AB5 A23# AA5 A22# AD6 A21# AA4 A20# Y4 A19# Y6 A18# W6 A17# AB6 A16# W5 A15# V4 A14# V5 A13# U4 A12# U5 A11# T4 A10# U6 A9# T5 A8# R4 A7# M4 A6# L4 A5# M5 A4# P6 A3# L5 DBR# AC2 RSVD AN3 RSVD AN4 VCC_SENSE AN5 VSS_SENSE AN6 ITP_CLK1 AJ3 ITP_CLK0 AK3 VID6# AM5 VID5# AL4 VID4# AK4 VID3# AL6 VID2# AM3 VID1# AL5 VID0# AM2 D53# B15 D52# C14 D51# C15 D50# A14 D49# D17 D48# D20 D47# G22 D46# D22 D45# E22 D44# G21 D43# F21 D42# E21 D41# F20 D40# E19 D39# E18 D38# F18 D37# F17 D36# G17 D35# G18 D34# E16 D33# E15 D32# G16 D31# G15 D30# F15 D29# G14 D28# F14 D27# G13 D26# E13 D25# D13 D24# F12 D23# F11 D22# D10 D21# E10 D20# D7 D19# E9 D18# F9 D17# F8 D16# G9 D15# D11 D14# C12 D13# B12 D12# D8 D11# C11 D10# B10 D9# A11 D8# A10 D7# A7 D6# B7 D5# B6 D4# A5 D3# C6 D2# A4 D1# C5 D0# B4 GTLREF0 H1 BPM5# AG3 BPM4# AF2 BPM3# AG2 BPM2# AD2 BPM1# AJ1 BPM0# AJ2 PCREQ# G5 REQ4# J6 REQ3# K6 REQ2# M6 REQ1# J5 REQ0# K4 TESTHI12 W2 TESTHI11 P1 TESTHI10 H5 TESTHI9 G4 TESTHI8 G3 TESTHI7 F24 TESTHI6 G24 TESTHI5 G26 TESTHI4 G27 TESTHI3 G25 TESTHI2 F25 TESTHI1 W3 TESTHI0 F26 RSVD AK6 RSVD G6 BCLK1# G28 BCLK0# F28 RS2# A3 RS1# F5 RS0# B3 AP1# U3 AP0# U2 BR0# F3 COMP3 R1 COMP2 G2 COMP1 T1 COMP0 A13 DP3# J17 DP2# H16 DP1# H15 DP0# J16 ADSTB1# AD5 ADSTB0# R6 DSTBP3# C17 DSTBP2# G19 DSTBP1# E12 DSTBP0# B9 DSTBN3# A16 DSTBN2# G20 DSTBN1# G12 DSTBN0# C8 LINT1/NMI L1 LINT0/INTR K1 DBI0# A8 DBI1# G11 DBI2# D19 DBI3# C20 EDRDY# F2 IERR# AB2 MCERR# AB3 FERR#/PBE# R3 STPCLK# M3 BINIT# AD3 INIT# P3 RSP# H4 DBSY# B2 DRDY# C1 TRDY# E3 ADS# D2 LOCK# C3 BNR# C2 HIT# D4 HITM# E4 BPRI# G8 DEFER# G7 TDI AD1 TDO AF1 TMS AC1 TRST# AG1 TCK AE1 THERMDA AL1 THERMDC AK1 THERMTRIP# M2 GND/SKTOCC# AE8 PROCHOT# AL2 IGNNE# N2 SMI# P2 A20M# K3 SLP# L2 RSVD AH2 RESERVED0 N5 RESERVED1 AE6 RESERVED2 C9 RESERVED3 G10 RESERVED4 D16 RESERVED5 A20 BOOTSELECT Y1 LL_ID0 V2 LL_ID1 AA2 BSEL0 G29 BSEL1 H30 BSEL2 G30 PWRGOOD N1 RESET# G23 D63# B22 D62# A22 D61# A19 D60# B19 D59# B21 D58# C21 D57# B18 D56# A17 D55# B16 D54# C18 VID7# AM7 GTLREF1 H2 VID_SELECT AN7 GTLREF_SEL H29 COMP4 J2 COMP5 T2 TP9 TP3 TP11 R70 100R1% C59 X_C0.1U25Y RN2 X_8P4R-680R 1 3 5 7 2 4 6 8 TP2 RN9 8P4R-62R 1 2 3 4 5 6 7 8 R74 X_60.4R1% R42 X_680R C48 X_C0.1U25Y TP1 R56 X_49.9R1% R69 X_60.4R1% R123 62R R125 62R TP5 RN4 8P4R-51R 1 2 3 4 5 6 7 8 R61 X_49.9R1% R77 62R RN3 8P4R-51R 1 2 3 4 5 6 7 8 TP4 R40 X_680R R54 49.9R1% 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 D D C C B B A A VTT_OUT_LEFT CPU_GTLREF H_FSBSEL2 H_FSBSEL0 H_FSBSEL1 H_VCCA VTT_OUT_RIGHT H_VCCA H_VSSA H_VCCA VTT_PWG VTT_PWG VTT_SEL VTT_OUT_LEFT VTT_OUT_LEFT H_VSSA H_IERR# H_CPURST# H_PROCHOT# H_PWRGD H_BR#0 VTT_OUT_RIGHT VTT_OUT_LEFT H_FSBSEL2 5,10,17 H_FSBSEL0 5,10,17 H_FSBSEL1 5,10,17 VID_GD#24,26 H_CPURST# 5,8 H_PWRGD 5,14 H_BR#0 5,8 VCCP VCCP VCCP VCC3 VCC5_SB V_FSB_VTT V_FSB_VTT V_FSB_VTT V_FSB_VTT V_FSB_VTT CPU_GTLREF 5 H_IERR# 5 VTT_OUT_RIGHT5 VTT_OUT_LEFT5 H_PROCHOT# 5 Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. MS-7131 100 Intel LGA775_Power Custom 630Wednesday, November 24, 2004 GTLREF VOLTAGE SHOULD BE 0.67*VTT = 0.8V FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS AND CEDAR MILL ARE SUPPORTED TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET 0 1 TEJ/PSC RSVD 1.25V VTT_PWRGOOD NOT Stuff The processor does not have on-die termination on the RESET# and BR0# signals. PLACE AT CPU END OF ROUTE CAPS FOR FSB GENERIC Pull up signal Signals to be pulled up VTT_OUT_RIGHT VTT_OUT_LEFT VTTPWRGD, VID[5:0], GTREF, TMS, TDI, TDO, BPM[5:0, other VRD components] RESET#, BR0#, PWRGOOD, TESTHI1, TESTHI8, TESTHI9 ,TESTHI10, TESTHI11,TESTHI12 VCCA: pay special attention to the voltage noise (check SI) C147 C10U10Y1206 RN27 8P4R-470R 1 3 5 7 2 4 6 8 CP4 X_COPPER R76 49.9R1% R53 1KR R75 100R1% C68 C0.1U25Y Q12 N-MMBT3904_SOT23 R127 X_1KR R51 10KR C69 C220P50N C142 X_C1U16Y C146 C10U10Y1206 R50 680R L3 X_10U100m_0805 C50 X_C1U16Y U8B ZIF-SOCK775-15u RSVD/VTT_PKGSENSE F29 VCC AH27 VCC AH26 VCC AH25 VCC AH22 VCC AH21 VCC AH19 VCC AH18 VCC AH15 VCC AH14 VCC AH12 VCC AH11 VCC AG9 VCC AG8 VCC AG30 VCC AG29 VCC AG28 VCC AG27 VCC AG26 VCC AG25 VCC AG22 VCC AG21 VCC AG19 VCC AG18 VCC AG15 VCC AG14 VCC AG12 VCC AG11 VCC AF9 VCC AF8 VCC AF22 VCC AF21 VCC AF19 VCC AF18 VCC AF15 VCC AF14 VCC AF12 VCC AF11 VCC AE9 VCC AE23 VCC AE22 VCC AE21 VCC AE19 VCC AE18 VCC AE15 VCC AE14 VCC AE12 VCC AE11 VCC AD8 VCC AD30 VCC AD29 VCC AD28 VCC AD27 VCC AD26 VCC AD25 VCC AD24 VCC AD23 VCC AC8 VCC AC30 VCC AC29 VCC AC28 VCC AC27 VCC AC26 VCC AC25 VCC AC24 VCC AC23 VCC AB8 VCC AA8 VCC AH28 VCC AH29 VCC AH30 VCC AH8 VCC AH9 VCC AJ11 VCC AJ12 VCC AJ14 VCC AJ15 VCC AJ18 VCC AJ19 VCC AJ21 VCC AJ22 VCC AJ25 VCC AJ26 VCC AJ8 VCC AJ9 VCC AK11 VCC AK12 VCC AK14 VCC AK15 VCC AK18 VCC AK19 VCC AK21 VCC AK22 VCC AK25 VCC AK26 VCC AK8 VCC AK9 VCC AL11 VCC AL12 VCC AL14 VCC AL15 VCC AL18 VCC AL19 VCC AL21 VCC AL22 VCC AL25 VCC AL26 VCC AL29 VCC AL30 VCC AL8 VCC AL9 VCC AM11 VCC AM12 VCC AM14 VCC AM15 VCC AM18 VCC AM19 VCC AM21 VCC AM22 VCC AM25 VCC AM26 VCC AM29 VCC AM30 VCC AM8 VCC AM9 VCC AN11 VCC AN12 VCC AN14 VCC AN15 VCC AN18 VCC AN19 VCC AN21 VCC AN22 VCC AN25 VCC AN26 VCC AN29 VCC AN30 VCC AN8 VCC AN9 VCC J10 VCC J11 VCC J12 VCC J13 VCC J14 VCC J15 VCC J18 VCC J19 VCC J20 VCC J21 VCC J22 VCC J23 VCC J24 VCC J25 VCC J26 VCC J27 VCC J28 VCC J29 VCC J30 VCC J8 VCC J9 VCC K23 VCC K24 VCC K25 VCC K26 VCC K27 VCC K28 VCC K29 VCC K30 VCC K8 VCC L8 VCC M23 VCC M24 VCC M25 VCC M26 VCC M27 VCC M28 VCC M29 VCC M30 VCC M8 VCC N23 VCC N24 VCC N25 VCC N26 VCC N27 VCC N28 VCC N29 VCC N30 VCC N8 VCC P8 VCC R8 VCC T23 VCC T24 VCC T25 VCC T26 VCC T27 VCC T28 VCC T29 VCC T30 VCC T8 VCC U23 VCC U24 VCC U25 VCC U26 VCC U27 VCC U28 VCC U29 VCC U30 VCC U8 VCC V8 VCC W23 VCC W24 VCC W25 VCC W26 VCC W27 VCC W28 VCC W29 VCC W30 VCC W8 VCC Y23 VCC Y24 VCC Y25 VCC Y26 VCC Y27 VCC Y28 VCC Y29 VCC Y30 VCC Y8 RSVD D23 VTT A25 VTT A26 VTT A27 VTT A28 VTT A29 VTT A30 VTT B25 VTT B26 VTT B27 VTT B28 VTT B29 VTT B30 VTT C25 VTT C26 VTT C27 VTT C28 VTT C29 VTT C30 VTT D25 VTT D26 VTT D27 VTT D28 VTT D29 VTT D30 VTTPWRGD AM6 VTT_OUT_RIGHT AA1 VTT_OUT_LEFT J1 VTT_SEL F27 VCCA A23 VSSA B23 VCC-IOPLL C23 HS1 1 HS2 2 HS3 3 HS4 4 R63 62R C144 C10U10Y0805 R71 100R C156 X_C10U10Y0805 R44 120R R83 62R C150 C10U10Y0805 R72 62R 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 D D C C B B A A VCC3 VCC5 VCC3 VCC5 VCC3 VCC3 VCC5 VCC5 VCC3VCC5 Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. MS-7131 100 Intel LGA775_GND Custom 730Wednesday, November 24, 2004 Reserve x3 104p cap (VCC3/GND) close to C2431, R2425, R2349, EMI reserve EMI reserve Reserve x8 104p cap (VCC3/GND) close to C244, C2416, RN2075, C399, C2402, C2415, C261, R2322. EMI reserve Reserve x4 104p cap (VCC5/GND) close to C300, PCI_CLK1 via, 2004.9.20 2004.9.16 2004.9.16 EMI reserve Reserve x2 104p cap (VCC5/GND) close to PCI_CLK1 via, C300. 2004.9.20 Reserve a 104p cap (VCC5/VCC3) close to USB3, RN71. EMI reserve 2004.9.20 C389 X_C0.1U25Y C407 C0.1U25Y C280 X_C0.1U25Y C345 X_C0.1U25Y C108 X_C0.1U25Y C52 X_C0.1U25Y C16 X_C0.1U25Y C129 X_C0.1U25Y C387 C0.1U25Y C164 X_C0.1U25Y U8C ZIF-SOCK775-15u VSS A12 VSS A15 VSS A18 VSS A2 VSS A21 VSS A24 VSS A6 VSS A9 VSS AA23 VSS AA24 VSS AA25 VSS AA26 VSS AA27 VSS AA28 VSS AA29 VSS AA3 VSS AA30 VSS AA6 VSS AA7 VSS AB1 VSS AB23 VSS AB24 VSS AB25 VSS AB26 VSS AB27 VSS AB28 VSS AB29 VSS AB30 VSS AB7 VSS AC3 VSS AC6 VSS AC7 VSS AD4 VSS AD7 VSS AE10 VSS AE13 VSS AE16 VSS AE17 VSS AE2 VSS AE20 VSS AE24 VSS AE25 VSS AE26 VSS AE27 VSS AE28 VSS AE29 VSS AE30 VSS AE5 VSS AE7 VSS AF10 VSS AF13 VSS AF16 VSS AF17 VSS AF20 VSS AF23 VSS AF24 VSS AF25 VSS AF26 VSS AF27 VSS AF28 VSS AF29 VSS AF3 VSS AF30 VSS AF6 VSS AF7 VSS AG10 VSS AG13 VSS AG16 VSS AG17 VSS AG20 VSS AG23 VSS AG24 VSS AG7 VSS AH1 VSS AH10 VSS AH13 VSS AH16 VSS AH17 VSS AH20 VSS AH23 VSS AH24 VSS AH3 VSS AH6 VSS AH7 VSS AJ10 VSS AJ13 VSS AJ16 VSS AJ17 VSS AJ20 VSS AJ23 VSS AJ24 VSS AJ27 VSS AJ28 VSS AJ29 VSS AJ30 VSS AJ4 VSS AJ7 VSS AK10 VSS AK13 VSS AK16 VSS AK17 VSS AK2 VSS AK20 VSS AK23 VSS AK24 VSS AK27 VSS AK28 VSS AK29 VSS AK30 VSS AK5 VSS AK7 VSS AL10 VSS AL13 VSS AL16 VSS AL17 VSS AL20 VSS AL23 VSS AL24 VSS AL27 VSS AL28 VSS AL3 VSS AL7 VSS AM1 VSS AM10 VSS AM13 VSS AM16 VSS AM17 VSS AM20 VSS AM23 VSS AM24 VSS AM27 VSS AM28 VSS AM4 VSS AN1 VSS AN10 VSS AN13 VSS AN16 VSS AN17 VSS AN2 VSS AN20 VSS AN23 VSS AN24 VSS AN27 VSS AN28 VSS B1 VSS B11 VSS B14 VSS B17 VSS B20 VSS B24 VSS B5 VSS B8 VSS C10 VSS C13 VSS C16 VSS C19 VSS C22 VSS C24 VSS C4 VSS C7 VSS D12 VSS D15 VSS D18 VSS D21 VSS D24 VSS D3 VSS D5 VSS D6 VSS D9 VSS E11 VSS E14 VSS E17 VSS E2 VSS E20 VSS E25 VSS E26 VSS E27 VSS E28 VSS E29 VSS E8 VSS F10 VSS F13 VSS F16 VSS F19 VSS F22 VSS F4 VSS F7 VSS G1 VSS H10 VSS H11 VSS H12 VSS H13 VSS H14 VSS H17 VSS H18 VSS H19 VSS H20 VSS H21 VSS H22 VSS H23 VSS H24 VSS H25 VSS H26 VSS H27 VSS H28 VSS H3 VSS H6 VSS H7 VSS H8 VSS H9 VSS J4 VSS J7 VSS K2 RSVD AC4 RSVD AE3 RSVD AE4 RSVD D1 RSVD D14 RSVD E23 RSVD E24 RSVD E5 RSVD E6 RSVD E7 RSVD F23 RSVD F6 RSVD B13 RSVD J3 RSVD N4 RSVD P5 RSVD V1 RSVD W1 RSVD Y3 VSS Y7 VSS Y5 VSS Y2 VSS W7 VSS W4 VSS V7 VSS V6 VSS V30 VSS V3 VSS V29 VSS V28 VSS V27 VSS V26 VSS V25 VSS V24 VSS V23 VSS U7 VSS U1 VSS T7 VSS T6 VSS T3 VSS R7 VSS R5 VSS R30 VSS R29 VSS R28 VSS R27 VSS R26 VSS R25 VSS R24 VSS R23 VSS R2 VSS P7 VSS P4 VSS P30 VSS P29 VSS P28 VSS P27 VSS P26 VSS P25 VSS P24 VSS P23 VSS N7 VSS N6 VSS N3 VSS M7 VSS M1 VSS L7 VSS L6 VSS L30 VSS L3 VSS L29 VSS L28 VSS L27 VSS L26 VSS L25 VSS L24 VSS L23 VSS K7 VSS K5 C5 X_C1000P50N C89 X_C0.1U25Y C375 X_C0.1U25Y TP15 C90 X_C0.1U25Y C388 X_C0.1U25Y C58 X_C0.1U25Y C152 X_C0.1U25Y C343 X_C0.1U25Y C417 X_C0.1U25Y TP14 C214 X_C0.1U25Y C91 X_C0.1U25Y C403 X_C0.1U25Y C315 X_C0.1U25Y TP13 C6 X_C0.1U25Y C292 X_C0.1U25Y C413 X_C0.1U25Y C34 X_C0.1U25Y C18 X_C0.1U25Y C316 X_C0.1U25Y C284 X_C0.1U25Y C410 X_C0.1U25Y C182 C0.1U25Y TP12 C330 X_C0.1U25Y C307 X_C0.1U25Y C353 X_C0.1U25Y X_C10P50N0402C367 C319 X_C0.1U25Y C213 X_C0.1U25Y C17 X_C0.1U25Y C158 C1000P50N C396 X_C0.1U25Y C124 X_C0.1U25Y 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 D D C C B B A A HA#27 HD#39 HA#28 HA#29 HD#40 HA#30 HA#31 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63 HDBI#0 HDBI#1 HDBI#2 HDBI#3 HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HA#5 HA#6 HA#4 HA#3 HA#10 HA#13 HA#7 HA#8 HA#11 HA#9 HA#12 HD#13 HREQ#1 HREQ#4 HREQ#0 HREQ#2 HREQ#3 HRS#2 HRS#1 HRS#0 HXSWING HD#14 HD#15 HD#16 HD#17 HXSCOMP HXRCOMP HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HA#14 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HA#15 HA#16 HD#34 HA#17 HA#18 HD#35 HA#19 HA#20 MCH_GTLREF HD#36 HA#21 HA#22 HA#23 HD#37 HA#24 HA#25 HD#38 HA#26 ICH_SYNC# HXRCOMP HXSCOMP MCH_GTLREF HXSWING V_1P5_CORE V_2P5_MCH V_FSB_VTT V_FSB_VTT V_FSB_VTT CK_H_MCH17 CK_H_MCH#17 PLTRST#14,24 MS7_POK15,24 H_CPURST#5,6 ICH_SYNC#15 HDSTBP#0 5 HDSTBN#0 5 HDSTBP#1 5 HDSTBN#1 5 HDSTBN#2 5 HDSTBP#2 5 HDSTBN#3 5 HDSTBP#3 5 HIT#5 HITM#5 HREQ#[0 4]5 HADSTB#05 HADSTB#15 H_PCREQ#5 H_BR#05,6 HBPRI#5 HBNR#5 HLOCK#5 HADS#5 HDBI#[0 3] 5 HD#[0 63] 5 HDBSY#5 HDRDY#5 H_EDRDY5 HA#[3 31]5 HDEFER#5 HTRDY#5 HRS#[0 2]5 Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. MS-7131 100 Intel Grantsdale_CPU Custom 830Wednesday, November 24, 2004 CAPS SHOULD BE PLACED NEAR MCH PIN GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.8V HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL SPACE" HD_SWING S/B 1/4*VTT +/- 2% PLACE DIVIDER RESISTOR NEAR VTT C189 X_C220P16X0402 R170 60.4R1%0402 R183 20R1%0402 C195 X_C2.2P50N0402 R173 301R1%0402 U10A (INTEL-915GV-B1) VCCNCTF AC11 VCCNCTF AB11 VCCNCTF Y20 VCCNCTF Y19 VCCNCTF Y17 VCCNCTF Y16 VCCNCTF W20 VCCNCTF W16 VCCNCTF U20 VCCNCTF U16 VCCNCTF T20 VCCNCTF T19 VCCNCTF T17 VCCNCTF T16 VCCNCTF AA13 VCCNCTF AA14 VCCNCTF AA16 VCCNCTF AA18 VCCNCTF AA20 VCCNCTF AA21 VCCNCTF AA22 VCCNCTF AA23 VCCNCTF AA24 VCCNCTF AB13 VCCNCTF AB14 VCCNCTF AB15 VCCNCTF AB16 VCCNCTF AB17 VCCNCTF AB18 VCCNCTF AB19 VCCNCTF AB20 VCCNCTF AB21 VCCNCTF AB22 VCCNCTF AB23 VCCNCTF AB24 VCCNCTF N13 VCCNCTF N14 VCCNCTF N15 VCCNCTF N16 VCCNCTF N18 VCCNCTF N20 VCCNCTF N21 VCCNCTF P13 VCCNCTF P14 VCCNCTF P15 VCCNCTF P17 VCCNCTF P19 VCCNCTF P21 VCCNCTF P22 VCCNCTF R13 VCCNCTF R14 VCCNCTF R15 VCCNCTF R16 VCCNCTF R18 VCCNCTF R20 VCCNCTF R22 VCCNCTF R23 VCCNCTF T13 VCCNCTF T14 VCCNCTF T15 VCCNCTF T21 VCCNCTF T23 VCCNCTF T24 VCCNCTF U13 VCCNCTF U14 VCCNCTF U22 VCCNCTF U24 VCCNCTF V13 VCCNCTF V14 VCCNCTF V15 VCCNCTF V21 VCCNCTF V23 VCCNCTF V24 VCCNCTF W13 VCCNCTF W14 VCCNCTF W22 VCCNCTF W24 VCCNCTF Y13 VCCNCTF Y14 VCCNCTF Y15 VCCNCTF Y21 VCCNCTF Y23 VCCNCTF Y24 HD0# J33 HD1# H33 HD2# J34 HD3# G35 HD4# H35 HD5# G34 HD6# F34 HD7# G33 HD8# D34 HD9# C33 HD10# D33 HD11# B34 HD12# C34 HD13# B33 HD14# C32 HD15# B32 HD16# E28 HD17# C30 HD18# D29 HD19# H28 HD20# G29 HD21# J27 HD22# F28 HD23# F27 HD24# E27 HD25# E25 HD26# G25 HD27# J25 HD28# K25 HD29# L25 HD30# L23 HD31# K23 HD32# J22 HD33# J24 HD34# K22 HD35# J21 HD36# M21 HD37# H23 HD38# M19 HD39# K21 HD40# H20 HD41# H19 HD42# M18 HD43# K18 HD44# K17 HD45# G18 HD46# H18 HD47# F17 HD48# A25 HD49# C27 HD50# C31 HD51# B30 HD52# B31 HD53# A31 HD54# B27 HD55# A29 HD56# C28 HD57# A28 HD58# C25 HD59# C26 HD60# D27 HD61# A27 HD62# E24 HD63# B25 DINV_0# E34 DINV_1# J26 DINV_2# K19 DINV_3# B26 HD_STBP0# E33 HD_STBN0# E35 HD_STBP1# H26 HD_STBN1# F26 HD_STBP2# J19 HD_STBN2# F19 HD_STBP3# B29 HD_STBN3# C29 HA3# H29 HA4# K29 HA5# J29 HA6# G30 HA7# G32 HA8# K30 HA9# L29 HA10# M30 HA11# L31 HA12# L28 HA13# J28 HA14# K27 HA15# K33 HA16# M28 HA17# R29 HA18# L26 HA19# N26 HA20# M26 HA21# N31 HA22# P26 HA23# N29 HA24# P28 HA25# R28 HA26# N33 HA27# T27 HA28# T31 HA29# U28 HA30# T26 HA31# T29 HAD_STB0# J31 HAD_STB1# N27 HPCREQ# E31 BREQ0# R33 BPRI# E30 BNR# M35 HLOCK# L33 ADS# M31 HREQ0# F33 HREQ1# E32 HREQ2# H31 HREQ3# G31 HREQ4# F31 HIT# L34 HITM# N35 DEFER# J35 HTRDY# N34 DBSY# L35 DRDY# M32 HEDRDY# P33 RS0# K34 RS1# P34 RS2# J32 HCLKP M23 HCLKN M22 PWROK AG7 CPURST# G24 RSTIN# AF7 ICH_SYNC# M14 HDRCOMP B23 HDSCOMP D24 HDSWING A23 HDVREF A24 RSVRD AJ21 RSVRD AK21 RSVRD AK24 RSVRD AL21 RSVRD AL20 RSVRD AK18 RSVRD AJ24 RSVRD AJ23 RSVRD AJ18 RSVRD AJ20 RSVRD V31 RSVRD V30 RSVRD U30 RSVRD V32 RSVRD Y30 RSVRD AB29 RSVRD R31 RSVRD R30 RSVRD AA31 RSVRD AA30 RSVRD AC12 RSVRD AC13 RSVRD AC14 RSVRD AC15 RSVRD AC16 RSVRD AC17 RSVRD AC18 RSVRD AC19 RSVRD AC20 RSVRD AC21 RSVRD AC22 NC N12 NC N22 NC N23 NC N24 NC P12 NC P23 NC P24 NC R12 NC R24 NC T12 NC U12 NC V12 NC W12 NC Y12 NC AA12 NC AB12 NC AC23 NC AC24 NC AN19 NC AL28 NC AJ14 NC AH24 NC AG6 NC AD30 NC P30 NC L19 NC L12 NC K12 NC J12 NC H17 NC H15 NC H12 NC G12 NC F24 NC F12 NC E16 NC C16 NC AR35 NC AR34 NC AR2 NC AR1 NC AP35 NC AP1 NC B35 NC B1 NC A34 NC A2 R166 100R1%0402 R228 8.2KR0402 R174 102R1%0402 C185 C100000P16Y0402 C198 _C10000P16X0402/20% R163 49.9R1%0402 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 D D C C B B A A DQM_B2 RAS_A# DATA_B47 WE_B# MAA_A2 DATA_A61 DATA_A42 DATA_A9 WE_A# DATA_B38 RAS_B# DATA_A54 DATA_A2 DATA_B9 SMPCOMP_N DATA_A21 DQS_B7 MAA_B5 SCS_A#0 DATA_A41 DATA_A17 P_DDR0_A SCS_B#1 SCKE_A0 DATA_B37 DATA_B55 DATA_A43 DATA_A7 DATA_A53 DATA_B12 DATA_B34 DATA_B29 MAA_B4 DATA_B41 DQM_A7 MAA_A11 DATA_B54 DATA_B33 DQS_A7 DATA_A16 DATA_A49 DATA_B42 DQS_B6 DATA_B62 DATA_B60 DATA_A51 MAA_A5 DQM_B6 DATA_B25 DATA_A3 N_DDR1_B SCKE_A1 DATA_B63 CAS_B# MAA_A10 DATA_B23 DQM_A3 DATA_A58 DATA_A31 DATA_A11 DATA_B39 DATA_A55 DATA_A24 MAA_A7 MAA_B11 DATA_B10 DATA_A1 DQS_A3 MAA_B8 N_DDR0_A DATA_A45 DATA_B4 MAA_B10 DATA_A23 DATA_B44 DATA_B5 DATA_A57 DATA_A8 MAA_B9 DATA_B32 DATA_B13 SBS_B0SBS_A0 SMPCOMP_P P_DDR2_B DATA_A19 DQS_A1 DATA_B45 MCH_VREF_B DATA_A39 DATA_B50 DATA_B7 DQM_B7 DATA_A6 DATA_B48 DATA_A59 DATA_A28 CAS_A# DATA_B61 DATA_A15 DATA_B26 DQM_A6 SBS_A1 DATA_A35 DATA_B58 DATA_A13 DQM_A5 MAA_A6 DATA_A46 DQS_A0 DQS_A5 MAA_B12 DATA_A48 DQM_B5 DATA_B51 DATA_B14 DATA_A14 DATA_B15 DATA_A62 DATA_B0 DATA_B35 N_DDR2_B N_DDR1_A MAA_A0 DATA_B18 DQM_A2 SMPCOMP_N DATA_B49 MAA_B6 DATA_B8 DATA_A22 DQM_B4 DATA_B30 DATA_A27 DATA_A32 MAA_B13 MAA_A1 DATA_B57 MCH_VREF_A DQS_B1 DATA_B40 DATA_A20 DATA_A38 DQS_B2 DATA_A10 DQS_A6 DQS_A4 MCH_VREF_B DATA_B52 DATA_B11 DATA_A26 DATA_A63 P_DDR1_A DATA_A18 DATA_B43 SCKE_B0 DATA_A44 MCH_VREF_A DATA_A30 P_DDR0_B N_DDR0_B DATA_B2 DATA_B20 DATA_B16 DATA_B22 DQM_A4 MAA_A8 DATA_A50 SM_YSLEWIN DQM_A0 DQM_B0 DQM_B3 P_DDR2_A DATA_A29 DATA_A56 DQS_B4 MAA_B1 DATA_B53 DATA_A33 SCS_B#0 MAA_A3 SMPCOMP_P DATA_B17 MAA_B7 MAA_B0 DQM_B1 SCS_A#1 DATA_B36 DATA_B46 DATA_A12 DQS_B3 N_DDR2_A SBS_B1 DATA_A40 DATA_A4 DATA_B31 DATA_A34 DATA_B1 DATA_B3 MAA_B3 DATA_A52 MCH_VREF_A SCKE_B1 DATA_B24 DATA_A25 DQM_A1 MAA_A12 DATA_B56 MAA_A13 DATA_A47 DATA_A0 DATA_B27 DATA_B21 MAA_A9 DATA_B6 DQS_A2 DATA_B28 MAA_B2 DATA_A5 DATA_A37 DQS_B0 DATA_B59 DATA_A60 DATA_A36 MAA_A4 DQS_B5 SM_XSLEWIN DATA_B19 P_DDR1_B VCC_DDR VCC_DDR DATA_A[0 63]12,13 SCKE_B012,13 MAA_B[0 13] 12,13 CAS_B# 12,13 SBS_B1 12,13 N_DDR2_B 12 SCS_A#112,13 SBS_B0 12,13 DQM_B[0 7]12,13 P_DDR2_B 12 SBS_A112,13 N_DDR1_B 12 RAS_B# 12,13 SCS_A#012,13 SBS_A012,13 P_DDR1_B 12 DQM_A[0 7]12,13 N_DDR0_B 12 SCS_B#1 12,13 DQS_A[0 7]12,13 P_DDR0_B 12 SCS_B#0 12,13 N_DDR2_A12 WE_A#12,13 P_DDR2_A12 N_DDR1_A12 RAS_A#12,13 MAA_A[0 13]12,13 CAS_A#12,13 P_DDR1_A12 DQS_B[0 7] 12,13 SCKE_A112,13 N_DDR0_A12 WE_B# 12,13 DATA_B[0 63]12,13 SCKE_A012,13 SCKE_B112,13 P_DDR0_A12 Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. MS-7131 100 Intel Grantsdale_Memory Custom 930Wednesday, November 24, 2004 PLACE 0.1UF CAP CLOSE TO MCH PLACE 0.1UF CAP CLOSE TO MCH R251 1KR1%0402 R245 1KR1%0402 C262 C100000P16Y0402 U10B (INTEL-915GV-B1) SBCS0# AP34 SBCS1# AN34 SBCS2# AN33 SBCS3# AM33 SBRAS# AP27 SBCAS# AN27 SBWE# AR27 SBMA0 AM18 SBMA1 AP18 SBMA2 AN17 SBMA3 AR16 SBMA4 AR15 SBMA5 AN15 SBMA6 AP17 SBMA7 AL15 SBMA8 AP14 SBMA9 AN13 SBMA10 AN20 SBMA11 AR12 SBMA12 AM12 SBMA13 AD32 RSV AN32 RSV AP29 RSV AP30 RSV AP32 SBBA0 AM27 SBBA1 AR19 RSV AP23 SBDQS0 AK5 RSV AL4 SBDQS1 AK10 RSV AH10 SBDQS2 AK13 RSV AL14 SBDQS3 AD20 RSV AF20 SBDQS4 AH25 RSV AG26 SBDQS5 AH28 RSV AH30 SBDQS6 AB31 RSV AC30 SBDQS7 W27 RSV Y28 SBCK0 AH22 SBCK0# AG23 SBCK1 AL11 SBCK1# AJ11 SBCK2 AE26 SBCK2# AE25 SBCK3 AL23 SBCK3# AK22 SBCK4 AK9 SBCK4# AL9 SBCK5 AD29 SBCK5# AD28 RSV AL24 RSV_TP3 AK15 RSV_TP2 AN14 SMYSLEWIN AF9 SMYSLEWOUT AE10 SMVREF1 AE8 SADQ0 AE3 SADQ1 AF3 SADQ2 AH2 SADQ3 AJ2 SADQ4 AE2 SADQ5 AE1 SADQ6 AG3 SADQ7 AH3 SADQ8 AJ1 SADQ9 AK2 SADQ10 AN4 SADQ11 AP4 SADQ12 AJ3 SADQ13 AK3 SADQ14 AP2 SADQ15 AP3 SADQ16 AP5 SADQ17 AR5 SADQ18 AN8 SADQ19 AP9 SADQ20 AN5 SADQ21 AP6 SADQ22 AR8 SADQ23 AN9 SADQ24 AK16 SADQ25 AL17 SADQ26 AD17 SADQ27 AF19 SADQ28 AF16 SADQ29 AJ17 SADQ30 AE19 SADQ31 AH18 SADQ32 AH27 SADQ33 AK27 SADQ34 AN30 SADQ35 AK31 SADQ36 AL27 SADQ37 AJ28 SADQ38 AL30 SADQ39 AL31 SADQ40 AJ34 SADQ41 AH35 SADQ42 AG32 SADQ43 AF34 SADQ44 AJ33 SADQ45 AH33 SADQ46 AF33 SADQ47 AE33 SADQ48 AE35 SADQ49 AE34 SADQ50 Y33 SADQ51 W34 SADQ52 AD31 SADQ53 AD35 SADQ54 AA32 SADQ55 Y35 SADQ56 V34 SADQ57 V33 SADQ58 R32 SADQ59 R34 SADQ60 W35 SADQ61 W33 SADQ62 T33 SADQ63 T35 SACKE0 AL12 SACKE1 AN11 SACKE2 AP11 SACKE3 AR11 SADM0 AF2 SADM1 AL1 SADM2 AN7 SADM3 AH16 SADM4 AK29 SADM5 AG34 SADM6 AA33 SADM7 U33 SACS0# AM34 SACS1# AL35 SACS2# AK34 SACS3# AL33 SARAS# AN29 SACAS# AL34 SAWE# AP31 SAMA0 AN22 SAMA1 AP22 SAMA2 AN21 SAMA3 AP21 SAMA4 AM21 SAMA5 AP19 SAMA6 AR20 SAMA7 AN16 SAMA8 AN18 SAMA9 AM15 SAMA10 AN23 SAMA11 AP15 SAMA12 AP13 SAMA13 AB33 RSV AP33 RSV AR24 RSV AR28 RSV AR29 SABA0 AN28 SABA1 AP26 RSV AR23 SADQS0 AG1 RSV AG2 SADQS1 AL3 RSV AL2 SADQS2 AP7 RSV AR7 SADQS3 AF17 RSV AG17 SADQS4 AM30 RSV AL29 SADQS5 AG35 RSV AG33 SADQS6 AA34 RSV AA35 SADQS7 U34 RSV U35 SACK0 AM24 SACK0# AN25 SACK1 AN2 SACK1# AN3 SACK2 AB34 SACK2# AC33 SACK3 AP25 SACK3# AN26 SACK4 AM2 SACK4# AM3 SACK5 AC35 SACK5# AC34 RSV AN31 RSV_TP1 AH15 RSV_TP0 AE16 SMXSLEWIN AJ12 SMXSLEWOUT AK12 SMVREF0 AE7 SRCOMP1 AG8 SRCOMP0 AG4 RSV AE5 RSV AF5 SBDQ0 AH7 SBDQ1 AJ6 SBDQ2 AL5 SBDQ3 AN6 SBDQ4 AG9 SBDQ5 AH4 SBDQ6 AM5 SBDQ7 AL6 SBDQ8 AJ7 SBDQ9 AL7 SBDQ10 AF11 SBDQ11 AE11 SBDQ12 AJ8 SBDQ13 AL8 SBDQ14 AG10 SBDQ15 AG11 SBDQ16 AE13 SBDQ17 AF13 SBDQ18 AG14 SBDQ19 AD14 SBDQ20 AD12 SBDQ21 AH12 SBDQ22 AF14 SBDQ23 AD15 SBDQ24 AD18 SBDQ25 AK19 SBDQ26 AE22 SBDQ27 AH21 SBDQ28 AL18 SBDQ29 AH19 SBDQ30 AF22 SBDQ31 AD21 SBDQ32 AF23 SBDQ33 AF25 SBDQ34 AL25 SBDQ35 AJ26 SBDQ36 AD23 SBDQ37 AF24 SBDQ38 AJ25 SBDQ39 AL26 SBDQ40 AJ29 SBDQ41 AJ31 SBDQ42 AG30 SBDQ43 AG31 SBDQ44 AK33 SBDQ45 AK32 SBDQ46 AG27 SBDQ47 AF28 SBDQ48 AE31 SBDQ49 AF27 SBDQ50 AB27 SBDQ51 AB26 SBDQ52 AE29 SBDQ53 AE27 SBDQ54 AC28 SBDQ55 AC26 SBDQ56 AA29 SBDQ57 W29 SBDQ58 U26 SBDQ59 V29 SBDQ60 Y26 SBDQ61 AA28 SBDQ62 W26 SBDQ63 V28 SBCKE0 AN10 SBCKE1 AM9 SBCKE2 AP10 SBCKE3 AR9 SBDM0 AJ5 SBDM1 AH9 SBDM2 AH13 SBDM3 AG20 SBDM4 AG24 SBDM5 AH31 SBDM6 AD24 SBDM7 W31 R253 80.6R1%0402R254 80.6R1%0402 C269 C0.1U25Y C261 C100000P16Y0402 R244 0R0402 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 D D C C B B A A VCCA_HPLL V_1P5_PCIEXPRESS H_FSBSEL1 H_FSBSEL2 H_FSBSEL0 V_1P5_PCIEXPRESS BSEL1 CK_96M_DREF# EXP_SLR CK_PE_100M_MCH 3VDDCCL DMI_MTP_IRP_1 VCCA_DPLLA VCCA_MPLL DMI_MTP_IRP_3 DMI_MTN_IRN_1 DMI_MTN_IRN_3 V_1P5_PCIEXPRESS BSEL0 DMI_ITP_MRP_3 DMI_ITP_MRP_0 DMI_MTN_IRN_2 V_2P5_DAC_FILTERED VCCA_GPLL DMI_MTP_IRP_0 VCCA_GPLL VCCA_DPLLB CK_PE_100M_MCH# CK_96M_DREF VCCA_HPLLVCCA_HPLL BSEL2 DMI_ITN_MRN_2 DMI_ITP_MRP_2 DMI_ITP_MRP_1 VCCA_MPLL VSYNC_27980314 VCCA_DPLLA DMI_ITN_MRN_1 VCCA_DPLLB MTYPE 3VDDCDA DMI_MTN_IRN_0 DACREFSET DMI_ITN_MRN_3 DMI_ITN_MRN_0 EXTTS HSYNC_27980312 DMI_MTP_IRP_2 GRCOMP CRT_G CRT_B CRT_R VSYNC_27980314 HSYNC_27980312 VCC_DDR VCC_DDR V_2P5_MCH V_2P5_MCH V_1P5_CORE V_1P5_CORE V_1P5_CORE V_1P5_CORE V_1P5_CORE V_1P5_CORE V_1P5_CORE V_FSB_VTT VCC_DDR V_1P5_CORE V_1P5_CORE V_2P5_MCH VCC3 VCC3 V_2P5_DAC_FILTERED CK_PE_100M_MCH17 CK_PE_100M_MCH#17 DMI_ITP_MRP_014 DMI_ITN_MRN_014 DMI_ITN_MRN_114 DMI_ITP_MRP_114 DMI_ITN_MRN_214 DMI_ITP_MRP_214 DMI_ITN_MRN_314 DMI_ITP_MRP_314 H_FSBSEL15,6,17 H_FSBSEL25,6,17 H_FSBSEL05,6,17 DMI_MTN_IRN_3 14 DMI_MTP_IRP_3 14 DMI_MTP_IRP_0 14 3VDDCDA 25 DMI_MTP_IRP_2 14 DMI_MTN_IRN_2 14 CK_96M_DREF# 17 DMI_MTP_IRP_1 14 DMI_MTN_IRN_1 14 CK_96M_DREF 17 DMI_MTN_IRN_0 14 3VDDCCL 25 CRT_R 25 CRT_G 25 CRT_B 25 CRT_VSYNC 25 CRT_HSYNC 25 Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. MS-7131 100 Intel Grantsdale_PCI EXPRESS Custom 10 30Wednesday, November 24, 2004 FSB GENERIC DECOUPLING MCH MEMORY DECOUPLING BSEL 1 02 TABLE 1 0 PSB FREQUENCY 01 200 MHZ (800)0 0 133 MHZ (533) To prevent Grantsdale VSYNC and HSYNC signal level issue CP11 X_COPPER C252 C100000P16Y0402 C244 C100000P16Y0402 C264 C10U10Y0805 CP9 X_COPPER _C10000P16X0402/20% C257 C251 C100000P16Y0402 R190 10KR0402 CP10 X_COPPER U11A NC7WZ08_US8 1 7 2 84 C260 X_C10U10Y0805 C217 C100000P16Y0402 C228 C100000P16Y0402 L9 X_10U100m_0805 C175 C10U10Y0805 CP5 X_COPPER C219 X_C10U10Y0805 C215 X_C0.22U16Y C196 C10U10Y0805 C170 C10U10Y0805 L7 X_10U100m_0805 L11 0.1U50m C273 C10U10Y0805 U11B NC7WZ08_US8 5 3 6 84 C188 C100000P16Y0402 C171 C10U10Y0805 L8 10U100m_0805 C226 X_C10U10Y0805 R227 10KR0402 R204 X_1KR1%0402 CP6 X_COPPER C218 C10U10Y0805 L10 X_10U100m_0805 R207 255R1% R205 X_1KR1%0402 C270 C100000P16Y0402 C247 X_C10U10Y0805 L12 X_10U100m_0805 R184 10KR0402 C231 C10U10Y0805 C250 C10U10Y0805 R233 24.9R1%0402 C200 C100000P16Y0402 R208 0R0402 U10C (INTEL-915GV-B1) EXPATXP0 C10 EXPATXN0 C9 EXPATXP1 A9 EXPATXN1 A8 EXPATXP2 C8 EXPATXN2 C7 EXPATXP3 A7 EXPATXN3 A6 EXPATXP4 C6 EXPATXN4 C5 EXPATXP5 C2 EXPATXN5 D2 EXPATXP6 E3 EXPATXN6 F3 EXPATXP7 F1 EXPATXN7 G1 EXPATXP8 G3 EXPATXN8 H3 EXPATXP9 H1 EXPATXN9 J1 EXPATXP10 J3 EXPATXN10 K3 EXPATXP11 K1 EXPATXN11 L1 EXPATXP12 L3 EXPATXN12 M3 EXPATXP13 M1 EXPATXN13 N1 EXPATXP14 N3 EXPATXN14 P3 EXPATXP15 P1 EXPATXN15 R1 DMI TXP0 R3 DMI TXN0 T3 DMI TXP1 T1 DMI TXN1 U1 DMI TXP2 U3 DMI TXN2 V3 DMI TXP3 V5 DMI TXN3 W5 EXPACOMPO Y10 EXPACOMPI W10 CRTHSYNC E12 CRTVSYNC D12 CRTRED F14 CRTGREEN D14 CRTBLUE H14 CRTREDB G14 CRTGREENB E14 CTRBLUEB J14 CRTDDCDATA L14 CRTDDCCLK M15 DREFCLKINP M13 DREFCLKINN M12 CRTIREF A15 PMEXTTS K16 PMBMBUSY# G16 TESTIN# R35 MCHDETECT A35 VCC AD10 VCC AD9 VCC AD8 VCC AD7 VCC AD6 VCC AD5 VCC AD4 VCC AD3 VCC AD2 VCC AD1 VCC AC10 VCC AC9 VCC AC8 VCC AC7 VCC AC6 VCC AC5 VCC AC4 VCC AC3 VCC AC2 VCC AC1 VCC AB10 VCC AB9 VCC AB8 VCC AB7 VCC AB6 VCC AB5 VCC AB4 VCC AB3 VCC AB2 VCC AB1 VCC W18 VCC V19 VCC V17 VCC U18 VCCSM AR33 VCCSM AR31 VCCSM AR26 VCCSM AR22 VCCSM AR18 VCCSM AR14 VCCSM AR10 VCCSM AP28 VCCSM AP24 VCCSM AP20 VCCSM AP16 VCCSM AP12 VCCSM AN35 VCCSM AM32 VCCSM AM28 VCCSM AM26 VCCSM AM25 VCCSM AM23 VCCSM AM22 VCCSM AM20 VCCSM AM19 VCCSM AM17 VCCSM AM16 VCCSM AM14 VCCSM AM13 VCCSM AM11 VCCSM AM10 VCCSM AK35 VCC3G W1 VCC3G W2 VCC3G W3 VCC3G W4 VCC3G W6 VCC3G W7 VCC3G W8 VCC3G W9 VCC3G Y1 VCC3G Y2 VCC3G Y3 VCC3G Y4 VCC3G Y5 VCC3G Y6 VCC3G Y7 VCC3G Y8 VCC3G Y9 EXPARXP0 E11 EXPARXN0 F11 EXPARXP1 J11 EXPARXN1 H11 EXPARXP2 F9 EXPARXN2 E9 EXPARXP3 F7 EXPARXN3 E7 EXPARXP4 B3 EXPARXN4 B4 EXPARXP5 D5 EXPARXN5 E5 EXPARXP6 G6 EXPARXN6 G5 EXPARXP7 H8 EXPARXN7 H7 EXPARXP8 J6 EXPARXN8 J5 EXPARXP9 K8 EXPARXN9 K7 EXPARXP10 L6 EXPARXN10 L5 EXPARXP11 P10 EXPARXN11 R10 EXPARXP12 M8 EXPARXN12 M7 EXPARXP13 N6 EXPARXN13 N5 EXPARXP14 P7 EXPARXN14 P8 EXPARXP15 R6 EXPARXN15 R5 DMI RXP0 U5 DMI RXN0 U6 DMI RXP1 T9 DMI RXN1 T8 DMI RXP2 V7 DMI RXN2 V8 DMI RXP3 V10 DMI RXN3 U10 GCLKINP A11 GCLKINN B11 SDVOCTRLDATA K13 SDVOCTRLCLK J13 BSEL0 H16 BSEL1 E15 BSEL2 D17 RSV M16 RSV F15 MTYPE C15 EXP_SLR A16 RSV B15 RSV C14 RSV K15 VCC L10 VSS M10 VCCAHPLL A17 VCCAMPLL B17 VCCADPLLA A12 VCCADPLLB B13 VCCA3GPLL A14 VCCHV A13 VCCACRTDAC E13 VCCACRTDAC D13 VSSACRTDAC F13 VTT H22 VTT G22 VTT G21 VTT F22 VTT F21 VTT F20 VTT E22 VTT E21 VTT E20 VTT E19 VTT D22 VTT D21 VTT D20 VTT D19 VTT C22 VTT C21 VTT C20 VTT C19 VTT B22 VTT B21 VTT B20 VTT B19 VTT A22 VTT A21 VTT A20 VTT A19 VSSNCTF AC25 VSSNCTF AB25 VSSNCTF AA25 VSSNCTF AA11 VSSNCTF Y25 VSSNCTF Y18 VSSNCTF Y11 VSSNCTF W25 VSSNCTF W11 VSSNCTF V25 VSSNCTF V20 VSSNCTF V16 VSSNCTF V11 VSSNCTF U25 VSSNCTF U11 VSSNCTF T25 VSSNCTF T18 VSSNCTF T11 VSSNCTF R25 VSSNCTF R11 VSSNCTF P25 VSSNCTF P11 VSSNCTF N25 VSSNCTF AD25 VSSNCTF N11 VSSNCTF M11 VSSNCTF AA15 VSSNCTF AA17 VSSNCTF AA19 VSSNCTF N17 VSSNCTF N19 VSSNCTF P16 VSSNCTF P18 VSSNCTF P20 VSSNCTF R17 VSSNCTF R19 VSSNCTF R21 VSSNCTF T22 VSSNCTF U15 VSSNCTF U21 VSSNCTF U23 VSSNCTF V22 VSSNCTF W15 VSSNCTF W21 VSSNCTF W23 VSSNCTF Y22 C232 X_C10U10Y0805 C258 X_C10U10Y0805 R179 10KR0402 L6 X_10U100m_0805 C193 C100000P16Y0402 C222 X_C10U10Y0805 C223 C100000P16Y0402 [...]... R157 0R + A 8 7 6 5 GND VCC3_SB VTT_DDR S VCC_DDR VCC_DDR CD1000U6.3EL15 EC34 Title ACPI CONTROLLER_MS7 470u/10V Size Document Number Custom MS-7131 Date: 8 7 6 5 4 3 Wednesday, November 24, 2004 2 R ev 100 Sheet 24 1 of 30 8 7 6 ATX Connector VCC5_SB 5 4 3 2 MSI Front Panel Connector +12V 1 INTEL/PB Front Panel Connector C135 C100P_50V ALARM R117 X_4.7KR 18 22 18 PS_ON# PS_ON# R116 Q16 D GND 3 P_ON... width 12 mils & 12mils space DIMM_VREF C248 C0.1U25Y PLACE CLOSE TO DIMM PIN VCC_DDR 3 11 18 26 34 42 50 58 66 74 A MICRO-START INT'L CO.,LTD DIMM-184 Title DDR DIMM 1 & 2 Size Document Number Custom MS-7131 Date: 8 7 6 5 4 3 Wednesday, November 24, 2004 2 R ev 100 Sheet 12 1 of 30 8 7 6 5 4 VTT_DDR 1 VTT_DDR C55 C4.7U35Y1206 C157 C4.7U35Y1206 C137 C4.7U35Y1206 C225 C4.7U35Y1206 VTT_DDR DQS_A7 DQM_A7... Data Group: SDQS,SDQ & SDM (56 ohm) Control Group: SCS# & SCKE (56 ohm) X_C1U16Y C61 X_C1U16Y C110 X_C1U16Y A A MICRO-START INT'L CO.,LTD Title DDR Termination Resistors Size Document Number Custom MS-7131 Date: 8 7 6 5 4 3 Wednesday, November 24, 2004 2 R ev 100 Sheet 13 1 of 30 8 7 6 5 C3 J3 A3 J2 J1 E1 C5 G5 E3 P6 DEVSEL# FRAME# IRDY# TRDY# STOP# PAR PLOCK# SERR# PERR# PME# 17 ICH_PCLK 17 PCIRST_ICH5#... CPUSLP# FERR# IGNNE# INIT# INIT3_3V# INTR NMI SMI# STPCLK# RCIN# A20GATE THRMTRIP# GPO49/CPUPWRGD D 20,21,27 AD[31 0] 4 MICRO-START INT'L CO.,LTD Title ICH6_PCI, DMI, CPU, IRQ Size Document Number Custom MS-7131 Date: 8 7 6 5 4 3 Wednesday, November 24, 2004 2 R ev 100 Sheet 14 1 of 30 8 7 6 5 4 3 2 1 ICH6 integrates 20K ohm nomial pull-up resistors C21 D21 A20 B20 D19 C19 A18 B18 E17 D17 B16 A16 C15 D15... R297 10KR0402 MICRO-START INT'L CO.,LTD should go high no sooner than 10ms after both VCC3_SB anc VCC1.5_SB have reached their nomial voltages Title ICH6_LPC, ATA, USB, GPIO Size Document Number Custom MS-7131 Date: 8 7 6 5 4 3 Wednesday, November 24, 2004 2 R ev 100 Sheet 15 1 of 30 8 7 C287 C286 C V_1P5_CORE C100000P16Y0402 C298 C100000P16Y0402 C318 _C10000P16X0402/20% VCC3 C368 A13 F14 G13 G14 C100000P16Y0402... VSS_107 VSS_106 VSS_105 VSS_104 VSS_103 VSS_102 VSS_101 VSS_100 VSS_99 VSS_98 VSS_97 VSS_96 V_1P5_CORE 6 U15C _INTEL-82801FR-B1 MICRO-START INT'L CO.,LTD Title ICH6_POWER Size Document Number Custom MS-7131 Date: 8 7 6 5 4 3 Wednesday, November 24, 2004 2 R ev 100 Sheet 16 1 of 30 8 7 CP8 6 Clock Generator - ICS954119 VCC3V CPU_CLK CPU_CLK# 41 C100000P16Y0402 38 GND 20 GND 34 VDD_PCIEX MCHCLK MCHCLK#... to this page 8P4R-2.7KR0402 2 VCC3 4 6 8 1KR A check PRES4 is pull up or pull down MICRO-START INT'L CO.,LTD Title Place Cap as Close to FWH< 350 mil ICS954119 & FWH & FDD Size Document Number Custom MS-7131 Date: 8 7 6 5 4 3 Wednesday, November 24, 2004 2 R ev 100 Sheet 17 1 of 30 8 7 6 5 4 3 SERIAL PORT 1 LPC SUPER I/O W83627HF/NHF/THF C29 VCC5 1N4148_SOD123 +12V LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 125... CPU_VCORE CPU_TMPA CPU_TMPA 42 41 40 39 38 37 36 35 31 32 33 34 43 44 45 46 47 IRRX/GP34 GP45 IRTX GP40 GPX2/GP13 GPY1/GP15 GPSA1/GP10 GPSA2/GP17 GPX1/GP12 GPY2/GP14 GPSB1/GP11 GPSB2/GP16 MSO/IRQIN0/GP20 MSI/ GP21 TMP_VREF 101 102 103 SYS_TMP 104 93 94 95 96 LPC_+12VIN 97 98 VCC3 99 100 VCCP R55 5 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 SLCT PE BUSY ACK# SLIN# INIT# ERR# AFD# STB# LAD0 LAD1 LAD2 LAD3 12 48 77 114... C0.1U25Y CHASSIS 1 2 RT1 10KRT1%0805 VTIN_GND C0.1U25Y SERIAL PORT 2 U6 20 2 3 4 7 9 NRIB# NCTSB# NDSRB# NSINB N DCDB# SOUTA R19 R2 VCC5 VCC5 R48 10KR1% Chasiss Intrusion Size Document Number Custom MS-7131 Date: 8 7 6 5 4 3 Wednesday, November 24, 2004 2 R ev 100 Sheet 18 1 of 30 8 7 6 5 4 3 2 1 AC'97 Codec ALC655 COPPER C236 CP16 C204 X_COPPER FB9 38 37 AVDD2 MONO 36 35 34 33 VRDA VRAD 32 31 30... X_1U500m_0805 R209 X_47KR0402 R195 X_47KR0402 CD IN AUDIO-CDIN1X4 (Black) 2.54mm C10U16EL C412 X_C10U10Y0805 R329 300R1% A A MICRO-START INT'L CO.,LTD Title AC97 Audio_ALC6555 Size Document Number Custom MS-7131 Date: 8 7 6 5 4 3 Wednesday, November 24, 2004 2 R ev 100 Sheet 19 1 of 30 8 7 6 5 AGP 3.3V 1X SLOT(AGP VER:3.0) 14,21 17 14,21 PIRQ#B AGP_CLK PREQ#0 PREQ#0 VCC3 VCC3_SB 14,21,27 14,21,27 AD31 AD29 . 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. MS-7131 100 Cover Sheet Custom 130Wednesday, November 24, 2004 MS(7131) Intel LGA775 Processor System. 1 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. MS-7131 100 Block Diagram Custom 230Wednesday, November 24, 2004 Block Diagram USB Port 4 USB Port. 133MHz 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Title Size Document Number Rev Date: Sheet of MICRO-START INT'L CO.,LTD. MS-7131 100 POWER MAP Custom 330Wednesday, November 24, 2004 - 560mA - TBD A Gransdale GMCH 1.2V