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Data Sheet High-Performance, Enhanced Flash Microcontrollers phần 10 docx

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PIC18FXX2 DS39564C-page 298 © 2006 Microchip Technology Inc. FIGURE 23-19: TYPICAL, MINIMUM AND MAXIMUM WDT PERIOD vs. VDD (-40°C TO +125°C) FIGURE 23-20: ΔI LVD vs. VDD OVER TEMPERATURE (LVD ENABLED, VLVD = 4.5 - 4.78V) 0 5 10 15 20 25 30 35 40 45 50 2.02.53.03.54.04.55.05.5 V DD (V) WDT Period (ms) Max (125C) MAX (85C) Typ (25C) Min (-40C) Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) Max (+125°C) Max (+85°C) Typ (+25°C) Min (-40°C) 0 10 20 30 40 50 60 70 80 90 2.02.53.03.54.04.55.05.5 V DD (V) I DD ( μ A) Max (125C) Typ (25C) Max (125C) Typ (25C) LVDIF is set b y hardware LVDIF can be cleared by firmware LVDIF state is unknown Max (+125°C) Max (+125°C) Typ (+25°C) Typ (+25°C) © 2006 Microchip Technology Inc. DS39564C-page 299 PIC18FXX2 FIGURE 23-21: TYPICAL, MINIMUM AND MAXIMUM VOH vs. IOH (VDD = 5V, -40°C TO +125°C) FIGURE 23-22: TYPICAL, MINIMUM AND MAXIMUM V OH vs. IOH (VDD = 3V, -40°C TO +125°C) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 5 10 15 20 25 I OH (-mA) V OH (V) Typ (25C) Max Min Max Typ (+25°C) Min 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 5 10 15 20 25 I OH (-mA) V OH (V) Typ (25C) Max Min Typ (+25°C) Min Max PIC18FXX2 DS39564C-page 300 © 2006 Microchip Technology Inc. FIGURE 23-23: TYPICAL AND MAXIMUM VOL vs. IOL (VDD = 5V, -40°C TO +125°C) FIGURE 23-24: TYPICAL AND MAXIMUM V OL vs. IOL (VDD = 3V, -40°C TO +125°C) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0 5 10 15 20 25 I OL (-mA) V OL (V) Max Typ (25C) Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) Typ (+25°C) Max 0.0 0.5 1.0 1.5 2.0 2.5 0 5 10 15 20 25 I OL (-mA) V OL (V) Max Typ (25C) Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) Typ (+25°C) Max © 2006 Microchip Technology Inc. DS39564C-page 301 PIC18FXX2 FIGURE 23-25: MINIMUM AND MAXIMUM VIN vs. VDD (ST INPUT, -40°C TO +125°C) FIGURE 23-26: MINIMUM AND MAXIMUM V IN vs. VDD (TTL INPUT, -40°C TO +125°C) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 V DD (V) V IN (V) V IH Max V IH Min VIL Max VIL Min Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 V DD (V) V IN (V) V TH (Max) VTH (Min) Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) PIC18FXX2 DS39564C-page 302 © 2006 Microchip Technology Inc. FIGURE 23-27: MINIMUM AND MAXIMUM VIN vs. VDD (I 2 C INPUT, -40°C TO +125°C) FIGURE 23-28: A/D NON-LINEARITY vs. V REFH (VDD = VREFH, -40°C TO +125°C) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 V DD (V) V IN (V) V IH Max VIH Min VILMax VIL Min Typical: statistical mean @ 25°C Maximum: mean + 3σ (-40°C to 125°C) Minimum: mean – 3σ (-40°C to 125°C) 0 0.5 1 1.5 2 2.5 3 3.5 4 22.533.544.555.5 V DD and V REFH (V) Differential or Integral Nonlinearity (LSB) -40C 25C 85C 125C -40°C +25°C +85°C +125°C © 2006 Microchip Technology Inc. DS39564C-page 303 PIC18FXX2 FIGURE 23-29: A/D NON-LINEARITY vs. VREFH (VDD = 5V, -40°C TO +125°C) 0 0.5 1 1.5 2 2.5 3 22.533.544.555.5 V REFH (V) Differential or Integral Nonlinearilty (LSB) Max (-40C to 125C) Typ (25C) Typ (+25°C) Max (-40°C to +125°C) PIC18FXX2 DS39564C-page 304 © 2006 Microchip Technology Inc. NOTES: © 2006 Microchip Technology Inc. DS39564C-page 305 PIC18FXX2 24.0 PACKAGING INFORMATION 24.1 Package Marking Information 28-Lead SPDIP XXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXX YYWWNNN Example PIC18F242-I/SP 0610017 28-Lead SOIC XXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXXXX YYWWNNN Example PIC18F242-E/SO 0610017 40-Lead PDIP XXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXX YYWWNNN Example PIC18F442-I/P 0610017 Legend: XX X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 3 e 3 e 3 e PIC18FXX2 DS39564C-page 306 © 2006 Microchip Technology Inc. Package Marking Information (Cont’d) 44-Lead TQFP XXXXXXXXXX XXXXXXXXXX XXXXXXXXXX YYWWNNN Example PIC18F452 -E/PT 0610017 44-Lead PLCC XXXXXXXXXX XXXXXXXXXX XXXXXXXXXX YYWWNNN Example PIC18F442 -I/L 0610017 3 e 3 e © 2006 Microchip Technology Inc. DS39564C-page 307 PIC18FXX2 24.2 Package Details The following sections give the technical details of the packages. 28-Lead Skinny Plastic Dual In-line (SP) – 300 mil Body (PDIP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 1510515105 β Mold Draft Angle Bottom 1510515105 α Mold Draft Angle Top 10.928.898.13.430.350.320 eB Overall Row Spacing § 0.560.480.41.022.019.016BLower Lead Width 1.651.331.02.065.053.040B1Upper Lead Width 0.380.290.20.015.012.008 c Lead Thickness 3.433.303.18.135.130.125LTip to Seating Plane 35.1834.6734.161.3851.3651.345DOverall Length 7.497.246.99.295.285.275E1Molded Package Width 8.267.877.62.325.310.300EShoulder to Shoulder Width 0.38.015A1Base to Seating Plane 3.433.303.18.135.130.125A2Molded Package Thickness 4.063.813.56.160.150.140ATop to Seating Plane 2.54.100 p Pitch 2828 n Number of Pins MAXNOMMINMAXNOMMINDimension Limits MILLIMETERSINCHES * Units 2 1 D n E1 c eB β E α p L A2 B B1 A A1 Notes: JEDEC Equivalent: MO-095 Drawing No. C04-070 * Controlling Parameter Dimension D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. § Significant Characteristic [...]... 100 Parallel Slave Port (PSP) 95, 100 Associated Registers 101 RE0/RD/AN5 Pin 99, 100 RE1/WR/AN6 Pin 99, 100 RE2/CS/AN7 Pin 99, 100 Select (PSPMODE Bit) 95, 100 PIC18F2X2 Pin Functions MCLR/VPP 10 OSC1/CLKI 10 OSC2/CLKO/RA6 10 RA0/AN0 10 RA1/AN1 10 RA2/AN2/VREF- 10 RA3/AN3/VREF+ 10 RA4/T0CKI 10 RA5/AN4/SS/LVDIN... Timer0 103 16-bit Mode Timer Reads and Writes 105 Associated Registers 105 Clock Source Edge Select (T0SE Bit) 105 Clock Source Select (T0CS Bit) 105 Operation 105 Overflow Interrupt 105 Prescaler See Prescaler, Timer0 Timer1 107 16-bit Read/Write Mode 109 Associated Registers 110 Operation 108 Oscillator 107 , 109 Overflow Interrupt... Analog Port Pins 99, 100 Associated Registers 99 LATE Register 97 PORTE Register 97 PSP Mode Select (PSPMODE Bit) 95, 100 RE0/RD/AN5 Pin 99, 100 RE1/WR/AN6 Pin 99, 100 RE2/CS/AN7 Pin 99, 100 TRISE Register 97 Postscaler, WDT Assignment (PSA Bit) 105 Rate Select (T0PS2:T0PS0 Bits) 105 Switching Between Timer0 and WDT 105 Power-down Mode See... 047 041 006 030 MILLIMETERS* NOM MAX 44 0.80 11 1.00 1 .10 1.20 0.95 1.00 1.05 0.05 0 .10 0.15 0.45 0.60 0.75 1.00 REF MIN 0 3.5 7 0 3.5 7 Foot Angle Overall Width E 463 472 482 11.75 12.00 12.25 Overall Length D 463 472 482 11.75 12.00 12.25 Molded Package Width E1 390 394 398 9.90 10. 00 10. 10 Molded Package Length D1 390 394 398 9.90 10. 00 10. 10 c Lead Thickness 004 006 008 0.09 0.15 0.20 Lead Width... Lead Width B 012 015 017 0.30 0.38 0.44 CH 025 035 045 0.64 0.89 1.14 Pin 1 Corner Chamfer α 5 10 15 5 10 15 Mold Draft Angle Top β 5 10 15 5 10 15 Mold Draft Angle Bottom * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions Mold flash or protrusions shall not exceed 010" (0.254mm) per side REF: Reference Dimension, usually without tolerance, for information purposes... Top 5 10 15 15 β Mold Draft Angle Bottom 5 10 15 15 * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions Mold flash or protrusions shall not exceed 010 (0.254mm) per side JEDEC Equivalent: MO-011 Drawing No C04-016 © 2006 Microchip Technology Inc MIN MIN DS39564C-page 309 PIC18FXX2 44-Lead Plastic Thin Quad Flatpack (PT) 10x10x1 mm... NOM 28 1.27 2.36 2.50 2.24 2.31 0 .10 0.20 10. 01 10. 34 7.32 7.49 17.65 17.87 0.25 0.50 0.41 0.84 0 4 0.23 0.28 0.36 0.42 0 12 0 12 MAX Number of Pins Pitch Overall Height A 093 104 2.64 Molded Package Thickness A2 088 094 2.39 Standoff § A1 004 012 0.30 Overall Width E 394 420 10. 67 Molded Package Width 288 299 7.59 E1 Overall Length D 695 712 18.08 Chamfer Distance h 010 029 0.74 Foot Length L 016 050... DIFFERENCES The differences between the devices listed in this data sheet are shown in Table B-1 Original data sheet for the PIC18FXX2 family Revision B (August 2002) This revision includes the DC and AC Characteristics Graphs and Tables The Electrical Specifications in Section 22.0 have been updated and there have been minor corrections to the data sheet text Revision C (October 2006) Packaging diagrams... Descriptions 212 OPTION_REG Register PSA Bit 105 T0CS Bit 105 T0PS2:T0PS0 Bits 105 T0SE Bit 105 Oscillator Configuration 17 EC 17 ECIO 17 HS 17 HS + PLL 17 LP 17 RC 17 RCIO 17 XT 17 Oscillator Selection 195 Oscillator, Timer1 107 , 109 , 115 Oscillator, Timer3 113 Oscillator,... 050 1.27 Corner Chamfer (others) CH2 010 0.25 Overall Width E 695 17.65 Overall Length D 695 17.65 Molded Package Width E1 656 16.66 Molded Package Length D1 656 16.66 Footprint Width 630 16.00 E2 Footprint Length D2 630 16.00 c Lead Thickness 013 0.33 Upper Lead Width B1 032 0.81 B 021 0.53 Lower Lead Width α Mold Draft Angle Top 10 10 β Mold Draft Angle Bottom 10 10 * Controlling Parameter § Significant . Angle Top α 5 10 15 5 10 15 Mold Draft Angle Bottom β 5 10 15 5 10 15 Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed . 010& quot; (0.254mm). 11.75 12.00 12.25 Molded Package Width E1 .390 .394 .398 9.90 10. 00 10. 10 Molded Package Length D1 .390 .394 .398 9.90 10. 00 10. 10 Pins per Side n1 11 11 Lead Thickness c .004 .006 .008 0.09. http://www.microchip.com/packaging CH2 x 45° CH1 x 45 ° 105 0105 0 β Mold Draft Angle Bottom 105 0105 0 α Mold Draft Angle Top 0.530. 510. 33.021.020.013B 0. 810. 740.66.032.029.026B1Upper Lead Width 0.330.270.20.013.011.008 c Lead

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