Chapter 3: Arithmetic for Computers pdf

2009 dce KIẾN TRÚC MÁY TÍNH CS2009 BK TP.HCM Khoa Khoa học và Kỹ thuật Máy tính BM Kỹ thuật Máy tính Võ Tấn Phương http://www.cse.hcmut.edu.vn/ ~ vtphuong/KTMT http://www.cse.hcmut.edu.vn/ vtphuong/KTMT 2009 dce Chapter 3 Arithmetic for Computers Adapted from Computer Organization and Adapted from Computer Organization and Design, 4 th Edition, Patterson & Hennessy, © 2008 ©2009, CE Department 2 10/18/2009 2009 dce The Five classic Components of a Computer ©2009, CE Department 3 10/18/2009 2009 dce Arithmetic for Computers • Operations on integers Addition and subtraction – Addition and subtraction – Multiplication and division Dealing with overflow – Dealing with overflow • Floating-point real numbers – Representation and operations 10/18/2009 Chapter 3 — Arithmetic for Computer — 4©2009, CE Department 2009 dce Integer Addition • Example: 7 + 6 • Overflow if result out of range • Overflow if result out of range – Adding +ve and –ve operands, no overflow – Adding two + ve operands Adding two ve operands • Overflow if result sign is 1 – Adding two –ve operands • Overflow if result sign is 0 10/18/2009 Chapter 3 — Arithmetic for Computer — 5©2009, CE Department 2009 dce Integer Subtraction • Add negation of second operand • Example: 7 – 6 = 7+( – 6) Example: 7 6 7 + ( 6) +7: 0000 0000 … 0000 0111 –6: 1111 1111 … 1111 1010 +1: 0000 0000 … 0000 0001 • Overflow if result out of range – Subtracting two +ve or two – ve operands, no overflow – Subtracting +ve from –ve operand • Overflow if result sign is 0 • Overflow if result sign is 0 – Subtracting –ve from +ve operand • Overflow if result sign is 1 10/18/2009 Chapter 3 — Arithmetic for Computer — 6©2009, CE Department 2009 dce Dealing with Overflow • Some languages (e.g., C) ignore overflow – Use MIPS addu , addui , subu instructions Use MIPS addu , addui , subu instructions • Other languages (e.g., Ada, Fortran) require raising an exception require raising an exception – Use MIPS add, addi, sub instructions – O n o v e rfl o w , inv o k e e x cep ti o n h a n d l er Ooeo, oeecepo ade • Save PC in exception program counter (EPC) register Jtdfidhdldd • J ump t o pre d e fi ne d h an dl er a dd ress • mfc0 (move from coprocessor reg) instruction can retrieve EPC value, to return after corrective action 10/18/2009 Chapter 3 — Arithmetic for Computer — 7©2009, CE Department 2009 dce Arithmetic for Multimedia • Graphics and media processing operates on vectors of 8 - bit and 16 - bit data on vectors of 8 - bit and 16 - bit data – Use 64-bit adder, with partitioned carry chain • Operate on 8 × 8 - bit 4 × 16 - bit or 2 × 32 - bit vectors • Operate on 8 × 8 - bit , 4 × 16 - bit , or 2 × 32 - bit vectors – SIMD (single-instruction, multiple-data) • Saturating operations • Saturating operations – On overflow, result is largest representable value value • c.f. 2s-complement modulo arithmetic E g clipping in audio saturation in video – E . g ., clipping in audio , saturation in video 10/18/2009 Chapter 3 — Arithmetic for Computer — 8©2009, CE Department 2009 dce Multiplication • Start with long-multiplication approach 1000 × 1001 multiplicand multiplier × 1001 1000 0000 0000 1000 1001000 product Length of product is the sum of operand lengths 10/18/2009 Chapter 3 — Arithmetic for Computer — 9©2009, CE Department 2009 dce Multiplication Hardware Initiall y 0 y 10/18/2009 Chapter 3 — Arithmetic for Computer — 10©2009, CE Department [...]... required Chapter 3 — Arithmetic for Computer — 14 dce 2009 Division Hardware Initially divisor in left half Initially dividend 10/18/2009 ©2009, CE Department Chapter 3 — Arithmetic for Computer — 15 dce 2009 Optimized Divider • One cycle per partial remainder subtraction partial-remainder • Looks a lot like a multiplier! – Same hardware can be used for both 10/18/2009 ©2009, CE Department Chapter 3 — Arithmetic. .. Chapter 3 — Arithmetic for Computer — 19 dce 2009 Floating Point Standard • Defined by IEEE Std 754-1985 • Developed in response to divergence of representations – P t bilit i Portability issues f scientific code for i tifi d • Now almost universally adopted • Two representations – Single p g precision ( (32-bit) ) – Double precision (64-bit) 10/18/2009 ©2009, CE Department Chapter 3 — Arithmetic for. ..dce 2009 Optimized Multiplier • Perform steps in parallel: add/shift • One cycle per partial-product addition – That’s ok, if frequency of multiplications is low That s ok 10/18/2009 ©2009, CE Department Chapter 3 — Arithmetic for Computer — 11 dce 2009 Faster Multiplier • Uses multiple adders – Cost/performance tradeoff • Can be pipelined –S Several multiplication performed i parallel l lti li ti f d... Department Chapter 3 — Arithmetic for Computer — 23 dce 2009 Floating-Point Precision • Relative precision – all fraction bits are significant – Single: approx 2–23 • Equivalent to 23 × log102 ≈ 23 × 0 3 ≈ 6 decimal 0.3 digits of precision – Double: approx 2–52 • Equivalent to 52 × log102 ≈ 52 × 0.3 ≈ 16 decimal digits of precision 10/18/2009 ©2009, CE Department Chapter 3 — Arithmetic for Computer... ©2009, CE Department Chapter 3 — Arithmetic for Computer — 25 dce 2009 Floating-Point Example • What number is represented by the singlep ec s o oat precision float 11000000101000…00 –S=1 – Fraction = 01000…002 – Fxponent = 100000012 = 129 po e 000000 9 • x = (–1)1 × (1 + 012) × 2(129 – 127) = (–1) × 1.25 × 22 ( 1) = –5.0 10/18/2009 ©2009, CE Department Chapter 3 — Arithmetic for Computer — 26 dce... ©2009, CE Department Chapter 3 — Arithmetic for Computer — 30 dce 2009 FP Adder Hardware • Much more complex than integer adder • Doing it in one clock cycle would take too long –M hl Much longer th i t than integer operations ti – Slower clock would penalize all instructions • FP adder usually takes several cycles – Can be pipelined 10/18/2009 ©2009, CE Department Chapter 3 — Arithmetic for Computer — 31... 1.110 ) • 5 Determine sign: +ve × –ve ⇒ –ve – –1.1102 × 2–3 = –0.21875 10/18/2009 ©2009, CE Department Chapter 3 — Arithmetic for Computer — 34 dce 2009 FP Arithmetic Hardware • FP multiplier is of similar complexity to FP adde adder – But uses a multiplier for significands instead of an adder • FP arithmetic hardware usually does – Addition, subtraction, multiplication, division, reciprocal, square-root... normal numbers – allow for gradual underflow, with diminishing precision • Denormal with fraction = 000 0 x = ( −1)S × (0 + 0) × 2−Bias = ±0.0 Two representations p of 0.0! 10/18/2009 ©2009, CE Department Chapter 3 — Arithmetic for Computer — 27 dce 2009 Infinities and NaNs • Exponent = 111 1, Fraction = 000 0 – ±Infinity – Can be used in subsequent calculations, avoiding need for overflow check • Exponent... quotient • I t ti Instructions – div rs, rt / divu rs, rt – No overflow or divide-by-0 checking • Software must perform checks if required – Use mfhi, mflo to access result fhi fl 10/18/2009 ©2009, CE Department Chapter 3 — Arithmetic for Computer — 18 dce 2009 Floating Point • Representation for non-integral numbers – Including very small and very large numbers • Like scientific notation – –2.34 × 1056... 10/18/2009 ©2009, CE Department Chapter 3 — Arithmetic for Computer — 32 dce 2009 Floating-Point Multiplication • Consider a 4-digit decimal example – 1.110 × 1010 × 9.200 × 10–5 • 1 Add exponents 1 t – For biased exponents, subtract bias from sum – New exponent = 10 + –5 = 5 • 2 Multiply significands – 1.110 × 9.200 = 10.212 ⇒ 10.212 × 105 • 3 Normalize result & check for over/underflow 3 – 1.0212 × . operand lengths 10/18/2009 Chapter 3 — Arithmetic for Computer — 9©2009, CE Department 2009 dce Multiplication Hardware Initiall y 0 y 10/18/2009 Chapter 3 — Arithmetic for Computer — 10©2009,. remainder 10/18/2009 Chapter 3 — Arithmetic for Computer — 14©2009, CE Department 2009 dce Division Hardware Initially divisor in left half in left half Initially dividend 10/18/2009 Chapter 3 — Arithmetic for. multiplications is low 10/18/2009 Chapter 3 — Arithmetic for Computer — 11©2009, CE Department 2009 dce Faster Multiplier • Uses multiple adders Cost/performance tradeoff – Cost/performance tradeoff •