Model-Based Design for Embedded Systems- P25 docx

Nicolescu/Model-Based Design for Embedded Systems 67842_C020 Finals Page 696 2009-10-2 Nicolescu/Model-Based Design for Embedded Systems 67842_C021 Finals Page 697 2009-10-2 21 Smart Sensors Modeling Using VHDL-AMS for Microinstrument Implementation with a Distributed Architecture Carles Ferrer, Laura Barrachina-Saralegui, and Bibiana Lorente-Alvarez CONTENTS 21.1 Introduction 697 21.2 Architecture 698 21.3 Design Methodology for MEMS Design 700 21.4 Application 702 21.5 Accelerometer 704 21.5.1 Description of the Accelerometer 704 21.5.2 Output Circuitry 706 21.5.3 IBIS Drivers 708 21.5.4 Interface of the Accelerometer 711 21.6 Gyroscope . 711 21.7 Smart Sensor Simulation 714 21.7.1 IBIS Drivers in Sensors 714 21.7.2 Interface of the Gyroscope 715 21.8 Simulation and Validation . 717 21.9 Conclusions 717 Acknowledgments 717 References 718 21.1 Introduction The growing importance of microelectromechanical systems (MEMS) in a wide range of applications, which combine extreme sensitivity, accuracy, and compactness, has evidenced the need to simplify the design process in order to reduce the design time and cost. One of the possible solutions for MEMS design is the extension of the use of an integrated circuit design methodology to obtain a top-down design methodology that is possible thanks to the new available mixed-signal modeling languages, such as VHDL-AMS [1], analog and mixed-signal extension of VHDL language, 697 Nicolescu/Model-Based Design for Embedded Systems 67842_C021 Finals Page 698 2009-10-2 698 Model-Based Design for Embedded Systems which allows developing models that combine not only digital and analog signals, but also thermal, mechanical, and optical signals. The main step in the process of designing for MEMS integration is to combine VHDL models with VHDL-AMS models to obtain a complete description of the multitechnological system. Considering a simplified design flow for mixed-signal models, the first step will be to define initial specifications including environment and technical characteristics. The next step is to define interfaces and partitioning into basic components (including sensors, actuators, analog, and digital circuitry) to design an abstract structure that meets the initial requirements. Each component modeling is realized with the most appropriate language and could be described at different representation levels (behavioral, structural, circuit, device, and physical) [2,3]. The modeling of each component becomes a complex task because of the different languages and abstraction levels required. Finally, after the fabrication and/or assembly of all the components, a test and qualification phase must be carried out in order to guaranty the expected quality levels for the target application. In one approach, the digital elements have been developed by using VHDL, while the nonelectronic (transducers) parts and the analog and mixed-signal circuitry models have been elaborated in VHDL-AMS. The microinstrument that is modeled and to which this methodology is applied is an inertial measurement unit (IMU). An IMU is the main component of inertial guidance systems used in air-, space-, and watercraft. An IMU works by sensing motion including the type, rate, and direction of that motion, and it will be composed of three accelerometers and three gyroscopes with all these transducers based on MEMS technology. Additionally, the necessary processing circuitry and modules for digital communication have to be treated and modeled with the most suitable language depending on the nature of the element. This chapter is structured in the following manner: Section 21.2 presents the distributed architecture; Section 21.3 deals with the design methodology for MEMS; Section 21.4 provides an example of an application case based on an IMU; Sections 21.5 and 21.6 present accelerometer and gyroscope sensor modeling, respectively; Section 21.7 describes the modeling of a complete smart sensor including the sensor and their associated electronic circuitry; Section 21.8 presents simulation and validation results; and Section 21.9 concludes the chapter. 21.2 Architecture The associated electronic circuitry that measures a sensor must be considered, and it adds different and necessary functions, such as correcting offsets, temperature compensations, AD conversions, etc. All these functions Nicolescu/Model-Based Design for Embedded Systems 67842_C021 Finals Page 699 2009-10-2 Smart Sensors Modeling Using VHDL-AMS 699 Signal conditioning ProcessingProcessing Amplification Actuators Sensors Amplification Microcontroller Driver Driver Driver Driver FIGURE 21.1 Distributed architecture. have to be considered from early design phases of a smart sensor. Smart microsystems can not only process the signal coming from the sensor itself, they can also have the communication drivers related to these sensors [4]. All nodes or the set of smart sensors are connected to a host (com- puter or microcontroller) through a sensor bus called interconnection bus for integrated sensors (IBIS). IBIS was designed for a better serial connec- tion between the smart sensors and the main controller. The communications between nodes is established through a designed protocol where each node is classified into master or slave and has its own logic address [5]. This bus is based on a distributed architecture (see Figure 21.1). The main advantage of the distributed architecture is that when it has to be extended because of the increasing number of smart sensors or actuators in a microsys- tem, additional smart sensors or actuators can easily be connected without the need to rearchitect. So, one of the solutions found was to specify a distributed architecture in which a bus sensor was implemented, and this way a specific interconnection was developed [6]. The distributed architecture introduces the advantage of modularity and interchangeability as it enables an easy communication applicable to different sets of microsystems. Its main characteristic is to own two buses. The sensor bus is used for relatively short distances, a few centimeters, and for connecting sensors and actuators on the same subsystem through a dedi- cated microcontroller. The use of miniature sensors in high numbers raises the problem of the size and mass of the interfacing cables and connectors, which are currently much higher than those of the sensors themselves. This increases the necessity to address the problem of whether it is possible to reduce, or even eliminate, the mass and volume of the interfacing devices. An evolution of this second architecture can be seen in Figure 21.2. It is shown how the master is combined with several elements such as Nicolescu/Model-Based Design for Embedded Systems 67842_C021 Finals Page 700 2009-10-2 700 Model-Based Design for Embedded Systems S/A +circuitry Host Application bus S/A +circuitry S/A +circuitry Sensor bus (IBIS) Application level Micro instrument level Several interfaces Processor Memory SoC bus Master SoC level FIGURE 21.2 Enlarging the architecture. memory, processor, and interfaces, forming a system on chip (SoC) that could be implemented with an ASIC or an FPGA, and how they can be integrated in the distributed architecture, combined with a higher lever (application level) and the lower level (sensor level) to built up the instrument. As it is said, IBIS was designed for the better integration of the sensors in a system. We have decided to create a two-wire low rate synchronous mono- master bus. This bus can address up to 31 slaves, using the 32nd address to address all the slaves at the same time, when it is necessary to send a general reset, to do a self-test, or to initialize the sensors and actuators at the same time specially. However, any new necessary command that will affect the entire system could be implemented. The speed of an IBIS is about 1 MHz, and it has a bus-shaped topology. 21.3 Design Methodology for MEMS Design The design of MEMS can often become a task more complex than designing an electronic circuit. This is because MEMS behavior cannot be considered a simple addition of separate mixed (fluidic, optical, thermal, etc.) and electrical behavior, but it is a simultaneous combination. This fact motivates the extension of the existent design methodology for integrated circuits to obtain a top-down design methodology for MEMS design [7]. It is based on a hierarchical design method with both abstract behavioral and functional models in device-analog-digital domain (see Figure 21.3). The development of a design hierarchy allows the designer to mix levels of abstraction to observe and evaluate interactions between interdependent subsystems. Nicolescu/Model-Based Design for Embedded Systems 67842_C021 Finals Page 701 2009-10-2 Smart Sensors Modeling Using VHDL-AMS 701 Sensor/ actuator Analog Design of the system mixed signal verification Test and qualification Behavioral model S/A block design Block specifications Block specifications Functional model functional Macro specifications Spice description transistor level design Gate description gate level design Logic synthesis Functional model RTL level design Function synthesis Behavioral model digital block design Behavioral model analog block design Digital Functional model S/A structural device design Device specifications Fabrication description wafer level design Physical design Physical design Physical design Specifications Defining interfaces Partitioning Detailed design Fabrication or programming Assembly (if necessary) FIGURE 21.3 Top-down design flow for MEMS. Nicolescu/Model-Based Design for Embedded Systems 67842_C021 Finals Page 702 2009-10-2 702 Model-Based Design for Embedded Systems In this design flow, the functionality can be easily verified and analyzed at the top level. The specifications and characteristics of each stage (sensor/ actuator, analog, digital) can be fixed at a lower level, using specific simulators (such as SPICE for analog circuits) to optimize design at the lowest level blocks. This phase is very close to the convectional methods used in MEMS design. The following phases of the design include effects because of the extension of a top-down “digital” methodology: (a) The verification of the whole simulation system can be obtained, although it is not possible to directly synthesize the complete design with VHDL-AMS. (b) Rapid and easy design process from the top-down. We take physical characterization into consideration at the final design to validate abstract models developed in early design stages. (c) Evaluation of the entire system at any design stage. This is of greater importance in the analog and MEMS design, especially considering the multitechnolgical nature of MEMS. In order to obtain the necessary models of the MEMS, there are several possible approaches. Generalized networks can be considered in MEMS modeling because many physical quantities are compared to flow or difference quantities and generalized Kirchhoff’s laws can be applied. To obtain a generalized network, large systems can be interpreted as decompositions into basic network elements. This network concept is valid in many different domains, such as electrical, fluidic, mechanical, etc. Another way to obtain the model is using order reduction. Modeling strategy with the real system can be described using partial differential equations for the entire system; producing reduced system matrices that simplify the simulation effort required comparing with the complexity of the equations that describes the MEMS device functionality. The last way is to obtain behavioral models as black-box models, derived from simulation results in the time or frequency domain. Once the model is developed and included in the complete system, the simulation process must consider a tuning phase through the optimization of parameter settings. The available modeling tools as well as available multidomain libraries are usually incomplete. However, many system simulators can support stan- dardized modeling languages, like VHDL-AMS, and therefore any others in the near future. 21.4 Application The case example presented in this work focuses on the development of a complete behavioral model of an IMU in VHDL-AMS. This IMU com- bines MEMS sensing technology with analog and digital signal processing circuitry, all interconnected in a distributed architecture through the bus IBIS. The system is composed of three accelerometers and three gyroscopes, one for each direction of space, its conditioning signal circuitry, and the Nicolescu/Model-Based Design for Embedded Systems 67842_C021 Finals Page 703 2009-10-2 Smart Sensors Modeling Using VHDL-AMS 703 corresponding interfaces to connect them to the communication bus. The complete system model covers mixed-technology sensors and mixed-signal circuitry, so it has been developed in VHDL-AMS for the analog and mixed- technology modules, and VHDL for the digital ones. All these models have been cosimulated within the same environment following the design methodology design flow described in Figure 21.3. In this approach, a behavioral description of sensor/actuator and analog circuitry has been chosen in combination with a more structural description of the digital circuitry parts. By employing an IMU, it is possible to know the position of an object in motion, so it has many applications in remote control systems and navigation systems. An IMU may have many architectures and designs, with different composing elements, depending on the technology and algorithm employed. In our case, the IMU is composed of three accelerometers and three gyroscopes, each one with its own processing signal circuitry, although it could be designed using a Kalman filter and gyroscopes. Both designs have been corrected from early conception to provide an adequate response for the analog-to-digital converter (ADC). They are basically composed of an amplifier stage and filtering modules to reduce the electrical noise. Finally, to connect each sensor to the communication bus, it has been necessary to develop an interface to synchronize and make the data types compatible. The IMU structure is shown in Figure 21.4. Accelerometer Accelerometer Gyroscope Gyroscope Accelerometer Gyroscope X-axis Y-axis Z-axis Output circuitry Output circuitry Output circuitry Output circuitry Output circuitry Interface Interface Interface Interface Interface Interface IBIS SoC bus Master Communication interfaces Processor Memory Output circuitry FIGURE 21.4 IMU structure. Nicolescu/Model-Based Design for Embedded Systems 67842_C021 Finals Page 704 2009-10-2 704 Model-Based Design for Embedded Systems Different models have been elaborated for each element of the system, trying to develop behavioral and functional models to be employed in large simulations, and structural models that allow descending to lower levels of abstraction. In this way, we obtain a complete description of the system, and it is thus possible to compare the results of both models in order to improve them and use the most suitable model in each simulation. 21.5 Accelerometer The accelerometer that has been assembled as a part of the IMU can be considered a smart sensor, since it contains the necessary additional circuitry to connect it to a main controller digital system. The smart sensor is composed of the acceleration sensor, its output circuitry with an analog-to-digital con- version, and an interface to adapt the system to a digital device. Its internal structure is shown in Figure 21.5. 21.5.1 Description of the Accelerometer The accelerometer is based on the piezoresistive effect, and was built into an SOI (silicon-on-insulator) wafer packaged on an MCM [8]. It is a Wheatstone bridge with four piezoresistances placed on a cantilever design, whose value will depend on the direction of the applied acceleration. We have developed three different representations of this accelerometer, which will be used depending on the level of abstraction and the features that we want to study. The three models are a behavioral model, a physical model, and a mathemat- ical model. • The behavioral model of the accelerometer is a simple model that shows a linear relation between the applied acceleration and the output voltage. The equation used has been obtained based on the experimental measurement. This simple model is useful to test other Accelerometer Output circuitry Amplifier stage CHS S&H + ADC Interface IBIS FIGURE 21.5 Complete system schematic. Nicolescu/Model-Based Design for Embedded Systems 67842_C021 Finals Page 705 2009-10-2 Smart Sensors Modeling Using VHDL-AMS 705 elements of the sensor, and also to perform simulations that involve several accelerometers. These simulations could take much time and resources of the simulator. The model with its simulation can be seen in Figures 21.6 and 21.7. • The physical model of the accelerometer takes care of the piezoresistive effect in the Wheatstone bridge. Given an acceleration, it first calculates all of the stress applied to the resistances because of this acceleration, depending on the direction that each resistance is placed. The relation between the acceleration and the stress is modeled as a linear relation, whose constants can be obtained through experimental measurement. Considering the stress applied to each resistance, the next step is calcu- lating the change in the resistive value. This computation is performed by applying the known constants for the piezoresistive material of silicon for 100 wafers. With this data, the output voltage of the Wheatstone bridge is easily obtained by applying the characteristic equations of the system. entity acc 2_5 v1 is generic ( Default values for the generics are from D ZU-25g Static characteristics Z_in Z_out Offset S_sens Vdd N_lin Hyst Repet C_sens_x:real :real :real :real :real :real :real :real :real = = = = = = = = = 1888e3; 1882e3; 0.00510; 0.00046; 5.0; 037; 0.12; 0.14; 693; [Input impedance] = Ohms [Output impedance] = Ohms [Offset] = V/V [Sensitivity] = V/(V.G) [Voltage supply] = V [Non-linearity] = %PSO [Hysteresis] = %PSO [Repetibility] = %PSO [X axis cross sensitivity] = % FIGURE 21.6 Behavioral model for the accelerometer. [...]... initiative (OSCI), 587–588 Embedded development kit (EDK) designs Linux design constraints, 361–362 device trees, 362–363 partial reconfiguration abstraction, 365 direct memory access interfaces, 366–368 external interfaces, 368 implementation flow, 369–370 interface architecture, 365–366 724 Embedded mixed-signal systems design refinement converter channels, 597–600 E-AMS systems, 587–588 embedded analog/digital... platform-based design, 352 PR processors, 358–360 processor-based systems, 353–355 SRP concept, 360–361 system-in-FPGA (SIF) architecture, 352 Virtex 4 FX 100 device, 372–373, 374 Finite state machine (FSM), 449–450 First-in first-out (FIFO) scheduling policy, 110 Fixed priority scheduling (FPS), 110–111 Flip-flops (FFs), 355 Formal modeling using logic analysis (FORMULA), 445, 447, 449 Formal performance... 80 dynamic design robustness (DDR), 81–82 evaluation and optimization, 80–81 fault tolerance, 79 maintainability and extensibility, 80 reusability and modularity, 80 static design robustness (SDR), 81 scenario-aware analysis compositional methodology, 75–76 echo effect, 74–75 sensitivity analysis performance characterization, 76–77 performance slack, 77–79 ForSyDe model, 298 Fourier transform (FFT)... bandwidth These features can be seen in the results shown in Figure 21.14 For this simulation, the behavioral description of the accelerometer has been used as excitation signal As can be seen in Figure 21.15, the output signal has a linear relation with the input signal, and amplifies it in two orders of magnitude 708 Model-Based Design for Embedded Systems C0 R0_1 4 2 R0 – R0 Out 3 Vin+ V– + 8 C1 V+ 1 Vout1... Results obtained for the band-pass filter 1.0e + 3 160.0 140.0 120.0 100.0 80.0 60.0 40.0 20.0 0.0 –20.0 –40.0 –60.0 –80.0 –100.0 –120.0 –140.0 –160.0 –100.0 Magnitude (dB) Phase (degrees) 2 2 3 4 56 2 1.0e + 6 1.0e + 7 Frequency (Hz) 3 4 56 3 4 56 1.0e + 8 2 3 4 56 1.0 VP (test_bp : v_outn) VP (test_bp : v_outp) VDB (test_bp : v_outp) VDB (test_bp : v_outn) 712 Model-Based Design for Embedded Systems... Its schematic can be seen in Figure 21.19 In order to connect the gyroscope to the IBIS bus, the same interface developed for the accelerometers has been used The only difference between the interfaces is the address of which the sensor begins the acquisition Model-Based Design for Embedded Systems 3.2240 3.2235 3.2230 3.2225 3.2220 3.2215 3.2210 3.2205 3.2200 3.2195 3.2190 3.2185 V (test_shad : ylmea... Yi, Xavier Fitó, and Eleni Kanellou within the IMU modeling The work presented in this chapter was supported by CICYT under ADDRESS project: TEC 2006-04123 and I3P scholarship program 718 Model-Based Design for Embedded Systems References 1 A Vachoux, Analog and Mixed-Signal Hardware Description Languages, Kluwer Academic Publishers, Norwell, MA, July 1997 2 A Dewey, H Dussault, J Hanna, E Christen,... Hosticka, Circuit and System Design for Silicon Microsensors, Fraunhofer Institute of Microelectronic Circuits and Systems, Duisburg, Germany, 1997 4 B Lorente, J Oliver, and C Ferrer, Towards a distributed architecture for MEMS integration, Journal of Sensors & Actuators A: Physical, 115(2–3), 2004, 470–475 5 C Ferrer and B Lorente, Smart sensors development based on a distributed bus for microsystems applications,... Distributed platforms, performance prediction concrete time domain arrival and service functions, 9–10 composition, 12 simple and greedy components, 10–12 extensions, 23–24 modular performance analysis, real-time calculus Index abstract components, 15–16 characteristics, 17 compact representation, 19–22 component model, 14–15 greedy shaper component (GSC), 16 modeling scheduling policies, 18 system performance... modeling scheduling policies, 18 system performance model, 16–17 transfer functions, 15–16 variability characterization curves (VCCs), 13–14 system-level performance analysis analytic techniques, 6 design space exploration cycle, 4–5 distributed embedded platforms, 4 picture-in-picture (PiP) application, 7–9 simulation-based methods, 5–6 Distributed system object component (DSOC), 240–241 Domain-specific modeling . necessary) FIGURE 21.3 Top-down design flow for MEMS. Nicolescu /Model-Based Design for Embedded Systems 67842_C021 Finals Page 702 2009-10-2 702 Model-Based Design for Embedded Systems In this design flow, the. structure. Nicolescu /Model-Based Design for Embedded Systems 67842_C021 Finals Page 704 2009-10-2 704 Model-Based Design for Embedded Systems Different models have been elaborated for each element. % FIGURE 21.6 Behavioral model for the accelerometer. Nicolescu /Model-Based Design for Embedded Systems 67842_C021 Finals Page 706 2009-10-2 706 Model-Based Design for Embedded Systems Y values S

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