projects wireless communication design and simulation direct conversion receiver

Direct conversion reception has several qualities which make it very suitable for integration as well as multi-band, multi-standard operation, but there are severe inherent obstacles tha

HANOI UNIVERSITY OF SCIENCE AND TECHNOLOGY SCHOOL OF ELECTRICAL AND ELECTRONIC

ENGINEERING

PROJECTS

Wireless Communication

TOPICS:

Design and Simulation

Direct Conversion Receiver

Students: Mai Đức Mạnh 20193230

Vũ Trường Giang 20193212 Bùi Minh Đức 20193207 Instructor: Prof Vu Van Yem

Hà Nội, 1/2023

Image Table of contents 3

1 Introduction 4

2 Direct Conversion Receiver Architecture 4

3 DCR Design Consideration 6

2.1 DC Offset 6

2.2 I/Q Imbalance 7

4 Simulation 8

4.1 Design and Verify baseband transmitter 8

4.2 Design a Direct Conversion Receiver 9

4.3 Simulation Result 11

12

CONCLUSION 13

REFERENCES 13

Image Table of contents

Fig 1 DCR Architecture 4

Fig 2 Block diagram of Direct Conversion Recceiver 5

Fig 3 LO leakage 6

Fig 4 Sources of I and Q mismatch 6

Fig 5 Effect of gain mismatch on time-domain waveforms and constellation of a QPSK signal 7

Fig 6 Effect of phase mismatch on time-domain waveforms and constellation of a QPSK signal 7

Fig 7 Baseband Transmitter model 8

Fig 8 Spectrum of transmitted signal and Constellation Diagram 9

Fig 9 System parameters of DCR 9

Fig 10 Components of DCR and specification through each cascaded 10

Fig 11 Structure of Direct Conversion Receiver 10

Fig 12 Structure of IQ Demodulator 11

Fig 13 Transceiver System 11

Fig 14 Spectrum of received signal 12

Fig 15 Compare spectrum of transmitted and received signal 12

1 Introduction

Direct conversion also referred to as homodyne, or zero-IF, is the most natural solution

to receiving information transmitted by a carrier Direct conversion reception has several qualities which make it very suitable for integration as well as multi-band, multi-standard operation, but there are severe inherent obstacles that have for a long time kept it in the shadow

of the Superheterodyne technique

The term "direct conversion receiver" refers to an architecture in which the radio frequency (RF) signal is combined with a Local Oscillator (LO) signal at the radio frequency, resulting in the RF signal being converted directly to the baseband without an IF step Direct conversion receivers have several significant advantages The first major advantage of the direct conversion architecture is that it makes a monolithic implementation easier than other architectures The next important advantage is that it suffers much less from mismatch than the classical image reject architectures Direct conversion is one of the few architectures whose drawbacks can be controlled by means of a simple increase in the number

of the transistor

2 Direct Conversion Receiver Architecture

The direct conversion receiver (DCR) translates the band of interest directly to frequency zero and uses low-pass filter to suppress nearby noises

The quadrature I and Q channels are necessary in typical phase and frequency-modulated signals because the two sidebands of the RF spectrum contain different information and result in irreversible corruption if they overlap each other without being separated into two phases

The down-conversion of an asymmetrically-modulated signal to a zero-IF leads to self-corruption unless the baseband signals are separated by their phases The direct-conversion receiver (DCR) emerges as shown in Fig 1, where .

Three aspects of direct conversion make it a superior choice with respect to

heterodyning First, the absence of an image greatly simplifies the design process Second, channel selection is performed by low-pass filters, which can be realized on-chip as active circuit topologies with relatively sharp cut-off characteristics Third, mixing spurs are considerably reduced in number and hence simpler to handle

Let's have a look at the block diagram of the direct conversion receiver below:

Fig 2 Block diagram of Direct Conversion Recceiver

The RF signal received by the antenna is first passed through a system filter to remove the out-of-band blocking signals and to separate the transmitter from the receiver

Next, the signal is passed through a low-noise amplifier which is responsible for gaining

up the signal in the desired frequency range

The conversion to the baseband is performed by a quadrature mixer

Besides using for channel selection, the low-pass filter performs anti-aliasing and

The purpose of the amplifier is to adapt the signal magnitude to the full-scale requirements of the ADC regardless of the received signal power

The baseband signal is then converted into digital through ADC and finally, the desired signal is reconstructed by the DSP

3 DCR Design Consideration

2.1 DC O昀昀set

The most important drawback of DCR architecture, called “DC offset”, is originated by the self-mixing between the local oscillator and the inputs of the mixer and the LNA " Self-mixing" is the phenomenon where a leakage signal appears at the input of the LNA and the

mixer is mixed with the LO signal, thus producing a dc component

LO Leakage: A direct-conversion receiver emits a fraction of its LO power from its

antenna LO leakage gives rise to a relatively large DC bias in the baseband, thus causing certain design difficulties

Let's see how the DC offset is generated Consider the simplified receiver in Fig 2, where a finite amount of in-band LO leakage, kV LO, appears at the LNA input Along with the desired signal, V RF, this component is amplified and mixed with the LO Called “LO self-mixing,” this effect produces a DC component in the baseband because multiplying a sinusoid

by itself results in a DC term

The problem of offset is exacerbated if self-mixing varies with time, we infer that DCR’s require some means of offset removal or cancellation

AC Coupling and Offset Cancellation are among the technique proposed to overcome the problem in DC Offset

Fig 3 LO leakage

2.2 I/Q Imbalance

For most phase and frequency modulation schemes, a DCR must incorporate quadrature down-conversion This requires shifting either the RF signal or the LO output by 90° resulting

in several noise-power-gain trade-offs

In other cases, the errors in the 90° phase shift and mismatches between the amplitudes

of the I and Q signals corrupt the downconverted signal constellation, thereby raising the bit error rate Note that all sections of the circuit in the and paths contribute gain and phase error I/Q mismatches tend to be larger in direct-conversion receivers than in heterodyne topologies This occurs because the propagation of a higher frequency (fin) through quadrature mixers experiences greater mismatches; the quadrature phases of the LO itself suffer from greater mismatches at higher frequencies

To gain insight into the effect of I/Q imbalance, consider a QPSK signal, , where and a b

are either 1 or -1 Now let us assume that

the and phases of the LO signal are equal to:

) cos(

) cos(

where the factor of 2 is included to simplify the results and and represent the amplitudeθ

and phase mismatches, respectively Multiplying xin(t)by the quadrature LO waveforms and low-pass filtering the results, we obtain the following baseband signals:

) cos sin ) sin cos

Fig 6 Effect of phase mismatch on time-domain waveforms and constellation of a QPSK signal

The problem of mismatch has been a major obstacle in discrete designs, but it tends to decrease with higher levels of integration

4 Simulation

In this section, we simulate a wireless communication system with Transmitter and Receiver using Matlab Simulink

System design specifications:

Data Rate: 250 kbps

OQPSK modulation with half sine pulse shaping

Bit Error Rate (BER) specification = 1e-4

Direct sequence spread spectrum with chip rate = 2 Mchips/s

Analog to digital converter (ADC) with 10 bits and 0 dBm saturation power

4.1 Design and Verify baseband transmitter

To design baseband transmitter, first we need Bernoulli Binary Generator to generate random binary numbers using a Bernoulli distribution with sample time equals 1/data rate The output of Bernoulli Binary Generator also the input of Bit to Integer Converter Block is a

vector [4x1] of bits The Bit to Integer Converter block maps groups of bits in the input vector

to integers in the output vector Acording to system design specification, in OQPSK modulation,

4 bits are represented by one symbol We need a function to convert symbol to chips The

OQPSK Modulator Baseband block modulates the input signal using the offset quadrature

phase shift keying (OQPSK) method and applies pulse shape filtering to the waveform

The power of transmitted signal is -100 dBM, simulation bandwidth is 4MHz.

Fig 8 Spectrum of transmitted signal and Constellation Diagram

4.2 Design a Direct Conversion Receiver

We build a Direct conversion receiver (DCR) using Matlab’s RF Budget Analyzer

App.

The Direct conversion receiver is built from these components with specifications:

frequency (carrier frequency) equals to 2.45 GHz; input power equals to -100 dBm and signal

bandwidth equals to 4 MHz

Fig 9 System parameters of DCR

Fig 10 Components of DCR and specification through each cascaded

The noise, gain, power, output frequency, and SNR are calculated through each cascade using the Friis equation

Having set up the necessary blocks for designing a direct conversion receiver, the detailed structure of a direct conversion receiver is obtained as the image below

Fig 12 Structure of IQ Demodulator

4.3 Simulation Result

After having Baseband Transmitter and Direct Conversion Receiver (DCR), we add an

Analog to Digital Converter (Bipolar ADC) and a Digital Signal Processing (DSP).

Fig 13 Transceiver System

results before starting the system design.

kT = 174 dBm/Hz = thermal noise floor power density

Sensitivity = -100 dBm = receiver sensitivity

SNR = -2.7 dB

ADC Number of bits = Nbits = 10

ADC Saturation power = Psat = 0 dBm (50 Ohm normalization)

Receiver Gain = 53.4 dB

With this model, you can verify that a BER < 1e-4 corresponds to a Chip Error Rate (ChER) around 7%

RF Receiver Specifications:

Noise figure = 10.7 dB

Gain = 53.4 dB

Fig 14 Spectrum of received signal

After doing the project "Design and Simulation of Direct Conversion Receiver",

my group learned a lot of new things and accumulated a lot of important knowledge about receiver architecture in general and the Direct Conversion Receiver in particular.

Although we have tried my best in the process of researching and implementing the topic, but due to many limitations of time and knowledge, the report of my group cannot avoid many shortcomings and many problems have not been fully resolved Therefore, we look forward to receiving your comments and suggestions

to improve and develop the topic further.

Thank you sincerely!

REFERENCES

[ 1]

https://www.mathworks.com/help/simrf/ug/top-down-design-of-an-rf-receiver.html

[2] RF Microelectronics - Behzad Razavi

[3] Internets