Flash Memories Part 1 pot

FLASHMEMORIES  EditedbyIgorS.Stievano              Flash Memories Edited by Igor S. Stievano Published by InTech Janeza Trdine 9, 51000 Rijeka, Croatia Copyright © 2011 InTech All chapters are Open Access articles distributed under the Creative Commons Non Commercial Share Alike Attribution 3.0 license, which permits to copy, distribute, transmit, and adapt the work in any medium, so long as the original work is properly cited. After this work has been published by InTech, authors have the right to republish it, in whole or part, in any publication of which they are the author, and to make other personal use of the work. Any republication, referencing or personal use of the work must explicitly identify the original source. Statements and opinions expressed in the chapters are these of the individual contributors and not necessarily those of the editors or publisher. No responsibility is accepted for the accuracy of information contained in the published articles. The publisher assumes no responsibility for any damage or injury to persons or property arising out of the use of any materials, instructions, methods or ideas contained in the book. Publishing Process Manager Ivana Lorkovic Technical Editor Teodora Smiljanic Cover Designer Jan Hyrat Image Copyright Nadja Antonova, 2010. Used under license from Shutterstock.com First published August, 2011 Printed in Croatia A free online edition of this book is available at www.intechopen.com Additional hard copies can be obtained from orders@intechweb.org Flash Memories, Edited by Igor S. Stievano p. cm. ISBN 978-953-307-272-2 free online editions of InTech Books and Journals can be found at www.intechopen.com   Contents  Preface IX Part 1 Modeling, Algorithms and Programming Techniques 1 Chapter 1 Design Issues and Challenges of File Systems for Flash Memories 3 Stefano Di Carlo, Michele Fabiano, Paolo Prinetto and Maurizio Caramia Chapter 2 Error Control Coding for Flash Memory 31 Haruhiko Kaneko Chapter 3 Error Correction Codes and Signal Processing in Flash Memory 57 Xueqiang Wang, Guiqiang Dong, Liyang Pan and Runde Zhou Chapter 4 Block Cleaning Process in Flash Memory 83 Amir Rizaan Rahiman and Putra Sumari Chapter 5 Behavioral Modeling of Flash Memories 95 Igor S. Stievano, Ivan A. Maio and Flavio G. Canavero Part 2 Applications 111 Chapter 6 Survey of the State-of-the-Art in Flash-based Sensor Nodes 113 Soledad Escolar Díaz, Jesús Carretero Pérez and Javier Fernández Muñoz Chapter 7 Adaptively Reconfigurable Controller for the Flash Memory 137 Ming Liu, Zhonghai Lu, Wolfgang Kuehn and Axel Jantsch Chapter 8 Programming Flash Memory in Freescale S08/S12/CordFire MCUs Family 155 Yihuai Wang and Jin Wu VI Contents Part 3 Technology, Materials and Design Issues 175 Chapter 9 Source and Drain Junction Engineering for Enhanced Non-Volatile Memory Performance 177 Sung-Jin Choi and Yang-Kyu Choi Chapter 10 Non-Volatile Memory Devices Based on Chalcogenide Materials 197 Fei Wang Chapter 11 Radiation Hardness of Flash and Nanoparticle Memories 211 Emanuele Verrelli and Dimitris Tsoukalas Chapter 12 Atomistic Simulations of Flash Memory Materials Based on Chalcogenide Glasses 241 Bin Cai, Binay Prasai and D. A. Drabold   Preface  In recent years, the ICT market has quickly moved toward the integration of a large variety of functionsinto a single portable electronic equipment. The boundaries among different devices like music players, digital cameras or mobile phones are goingtovanish.Inthistrend,oneofthekeyfactorsis playedbydatastorage,sinceall these devices require a large amount of memory to store either audio or visualdata. Also,theenergyconsumptionneedstobereducedtofurtherextend batteryduration andthefunctionalityofthedevices. Inthissetting,Flashmemoriesprovideaneffectivesolution, asthey offer impressive features, including low noise, reliability, low energy consumption, small size and weight, and robustness to mechanical stresses. Flash memories are thus actively contributingtoanewgenerationofdevices.Thetechnologyismatureandthisclassof devicesismassively usedinawiderange of applications.The performances ofFlash memoriesalsocontributetothegrowinginterestinsolid‐statedisks,thatarecurrently replacingtraditionalharddrivesinubiquitousnotebookPCs,netbooksandPCtablets. The research on memories and their applications, therefore, will be of paramount importanceforthedevelopmentoffutureelectronicproducts. This book  is aimed at presenting the state‐of‐the‐art technologies and the research studies related, but not limited, to flash memories. The book consists of fourteen Chapters organized into three Parts, which guide the reader through the different aspectsofthesubject. Part1focusesonthecontributionsrelatedto modeling,algorithmsandprogramming techniques.ThefirstChapterprovidesacomprehensiveoverviewoffilemanagement with specific interest on native flash file systems. The second and third chapters address the important problem of error correction and coding. The fourth Chapter discussesthefeaturesandperformancesofboththeautomaticandthesemi‐automatic blockcleaningprocesses.Finally,thelastChapterprovidesanoverviewofthestate‐of‐ the‐art methods to build behavioral models of Flash memories for signal and power integritysimulations. Part 2 is mainly dedicated to contributions with emphasis on applications. The first Chapter addresses the problem of storage in battery‐powered devices operating in a X Preface distributed wireless sensor network, thus highlighting the importance of flash memory chips in a sensor node. The second Chapter presents the design of a peripheral controller reconfigurable system based on the FPGA Dynamic Partial Reconfiguration technology, which enables more efficient run‐time resource management. The last Chapter focuses on practical examples  of in‐circuit programmingofcommercialflashmemorydevices. Part 3 collects results on the technology, materials and design topics. The first three Chapters deal with alternative improved technologies and innovative materials for enhancingtheperformanceofmemoriesalongwithadetaileddiscussionoffeatures, strengths and limitations of the proposed solutions. The las t Chapter concludes the book by discussingamethod for moleculardynamic simulations.Thissimulation is aimedatassessingthestrengthsof thesenewmaterialsandtheirpossibleapplication tothefuturetechnologyofFlashmemories. Enjoythebook!  IgorSimoneStievano PolitecnicodiTorino Dipartimentodi Elettronica Italy  [...]...  Part 1 Modeling, Algorithms and Programming Techniques 0 1 Design Issues and Challenges of File Systems for Flash Memories Stefano Di Carlo1 , Michele Fabiano1 , Paolo Prinetto1 and Maurizio Caramia2 1 Department of Control and Computer Engineering, Politecnico di Torino Control and Data Handling, Thales Alenia Space Italy 2 Command 1 Introduction The increasing demand... the technology standpoint, two main families of flash memories do exist: (i) NOR flash memories and (ii) NAND flash memories A deep analysis of the technological aspects of NOR and NAND flash memories is out of the scope of this chapter (the reader may refer to 5 3 Design Issues and Challenges of File Systems for Flash Memories File Systems for Flash Memories Design Issues and Challenges of (Ielmini, 2009)... Department, 19 98; Jen-Chieh et al., 2002; Mohammad et al., 2000) Native flash file systems have to address these problems with proper strategies and methodologies in order to efficiently manage the flash memory device Fig 1 shows a possible partial taxonomy of such strategies that will be discussed in the sequel of this section Fig 1 A possible taxonomy of the management strategies for flash memories 2 .1. .. the page size up to 4KB +12 8B and to exploit the MLC technology A block is a set of pages It is the smallest unit when performing erase operations Therefore, a page can be erased only if its corresponding block is totally erased A block typically contains 64 pages, with a trend to increase this number to 12 8 pages per block, or even more Since flash 6 4 Flash Memories Flash Memory memories wear out after... only technology considered in this chapter NAND flash memories can be further classified based on the number of bit per cell the memory is able to store Single Level Cell (SLC) memories store a single bit per cell, while Multiple Level Cell (MLC) memories allow to store multiple bits per memory cell Fig 2 shows a comparison between SLC and MLC NAND flash memories (Lee et al., 2009) considering three main... capacity, performance and endurance                Fig 2 Comparison of SLC and MLC flash memories The MLC technology offers higher capacity compared to the SLC technology at the same cost in terms of area However, MLC memories are slightly slower than SLC memories MLC memories are more complex, cells are closer, there are multiple voltage references and highly-dependable analog... compatibility with minimum intervention on the OS However, traditional file systems do not take into account the specific peculiarities of the flash memories, and the emulation layer alone may be not enough to guarantee maximum performance 4 2 Flash Memories Flash Memory The alternative to the block-device emulation is to exploit the hardware features of the flash device in the development of a native... discusses how to properly address the issues of using NAND flash memories as mass-memory devices from the native file system standpoint We hope that the ideas and the solutions proposed in this chapter will be a valuable starting point for designers of NAND flash-based mass-memory devices 2 Flash memory issues and challenges Although flash memories are a very attractive solution for the development of high-end... short supply Furthermore, the continuous downscaling allowed by new technologies introduces serious issues related to yield, reliability, and endurance of these devices (Cooke, 2007; IEEE Standards Department, 19 98; Jae-Duk et al., 2002; Jen-Chieh et al., 2002; Ielmini, 2009; Mincheol et al., 2009; Mohammad et al., 2000) Several design dimensions, including flash memory technology, architecture, file management,... and/or file system level Consumer electronic products, that continuously demand for increased storage capacity, are nowadays mainly based on MLC NAND flash memories, while mission-critical applications that require high reliability mainly adopt SLC memories (Yuan, 2008) 2.2 Architecture A native flash file system must be deeply coupled with the hardware architecture of the underlying flash memory A NAND . Performance 17 7 Sung-Jin Choi and Yang-Kyu Choi Chapter 10 Non-Volatile Memory Devices Based on Chalcogenide Materials 19 7 Fei Wang Chapter 11 Radiation Hardness of Flash and Nanoparticle Memories. in Flash Memory 83 Amir Rizaan Rahiman and Putra Sumari Chapter 5 Behavioral Modeling of Flash Memories 95 Igor S. Stievano, Ivan A. Maio and Flavio G. Canavero Part 2 Applications 11 1 Chapter. 0 Design Issues and Challenges of File Systems for Flash Memories Stefano Di Carlo 1 , Michele Fabiano 1 , Paolo Prinetto 1 and Maurizio Caramia 2 1 Department of Control and Computer Engineering,