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Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BRITISH STANDARD Harmonized system of quality assessment for electronic components: Basic specification: Scanning electron microscope inspection of semiconductor dice UD C 62 85 83 8: 62 82 49 7 BS CECC 00013:1985 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 00013:1985 Committee responsible for this British Standard The preparation of this British Standard was undertaken by the Electronic Components Standards Committee, upon which the following bodies were represented: Association of Control Manufacturers TACMA (BEAMA) Association of Franchised Distributors of Electronic Components British Industrial Measuring and Control Apparatus Manufacturers’ Association British Standards Society Control and Automation Manufacturers’ Association (BEAMA) Department of Industry Computers Systems and Electronics Department of Trade Electronic Components Industry Federation Electronic Engineering Association Engineering Equipment Users’ Association Ministry of Defence National Supervising Inspectorate Post Office Scientific Instrument Manufacturers’ Association Society of British Aerospace Companies Limited Telecommunication Engineering and Manufacturing Association (TEMA) This British Standard, having been prepared under the direction of the Electronic Components Standards Committee, was published under the authority of the Board of BSI and comes into effect on 30 August 985 © BSI 1 - 999 The following BSI references relate to the work on this standard: Committee reference ECL/Draft for comment 83/261 99 DC ISBN 580 14602 Amendments issued since publication Amd No Date of issue Comments Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 00013:1985 Contents Page C ommittee res p ons ib le National foreword © BS I 1 - 99 Ins ide front cover iii Foreword ii S cop e 1.1 General 1.2 Alternative s tandards D efinitions S E M ins p ection Lot 2 O xide s tep s Multi- level metallisation sys tem Multi- layered- metal C ritical areas Failed dice Requirements E quip ment S canning electron micros cop e D ep os ition of a conductive film S amp le s election Wafer samp le s election from a metallisation run Wafer samp le s election from a p rocured lot D ie samp le selection Non- glass ivated devices Glas sivated devices 3 Multi- level sys tems 3 D ie samp le p rep aration 3 D ep os ition of a conductive film 3 Mounting on s p ecimen holder 3 D ie samp le examination, general requirements 3 General 3 Viewing angle 3 Viewing direction 3 4 Magnification D ie s amp le examination, detail requirements 4 D is crete s emiconductor devices O xide s tep s General metallis ation 4 Integrated circuits O xide s tep s General metallis ation Multi- layered- metal interconnection s ystems S p ecimen after examination Accep tance requirements General S ingle wafer accep tance b as is Lot accep tance b asis Accep t/Rej ect criteria i Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 00013:1985 Page Documentation Photographic Information Distribution of documentation Chart — Sample selection from non- glassivated devices 10 Chart — Sample selection from glassivated devices 11 Chart — Sample selection from glassivated devices 12 Chart — Sample selection from glassivated devices 13 Chart — Sample selection from glassivated devices (procured wafers) 14 Chart — Sample selection for multi- level systems 15 Figure — Viewing angle ii Figure — Wafer sample selection Figure — Dice selection on wafer diameter Figure — Dice selection on wafer segment Table — Examination procedure for sample dice © BSI 1 - 999 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS C E C C 0 : 985 National fore word This British Standard has been prepared under the direction of the Electronic Components Standards Committee It is identical with CENELEC Electronic Components Committee (CECC) 0001 3: 984 “Harmonized system of quality assessment for electronic components: Basic specification: Scanning electron microscope inspection of semiconductor dice ” This standard is a harmonized specification within the CECC system Te rminolo gy and conve ntio ns The text of the CECC specification has been approved as suitable for publication as a British Standard without deviation Some terminology and certain conventions are not identical with those used in British Standards; attention is drawn especially to the following The comma has been used as a decimal marker In British Standards it is current practice to use a full point on the baseline as the decimal marker NO TE The last part (beginning “and copies”) of paragraph of the foreword is not applicable for this British Standard A British Standard does not purport to include all the necessary provisions of a contract Users of British Standards are responsible for their correct application C o mp liance with a British S tandard doe s not o f itse lf confe r immunity fro m le gal ob ligations S ummary o f p age s This document comprises a front cover, an inside front cover, pages i to iv, the CECC title page, page ii, pages to and a back cover This standard has been updated (see copyright date) and may have had amendments incorporated This will be indicated in the amendment table on the inside front cover © BSI 1 - 999 iii iv Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI blank Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 00013:1985 Foreword The CENELEC Electronic Components Committee (CECC) is composed of those member countries of the European Committee for Electrotechnical Standardization (CENELEC) who wish to take part in a harmonized System for electronic components of assessed quality The obj ect of the System is to facilitate international trade by the harmonization of the specifications and quality assessment procedures for electronic components, and by the grant of an internationally recognized Mark, or Certificate, of Conformity The components produced under the System are thereby accepted by all member countries without further testing This specification has been formally approved by the CECC, and has been prepared for those countries taking part in the System who wish to issue national harmonized specifications for SCANNING ELECTRON MICROSCOPE INSPECTION OF SEMICONDUCTOR DICE It should be read in conj unction with the current regulations for the CECC System Preface This basic specification was prepared by the ESA/SCCG It was sponsored administratively by CECC WG who made not contribution to the technical contents The text of this specification was circulated to the CECC for voting in the document indicated below and was approved by the President of the CECC for publication as a CECC Specification Document Date of Voting Report on the Voting CECC(Secretariat) 384 November 983 CECC(Secretariat) 449A ii © BSI 1 - 999 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 0001 3:1 985 Scope 1 General This specification describes the equipment and procedures to be used for the scanning electron microscope (SEM) inspection of discrete semiconductor devices and integrated circuits When SEM inspection is prescribed in a detail specification, it shall be used in conj unction with the relevant Appendix of the appropriate CECC generic specification, wherein the specific accept/rej ect criteria will be prescribed Alternative standards Where the configuration of a particular component is not in accordance with the examples shown in this specification or where current in- house inspection drawings or standards (accepted in the PID) are to be used, it shall be the manufacturer’s responsibility to obtain the formal interpretation from the ONS, or its designated representative, of any deviation Definitions 2.1 SEM inspection lot a SEM inspection lot is defined as a number of wafers of the same type which are selected from the same diffusion, oxidation and metallisation run and from which a defined number of wafers shall be examined with the SEM 2.2 oxide steps oxide steps are defined as any sloped or abrupt change in thickness of silicon oxide, silicon nitride and/or any other insulating layers on a semiconductor or integrated circuit 2.3 multi-level metallisation system a multi- level metallisation system consists of two or more layers of metal or any other conductive material which are separated from each other by an insulating material 2.4 multi-layered-metal multi- layered- metal is defined as two or more layers of metal or any other conductive material used for interconnections that are not isolated from each other by a grown or deposited insulating material 2.5 critical areas critical areas shall be deemed to be those areas where, by virtue of design, an increased possibility of failure is probable Such areas shall be clearly identified by the manufacturer by the provision of an enlarged photograph of the complete die examples of critical areas are: — very small distances between conductors — very narrow conductors — very high and steep oxide steps — very small contact windows 2.6 failed dice failed dice are those which are not acceptable according to the rej ect criteria specified © BSI 1 - 999 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS C E C C 0 : 985 Require ments E quip me nt 3.1 Scanning electron microscope The scanning electron microscope used for this inspection shall meet the following requirements: — Resolution : 25 nm or better — Magnification : X50 to X20 000 — Acceleration voltage : kV to 25 kV — The specimen holder shall be so constructed that the specimen may be examined through a tilt angle ranging from ° to 75 ° (see Figure ) — It shall be possible to rotate the specimen through 360 ° over the full range of tilt angle — The chamber for the specimen shall be so constructed that a specimen measuring at least mm × mm may be examined — The equipment shall be capable of taking photographs 3.1 Conductive film deposition There shall be a facility for the deposition of a conductive film over the sample dice by vapour deposition or sputtering, if required S amp le se le ctio n 3.2.1 Wafer sample selection from a metallisation run Wafer sample selection shall be made after the metallisation process in accordance with Figure The wafers of more than one SEM inspection lot shall be placed in separate sections of the wafer- holder If one SEM inspection lot has less wafers than there are places on the wafer- holder, the wafers shall be placed symmetrically from the outside to the centre of the wafer- holder One wafer from the edge and one nearest the centre of the wafer- holder shall be taken as samples In case of small SEM inspection lots, it is permissible to break wafers and to place the pieces in the designated sections of the wafer- holder provided they are big enough for die selection according to 3.2.3 Up to die selection, the selected wafers shall be handled throughout all processing steps in such a manner that they retain their traceability 3.2.2 Wafer sample selection from a procured lot Selection of wafer samples from a procured lot shall be made as follows: — Lot size smaller than wafers One wafer per metallisation run to be selected at random — Lot size of wafers or more Two wafers per metallisation run to be selected at random 3.2.3 Die sample selection From each wafer selected in accordance with 3.2.1 or 3.2.2, three dice shall be selected (1 ) as in Figure or (2) as in Figure 3.2.3.1 Non- glassivated devices Dice from non- glassivated devices shall be selected and examined in accordance with Chart 3.2.3.2 Glassivated devices For the selection of dice from glassivated devices, there are two possibilities: ) Selection after etching of the metallisation structure, but before glassivation: — If SEM inspection lots consist of 20 or more wafers, the selection and examination shall be in accordance with Chart The wafers from which the dice are selected shall not be used for further processing — If SEM inspection lots consist of less than 20 wafers, the sample dice may be selected and examined in accordance with either Chart or Wafers from which segments are detached for dice selection may be used for further production © BSI 1 - 999 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS C E C C 0 : 985 If, during the glassivation process, the temperatures used are higher than any temperature used during the metallisation process, minus 50 ° C, the unglassivated sample dice shall be exposed, in a suitable atmosphere (nitrogen) , to the temperature/time characteristic of the glassivation process 2) Selection after glassivation: Die samples shall be selected and examined in accordance with Chart and the glassivation shall be etched away without damaging the metallisation of the dice This can be done when etching away the glassivation from the contact pads of the devices For procured wafers (see 3.2.2), sample selection and examination shall be in accordance with Chart Multi-level metallisation systems Each metallisation layer shall be evaluated by detaching a segment (see Figure 4) from the appropriate wafer sample (see Chart 6) The selection of wafer and die samples and die examination shall be in accordance with Chart It is permitted to use the remainder of the wafer sample from which the segment is detached for further processing If, after breaking any segment, the temperatures used for further processing of the wafers are higher than any temperature used during the metallisation process, minus 50 ° C, the segments for each metallisation layer shall be exposed, in a suitable atmosphere (nitrogen), to the temperature/time characteristic of the further processing D ie sample pre paration 3.3.1 Deposition of a conductive film To obtain the required resolution it may be necessary to coat the die samples with a conductive film (for example gold, palladium/gold or carbon) When covering the edges and sides of the die with this film, care shall be taken to ensure good electrical contact between the film and the SEM specimen holder 3.3.2 Mounting on specimen holder The die shall be fitted flat and well- grounded to the specimen holder The mounting shall be done in such a way that contamination is reduced to a minimum If the die is mounted by means of a conductive adhesive or other conductive material, special care shall be taken not to obscure features to be examined D ie samp le e xamination, gene ral re quire ments 3.4.1 General All four edge directions shall be examined on each die for each type of contact window step and for each type of other oxide step (The word “oxide” shall be interpreted as any insulating material used on the semiconductor die, whether SiO x, SiN x, etc) A single window (or other type of oxide step) may be viewed if metallisation covers the entire window (or other type of oxide step) extending up to and over each edge and onto the top of the oxide at each edge Other windows (or other type of oxide step) on the die shall be examined to meet the requirement that all four directional edges of each type of window (or other type of oxide step) shall be examined on each die Viewing for general metallisation defects, such as peeling and voiding shall be such as to provide for the best examination for those defects 3.4.2 Viewing angle Specimens shall be viewed at whatever angle is appropriate to accurately assess the quality of the metallisation Contact windows are normally viewed at an angle of 45 ° to 60 ° Metallisation thickness, adhesion, and etching defects are normally viewed at an angle of 60 ° or greater 3.4.3 Viewing direction Specimens shall be viewed at whatever direction is appropriate to accurately assess the quality of the metallisation This shall include looking at metallisation at the edges of contact windows and other types of oxide steps (see 3.4.1 ) in directions that provide unshadowed views of each edge This may mean that the viewing angle is perpendicular to an edge, or in line with an edge, or at some oblique angle, whichever best resolves any question of defects at the oxide step © BSI 1 - 999 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS C E C C 0 :1 985 3.4.4 Magnification The magnification ranges shall be between X5 000 and X20 000 for examination of oxide steps and between X1 000 and X6 000 for examination for general metallisation defects, such as peeling and voiding When dice are subj ected to reinspection, such reinspection shall be accomplished within the specified magnification range, but at any magnification within that range that is deemed appropriate D ie sample examination, detail re quire me nts 3.5.1 Discrete semiconductor devices 3.5.1 Oxide steps Inspect the metallisation at all types of oxide steps In the case of rf and/or power transistors with interdigitated or mesh structures, as a minimum, each base- emitter stripe pair on each end of each pattern and every fourth base- emitter stripe pair within each pattern shall be inspected Particular attention shall be directed to lateral etching defects and undercut etching at base and emitter oxide steps Documentation shall be as specified in Section 3.5.1 General metallisation Inspect all general metallisation on each die for defects such as peeling and voiding Document in accordance with Section 3.5.2 Integrated circuits 3.5.2.1 Oxide steps Inspect the metallisation at all types of oxide steps Document in accordance with Section 3.5.2.2 General metallisation Inspect at least 25 percent of the general metallisation on each die for defects, such as peeling or voiding Document in accordance with Section 3.5.3 Multi-layered-metal interconnection systems Multi- Layered- Metal is defined as two or more layers of metal or any other material used for interconnections that are not isolated from each other by a grown or deposited insulating material The term “underlying layer” shall refer to any layer below the top layer of metal Each layer of metal shall be examined The principal current- carrying layer shall be examined with the SEM; the other layers (e g barrier or adhesion) may be examined using either the SEM or an optical microscope, at the manufacturer’s option The glassivation (if any) and each successive layer of metal shall be stripped by selective etching with suitable reagents, layer by layer, to enable the examination of each layer Normally each successive layer of metal will be stripped in sequence to expose the next underlying layer for examination It may be impractical to remove the different layers on a single die, layer by layer In this case, an additional die (dice) immediately adj acent on the slice to the original die shall be stripped to meet the requirement that all layers shall be exposed and examined Specimen examination shall be in accordance with 3.5.1 or 3.5.2 whichever is applicable Spe cime n afte r e xamination No SEM- inspected specimen shall be used for further processing The specimens of each accepted SEM inspection lot shall be stored at the manufacturer’s plant for a period of, at least, 24 months They shall be delivered to the orderer upon request Acce ptance re quireme nts 3.7.1 General Rej ection of dice shall be based upon lot process oriented defects Rej ection shall not be based upon workmanship and other type defects such as scratches, smeared metallisation, tooling marks, etc In the event that the presence of such defects obscures the detailed features being examined, an additional die shall be examined which is immediately adj acent to the die with the obscured metallisation 3.7.2 Single wafer acceptance basis The metallisation on a single wafer shall be j udged acceptable only if all sample dice from that wafer are acceptable © BSI 1 - 999 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS C E C C 0 : 985 3.7.3 Lot acceptance basis An entire lot s hall b e j udged accep tab le only when all s amp le dice from all s amp le wafers are accep tab le If a lot is rej ected p er this clause each wafer from that lot may b e individually examined; accep tance shall then b e in accordance with Acce p t/Re j e ct crite ria Further detailed examination/ins p ection requirements and the accep t/rej ect criteria shall b e as s p ecified in the relevant Ap p endix of the ap p rop riate C E C C s p ecification D ocume ntation Pho tograp hic After examination of the dice from each wafer, a minimum of three S E M p hotograp hs , p er S E M lot s hall b e taken and retained The p hotograp hs s hall b e one each of the “wors t case” oxide step , metallis ation and contact window S us p ect features s hall b e examined and documented p hotograp hically at magnifications which enab le a clear decis ion to b e made as to their accep tab ility or rej ection Photograp hs for documentation p urp os es s hall meas ure, as a minimum, cm × cm and the ob j ect dep icted shall fill this format, as far as is p os sib le The following magnifications only shall b e us ed for documentation: X2 , X5 , X1 00 , X2 0, X5 0, X1 0 0, X2 000 , X5 00, X1 00 and X2 00 Info rmation The following information s hall b e traceab le to each p hotograp h: — Manufacturer’s Name and Address — Name and location of tes t house or lab oratory — S E M op erator/ins p ector’s identification — D ate of S E M ins p ection and p hotograp h — C omp onent p art, typ e or reference numb er — S E M insp ection lot numb er or code — Area forming s ub j ect of p hotograp h — Magnification — Accelerating voltage — Viewing angle D istrib ution of d ocume ntation The negatives of the p hotograp hs are not required as p art of the documentation b ut s hall b e retained b y the manufacturer The manufacturer s hall sub mit one s et of the required documentation to the orderer and retain one set for his own records for three years © BS I 1 - 99 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI Are a o f e xami natio n X1 000 to X6 000 X5 000 to X20 000 X1 000 to X6 000 X5 000 to X20 000 Two of the worst case oxide steps Worst case general metallisation Two of the worst case oxide steps Worst case general metallisation Pho to grap hic d o cume ntatio n Mi n to Max magnifi cati o n collectors, drains, sources, diffused resistors, diffused cross-unders, multi-level interconnection system contact windows, etc) and other types of oxide steps (diffusion cuts for emitters, bases, collectors; field oxide steps; multi-level interconnection system oxide steps, etc) a Scanning examination shall include all four directional edges of oxide steps (documentation need only show the worst case) Oxide steps include contact windows (emitters, bases, Integrated circuits E xami natio n Oxide stepsa (Contact windows At least one of each type of and other types of oxide steps) oxide step present General metallisation 25 % Oxide stepa (Contact windows All Discrete semiconductor and other types of oxide steps) General metallisation All D e vi ce typ e Tab le — E xamination p roce dure fo r samp le dice BS C E C C 0 :1 98 © BSI 11-1999 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 00013:1985 Figure — Viewing angle Configuration of metallisation system The wafer- holder is a p lanet in a rotating p lanetary s ystem D ep osition s ource is b elow the wafer- holder Wafer sample selection plan For each S E M- ins p ection lot, one wafer from the p erip hery and one wafer from neares t the centre of the wafer- holder s hall b e s elected as s p ecimens © BS I 1 - 99 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 00013:1985 Figure — Wafer sample selection The wafers marked X shall be selected as specimens Figure — Dice selection on wafer diameter The three dice specimens shall be situated on a wafer diameter (example shown) The dice marked X shall be those examined © BSI 1 - 999 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 00013:1985 Figure — Dice selection on wafer segment The three dice specimens shall be situated on a segment of the wafer It is permitted to detach the segment on any chord; but the dimensions for the segment shall be as shown The dice marked X shall be those examined Die sample selection charts In the Charts which follow (1 –6) the legend used and abbreviations are as under: Route for total SEM inspection lot Route for sample wafer, wafer segment or remainder of wafer Route for sample dice A Dice acceptable at SEM inspection R Dice rej ected at SEM inspection “resulting in” © BSI 1 - 999 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 0001 3:1 985 Chart — Sample selection from non-glassivated devices 10 © BSI 1 - 999 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 00013:1985 Chart — Sample selection from glassivated devices © BSI 1 - 999 11 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 00013:1985 Chart — Sample selection from glassivated devices 12 © BSI 1 - 999 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 00013:1985 Chart — Sample selection from glassivated devices © BSI 1 - 999 13 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 0001 3:1 985 Chart — Sample selection from glassivated devices (procured wafers) 14 © BSI 1 - 999 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 0001 3:1 985 C hart — Sample selection for multi-level systems © BSI 1 - 999 15 Li cen sed Copy: Lon d on Sou th Ban k U n i versi ty, Lon d on Sou th Ban k U n i versi ty, Fri Dec 08 7: 00: 48 G M T+00: 00 2006, U n trol l ed Copy, (c) BSI BS CECC 00013:1985 BSI — British Standards Institution BS I is the indep endent national b ody res p ons ib le for p rep aring Britis h S tandards It p res ents the UK view on s tandards in E urop e and at the international level It is incorp orated b y Royal C harter Revisions Britis h S tandards are up dated b y amendment or revis ion Us ers of Britis h S tandards should make s ure that they p oss es s the latest amendments or editions It is the constant aim of BS I to imp rove the quality of our p roducts and services We would b e grateful if anyone finding an inaccuracy or amb iguity while us ing this Britis h S tandard would inform the S ecretary of the technical committee res p ons ib le, the identity of which can b e found on the inside front cover Tel: 02 89 96 90 00 Fax: 02 89 96 40 BS I offers memb ers an individual up dating s ervice called PLUS which ens ures that s ub s crib ers automatically receive the lates t editions of s tandards Buying standards O rders for all BS I, international and foreign s tandards p ub lications s hould b e addres s ed to C us tomer S ervices Tel: 899 00 Fax: 899 7001 In res p ons e to orders for international standards , it is BS I p olicy to sup p ly the BS I imp lementation of thos e that have b een p ub lis hed as Britis h S tandards, unless otherwis e requested Information on standards BS I p rovides a wide range of information on national, E urop ean and international standards through its Lib rary and its Technical H elp to E xp orters S ervice Various BS I electronic information s ervices are also availab le which give details on all its p roducts and s ervices C ontact the Information C entre Tel: 02 89 96 71 1 Fax: 02 89 96 048 S ub s crib ing memb ers of BS I are kep t up to date with s tandards develop ments and receive sub s tantial discounts on the p urchase p rice of s tandards For details of thes e and other b enefits contact Memb ership Adminis tration Tel: 02 89 96 70 02 Fax: 02 89 96 00 Copyright C op yright s ub s is ts in all BS I p ub lications BS I als o holds the cop yright, in the UK, of the p ub lications of the international s tandardization b odies E xcep t as p ermitted under the C op yright, D es igns and Patents Act 988 no extract may b e rep roduced, s tored in a retrieval s ystem or transmitted in any form or b y any means – electronic, p hotocop ying, recording or otherwis e – without p rior written p ermis s ion from BS I This does not p reclude the free us e, in the cours e of imp lementing the standard, of necess ary details such as s ymb ols, and size, typ e or grade designations If thes e details are to b e used for any other p urp os e than imp lementation then the p rior written p ermiss ion of BS I must b e ob tained If p ermis sion is granted, the terms may include royalty p ayments or a licensing agreement D etails and advice can b e ob tained from the C op yright Manager BS I 89 C his wick H igh Road London W4 4AL Tel: 02 89 96 70

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