INTERNATIONAL STANDARD ISO 17987-7 First edition 2016-12-01 Road vehicles — Local Interconnect Network (LIN) — Part 7: Electrical Physical Layer (EPL) conformance test speci fication Véhicules routiers — Réseau Internet local (LIN) — Partie 7: Spécification d’essai de formité de la couche électrique physique (EPL) Reference number ISO 17987-7:2016(E) I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n © ISO 2016 ISO 17987-7:2016(E) COPYRIGHT PROTECTED DOCUMENT © ISO 2016, Published in Switzerland All rights reserved Unless otherwise specified, no part o f this publication may be reproduced or utilized otherwise in any form or by any means, electronic or mechanical, including photocopying, or posting on the internet or an intranet, without prior written permission Permission can be requested from either ISO at the address below or ISO’s member body in the country o f the requester ISO copyright o ffice Ch de Blandonnet • CP 401 CH-1214 Vernier, Geneva, Switzerland Tel +41 22 749 01 11 Fax +41 22 749 09 47 copyright@iso.org www.iso.org ii I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n ISO 17987-7:2016(E) Contents Page Foreword v Introduction vi Scope Normative references Terms, de finitions, symbols and abbreviated terms 3.3 Abbreviated terms 4 Conventions 5 EPL 12 V LIN devices with RX and TX access 5.1.1 Test case organization 5.1.2 Measurement and signal generation requirements 5.2 Operational conditions — Calibration 5.2.1 Electrical input/output, LIN protocol 5.2.2 [EPL–CT 1] Operating voltage range 5.2.3 Threshold voltages 5.2.4 [EPL–CT 5] Variation of VSUP_NON_OP 12 5.2.5 I BUS under several conditions 13 5.2.6 Slope control 16 19 21 ff 5.2.9 Failure 28 Terms and definitio ns Symb o ls Tes t s p ecificatio n overview Pro p agatio n delay S up p ly vo ltage o [E PL–C T 2 ] Veri fying internal cap acitance and dynamic inter ference — s et 5.4 IUT as slave 30 Operation mode termination 32 5.3.1 General 32 5.3.2 [EPL–CT 23] Measuring internal resistor — IUT as slave 33 5.3.3 [EPL–CT 24] Measuring internal resistor — IUT as master 34 Static test cases 34 6.1 Tes t s p ecificatio n overview 5.3 EPL 12 V LIN devices without RX and TX access 38 38 6.2 Communication scheme 38 6.2.1 General 38 6.2.2 IUT as slave 38 6.2.3 IUT as master 39 6.2.4 IUT class C device 40 6.3 Test case organization 42 6.4 Measurement and signal generation — Requirements 43 6.4.1 Data generation 43 6.4.2 Various requirements 45 6.5 Operational conditions — Calibration 45 6.5.1 Electrical input/output, LIN protocol 45 6.5.2 [EPL–CT 25] Operating voltage range 45 6.5.3 Threshold voltages 47 6.5.4 [EPL–CT 29] Variation of VSUP_NON_OP 51 6.5.5 I BUS under several conditions 52 6.5.6 Slope control 55 59 ff 65 6.5.9 Failure 74 ∈ [–0 , V to , V] , [1 V to 40 V] 6.5 [E PL–C T ] Pro p agatio n delay 6.5 S up p ly vo ltage o © ISO 2016 – All rights reserved I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n s et iii ISO 17987-7:2016(E) 6.5 [E PL–C T 48 ] Veri fying internal cap acitance and dynamic inter ference — I UT as slave 6.6 6.7 O peration mode termination 6.6.1 General 6.6.2 [EPL–C T 49 ] M easuring internal resistor — I UT as slave 6.6.3 [EPL–C T ] M easuring internal resistor — I UT as master Static test cases EPL 24 V LIN devices with RX and TX access 7.1 82 Tes t s p ecificatio n overview 1 Test case organization M easurement and signal generation — Requirements O perational conditions — C alibration Electrical inp ut/outp ut, LI N protocol 2 [EPL–C T ] O perating voltage range Threshold voltages [EPL–C T 5 ] Variation of VSUP_N O N _O P I B US under several conditions Slop e control 7.2 Pro p agatio n delay 7.2 S up p ly vo ltage o ffs et 9 Failure 1 7.2 [E PL–C T ] Veri fying internal cap acitance and dynamic inter ference — 90 I UT as slave 1 7 O peration mode termination 1 General 1 [EPL–C T ] M easuring internal resistor — I UT as slave 1 7 3 [EPL–C T ] M easuring internal resistor — I UT as master 1 Static test cases 1 EPL 24 V LIN devices without RX and TX access 121 8.1 Tes t s p ecificatio n overview C ommunication scheme O verview 2 I UT as slave 2 I UT as master 2 I UT Class C device Test case organization M easurement and signal generation — Requirements 8 4.1 D ata generation 4.2 Various requirements O perational conditions — C alibration 8 Electrical inp ut/outp ut, LI N protocol 8 [EPL–C T ] O perating voltage range 8 Threshold voltages [EPL–C T ] Variation of VSUP_N O N _O P ∈ [–0 , V to , V] , [1 V to V] 5 I B US under several conditions Slop e control 41 8.5 [E PL–C T ] Pro p agatio n delay 46 8.5 S up p ly vo ltage o ffs et Failure 64 8.5 [E PL–C T ] Veri fying internal cap acitance and dynamic inter ference — I UT as slave 66 8 O peration mode termination 67 6.1 General 67 6.2 [EPL–C T ] M easuring internal resistor — I UT as slave 68 6.3 [EPL–C T ] M easuring internal resistor — I UT as master 68 Static test cases 69 Bibliography 172 iv I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n ISO 17987-7:2016(E) Foreword ISO (the International Organization for Standardization) is a worldwide federation of national standards bodies (ISO member bodies) The work o f preparing International Standards is normally carried out through ISO technical committees Each member body interested in a subject for which a technical committee has been established has the right to be represented on that committee International organizations, governmental and non-governmental, in liaison with ISO, also take part in the work ISO collaborates closely with the International Electrotechnical Commission (IEC) on all matters o f electrotechnical standardization The procedures used to develop this document and those intended for its further maintenance are described in the ISO/IEC Directives, Part In particular the different approval criteria needed for the di fferent types o f ISO documents should be noted This document was dra fted in accordance with the editorial rules of the ISO/IEC Directives, Part (see www.iso.org/directives) Attention is drawn to the possibility that some o f the elements o f this document may be the subject o f patent rights ISO shall not be held responsible for identi fying any or all such patent rights Details o f any patent rights identified during the development o f the document will be in the Introduction and/or on the ISO list of patent declarations received (see www.iso.org/patents) Any trade name used in this document is in formation given for the convenience o f users and does not constitute an endorsement For an explanation on the meaning o f ISO specific terms and expressions related to formity assessment, as well as information about ISO’s adherence to the World Trade Organization (WTO) principles in the Technical Barriers to Trade (TBT) see the following URL: www.iso.org/iso/foreword.html The committee responsible for this document is ISO/TC 22, Road vehicles, Subcommittee SC 31, Electrical and electronic equipment A list of all parts in the ISO 17987 series can be found on the ISO website © ISO 2016 – All rights reserved I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n v ISO 17987-7:2016(E) Introduction The LIN protocol as proposed is an automotive focused low-speed universal asynchronous receiver transmitter (UART)-based network Some o f the key characteristics o f the Local Interconnect Network (LI N ) proto col are s ignal-b ased communication, schedu le table-b as ed frame trans fer, mas ter/slave communication with error detection, node configuration and diagnostic service transportation T he LI N protocol is for low- cos t automotive control appl ications , for example, or mo du le and air condition systems It serves as a communication in frastructure for low-speed control applications in vehicles by providing — s ignal-b ased communication to exchange in formation b etween applications in different no des , — bitrate s upp or t from kbit/s to kbit/s , — determinis tic schedule table-b ased frame communication, — network management that wakes up and puts the LI N clus ter into sleep mo de in a control led manner, — s tatus management that provides error handl ing and error s ignal ling, — transport layer that allows large amount o f data to be transported (such as diagnostic services), — specification o f how to handle diagnostic services, — electrical physical layer specifications, — no de descrip tion language describing prop er ties of slave no des , — network description file describing behaviour o f communication, and — application programmer ’s interface ISO 17987 (all parts) is based on the open systems interconnection (OSI) basic re ference model as specified in ISO/IEC 7498–1 which structures communication systems into seven layers The OSI model structures data communication into seven layers called (top down) application layer (layer 7), presentation layer, session layer, transport layer, network layer, data link layer and physical layer (layer 1) A subset o f these layers is used in ISO 17987 (all parts) ISO 17987 (all parts) distinguishes between the services provided by a layer to the layer above it and the protocol used by the layer to send a message between the peer entities o f that layer The reason for this distinction is to make the services, especially the application layer services and the transport layer services, reusable also for other types o f networks than LIN In this way, the protocol is hidden from the service user and it is possible to change the protocol i f special system requirements demand it I SO 179 87 (al l p ar ts) provides al l cuments and references required to s upp or t the implementation of the requirements related to the fol lowing: — I SO 179 87–1 : T his p ar t provides an over view of the I SO 179 87 (al l p ar ts) and s truc ture along with the use case definitions and a common set o f resources (definitions, re ferences) for use by all s ub sequent p ar ts — ISO 17987–2: This part specifies the requirements related to the transport protocol and the network layer requirements to transport the PDU o f a message between LIN nodes — ISO 17987–3: This part specifies the requirements for implementations o f the LIN protocol on the logical level o f abstraction Hardware related properties are hidden in the defined constraints — ISO 17987–4: This part specifies the requirements for implementations o f active hardware components which are necessary to interconnect the protocol implementation vi I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n ISO 7987-7: 01 6(E) — ISO/TR 17987–5: This part specifies the LIN application programmers inter face (API) and the node configuration and identification services The node configuration and identification services are specified in the API and define how a slave node is configured and how a slave node uses the identification service — ISO 17987–6: This part specifies tests to check the formance o f the LIN protocol implementation according to ISO 17987–2 and ISO 17987–3 This comprises tests for the data link layer, the network layer and the transport layer — ISO 17987–7: This part specifies tests to check the formance o f the LIN electrical physical layer implementation (logical level of abstraction) according to ISO 17987–4 © ISO 2016 – All rights reserved I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n vii I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n INTERNATIONAL STANDARD ISO 17987-7:2016(E) Road vehicles — Local Interconnect Network (LIN) — Part 7: Electrical Physical Layer (EPL) conformance test speci fication Scope This document specifies the formance test for the electrical physical layer (EPL) o f the LIN communications system It is part o f this document to define a test that considers ISO 9646 and ISO 17987–4 The purpose o f this document is to provide a standardized way to veri fy whether a LIN bus driver is compliant to ISO 17987–4 The primary motivation is to ensure a level o f interoperability o f LIN bus drivers from di fferent sources in a system environment This document provides all the necessary technical in formation to ensure that test results are consistent even on di fferent test systems, provided that the particular test suite and the test system are compliant to the content of this document Normative references The following documents are re ferred to in text in such a way that some or all o f their content constitutes requirements o f this document For dated re ferences, only the edition cited applies For undated re ferences, the latest edition o f the re ferenced document (including any amendments) applies ISO 17987–4:2016, Road vehicles — Local Interconnect Network (LIN) — Part 4: Electrical Physical Layer (EPL) specification 12V/24V Terms, de finitions, symbols and abbreviated terms 3.1 Terms and de finitions For the purposes o f this document, the terms and definitions in ISO 17987–4 and ISO 17987–6 apply ISO and IEC maintain terminological databases for use in standardization at the following addresses: • IEC Electropedia: available at http://www.electropedia.org/ • ISO Online browsing platform: available at http://www.iso.org/obp NOTE This also includes the device classification o f ISO 17987–6:2016, 5.6 into class A/B/C for the di fferent ECU and transceiver types 3.2 Symbols % µs C1/2 Percentage Microsecond capacitance © ISO 2016 – All rights reserved I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n ISO 7987-7: 01 6(E) CCOM MON cap acitance in the communication l ine C `LI NE l ine cap acitance C B US total bus cap acitance C M AS T E R cap acitance of mas ter no de C RE F reference cap acitance C R XD R XD cap acitance (LI N receiver, R XD cap acitive lo ad condition) C S L AVE cap acitance of slave no de ∈ mathematic a l s ymb ol: replacement d V/dt second derivative of Voltage ( Volt p er second ) di/dt ins tantaneous rate of current change (amp s p er second) D1/2 diode D s er_i nt serial internal dio de at tran sceiver IC D s er_m as ter serial mas ter dio de FTS te s t s ys tem bit rate I B US current into the E C U bus line I B US _L I M current l im itation for driver dominant s tate driver on V B US = V B AT_m a x into EC U bus line I B US _N O _B AT current at E C U bus line when V B AT is disconnec ted I B US _N O _GN D current at E C U bus line when VGN D _E C U is disconnec ted I B US _PAS _dom current at E C U bus line when driver off (p as s ive) at dominant LI N-bus-level for “i s an element o f” (1 V LI N devices: V B US = V and V B AT = V; V LI N devices: V B US = V and V B AT = V ) I B US _PAS _re c current at E C U bus line when driver off (p as s ive) at reces s ive LI N-bus-level (1 V LI N devices: V < V B AT < 18 V; V < V B US < 18 V; V B US ≥ V B AT; V LI N devices: 16 V < V B AT < V; 16 V < V B US < V; V B US ≥ V B AT ) GN D D evice GN D of E C U kΩ ki lo ohm kbit/s ki lo bit p er second LE N B US total length of bus line LI N B u s LI N network ms mi l l isecond nF nano farad pF pico farad pF/m pico farad p er meter (l ine cap acitance) I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n ISO 17987-7:2016(E) Table 186 — Test system: GND shift is applied to the test system IUT node as C las s C device as ma s ter [E PL– C T 101] , [E PL– C T 101] , [E PL– C T 101] , [E PL– C T 101] C las s C device as slave Initial state Operational conditions: V B AT T E RY S e e Table V B S _D G V V D _D G ,4 V [p ar t of V RE C _D G / V P u l l-up ] (us e V i f D Rev_B att is implemented) VGN D _D G [0 , × s i n(2 × π × × t) + , ] × ,1 × V B AT T E RY [ p ar t of V RE C _D G / V P u l l- up ] V RE C _D G / V P u l l- up ,74 × ( V B AT T E RY – V D _D G – V B S _D G – VGN D _D G ) ; s ee Figu re V D O M _D G , × ( V B AT T E RY – V D _D G – V B S _D G – VGN D _D G ) , [p a r t of V RE C _D G / V P u l l- up ] ; s ee Figure Te s t s ys tem s lew rate Test steps 18 × , VREC_DG t BIT V B S _I U T ,1 × V B AT T E RY [ p ar t of V I U T ] V D _I U T S e e Table [p ar t of V I U T ] (us e V i f D Re v_B att i s i mplemented) VI U T V B AT T E RY – V B S _I U T – V D _I U T – VGN D _I U T; s ee Figure VGN D _I U T V [ p ar t of V I U T ] ; s e e Figure For m a s ter I U Ts a nd s l ave I U Ts witho ut m a ki ng u s e o f s ynch ron i z atio n , a L I N co m mu n ic ation i s e s tab l i s he d b e twe en the te s t s ys tem a nd the I U T T he h ighe s t b it rate s upp o r te d b y the I U T ( but a m a xi mum of 10 ,417 kbit/s) i s us ed T he I U T bit rate F I U T i s me a s u re d (m a s ter b it rate i n s ynch field , b e twe en b it a nd b it 7; s l ave bit rate i n d ata b y te , b e twe en fa l l i n g fa l l i n g e dge o f s ta r t e dge o f s ta r t b it a nd bit 7, p o s s ib le for va lues to F ) For s l ave I U Ts with m a ki n g u s e o f s ynch ro n i z ation , F I U T i s s e t to the nom i na l bit rate (i e 19, kbit/s) T he te s t s ys tem b it rate i s adj u s te d to F T S a s de fi ne d i n Table F TO L i s % for ma s ter I U Ts a nd s l ave I U Ts without m a ki n g u s e o f s ynch ro n i z ation , a nd , % u s e o f s ynch ron i z atio n Response Reference co n s e c utive I U T co m mu n ic atio n c ycle s s h a l l b e s ucce s s fu l I S O 179 7– 4: 016 , Tab le , Param 67, Para m I S O 179 7– 4: 016 , Figure 160 I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n fo r s lave I U Ts with m a ki ng ISO 17987-7:2016(E) Table 187 defi ne s the te s t c a s e s o f “GN D sh i ft i s appl ie d to the te s t s ys tem” Table 187 — Test cases of: GND shift is applied to the test system [EPL–CT 101].1 F TS F IUT × (1 – F TOL) [EPL–CT 101].2 F IUT × (1 + F TOL) [EPL–CT 101].3 F IUT × (1 – F TOL) [EPL–CT 101].4 F IUT × (1 + F TOL) EPL–CT–TC 8.5.8.9 VBATTERY IUT node as Class C device as master Class C device as slave Class C device as master Class C device as slave Class C device as master Class C device as slave Class C device as master Class C device as slave 9,2 V 41,4 V VD_IUT RBUS kΩ kΩ kΩ 1V kΩ kΩ kΩ kΩ kΩ [EPL–CT 102] IUT VBAT shift test for BR_Range_10K 24 V LIN networks — Dynamic — at 10,417 kbit/s Table 188 defi ne s the te s t s ys tem o f “V BAT s h i ft i s appl ie d the I U T ” Table 188 — Test system: IUT node as Initial state Class C device as master Class C device as slave Operational conditions: VBATTERY VBS_DG VD_DG VGND_DG VREC_DG/VPull-up VDOM_DG Te s t s ys tem s le w rate VBS_IUT VD_IUT VIUT VGND_IUT © ISO 2016 – All rights reserved I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n VBAT shift is applied the IUT [EPL–CT 102].1, [EPL–CT 102].2, [EPL–CT 102].3, [EPL–CT 102].4 See Table 189 BATTERY (5 Hz sinus signal with offset) [part of VREC_DG/VPull-up] V [part of VREC_DG/VPull-up] (use V if D Rev_Batt is implemented) V [part of VREC_DG/VPull-up] 0,744 × (VBATTERY – VD_DG – VBS_DG – VGND_DG); see Figure 80 0,284 × (VBATTERY – VD_DG – VBS_DG – VGND_DG); see Figure 80 [0 , × s i n(2 × π × × t) + , ] × ,1 × V 18 × , VREC_DG t BIT V [part of VIUT ] See Table 189 [part of VIUT ] (use V if DRev_Batt is implemented) VBATTERY – VBS_IUT – VD_IUT – VGND_IUT; see Figure 80 0,1 × VBATTERY; see Figure 80 161 ISO 17987-7:2016(E) Table 188 (continued) Test steps For m a s ter I U Ts a nd s l ave I U Ts witho ut m a ki ng u s e o f s ynch ron i z atio n , a L I N co m mu n ic ation i s e s tab l i s he d b e twe en the te s t s ys tem a nd the I U T T he h ighe s t b it rate s upp o r te d b y the I U T ( but a m a xi mum of 10 ,417 kbit/s) i s us ed T he I U T bit rate F I U T i s me a s u re d (m a s ter b it rate i n s ynch field , b e twe en b it a nd b it 7; s l ave bit rate i n d ata b y te , b e twe en fa l l i n g fa l l i n g e dge o f s ta r t e dge o f s ta r t b it a nd bit 7, p o s s ib le for va lues to F ) For s l ave I U Ts with m a ki n g u s e o f s ynch ro n i z ation , F I U T i s s e t to the nom i na l bit rate (i e 19, kbit/s) T he te s t s ys tem b it rate i s adj u s te d to F T S a s de fi ne d i n Table F TO L i s % for mas ter I U Ts a nd s l ave I U Ts without m a ki n g u s e o f s ynch ro n i z ation , a nd , % fo r s lave I U Ts with m a ki ng u s e o f s ynch ron i z atio n Response Reference co n s e c utive I U T co m mu n ic atio n c ycle s s h a l l b e s ucce s s fu l I S O 179 7– 4: 016 , Tab le , Param 67, Para m I S O 179 7– 4: 016 , Figure Table 18 defi ne s the te s t c as e s o f “V B AT sh i ft i s appl ie d the I U T ” Table 189 — Test cases of: EPL–CT–TC FTS [EPL–CT 102].1 F I U T × (1 – F TO L) V B AT T E RY V B AT shift is applied the IUT IUT node as V D _I U T R B US C la s s C device a s mas ter kΩ C la s s C device a s slave kΩ C las s C device a s mas ter kΩ 9, V [EPL–CT 102].2 F I U T × (1 + F TO L) C la s s C device a s slave kΩ ,4 V [EPL–CT 102].3 F I U T × (1 – F TO L) C la s s C device a s mas ter kΩ C la s s C device a s slave kΩ C las s C device a s mas ter kΩ C la s s C device a s slave kΩ 41 ,4 V [EPL–CT 102].4 F I U T × (1 + F TO L) 8.5.8.10 [EPL–CT 103] Test System at 10,417 kbit/s VBAT shift test for BR_Range_10K LIN networks — Dynamic — Table 19 defi ne s the te s t s ys tem o f “V B AT sh i ft i s appl ie d to the te s t s ys tem” 162 I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n ISO 17987-7:2016(E) Table 190 — Test system: IUT node as Initial state Class C device as master [EPL–CT 103].1, [EPL–CT 103].2, [EPL–CT 103].3, [EPL–CT 103].4 Class C device as slave Operational conditions: VBATTERY VBS_DG VD_DG VGND_DG VREC_DG/VPull-up VDOM_DG See Table 191 V [part of VREC_DG/VPull-up] 0,4 V [part of VREC_DG/VPull-up] (use V if DRev_Batt is implemented) 0,1 × VBATTERY, [part of VREC_DG/VPull-up] 0,744 × (VBATTERY – VD_DG – VBS_DG – VGND_DG); see Figure 80 0,284 × (VBATTERY – VD_DG – VBS_DG – VGND_DG ); see Figure 80 18 × Te s t s ys tem s lew rate , VBS_IUT Test steps VBAT shift is applied to the test system VREC_DG t BIT BATTERY (5 Hz sinus signal with offset) [part of VIUT ] See Table 191 [part of VIUT ] (use V if DRev_Batt is implemented) VBATTERY – VBS_IUT – VD_IUT – VGND_IUT; see Figure 80 V [part of VIUT ]; see Figure 80 [0 , × s i n(2 × π × × t) + , ] × ,1 × V VD_IUT VIUT VGnd_IUT Fo r m a s ter I U Ts a nd s l ave I U Ts without m a ki ng u s e o f s ynch ron i z atio n , a L I N com mu n ic ation i s e s tab l i s he d b e twe en the te s t s ys tem a nd the I U T T he h ighe s t b it rate s upp or te d b y the I U T (but a maximum of 10,417 kbit/s) is used The IUT bit rate F IUT for values 4016 to 7F16 ) i s me a s u re d (m a s ter b it rate i n s ynch field , b e twe en bit a nd b it 7; s l ave b it rate i n d ata b y te , b e twe en fa l l i ng Fo r s l ave I U Ts with m a ki ng u s e o f s ynch ro n i z ation , F (i.e 19,2 kbit/s) T he te s t s ys tem bit rate i s adj u s te d to F TS fa l l i ng e dge o f s ta r t e dge o f s ta r t b it a nd b it 7, p o s s ib le IUT is set to the nominal bit rate a s de fi ne d i n Table 191 F TOL is % for master IUTs a nd s l ave I U Ts witho ut m a ki ng u s e o f s ynch ron i z ation , a nd , % fo r s l ave I U Ts with m a ki ng u s e o f s ynch ro n i z ation Response Reference Table 191 co n s e c utive I U T com mu n ic ation c ycle s s h a l l b e s ucce s s fu l ISO 17987–4:2016, Table 15, Param 67, Param 68 ISO 17987–4:2016, Figure defi ne s the te s t c as e s o f “V BAT sh i ft i s appl ie d to the te s t s ys tem” Table 191 — Test cases of [EPL–CT 103].1 F TS F IUT × (1 – F TOL) [EPL–CT 103].2 F IUT × (1 + F TOL) [EPL–CT 103].3 F IUT × (1 – F TOL) [EPL–CT 103].4 F IUT × (1 + F TOL) EPL–CT–TC © ISO 2016 – All rights reserved I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n VBAT shift is applied to the test system VBATTERY IUT node as Class C device as master C device as slave 9,2 V Class Class C device as master Class C device as slave Class C device as master C device as slave 41,4 V Class Class C device as master Class C device as slave VD_IUT RBUS kΩ kΩ kΩ 1V kΩ kΩ kΩ kΩ kΩ 163 ISO 17987-7:2016(E) 8.5.9 8.5.9.1 Failure Purpose T he pur p o s e o f th i s te s t i s to che ck whe ther s ome p ara s itic revers e c u rrents are flowi ng i nto the I U T 8.5.9.2 [EPL–CT 104] Loss of battery Figure 81 s hows the te s t figu ration o f the te s t s ys tem “L o s s o f b atter y” Figure 81 — Test system: Loss of battery Table 192 defi ne s the te s t s ys tem “L o s s o f b atter y” Table 192 — Test system: Loss of battery IUT node as C las s C device as ma s ter [E PL– C T 10 4] C las s C device as slave Initial state Parameters: R M E AS 10 kΩ (0 ,1 %) Operational conditions: V I U T: [ VS U P/ V B AT ] = GN D Fa i lure < V P S1 < V 164 I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n L o s s o f b atter y ISO 17987-7:2016(E) Table 192 (continued) IUT node as Test steps Response Reference Class C device as master Class C device as slave [EPL–CT 104].1 The power supply is disconnected from the IUT V IUT PIN VPS1 = Signal with a V/s ramp in the range [0 V to 36 V] up and down During all test, no parasitic current paths shall be formed between the bus line and the IUT I BUS_NO_BAT shall be less than 100 µA, means V voltage drop over RMEAS = 10 kΩ A fter reconnecting battery line, the IUT shall restart a fter failure recovery ISO 17987–4:2016, Table 15, Param 61 ISO 17987–4:2016, Figure 8.5.9.3 [EPL–CT 105] Loss of GND Figure 82 shows the test configuration of the test system “Loss of GND” Figure 82 — Test system: Loss of GND Table 193 defines the test system “Loss of GND” Table 193 — Test system: Loss of GND IUT node as Initial state Class C device as slave Parameters: RMEAS Operational conditions: VIUT: [VSUP/VBAT ] GND_IUT = VIUT Failure © ISO 2016 – All rights reserved I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n [EPL–CT 105].1 kΩ (0,1 %) VIUT = VPS1 = 24 V Local GND shorted to VIUT Loss of ground 165 ISO 17987-7:2016(E) Table 193 (continued) IUT node as Test steps C las s C device as slave [E PL– C T 10 ] T he ground i s di s nec ted from the I U T V P S = Signa l with a V/s mp i n the range [0 V to V ] up and down D uring a l l tes t, no p aras itic c urrent p ath s sha l l b e formed b e tween the bus l i ne and the I U T Response I B US _N O _GN D sha l l b e i nclude d in ± m A, me ans V voltage drop over R M E AS Reference = kΩ A fter reconnecting ground line, the IUT shall restart a fter failure recovery I S O 179 7– 4: 016 , Tab le , Param I S O 179 7– 4: 016 , Figure 8.5.10 [EPL–CT 106] Verifying internal capacitance and dynamic interference — IUT as slave T he purp os e of this tes t is to check the internal cap acitance of the I U T under normal and fau lt conditions The IUT shall not inter fere dynamically with bus signals when it is in passive (non-transmitting) or unp owered s tate Figure shows the test configuration o f the test system “Veri fying internal capacitance and dynamic inter ference — IUT as slave” Figure 83 — Test system: Verifying internal capacitance and dynamic interference — IUT as slave Table 19 defines the Switch settings depending on IUT configuration Table 194 — Switch settings depending on IUT figuration Switch S3 Setting decription Normally closed In case where IUT has switchable and deactivated internal pull-up (e.g in power lo s s cond ition s) , op en S3 S4 Normally closed In case where IUT is a 3-pin node or ECU, where reverse polarity protection is i ncluded i n I U T, op en S S5A/S5B In case where IUT is connected by a wire harness: During reference measurement, close both S5A and S5 B and d i s connec t I U T from harnes s S o the harnes s cap acitance i s accounted for i n the reference Tab le 19 as slave” 166 defines the test system “Veri fying internal capacitance and dynamic inter ference — IUT I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n ISO 17987-7:2016(E) Table 195 — Test system: Verifying internal capacitance and dynamic interference — IUT as slave IUT node as Initial state Test steps Class C device as slave Parameters: RCOMMON C COMMON RREF C REF Operational conditions: VIUT: [VSUP/VBAT ] [EPL–CT 106].1, [EPL–CT 106].2, [EPL–CT 106].3 kΩ (0 ,1 %) 750 pF (1,5 nF + 1,5 nF in series) (1 %) kΩ (0 ,1 %) 250 pF (100 pF || 150 pF parallel) (1 %) 24 V T he L I N B u s i s d ri ven with a 10 kH z re c ta ng u l a r s ign a l with a duty c ycle o f % Ri s e ti me ≤ n s S lop e ti me me a s u rements a re ne at 10 % , % o f s lo p e voltage S5B closed: Measuring rise time T REF on a known capacitance of 250 pF + 750 pF S5A closed: Measuring rise time T int with the IUT internal capacitance + 750 pF C SLAVE shall be less than or equal to 250 pF: T int REF Response ≤ T T he I U T s h a l l no t i nter fere with the dyn a m ic s ti mu lu s Reference ISO 17987–4:2016, 5.3.6 Param 37 ISO 17987–4:2016, 5.3.9.2 Table 196 — Test cases: Verifying internal capacitance and dynamic interference — IUT as slave EPL–CT–TC [EPL–CT 106].1 [EPL–CT 106].2 [EPL–CT 106].3 Condition N or m a l p ower s upp l y I U T s h a l l b e i n nor m a l mo de I U T lo s s o f GN D ( I U T GN D s hor te d to p ower s up p l y) IUT loss of VPS (IUT VIUT: [VSUP/VBAT ] shorted to GND) S1 VPS VPS GND S2 GND VPS GND 8.6 Operation mode termination 8.6.1 General An external resistor Rmeas is switched to the LIN pin To get the value of the internal resistor, current and voltage shall be measured These values are gathered for two different settings, and the internal resistance is calculated using Formulae (1), (2), (3) and (4) Figure 84 f shows the te s t figu ration o © ISO 2016 – All rights reserved I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n the te s t s ys tem “O p eration mo de” 167 ISO 17987-7:2016(E) Figure 84 — Test system: Operation mode 8.6.2 [EPL–CT 107] Measuring internal resistor — IUT as slave Table 19 defi ne s the te s t s ys tem “Me a s u ri ng i nterna l re s i s tor — I U T a s sl ave” Table 197 — Test system: Measuring internal resistor — IUT as slave IUT node as Initial state C las s C device as slave [E PL– C T 10 ] Parameters: R me a s1 10 kΩ (0 ,1 %) R me a s 2 kΩ (0 ,1 %) V I U T: [ VS U P/ V B AT ] 24 V Operational conditions: Test steps T he I U T sha l l b e in op erationa l/ac tive mo de T here i s no com munic ation on the LI N bus I f the I U T i ncor p orates a bu s dom i nant s tate timeout detec tion, wh ich di s ables the I U T ’s pu l lup res i s tor, the mea s urement shal l ta ke place b efore a ti meout i s detec ted Response Reference 8.6.3 R i nt va lue s h a l l b e i nclude d i n the n ge [2 kΩ; kΩ] ; s e e Formu la (4) I S O 179 7– 4: 016 , Tab le 16 , Param 71 [EPL–CT 108] Measuring internal resistor — IUT as master Table 19 defi ne s the te s t s ys tem “M e as u ri ng i nterna l re s i s tor — I U T as ma s ter ” Table 198 — Test system: Measuring internal resistor — IUT as master IUT node as Initial state C las s C device as ma s ter [E PL– C T 10 8] Parameters: R me a s1 kΩ (0 ,1 %) R me a s 2 kΩ (0 ,1 %) V I U T: [ VS U P/ V B AT ] 24 V Operational conditions: 168 I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n ISO 17987-7:2016(E) Table 198 (continued) IUT node as Test steps Response Class C device as master [EPL–CT 108].1 The IUT shall be in operational/active mode There is no communication on the LIN bus If the IUT incorporates a bus dominant state timeout detection, which disables the IUT’s pullup resistor, the measurement shall take place before a timeout is detected Rint Formula (4) Rmeas1 meas2 ISO 17987–4:2016, Table 16, Param 70 va lue s h a l l b e i nclude d i n the n ge [9 0 Ω; 10 kΩ] ; s e e = kΩ (0 ,1 %) ; R Reference = kΩ (0 ,1 %) 8.7 Static test cases T he mo ti vatio n o f s tatic te s t c a s e s i s to che ck the ava i l ab i l ity a nd the b ou nd a r ie s i n the d ata s he e t o f the IUT Table 199 f f deviate from the names in Table 199, but in this case a cross-reference list (datasheet versus Table 199) Table 199, if the f f Table 199 at least For a l l i ntegrate d c i rc u its ever y rel ate d p arame ter i n sh a l l b e p ar t o the data she e t and u l fi l the s p e c i fie d b ou nd arie s i n term s o f phys ic a l wors t c a s e cond ition D atas he e t p arame ter name s may sh a l l b e provide d or th i s te s t Pa rame ter cond ition s may devi ate rom the cond ition s i n datas he e t cond ition s are accord i ng to the phys ic a l wors t c as e conte xt i n I f one p arame ter e s no t pass th i s te s t, the re s u lt See ISO 17987–4:2016, 5.1.2, 5.3.5.1, 5.3.5.2 and 5.3.8 Table 199 o f the defi ne s the te s t s ys tem “LI N s tatic te s t p arame ters for whole formance te s t is “Fai le d” datas he e ts o f i ntegrate d c i rc u its ” Table 199 — Test system: LIN static test parameters for datasheets of integrated circuits Comment/ condition No Reference Parameter Min Max Unit Param tBFS Param tEBS — 2/16 tBIT Valid for Va lue o f acc u rac y o f the b y te fie ld de te c tio n 7/16 tBIT Earliest bit sample time, tEBS LBS — 10/16 tBIT Latest bit sample, tLBS EBS 16,0 36,0 V ECU operating voltage range ≤ t Param Param 52 tLBS VBATa Param 53 VSUPb 15,0 36,0 V Param 54 VBATa 8,0 36,0 V ECU operating voltage range Param 55 VSUPb ≥ t 7,0 36,0 V Param 56 VSUP_NON_ –0,3 40,0 OP Param 57 I BUS_LIM c © ISO 2016 – All rights reserved I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n V Voltage range within which guarantee of correct operation 300 mA Current limitation for driver dominant state driver on VBUS = VBAT_maxd ≥ Max — All devices — Min Max Min — Max Min Max Min Max Min Max All devices Min Max All devices with integrated LIN transmitter Max Min All devices All devices with integrated reverse All devices without integrated reverse p o l a r it y d io de All devices with integrated reverse p o l a r it y d io de S up p l y vo ltage n ge ≤ All devices p o l a r i t y d io de S up p l y vo l tage n ge Conformance test is passed if value is All devices without integrated reverse p o l a r i t y d io de the de vice i s no t de s tro ye d; no 75 169 ISO 17987-7:2016(E) Table 199 (continued) Comment/ condition No Reference Parameter Min Max Unit 10 P a m I B US _PAS _ –2 — mA m Valid for ≤ ≥ — Min Al l device s M a x Min Al l device s M a x — — M a x M in — M a x Min M a x — — Min M a x — — Min I nput le a kage c u r rent at the Al l device s with i nte - Re cei ver i ncl grate d s l ave p u l l- up s l ave pu l l- up re s i s tor as s p e ci- Conformance test is passed if value is re s i s to r fie d i n P a m 71 d r i ver o ff V B US = V V B AT = V 12 Pa ram I B U S _N O _ –2 mA C o ntro l u n it d i s co n ne c te d fro m g ro u nd GN D GN D D e vic e = VS U P V < V B US < V V B AT = V L o s s o f lo c a l gro u nd s h a l l no t a ffe c t com mu n ic atio n i n the re s idu a l ne two rk 13 P a m 61 I B US _NO _B AT — 10 µA V B AT d i s ne c te d VS U P = GN D < VB U S < V N o de s l l s u s ta i n the c u r rent th at c a n flo w u nder th i s co nd i - tio n B u s s l l rem n o p eratio na l u nder th i s co nd itio n 14 Pa ram 62 V B U S _do m — ,4 VS U P Re cei ver m i na nt s tate Al l device s with i nte grate d L I N re cei ver 15 P ara m V B U S _re c 0,6 — VS U P Re cei ver re ce s s i ve s tate Al l device s with i nte grate d L I N re cei ver 16 Pa m V B U S _C N T ,475 0, 525 VS U P V B US _C N T = ( Vth _do m + Vth _ re c) /2 17 P ara m V H YS — ,175 VS U P e V H YS = Vth _re c – Vth _do m Al l device s with i nte grate d L I N re ceiver Al l device s with i nte grate d L I N re ceiver 18 Pa m D1 0, 330 — — T H Re c(m a x) = ,710 × VS U P ; T H D o m(m a x) = , 5 × VS U P ; ( D uty C ycle 1) VS U P = , V to V; t B I T = μs ; A l l de vice s wi th i nte grate d L I N tra n s m itter D1 va l id fo r kb it/s D1 = t B u s _re c(m i n) /(2 × t B I T ) 19 Pa m D2 — , 42 T H Re c(m i n) = ,4 × VS U P ; T H D o m(m i n) = , × VS U P ; ( D ut y C ycle ) VS U P = , V to V; t B I T = μs ; A l l de vice s wi th i nte grate d L I N tra n s m itter D2 va l id fo r kb it/s D2 = t B u s _re c(m a x) /(2 × t B I T ) 20 Pa m 74 D3 ( D uty C ycle ) 0, 86 — — T H Re c(m a x) = ,74 × VS U P ; T H D o m(m a x) = , 81 × VS U P ; VS U P = 7, V to V; t B I T = μs ; D3 = t B u s _re c(m i n) /(2 × t B I T ) 170 I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n A l l de vice s wi th i nte grate d L I N tra n s m itter D3 va l id fo r 10 ,417 kb it/s ISO 17987-7:2016(E) Table 199 (continued) No Reference Parameter Min Max Unit 21 Param 75 D4 Comment/ condition 22 Param 76 trx_pd — 0,591 — TH Rec(min) = 0,422 × VSUP ; TH Dom(min) = 0,284 × VSUP; VSUP = 7,6 V to 36 V; tBIT = 96 μs; D4 = tBus_rec(max) /(2 ì tBIT ) às Propagation delay o f receiver 23 Param 77 trx_sym –2 µs 24 Param 71 RSLAVE 20 60 kΩ The serial diode is mandatory 25 Param 70 RMASTER 900 (Duty Cycle 4) 26 Param 37 C SLAVE — 27 6.3.7.1 LIN device — states changes 28 — LIN trans– — ceiver input capacitance Symmetry o f receiver propagation delay rising edge with respect to falling edge Valid for All devices with integrated LIN transmitter D4 valid for 10,417 kbit/s Conformance test is passed if value is ≤ ≥ Max — All devices with inte- Max grated LIN receiver All devices with inte- Max grated LIN receiver — All devices with inte- Max grated slave pull-up resistor 100 Ω The serial diode is mandatory All devices with Max integrated master Only for valid for transceiver pull-up resistor with integrated master pull-up resistor 250 pF Capacitance of slave node All LIN slave devices Max — — All LIN device state changes All devices — on conditional events (e.g temperature shut-down) shall be specified in the LIN device datasheet — — A maximum LIN transceiver — input capacitance shall be specified in the LIN device datasheet Please consider the datasheet limits (e.g voltage, temperature) Min Min Min — — — VBAT denotes the supply voltage at the connector o f the control unit and may be di fferent from the internal supply VSUP for electronic components (see ISO 17987–4:2016, 5.3.2) b VSUP denotes the supply voltage at the transceiver inside the control unit and may be di fferent from the external supply VBAT for control units (see ISO 17987–4:2016, 5.3.2) c I BUS : Current flowing into the node a d A transceiver shall be capable to sink at least 40mA The maximum current flowing into the node shall not exceed 200 mA under DC conditions to avoid possible damage Vth_dom: receiver threshold of the recessive to dominant LIN bus edge Vth_rec: receiver threshold of the dominant to recessive LIN bus edge e © ISO 2016 – All rights reserved I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n 171 ISO 7987-7: 01 6(E) Bibliography [1] I S O 749 –1 , [2 ] I S O/I EC [3 ] [4] [5 ] [6] model In formation processing systems — Open systems interconnection — Basic reference 10 73 , In formation technology — Open Systems Interconnection — Basic Re ference Model — Conventions for the definition o f OSI services I S O 142 –1 , requirements I S O 142 –2 , Road vehicles — Unified diagnostic services (UDS) — Part 2: Session layer services I S O 142 –7, Road vehicles — Unified diagnostic services (UDS) — Part 7: UDS on local interconnect network (UDSonLIN) I S O 179 87–2 , Road vehicles — Local Interconnect Network (LIN) — Part 2: Transport protocol and network layer services [7 ] I S O 179 87–3 , [8] ISO 72 Road vehicles — Unified diagnostic services (UDS) — Part 1: Specification and Road vehicles — Local Interconnect Network (LIN) — Part 3: Protocol specification 179 87– 6: 016 , Road vehicles — Local Interconnect Network (LIN) — Part 6: Protocol formance test specification I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n ISO 7987-7: 01 6(E) ICS 43.040.15 Price based on 172 pages © ISO 2016 – All rights reserved I n tern ati o n al Org an i z ati o n fo r S tan d ard i z ati o n