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Available online at www.sciencedirect.com Physica E 21 (2004) 560 – 567 www.elsevier.com/locate/physe Semiconductor nanowires for novel one-dimensional devices L. Samuelson a;∗ , M.T. Bjork a , K. Deppert a , M. Larsson b , B.J. Ohlsson c , N. Panev a , A.I. Persson a ,N.Skold a , C. Thelander a , L.R. Wallenberg b a Solid State Physics, The Nanometer Structure Consortium, Lund University, Box 118, Lund S-221 00, Sweden b Materials Chemistry/the Nanometer Consortium, Lund University, Box 124, Lund S-221 00, Sweden c QuMat Technologies AB, Lund, Sweden Abstract Low-dimensional semiconductors oer interesting physical phenomena but also the possibility to realize novel types of devices based on, for instance, 1D structures. By using traditional top-down fabrication methods the performance of devices is often limited by the quality of the processed device structures. In many cases damage makes ultra-small devices unusable. In this work we present a recently developed method for bottom-up fabrication of epitaxially nucleated semiconductor nanowires based on metallic nanoparticle-induced formation of self-assembled nanowires. Further development of the vapor–liquid– solid growth method have made it possible to control not only the dimension and position of nanowires but also to control heterostructures formed inside the nanowires. Based on these techniques we have realized a series of transport devices such as resonant tunneling and single-electron transistors but also optically active single quantum dots positioned inside nanowires displaying sharp emission characteristics due to excitons. ? 2003 Elsevier B.V. All rights reserved. PACS: 81.07.Vb; 73.40.Kp; 78.67.Hc; 73.40.Gk; 73.23.Hk Keywords: Nanowire; Heterostructure; Quantum dot; Resonant tunneling; Coulomb blockade 1. Top-down vs. bottom-up fabrication methods Quantum device structures are traditionally created via lithographic techniques, i.e. by advanced pattern- ing accompanied by some type of structuring, like etching. This approach has a number of problems, such as damage induced by the processing, often resulting in dead layers and limited performance of the resulting devices. An example is quantum wells (QWs) formed in a planar growth mode, later followed by patterning of the surface by wire or dot features, ∗ Corresponding author. Tel.: +46-46-222-7679; fax: +46-46-222-3637. E-mail address: lars.samuelson@ftf.lth.se (L. Samuelson). features which are then transferred to the QW via an anisotropic etch. Another well-known example is the corresponding fabrication of 1D resonant tunneling devices, again via the initial epitaxial formation of a double-barrier structure surrounding a QW, later fol- lowed by etching a narrow mesa structure containing the 1D–0D–1D tunneling device [1]. These top-down fabrication techniques have had only limited success due to process induced damage. Dierent approaches to self-organization of quan- tum structures via bottom-up methods have been developed allowing ultra-small dimensions without the use of the most extreme lithography methods and often with almost perfect and defect-free device properties. The formation of quantum dots (QDs) by 1386-9477/$ - see front matter ? 2003 Elsevier B.V. All rights reserved. doi:10.1016/j.physe.2003.11.072 L. Samuelson et al. / Physica E 21 (2004) 560 – 567 561 strain-induced nucleation of ultra-small islands via the Stranski–Krastanow growth mode [2] has led to high-quality optical QD structures. Out of the many approaches aiming at nanowire formation we men- tion the use of preformed structures where selective growth on certain crystalline facets leads to forma- tion of sharp V-grooves [3]. The intersection of such grooves oers a nucleation site for nanowires. This and most other methods are however not able to form heterostructures inside the nanowires. 2. Vapor–liquid–solid growth mode of nanowires Already during the 1960s Wagner and others [4] studied the formation of micrometer-sized whiskers that could be formed from a catalytically active metal particle positioned at a crystalline surface. Strong ef- fort was put on the fabrication of silicon whiskers formed via the interface between a gold particle and a silicon substrate. The mechanism of this vapor–liquid– solid (VLS) growth mode is traditionally described as a formation of a eutectic alloy between Au and Si and a controlled establishment of a supersaturation of the melt, which induces a transformation from the liq- uid alloy phase to a phase where the melt co-exists with the solid Si. This process can be compared with that of liquid-phase epitaxy used for growth of e.g. GaP from a Ga metal that is kept supersaturated by the addition of GaP powder. The supersaturation and the continued growth of the epitaxial crystal is main- tained via a gradual decrease of the temperature of the melt. In the beginning of the 1990s Hiruma and co-workers [5] grew semiconductor whiskers at nanometer dimensions and studied them for their pos- sible use in electronics and photonics. The nanowires (primarily GaAs and InAs) were nucleated from gold nanoparticles created by heating an evaporated, sub-monolayer thick, gold ÿlm. Among the achieve- ments can be mentioned the successful formation of pn-junctions [6] and the demonstration of injec- tion luminescence from such nanowire light-emitting diodes [7]. Starting in the late 1990s, the group of Lieber at Harvard has demonstrated the potential for growth of doped nanowires for electronics, photonics and biosensor applications [8–10]. 3. Formation of heterostructures in nanowires Around 1996, Hiruma et al., reported the possibility to switch the composition of III–V nanowires from InAs to GaAs [11], and also made some rudimentary analysis of the composition variations. The next step in this ÿeld came 2 years ago when high-resolution electron microscopy imaging revealed the composi- tion and structural quality of the InAs/GaAs interface [12]. Furthermore, we also reported the mapping of the lattice constants of the two binary materials. These studies proved the interfaces to be abrupt on an atomic scale and free of defects. Later also the InAs/InP sys- tem was shown to possess highly abrupt and perfect interfaces [13–15]. In Fig. 1, the color-coded lattice map of an InAs/InP superlattice wire is shown. Here Fig. 1. Left-hand ÿgure shows a color-coded representation of the origin of diraction spots from the two lattices of InAs (green) and InP (red). The right-hand ÿgure shows a high-resolution electron microscope image of the same structure from which one can deduce that the multiple layer structure of alternating InAs and InP segments are perfect from a crystalline point of view, are free of strain within less than 10 nm from the interface, and have an interface abruptness on the atomic level. 562 L. Samuelson et al. / Physica E 21 (2004) 560 – 567 the thinnest InP layer (red) is merely 1:5 nm thick. The formation of such thin layers is due to the very slow growth rates and low pressures of the chemical beam epitaxy approach to nanowire growth. This sep- arate study also included the demonstration of how the nanowire geometry is able to absorb the lattice mis- match and how the system relaxes within about 10 nm from the heterointerface, which is a result of generic value since it opens the possibility to combine dierent materials without having to maintain lattice matching as in regular epitaxy. At the same time reports came on composition modulation in the SiGe system [16] along a nanowire and transitions within a nanowire be- tween GaAs and GaP [17], including the observation of luminescence from segments of GaAs surrounded by GaP material, however, without any detailed analysis of the abruptness of the transition regions. 4. Properties of single barriers in nanowires From knowledge of the band structure and band alignment in bulk III–V materials one could predict that the conduction band oset between InAs and InP should be at least 0:5 eV, a number which is not known since it is not possible to form interfaces between the two materials on a macroscopic scale. In order to Fig. 2. (a) Band diagram of a single barrier nanowire. (b) A comparison between the I –V characteristics of a homogeneous n-type InAs nanowire and one with an 80 nm thick InP barrier inserted. Thermal activation of the current, (c), gives an activation energy of about 0:6 eV for the conduction band oset. investigate the band alignment and the electronic prop- erties of the InAs/InP interfaces we studied the trans- port through InAs nanowires containing thick InP re- gions (80 –100 nm), which function as barriers and prevent transport. From analysis of the thermionic emission of electrons over the InP barriers (Fig. 2), we deduced a conduction band oset of about 600 meV [14], a number indicating that this material system could be highly interesting for heterostructure elec- tronics and photonics. By varying the thickness of the InP barrier the eective resistance can be varied from the few k level for a barrier of zero thickness, via tunnel controlled resistance in the range of 100s of k up to M and for very thick barriers up to the G to T level. A couple of examples are shown in Fig. 3. 5. 1D resonant tunneling devices One of the most demanding devices to fabricate and one that is very strongly based on quantum phenom- ena, is the resonant tunneling diode. These heterostruc- ture devices are, in the conventional form, made by surrounding a thin QW by two tunnel barriers, and on either side of these barriers a low-band gap material acting as emitter and collector. The functionality is based on the resonant alignment of occupied states L. Samuelson et al. / Physica E 21 (2004) 560 – 567 563 Fig. 3. Illustration of the dynamical range that can be covered by inserting InP segments of dierent thicknesses (80, 7, and 0 nm blue, red, and green, respectively) into an InAs nanowire. in the emitter relative to the quantized states in the QW. Hence, transmission through the device is pos- sible only for certain ranges of applied bias, giving rise to sharp peaks in the current–voltage characteris- tics and to regions of applied voltages having negative dierential conductance. This phenomenon is also of great value for the use of resonant tunneling devices in oscillator circuits [18]. One of the holy grails of low-dimensional devices has been to try to realize resonant tunneling devices for lower dimensions, i.e. with the emitter and collec- tor being 1D nanowires and the central region a QD, so that the ÿltering element is fully discrete. One of the ÿrst serious attempts to realize this, was the 1D–0D– 1D resonant tunneling device made by researchers at Texas Instruments during the late 1980s. Fig. 4 shows illustrations taken from their publications and shows their top-down method for fabricating such devices [1,19]. First, the GaAs/AlGaAs multi-layer structures are grown, with the GaAs QW surrounded by two Al- GaAs tunnel-barriers, in turn surrounded by GaAs as 3D emitter and collector regions. Then electron beam lithography and dry etching is used to form freestand- ing rods (wires) of dierent diameters. In the bottom part of Fig. 4 the resulting I–V characteristic of the thinnest nanowires that were found to be electrically active after the processing (200 nm), can be seen. It is quite clear that top-down fabrication methods are not quite able to produce the device dimensions for which quantization eects are very signiÿcant. Simi- lar conclusions can be made from other more recent attempts to fabricate RTDs via QDs [20]. Fig. 4. Illustrations taken from publications from Texas Instru- ments from the late 1980s, where top-down methods were used to fabricate ultra-narrow mesas containing double-barrier resonant tunneling structures. The smallest dimensions for which the pro- cessed devices were still operating were just on the boarder line of dimensions for which any quantization eects could be resolved. Obviously, there is a need for bottom-up and low-damage methods to produce such advanced heterostructure devices. In Fig. 5 is shown a low-resolution transmission electron microscopy (TEM) image of such double-barrier structures made by chemical beam epitaxy (CBE) [21]. We have cho- sen to work with InAs-based nanowires, meaning that the emitter and collector regions are made of InAs, as is the central QD, while the barriers are made of 564 L. Samuelson et al. / Physica E 21 (2004) 560 – 567 Fig. 5. Low-resolution TEM image of nanowires transferred from the wafer and deposited on a TEM-grid. The dimensions of the wires are 40 –50 nm in diameter, with the InP tunnel barriers about 5 nm thick and the height of the central QD about 15 nm. InP (compare Figs. 1–3). We have primarily worked with wire diameters between 40–60 nm and tunnel barrier thicknesses of about 5 nm and the width of the central QD of about 15 nm. These types of nanowires are mechanically broken o from the wafer where they were grown and trans- ferred to a SiO 2 -terminated silicon wafer. Ohmic con- tacts are formed to the nanowire via electron-beam lithography, metal evaporation and lift-o techniques, in a similar way as how the single-barrier devices were made. In order to verify that the barriers are actually in the proper positions relative to the contacts used in the measurements, a selective etch was used that re- moves InAs and leaves InP virtually intact. This leaves a topographic image of the double barrier, which will reveal if the contacts have been improperly placed relative to the tunneling structure. The current–voltage characteristics of the fabricated devices showed an eective blocking of the current for biases up to more than 50 mV. This blocking is followed, in a symmetric manner, by a sharp peak (in Fig. 6(c)) at about 80 mV with a full-width at half-maximum of about 5 mV, which can be converted into an energy sharpness of the transition of about 2 meV. The inset shows that these devices are robust to charging and hysteresis eects, since the voltage traces for upwards and downwards sweeps are virtu- ally identical. At higher biases features are seen which can be interpreted as tunneling into excited states. In some samples, this characteristic feature in the I–V curves is replaced by a doublet feature which, Fig. 6. (a) Shows a TEM image of the DBRT-structure, lined up with the energy band diagram for the emitter-barrier- dot-barrier-collector structure. (b) The energy band structure in the emitter and collector regions are those of a series of 1D density-of-states curves, for each of the laterally quantized states while the energy structure of the central QD is fully quantized as expected for a 0D QD structure. (c) shows the current–voltage characteristics of the devices, with a sharp peak for biases for which the band of occupied states are lined up with the lowest QD state. This peak is followed by a dip until the ÿrst excited states is lined up with the emitter states. L. Samuelson et al. / Physica E 21 (2004) 560 – 567 565 although not proven, may indicate a situation with the position of the Fermi level such that more than one injecting emitter state is being populated. No charging eects are seen in these devices probably due to the fact that tunneling out of the QD is so fast that no electron accumulation in the QD takes place under these experimental conditions. 6. 1D single-electron transistor devices With the technologies described above for forma- tion of single tunnel barriers and double barrier struc- tures, the methods are available for the building of ideal single-electron transistor (SET) devices, i.e. de- vices in which predeÿned tunnel barriers surround a central island with a capacitance suciently small so that the energy required to add another electron to the dot is large compared to the thermal energy, k B T . Such cases have been extensively studied us- ing for instance Al=Al 2 O 3 technology [22] or with the use of nanoparticles with controlled tunnel barriers [23]. More recently, carbon nanotubes (CNTs) have been employed to make SET-type of devices, either by utilizing defect-related tunnel barriers inside the CNTs [24] or by using conducting CNTs as leads to a nanoparticle acting as the central island [25]. In one case, an InP nanowire was used as the SET island [26], connected to the source and drain via high-resistance contacts, in a way similar to how CNTs have been used for SET devices. However, it is clear that the ten- ability of the barriers of InP inside an InAs nanowire is very promising to build designed SETs having pre- dictable properties. In Fig. 7, a qualitative comparison between a DBRT and a DB-SET device is shown, comparing cases with the same materials and dimensions but with the change in the length of the central island from a size (for the DBRT device) where quantization eects dominate the energies of the island, to a large size of the island for which the quantization is only very small but the charging energies are large (for the DB-SET device). In the SET-device, the charging energy, which can be written as E C =e 2 =C, is dominated by the capacitances of the barriers and is only weakly dependent on the length of the island. Hence, for a suciently large island the charging energy E C will totally dominate over the quantization energies. Fig. 7. Principles of how the resonant tunneling device can be converted into a single-electron transistor using identical technol- ogy but with the size of the island extended from about 15 nm up to about 100 nm, such that the quantization energies are reduced to almost zero while the charging energies are still large. Fig. 8. Principle of the blockade and single-electron transfer through the island in a single-electron transistor as function of source–drain and gate biases. The principles of how the transport of electrons through the SET occurs as function of the applied source–drain bias and the gate voltage is sketched in Fig. 8, from which is seen the expected Coulomb blockade situation for small values of the applied source–drain bias. This ÿgure also illustrates how a gate applied to the system can push the ladder of states in the island for N; N + 1, etc. electrons down (for positive gate voltages) such that more electrons can be added to the island or current be transported through these levels, one by one. Experimental data [27] for the designed nanowire SET devices are pre- sented in Fig. 9, which shows the current vs. source– drain voltage characteristics for two settings of the gate potential, one chosen such that the blockade is maximum and one (nearest) minimum, in which the blockade is perfectly lifted. This behavior, in itself, 566 L. Samuelson et al. / Physica E 21 (2004) 560 – 567 Fig. 9. (a) Current vs. source–drain voltage for the SET shown in Fig. 7, displaying ideal Coulomb blockade as well as complete lifting of the blockade controlled by the gate potential. (b) Periodic gate oscillations. is indicative of that an ideal single island has been formed in the nanowire between two tunnel barriers. In Fig. 9(b) it is seen how the single-electron tunnel- ing is perfectly periodic in gate voltage, a phenomenon that can be followed and controlled for more than 50 electrons being added to or removed from the central island. 7. Optically active QDs inside nanowires One of the great challenges in the use of nanos- tructures is the possibility to use a single QD as an ideal photonic quantum emitter. If a single QD can be addressed in such a fashion that it can be controllably excited by a single exciton, it may be employed as a single-photon-on-demand source [28], which would be highly interesting for quantum optics in general and for quantum cryptography in particular. High op- tical quality and well deÿned and spectroscopically Fig. 10. Photoluminescence spectra from a single GaInAs QD positioned inside a GaAs nanowire shown as function of the excitation intensity. For the lowest excitation intensities, a single sharp line is seen, believed to be due to the single exciton. For higher excitation intensities new excitonic features appear. sharp exciton emission is a necessary pre-requisite for these applications. Furthermore, the controlled injection of one electron–hole pair into the single QD must be achieved, preferably via a combination of resonant tunneling via tunnel barriers surrounding the active QD and Coulomb blockade preventing more than one carrier to be injected. So far, strain-induced QDs, or etched out pillars, have been proposed for these applications. We have recently found that it is possible to grow single QDs in nanowires with high luminescence quality and with sharp lu- minescence lines [29]. An example is shown in Fig. 10, with luminescence emission spectra for vary- ing excitation intensities. The appearance of the single exciton emission line, with line width of about 100 –200 eV and the appearance of new exciton emis- sion lines for higher excitation intensities (probably due to the recombination of the bi-exciton) is clear. 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