Thiết kế và lập trình hệ thống - Chương 25

... 2C-2F 80386-Pentium Segment not present (IRQ3)C 3 0-3 3 80386-Pentium Stack fault (IRQ4)D 3 4-3 7 80386-Pentium General protection fault (IRQ5)E 3 8-3 B 80386-Pentium Page fault (IRQ6)F 3C-3F -- -- - ... -- -- - Reserved (IRQ7)10 4 0-4 3 80286-Pentium Floating-point error (Video)11 4 4-4 7 80486SX Alignment check interrupt12 4 8-4 F Pentium Machine check exception1 3-1 F 5 0-7 F -- - ReservedSystems Programming ... Function0 0 0-0 3 All Divide error1 0 4-0 7 All Single step2 0 8-0 B All NMI pin3 0C-0F All Breakpoint4 1 0-1 3 All Interrupt on overflow5 1 4-1 7 80186-Pentium Bound instruction (print screen)6 1 8-1 B 80186-Pentium...

... the 80386 and up.Allows a linear address (virtual address) of a program to be located in any por-tion of physical memory.The paging unit is controlled by the microprocessors control registers:311211 ... appropriate page table and (finally) one tothe desired data or code item. Ouch!A Translation Look-aside Buffer (TLB) is used to cache page directoryand page table entries to reduce the number of...

... have a 64-bit wide data bus.The 30-pin and 72-pin SIMMs are not used on these systems.Rather, 64-bit DIMMs (Dual In-line Memory Modules) are the standard.These organize the memory 64-bits wide.The ... 32 or 1M X 36 (parity).5 10 15 20 25 30 35 40 45 50 55 60 65 70NC++VSSVCCDQ 0-3 1Addr 0-1 1RASCASWPD 1-4 Systems Design & Programming Memory I CMPE 31012 (Feb. 25, 2002)UMBCU M B CUNIVERSITY ... 4BRASA074157 (2-to-1MUX)A1A2A3A4A5A6A71Y 2Y 3Y 4Y 1Y 2Y 3Y 4YAddress BUSInputs to DRAM0: latch A to Y1: latch B to YSS74157 (2-to-1MUX)Systems Design & Programming Memory I CMPE 31011 (Feb. 25, 2002)UMBCU...

... )X16G X( )-- -- - -- - -- - -- - -- - -- - -- - -X27X26X25X24X22X21X18+ + + + + +X16X15X21+ + +-- -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - -- - =X16X15X21+ ... 15.Therefore, no more than 2 bytes are needed independent of the data block size.CRCM X( )XnG X( )-- -- - -- - -- - -- - -- - -- - Q X( ) R X( )+= =Q(X) is the quotientR(X) is the remainderG X( ) X16X15X21+ + +=Systems ... ...CS2764A16A17A18A19A13A14A15CSCSCSCSCSCSCSRD of 8088/86Data BusAddress BusF2000-F3FFFF0000-F1FFFF4000-F5FFFF6000-F7FFFF8000-F9FFFFA000-FBFFFFC000-FDFFFFE000-FFFFFAddress spaceF0000H-FFFFFHA13 through A15 selecta 2764A16 through...

... pin on RAS)A8S1S0MUX256-to-1MUX256-to-1MUX256-to-1MUX256-to-164K array (256 X 256 )255 2541064K array (256 X 256 )64K array (256 X 256 )64K array (256 X 256 )256 K X 1 DRAMA0-A7A10-A17Block 0Block 1Block ... InterfaceI1I2I3I4I5I6I7I8I9I1016L8O1O2O3O4O5O6O7O8A29A30A31I1I2I3I4I5I6I7I8I9I1016L8O1O2O3O4O5O6O7O8A19A20A21A22A23A24A25A26A27A28A0A15O0O7......CEOE27512D0-D7D8-D15D15-D23D24-D31D56-D63D48-D55D40-D47D32-D39A3-A18MRDCA0A15O0O7......CEOE27512A0A15O0O7......CEOE27512A0A15O0O7......CEOE27512A0A15O0O7......CEOE27512A0A15O0O7......CEOE27512A0A15O0O7......CEOE27512A0A15O0O7......CEOE27512(64K ... since the ver-tical wires are VERY long (delay is at least linear to length).S0S1S2SN-2SN-1Word 0Word 1Word 2Storage cellWord N-2Word N-1Input-Output(M bits)DecoderA0A1A2AK-1K = log2None-hotBinary...

... directive db:Word-sized (dw) and doubleword-sized data (dd):Little endian: Least significant byte is always stored in the lowest-num-bered memory location.floatstr db ’Float number -& gt; %f ’, 10, ... Rectangular Areas’, 10, 0temp_buf: times 200 db 0temp_buf_size: equ $-temp_bufneg_exponent: dd -1 00301H302H303H12H34HLow-order byteHigh-order byteStorage of the number 1234Systems Programming 80x86 ... single percision, the sign bit + 8-bit exponent + 24-bit mantissa = 33 bits !The mantissa has a hidden 1 bit in the leftmost position that allows it tobe stored as a 23-bit value.The mantissa is first...

... dlaxbxcxdxspbpdisiAccumulatorBase IndexCountDataStack PointerBase PointerDestination IndexSource Index16-bitregisters32-bitextensionsah alax8-bit16-bitnamesSystems Design & Programming 80x86 Assembly I CMPE 3103 (Feb ... MARYLAND BALTIMORE COUNTY1 9 6 6Data Addressing Modes Base relative-plus-indexA second variation includes: mov eax, [ebx+edi+4] Scaled-indexA second variation includes: mov eax, ebx*2+ecx+offsetScaling ... Addressing Modes• Register IndirectAny of eax, ebx, ecx, edx, ebp, edi or esi may be used.• Base-plus-indexAny combination of eax, ebx, ecx, edx, ebp, edi or esi.• Register relativeA second variation...

... constant is any 32-bit signed value.Base Relative-Plus-Index addressing:Effective address computed as:seg_base + base + index + constant.Designed to be used as a mechanism to address a two-dimensional ... Addressing ModesBase-Plus-Index addressing:Effective address computed as:seg_base + base + index.Base registers: Holds starting location of an array.• ebp (stack)• ebx (data)• Any 32-bit register except ... Addressing ModesScaled-Index addressing:Effective address computed as:seg_base + base + constant*index.Code Memory-Addressing Modes:Used in jmp and call instructions.Three forms: Direct PC-Relative IndirectDirect:Absolute...

... BALTIMORE COUNTY1 9 6 6Arithmetic Operationssub eax, ebxdec edi;Subs registers - Carry flag.sbb ecx, ebx;eax=eax-ebxcmp al, 10Hjae LABEL1;Jump if equal or below.jbe LABEL2;if ecx==eax, eax=edx ... Resultxor ah, ch ;ah=ah XOR chtest al, 4jz LABEL;Jump to LABEL if bit 2 is zero.;Tests bit 2 in al -- 00000100not ebxneg TEMPSystems Design & Programming 80x86 Assembly IV CMPE 3107 (Mar. 1, ... IV CMPE 31010 (Mar. 1, 2002)UMBCU M B CUNIVERSITY OF MARYLAND BALTIMORE COUNTY1 9 6 6Flow-of-Control Instructionsja ;Jump if above (Z=0 and C=0);Jump if below or equal (Z=1 or...

... 6✬✎✭✮✠✯✰✱✲✲✯✳✴✰✎✵MiscellaneousDataTransferOperations.INandOUT:Transfersabyte,wordordoublewordofdatafrom/toanI/Odeviceinto/outofAL,AXandEAX,respectively.Memoryoperationsarenotavailable(astheyareinINSandOUTS):Twoforms:•Fixed-portaddressing:8-bitportnumberencodedininstruction.8-bitvalueissign-extendedintoaddressbits 8-1 5.Addressbits1 6-3 1areundefined.•Variable-portaddressing:16-bitportnumberstoredinDX. ✁AL✄✠✝☎✝ ... 6✬✎✭✮✠✯✰✱✲✲✯✳✴✰✎✵MiscellaneousDataTransferOperations.MOVSXandMOVZX(80386anduponly):Move-and-sign-extendandMove-and-zero-extend:BSWAP(80486anduponly):Swapsthefirstbytewiththeforth,andthesecondbytewiththethird.Usedtoconvertbetweenlittleendianandbigendian: ✛✁✄ CX✄BL☎✟✒✏☛✎✙☎✡✙☛✛✎✆✕✒☛✡✍✢✝ ✛✁✂ EAX✄ ✁✂✁✢☎✄✙✚✍✙☎✡✙☛✛✎✟✍✚✛✔✡ ✁✂✁✢✒☛✆✆☎✜✂✄✜✟✙EAXEAXEBXECXEDX✡✡✠✠✞✞✝✝✝✝✞✞✠✠✡✡ ✂✁✄☎ ... 6✬✎✭✮✠✯✰✱✲✲✯✳✴✰✎✵MiscellaneousDataTransferOperations.XCHG:Exchangesthecontentsofaregisterwiththecontentsofanyotherregisterormemorylocation.ItcanNOTexchangesegmentregistersormemory-to-memorydata.Byte,wordanddoublewordscanbeexchangedusinganyaddressingmode(exceptimmediate,ofcourse).XLAT:PerformsatablelookupoperationbyconvertingthevalueinALfromanindextoavaluestoredinthecellofatableinmemory. ✁✂✄EDX✄ESI☎✆✆☎✠✖✔☛✏✙✆ ✝✔☛✛✆✟☛ ✁✂✄AL✄ ✁✂✁✢☎✆☎✠✖✔☛✏✙✚✙✏✒✎✡✙✚✔☛✛✌✙✌✍✚ ✗✔✟✓✙✎✜MOV...