... and K D M Maier, Data cache-energy and throughput models: a design exploration for overhead analysis,” in Proceedings of the Conference on Design and Architectures for Signal and Image Processing ... Antwerp, Belgium, 1997 [6] P R Panda, N D Dutt, and A Nicolau, Data cache sizing for embedded processor applications,” in Proceedings of the Conference on Design, Automation and Test in Europe, pp 925– ... Cyclic Random LRU Cyclic Random LRU Cyclic Random LRU Random LRU Cyclic Associativity 16 Tsimulated Figure 4: Throughput for write-through cache Epredicted Associativity 16 Cyclic LRU Random Cyclic...