System Current Measurements
Battery and ultracapacitor currents are measured using two LEM- LC 300 Hall effect current transducers while the DC bus current is measured using a lower capacity LEM – LT 200 current transducer. All three LEM modules are powered by +/- 15V bias voltage with 47ohm burden resistors for current measurement. The voltage measured across the burden resistors is scaled in the data acquisition software to represent the actual currents. A 500Hz low pass filter is selected for all the current measurement channels.
System Voltage Measurements
Voltage measurement points are the battery, ultracapacitor and DC bus terminal voltage. All the measurements are obtained through scaling of the actual terminal voltages. Using resistive voltage dividers and single-pole low pass filters (1kHz), these terminal voltages are scaled down by a factor of 11 and measured via 3 separate channels of a designated voltage measurement module. Rescaling is performed in the data acquisition software. Both current and voltage measurement modules provide galvanic isolation between the input and signal paths. The instrumentation method is shown in Figure 6.4.
+15V -15V
47R
0V LEM Module Battery/
Ultracapacitor/
Load Current
Measurement Points (DAQ)
820K
75K 2.2nF
Measurement Points (DAQ)
GND
Current Measurement
Voltage Measurement
1 1 2
1 C fo R
LPF = π
R1 C1
Figure 6.4 Voltage and current measuring method
Protection, disconnects and power distribution
Two 300A Fuse links provides protection against uncontrollable fault currents. The fuses are placed on the incoming battery supply and on the outgoing DC distribution bus. Two DC (400A) contactors provide controlled disconnection of the DC bus and also the Ultracapacitors. Every attempt was made to minimize Joule heating by using low electrical resistance cables and interconnects in the vehicle power distribution system.
Drive Cycle Profiler
In order to achieve experimental repeatability, a drive cycle profiler was designed and developed. The profiler functions as an automatic throttle controller that is independent of central control module. By sequentially altering the speed reference signal to the traction drive, the drive cycle profiler alters the vehicle target velocity. For the same vehicle and driver mass with the same tyre pressure and similar ambient conditions, the profiler is able to reproduce four pre-programmed drive cycles in any order.
The drive cycles were designed based on the SAE J227 [1] drive segments with specific refinement to include a rapid acceleration and rapid deceleration segment. Given the limits of the test track, the vehicle was subjected to a driver-controlled random test cycles to enable data acquisition on the acceleration, deceleration, maximum speed and distance traverse that the vehicle can demonstrate. Having established the operating limits of the vehicle, the data was then used to design the four test cycles. Figure 6.5 depicts the developed test cycles.
Segment 1 mimics a moderate drive cycle with gradual acceleration followed by a gradual deceleration without bringing the vehicle to zero speed during the test. Segment 2 represents a more aggressive start-stop scenario. With maximum acceleration and deceleration segments, this segment was designed to mainly examine regenerative braking events and the receptivity of the ultracapacitors and batteries to regenerative power. Segment 3 subjects the vehicle to maximum velocity at maximum acceleration followed by sequential step mode decelerations. Segment 4 initially subjects the vehicle to a lower acceleration rate followed by short run at constant speed and then to a high acceleration. The vehicle is then decelerated rapidly till zero speed where a 2 second dwell time is introduced before rapidly accelerating the vehicle again.
0 10 20 30 40 50 60
1 7 13 19 25 31 37 43 49 55 61 67 73 79
Segment 1 (20secs)
Velocity (km/h)
Time (s)
Segment 2 (20secs) Segment 3 (20secs) Segment 4 (20secs)
Figure 6.5 Developed test profiles
Control System Architecture
The control system is designed around the National Instruments Compact Field Point (CFP) architecture. This system was chosen due to its robust operating condition tolerance and flexibility of developing real-time control process treads. To facilitate online monitoring of the vehicle during test runs, a wireless link was added to transmit system parameters to a Lab View visualisation environment running on a remote PC. The power and energy management framework described in Chapter 5 was implemented with LabView® -7 and hosted in the CFP real time controller.
Acquisition of data and process input variables was accomplished via the CFP voltage, current and counter/timer input modules. The analog and digital output modules fascinated controller commands. The four PWM signals required for the operation of the Power Electronics Shell was derived external to the CFP. Four independent programmable controllers (PIC) were designed to convert the duty cycle values generated via the CFP analog (0-5V) output module to four 20kHz fixed frequency – variable duty ratio PWM signals. Four enable signals were also made available as outputs of the CFP for each PWM channel. This provided a method to synchronize the PWMs as well as to feed an interlock circuit that prevents cross conduction of the power electronic switches. Optical isolation between the PWM signals and the power electronics drive circuitry was designed into the system. Details of this are to be found in the Appendix section.
With reference to the PES structure described in Chapter 5, the start-up and shutdown procedure mandatory for the safe operation of the vehicle power system was also implemented within the control system. Before entering State 000, the controller executes essential preconditioning of the power system. Most importantly, the precharging of both the DC bus and the ultracapacitors require supervisory control to limit large inrush currents.
Similarly, a shutdown sequence returns the power system to a safe mode before exiting state 000. Figure 6.6 illustrates these sequences. In the diagram <Master> refers to the main controller enable signal (Master switch).
000 Start
Permissive
Run Permissive On
Permissive
Precharge UC Batt SoC_OK
<Master> =1
Initialise Initialise
DAQ_OK
Reset Batt SoC
Reset UC SoC
000
Start up sequence
<Master> =0
Traction_OK
Shut down sequence
Pwr_Elect _OK
Prechg. DC bus
Power = 0_OK
Open UC circuit
Open DC bus
Shut down
Figure 6.6 Start-up and Shutdown sequence