Chapter 18: QPSK System Design using ADS Ptolemy
3. Spectrum Shaping (or Band limiting) Filters
Communication systems often employ band limiting or spectrum shaping filters for I and Q channels/signals. Place Raised Cosine filters from Numeric Filters library and define the parameters as shown below in I and Q branches:
x Interpolation = 8 x Length = 61
x Symbol Interval = 8 (should be same as Interpolation) x ExcessBW = 0.35 (i.e. 35% excess bandwidth)
x SquareRoot=YES (this makes it as a Root Raised Cosine Filter)
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4. Once finished schematic should appear as below (note that we have shifted the TkConstellation sink after the RRC (Root Raised Cosine) filters to see the effect of filter on constellation.
5. Simulate and observe the constellation after RRC Filters.
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6. Now once we have the band limited I & Q signals we can perform the IQ modulation on the same but before that we can see the I & Q spectrum to make sure things are as we desire them to be.
a. Insert FloatToTimed converter and I & Q channels and define TStep=Tsym/8 and that is because we have interpolated (upsampled) I & Q signal by factor of 8 hence sampling rate by rise by that amount.
b. Insert Spectrum Analyzer sink in I & Q channel and rename it as I_Spectrum and Q_Spectrum so that we can identify the same while plotting the data graphs.
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As we can from the previous graphics that I & Q spectrum looks to be fine, now we can place a QAM modulator from the Timed Modem library and define the parameters as shown here.
7. Connect the I and Q signals to the respective terminals and place a Spectrum Analyzer sink (name it as IF_Mod) to the output of QAM modulator with 50Ohm resistor in shunt to make sure we do the power calculations with respect to 50Ohm reference impedance.
8. Once done complete schematic design will look as shown below.
9. Run Simulation and plot the spectrum of IF_Mod as shown below
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Step2: Modulated Output Power Calculations
For correct power or voltage calculations, designers need to ensure that correct load impedance is used in the sinks. By default these sinks use DefaultLoadR which can be set from the DF Simulation controller’s Resistor tab (this will make global change) or in individual sinks as may be needed as shown below. Another alternate technique is to connect 50Ohm resistor in parallel to the sinks where voltage or power calculations needs to be performed.
Change the RLoad to 50 Ohm and change Vref=0.35 and Power to 13 dBm in the modulator as shown below
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Double click on the DF controller, go to Output tab and select IF_Freq, SymRate and click on Add. This allows us to access these variables in the data display to compute power.
Run Simulation and use the Eqn button on data display to write an equation to compute Main Channel Power at the Modulator output:
Channel_Power_dBm=spec_power(dBm(IF_Mod),IF_Freq-SymRate,IF_Freq+SymRate)
Please note: spec_power() is the function provided in ADS for Spectral Power calculations and IF_Mod is the name given to the Spectrum Analyzer sink connected at the modulator output. You can use whatever name you might have provided.
1. Insert a Table plot and drag it to the desired size and select the Equations under Datasets and Equations as shown here.
2. Select the equation name from the list and click on Add>> to add this measurement on the Table.
3. The Channel Power should be @13dBm as shown on the snapshot on next page.
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Step3: QPSK Demodulator and AWGN Channel
After we create QSPSK modulator design remaining sections in our QPSK system is Demodulator and AWGN (Additive White Gaussian Noise) channel.
1. Copy the earlier created QPSK_Mod cell by name QPSK_System (Hint: From the main ADS window right click on the QPSK_Mod cell and select Copy Cell….type new name in the pop up window)
2. Insert a new VAR block and change the Type to Name=Value and enter equations as shown in the snapshot below
292 Equations to be used:
Power_dBm= 13 (Comment: This is the Modulator output power measured previously) BitsPerSymbol = 2 (Comment: QPSK has 2 bits per symbol)
Eb_dBm = Power_dBm - 10*log10( SymRate*BitsPerSymbol ) (Comment: This is to compute the energy per bit)
EbN0 = 6 (Comment: Eb/No variable which will be swept for BER vs. Eb/No curve) No_dBm = Eb_dBm - EbN0 (Comment: Noise power in dBm to be added to the signal) NDensity = No_dBm (Comment: Optional variable to read the Noise Power)
3. Insert following components on the design:
a. AddNDensity (AWGN channel) and define the NDensity as No_dBm or NDesnsity as per the equation variable written earlier)
b. QAM_Demod and define the frequency as IF_Freq
c. Insert TimedToFloat to I & Q channels at the output of QAM Demodulator
d. Copy/Paste the RRC filter which were used in Modulator part and change the parameters as following
i. Decimation = 8 (same as Interpolation used earlier)
ii. Decimation Phase = 3 (we need to choose this parameter carefully to make sure we have the decent constellation at the output of RRC filters, range of this parameter is [0-(Decimation – 1)])
iii. Interpolation = 1
iv. SymbolInterval = 8 (same as Interpolation which 1) v. ExcessBW = 0.35
vi. Length = 61
e. Connect TimedSink at the output of each RRC Filters and name it I_Receive & Q_Receive as applicable.
f. Connect SpectrumAnalyzer sink at the output of Noise Channel and name it as Demod_Input
4. Double click on the DF controller and go to Output Tab where you should see SymRate &
IF_Freq already added. Select NDensity or No_dBm, EbNo from the list and click on Add button so that these values are available in the data display.
293 Overall QPSK system schematic should now appear as below
Run Simulation and plot a new graph for Demod_Input (which should show signal plus the noise as per our EbNo value) and Time Domain graph for received I & Q data. Data display should look something as below
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Step4: BER simulations
From the steps above system seems to be behaving properly and remaining thing is to perform the BER simulations. Before we perform BER we need to synchronize the Tx reference signal (output of Bit source at the input) and Received Bits (output of the Demapper).
Copy the QPSK_System cell as QPSK_System_BER.
To find the delay easiest way is to use Cross Correlation block in Numeric-Signal Processing library as shown below.
1. Instead of drawing long wires, we can use Wire Label to name the nodes to be connected, name X pin of the CrossCorr block as txref and label the same name at the output of Bit source at the Input. Name pin Y as rcvd and provide the same name label to the output of the Demapper.
2. Connect a Numeric Sink (name it as DelayCalc) at the Delay output of the CrossCorr block as shown below to note the delay between the 2 signals (delay might be shown as negative and that would mean that signal at Pin X is delayed with respect to Pin Y of the CrossCorr block, usually we should connect ref signal to Pin X of the CrossCorr block)
3. Run simulation and plot the result of the DelayCalc in a table as shown below:
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4. This simulation results indicate that received signal is delayed by 14 samples as compared to the reference signal and we need to insert 14 sample delay in the reference signal before we perform BER simulations.
5. Insert a Delay block after the Bit source and modify the Delay value to 14 as we calculated. Label the output of the Delay block as txref…
6. Insert BER_FER sink from Sinks library and set its parameters as shown here
a. Start=DefaultNumericStart (it reads start value from PTolemy DF controller)
b. Stop=DefaultNumericStop (it reads stop value from PTolemy DF controller)
c. EstRelVariance=0.01 (Confidence factor for BER calculations)
7. Modify the DF controller to set the values as shown below.
Here we are using 3e6 and we may require more for lower BER values as this sink is based on Monte Carlo technique.
8. Insert a Parameter Sweep controller from Controllers library and set its parameters as shown here. This is to provide the sweep to EbN0 from 0 to 10 in a step of 1 which inturn will change the Noise to offer known EbN0 for specific modulation (QPSK as in our case) for BER calculations.
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