MSI MS 7636 rev1 0

5 T it le Pa ge Cove r Sh e e t Block D ia gr a m / D e vice M a p/ GPI O Ta ble / h ist or y 2, 3, 4, CPU- CLK/ Con t r ol/ M I SC/ PEG ,CPU- M e m or y ,7 CPU- Pow e r ,CPU- GN D ,9 DDR I I I DI MM / ,1 CLK GEN I CS4 12 PCH - PCI - E/ PCI / D M I / USB/ CLK 13 PCH - SATA/ H OST/ FAN / GPI O/ D ispla y 14 PCH - SM B/ LPC/ AUD I O/ RTC/ SPI / JTAG/ RST 15 PCH - POW ER,GN D / N VRAM ,1 SI O- Fin t e k F7 8 F/ Pr in t Por t / COM / COM 18 PCI E x & x , x Slot s 19 PCI SLOT 20 LAN - RTL8 1 D L 21 Au dio Code c ALC8 22 JM B- I D E* 23 VGA - D - Su b 24 D VI - D 25 SATA n / FAN Con t r ol 26 USB 27 ATX F_ Pa n e l/ EM I / TPM / Bu zze r / KB 28 D C B ACPI Con t r olle r ( u PI solu t ion ) D D R Pow e r - u P6 - Ph a se PCH Pow e r - P0 - Lin e a r CPU_ VTT Pow e r - u P6 _ Ph a se GPU Pow e r - I SL6 _ - Ph a se CPU Pow e r - u P6 - Ph a se M a n u a l & Opt ion pa r t s D INTEL - Lynnfield/ Clarkdale LGA 1156 System Chipset: INTEL-IBEXPEAK PCH (H - 55) OnBoard Chipset: Clock Gen:ICS 4105B HD Audio Codec:ALC889 LAN:RTL8111D 10/100/1000 SIO:F71889 Flash ROM: 64 Mb SPI (CHIP) IDE X1 JMB-368 C Main Memory: DDRIII (800/1066/1333MHz) * (Dual Channel) Expansion Slots: PCI Express (X16) Slot * PCI Express (X1) Slot * PCI Slot *1 PWM: Controller: uP6206 ( 3-Phase use STD MOS 95W ) 32 ACPI: uPI+SIO 33 Other: 36 SATA(SATA2-300MB/s) *6 USB2.0 *10 (Rear*4 / Front*6) PRINT Header *1 COM pin header *2 TPM Header *1 on BOARD BUZZER D-SUB *1 DVI PORT*1 HDMI PORT*1 B OV by uP6264 or SIO uP6103 (CPU_VTT) Linear (PCH) uP6103(DDR) GPU Power -ISL6314 31 A uATX(244mm X 240mm) CPU: 30 34 MS-7636 Ver: 1.0 29 35 CPU XD P BOM SKUs H55:chiset S:solid cap EL:EL cap G:giga lan 8111DL M:Miga lan 8103EL 6: ports DVI: DVI Stuff MSI A MICRO-STAR INT'L CO.,LTD MS-7636 Size Custom Document Description Rev 1.0 Cover Sheet Date: Wednesday, October 28, 2009 Sheet of 38 INTEL CONFIDENTIAL D D UNBUFFERED DDRIII DIMM1 DDRIII 1066,1333 UNBUFFERED DDRIII DIMM2 128bit INTEL PCIE SLOT DDRIII 1066,1333 LGA 1156 16X 16X DDRIII FIRST LOGICAL DIMM FDI LINK X8 DMI X4 IBEXPEAK C DVI PORT:B VGA RGB C PCIE PCIE X1 SLOT USB-6 USB-5 USB-4 USB-3 USB-2 USB-1 USB-0 PCIE X1 SLOT GIGA LAN JMB-368 PCH H55 USB 2.0 IDE*1 HD AUDIO I/F B USB-7 USB-8 Audio Codec USB-9 B SPI ROM SPI I/F SATA#0 SATA II I/F SATA#1 SATA#2 SATA#3 SATA#4 PCI BUS SATA#5 PCI SLOT #1 LPC I/F SIO A A MICRO-STAR INT'L CO.,LTD KB/ MOUSE COM1/Print Port MS-7636 MSI Size Custom Document Description Rev 1.0 Block Diagram Date: Tuesday, October 27, 2009 Sheet of 38 DDR DIMM config Device Address PCI Con fig D EVI CE Clock CHA DIMM1 10100001B MEM_MA_CLK_H0/L0 H1/L1 CHB DIMM2 10100000B MEM_MB_CLK_H0/L0 H1/L1 PCI Slot M CP1 I N T Pin PCI _I NT# A PCI _I NT# B PCI _I NT# C PCI _I NT# D REQ# / GN T# PCI _REQ0# PCI _GNT0# I D SEL CLOCK AD16 PCH CLKOUT_PCI < 0> D D TPM PCH CLKOUT_PCI < 3> SI O PCH CLKOUT_PCI < 2> PCI RESET D EVI CE IBEXPEAK C C Signals PCI RST# _PCH PLTRST_BU1# PLTRST_BU2# PLTRST_BU3# PLTRST# Target PCI SLOT1 JMB368 I DE PCI E* 16 / * LAN&TPM SI O B B A A MICRO-STAR INT'L CO.,LTD MS-7636 MSI Size Custom Document Description Rev 1.0 Device Map Sheet Date: Tuesday, October 27, 2009 3 of 38 History D 1.2009-10-13 Change VCC_SENSE to CPU_VCC_SENSE 2.2009-10-13 Add HDMI circuit,change USB circuit,JSP1 circuit update 3.2009-10-13 update NCT3016 circuit ,add VTIN3 circuit for VRM MOS 4.2009-10-18 Add C589 C590 5.2009-10-18 Add R561 R562 For HDMI HPDET 6.2009-10-20 Add R602,Swap HDMI wire for layout 7.2009-10-21 NCT3016 circuit update:add R637 Q65 R592,Change U27 pin16 NCT_GPIO16,delete C121 8.2009-10-21A NCT3016 citcui update:add Q85,chang SATA1&SATA2 to SATA1_2 9.2009-10-23 change JUSB2 & JUSB1 for layout 10.2009-10-23A NCT3016 circuit update:add R850 11.2009-10-24 delete VCCGATE and DUALGATE circuit 12.2009-10-26 delete C534 13.2009-10-26 Swap RN40 D C C B B A A MICRO-STAR INT'L CO.,LTD MS-7636 MSI Size C Document Description Date: Tuesday, October 27, 2009 Rev 1.0 History Sheet of 38 AA8/Y8 ,these signals for 120 MHz from the Intel?5 Series Chipset CLKOUT_DP_P /CLKOUT_BCLK1_P and CLKOUT_DP_N / CLKOUT_BCLK1_N Leave as NC on the PCH and connect directly to GND at the processor 120MHz clock is used for embedded DisplayPort which is no supported on Desktop designs CK_DMI_P CK_DMI_N Follow DG&CRB BACK SIDE CP3 CP2 VTT_PGD MEM_PWRGD CPURST# PROC_PWROK VCCP_PWRGD X_COPPER X_COPPER H_PECI H_CATERR# H_PROCHOT# H_THERMTRIP# PM_SYNC CPU_VTT H_PECI 14 H_THERMTRIP# 14 PM_SYNC PM_EXT_TS0 PM_EXT_TS1 H_COMP2 H_COMP3 R296 R299 20R/1% 20R/1% R321 R322 R324 100R/1% SM_RCOMP0 24.9R/1% SM_RCOMP1 130R/1% SM_RCOMP2 R325 R214 49.9/1% 49.9/1% SKTOCC# C TP31 TP30 TP37 TP35 TP32 TP39 TP34 TP38 TP33 H_COMP1 H_COMP0 SKTOCC# RSTIN* PROC_PWROK VCCPWRGOOD VTTPWRGOOD SM_DRAMPWROK AG35 AG39 AH34 AF35 AH39 PECI CATERR* PROCHOT* THERMTRIP* PM_SYNC AB5 AB4 B11 C11 PM_EXT_TS[0]* PM_EXT_TS[1]* COMP2 COMP3 AG1 AD1 AE1 SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2] 1 H_GFX_VID[6 0] VAXG_SENSE VSSAXG_SENSE A13 B13 GFX_VCC_SENSE_R GFX_VSS_SENSE_R ISENSE T40 VCCP_IMAX 34 TP2 VTT_SELECT TP_MCP_VCCVTT_VID2 33 TP3 CPU_VCC_SENSE 35 CPU_VSS_SENSE 35 R394 0R R383 0R GFX_VCC_SENSE 34 GFX_VSS_SENSE 34 VCCP_IMAX 35 R35 X_0R0402 Follow MS7588-1.0 RSVD RSVD RSVD RSVD RSVD RSVD RSVD AL18 AK18 T39 M12 L12 AL15 AL14 TDO TDI TCK TMS TRST* AM38 AM37 AN37 AN40 AM39 CPU_TDO CPU_TDI CPU_TCK CPU_TMS CPU_TRST# PRDY* PREQ* DBR* BCLK_ITP* BCLK_ITP TAPPWRGOOD RESET_OBS* AJ38 AK37 AL40 AK40 AK39 AK34 AL39 XDP_CPU_PRDY# XDP_CPU_PREQ# FP_RST# XDP_CPU_BCLK_N XDP_CPU_BCLK_P XDP_CPU_PWRGD CPU_RESET_OUT# XDP_CPU_PRDY# 36 XDP_CPU_PREQ# 36 FP_RST# 15,29,36 XDP_CPU_BCLK_N 36 XDP_CPU_BCLK_P 36 XDP_CPU_PWRGD 36 CPU_RESET_OUT# 36 BPM[0]* BPM[1]* BPM[2]* BPM[3]* BPM[4]* BPM[5]* BPM[6]* BPM[7]* AL33 AL32 AK33 AK32 AM31 AL30 AK30 AK31 XDP_CPU_BPM_N0 XDP_CPU_BPM_N1 XDP_CPU_BPM_N2 XDP_CPU_BPM_N3 XDP_CPU_BPM_N4 XDP_CPU_BPM_N5 XDP_CPU_BPM_N6 XDP_CPU_BPM_N7 XDP_CPU_BPM_N0 XDP_CPU_BPM_N1 XDP_CPU_BPM_N2 XDP_CPU_BPM_N3 XDP_CPU_BPM_N4 XDP_CPU_BPM_N5 XDP_CPU_BPM_N6 XDP_CPU_BPM_N7 RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD AL17 AM17 AM25 AL29 AM30 AK29 AK28 AM29 AM28 AL27 AK27 AM26 AM27 AL26 AK26 AK25 COMP1 COMP0 SKTOCC* H_MCP_CFG11 H_MCP_CFG12 H_MCP_CFG13 H_MCP_CFG14 H_MCP_CFG15 H_MCP_CFG16 H_MCP_CFG17 K8 J12 L8 K9 K12 H7 L11 CFG11/FC_K8 CFG12/FC_J12 CFG13/FC_L8 CFG14/FC_K9 CFG15/FC_K12 CFG16/FC_H7 CFG17/FC_L11 RSVD RSVD RSVD RSVD GFX_DPRSLPVR/RSVD VSS RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD R190 0R R211 51R R202 R203 X_51R X_51R CPU_RESET_OUT# R199 51R H_THERMTRIP# H_PROCHOT# R213 R204 X_51R 51R R212 DMI_RX0 DMI_RX0# DMI_RX1 DMI_RX1# DMI_RX2 DMI_RX2# DMI_RX3 DMI_RX3# R1 T1 U3 U2 U1 V1 W3 W2 DMI_RX[0] DMI_RX[0]* DMI_RX[1] DMI_RX[1]* DMI_RX[2] DMI_RX[2]* DMI_RX[3] DMI_RX[3]* 36 36 36 36 36 36 36 36 C7 D7 E7 E6 E5 F5 F3 F4 G6 G5 H4 H3 F7 G7 J6 J5 K3 K4 H8 J8 L6 L5 M4 M3 K7 L7 N6 N5 M8 N8 R5 R6 DMI_TX[0] DMI_TX[0]* DMI_TX[1] DMI_TX[1]* DMI_TX[2] DMI_TX[2]* DMI_TX[3] DMI_TX[3]* L1 M1 N3 N2 N1 P1 R2 R3 PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RBIAS RSVD RSVD RSVD RSVD DMI_TX0 DMI_TX0# DMI_TX1 DMI_TX1# DMI_TX2 DMI_TX2# DMI_TX3 DMI_TX3# EXP_A_TXP_0 EXP_A_TXN_0 EXP_A_TXP_1 EXP_A_TXN_1 EXP_A_TXP_2 EXP_A_TXN_2 EXP_A_TXP_3 EXP_A_TXN_3 EXP_A_TXP_4 EXP_A_TXN_4 EXP_A_TXP_5 EXP_A_TXN_5 EXP_A_TXP_6 EXP_A_TXN_6 EXP_A_TXP_7 EXP_A_TXN_7 EXP_A_TXP_8 EXP_A_TXN_8 EXP_A_TXP_9 EXP_A_TXN_9 EXP_A_TXP_10 EXP_A_TXN_10 EXP_A_TXP_11 EXP_A_TXN_11 EXP_A_TXP_12 EXP_A_TXN_12 EXP_A_TXP_13 EXP_A_TXN_13 EXP_A_TXP_14 EXP_A_TXN_14 EXP_A_TXP_15 EXP_A_TXN_15 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 DMI_TX0 DMI_TX0# DMI_TX1 DMI_TX1# DMI_TX2 DMI_TX2# DMI_TX3 DMI_TX3# 13 13 13 13 13 13 13 13 D C GRCOMP D11 C10 B10 A11 GRBIAS R297 750/1% R304 49.9/1% CPU1D VDDIO FDI_FSYNC0 FDI_LSYNC0 14 FDI_FSYNC0 14 FDI_LSYNC0 AC4 AD4 FDI_FSYNC[0] FDI_LSYNC[0] DISPLAY LINK FDI_FSYNC1 FDI_LSYNC1 14 FDI_FSYNC1 14 FDI_LSYNC1 AC3 AD3 FDI_INT 14 FDI_INT CPU_VTT AC2 FDI_FSYNC[1] FDI_LSYNC[1] FDI_INT OF 12 H_PROCHOT# PEG_TX[0] PEG_TX[0]* PEG_TX[1] PEG_TX[1]* PEG_TX[2] PEG_TX[2]* PEG_TX[3] PEG_TX[3]* PEG_TX[4] PEG_TX[4]* PEG_TX[5] PEG_TX[5]* PEG_TX[6] PEG_TX[6]* PEG_TX[7] PEG_TX[7]* PEG_TX[8] PEG_TX[8]* PEG_TX[9] PEG_TX[9]* PEG_TX[10] PEG_TX[10]* PEG_TX[11] PEG_TX[11]* PEG_TX[12] PEG_TX[12]* PEG_TX[13] PEG_TX[13]* PEG_TX[14] PEG_TX[14]* PEG_TX[15] PEG_TX[15]* Break-out:10mil width, mil space Other Area:10mil width, 15 mil space demo board no connect FDI_TX[0] FDI_TX[0]* FDI_TX[1] FDI_TX[1]* FDI_TX[2] FDI_TX[2]* FDI_TX[3] FDI_TX[3]* U6 U5 V4 V3 U8 U7 W8 W7 FDI_TX0 FDI_TX0# FDI_TX1 FDI_TX1# FDI_TX2 FDI_TX2# FDI_TX3 FDI_TX3# FDI_TX0 FDI_TX0# FDI_TX1 FDI_TX1# FDI_TX2 FDI_TX2# FDI_TX3 FDI_TX3# 14 14 14 14 14 14 14 14 FDI_TX[4] FDI_TX[4]* FDI_TX[5] FDI_TX[5]* FDI_TX[6] FDI_TX[6]* FDI_TX[7] FDI_TX[7]* W5 W4 R8 R7 Y4 Y3 Y6 Y5 FDI_TX4 FDI_TX4# FDI_TX5 FDI_TX5# FDI_TX6 FDI_TX6# FDI_TX7 FDI_TX7# FDI_TX4 FDI_TX4# FDI_TX5 FDI_TX5# FDI_TX6 FDI_TX6# FDI_TX7 FDI_TX7# 14 14 14 14 14 14 14 14 B Q30 C E SIO_TRIP# 18 3904_SOT23 CPU reset reserve 3VSB CPU_VTT R1 X_1KR1%0402 CPU_VTT R182 10K/1% R197 150R PLTRST# Follow MS7588-1.0 R192 X_1.3K/1% C80 X_100p/16X Q26 CPU_PSI E CPU_VTT XDP_CPU_PRDY# DMI_RX0 DMI_RX0# DMI_RX1 DMI_RX1# DMI_RX2 DMI_RX2# DMI_RX3 DMI_RX3# PEG_RX[0] PEG_RX[0]* PEG_RX[1] PEG_RX[1]* PEG_RX[2] PEG_RX[2]* PEG_RX[3] PEG_RX[3]* PEG_RX[4] PEG_RX[4]* PEG_RX[5] PEG_RX[5]* PEG_RX[6] PEG_RX[6]* PEG_RX[7] PEG_RX[7]* PEG_RX[8] PEG_RX[8]* PEG_RX[9] PEG_RX[9]* PEG_RX[10] PEG_RX[10]* PEG_RX[11] PEG_RX[11]* PEG_RX[12] PEG_RX[12]* PEG_RX[13] PEG_RX[13]* PEG_RX[14] PEG_RX[14]* PEG_RE[15] PEG_RX[15]* OF 12 if not use XDP,add Test point CPU_VTT PM_SYNC H_PECI 13 13 13 13 13 13 13 13 C9 D9 B8 C8 A7 A6 B6 C6 A5 B5 B4 C4 C3 D3 D2 E2 E1 F1 G3 G2 G1 H1 J3 J2 J1 K1 L2 L3 P3 P4 T3 T4 AM14 AM13 AK15 AK16 N12-160A010-F02 H_CATERR# EXP_A_RXP_0 EXP_A_RXN_0 EXP_A_RXP_1 EXP_A_RXN_1 EXP_A_RXP_2 EXP_A_RXN_2 EXP_A_RXP_3 EXP_A_RXN_3 EXP_A_RXP_4 EXP_A_RXN_4 EXP_A_RXP_5 EXP_A_RXN_5 EXP_A_RXP_6 EXP_A_RXN_6 EXP_A_RXP_7 EXP_A_RXN_7 EXP_A_RXP_8 EXP_A_RXN_8 EXP_A_RXP_9 EXP_A_RXN_9 EXP_A_RXP_10 EXP_A_RXN_10 EXP_A_RXP_11 EXP_A_RXN_11 EXP_A_RXP_12 EXP_A_RXN_12 EXP_A_RXP_13 EXP_A_RXN_13 EXP_A_RXP_14 EXP_A_RXN_14 EXP_A_RXP_15 EXP_A_RXN_15 CPU_TDO 36 CPU_TDI 36 CPU_TCK 36 CPU_TMS 36 CPU_TRST# 36 OF 12 51R C PSI# Q7 X_N-SST3904_SOT23 35 15,18,36 PLTRST# R188 10K/1% CPURST# R193 X_665R/1% CPURST# A 3904_SOT363 SEL1 SEL0 PCIE CONFIG 1 X 16 GFX_VR_EN 34 0R H_GFX_VID0 H_GFX_VID1 H_GFX_VID2 H_GFX_VID3 H_GFX_VID4 H_GFX_VID5 H_GFX_VID6 CPU_VCC_SENSE CPU_VSS_SENSE PEG CONFIG TABLE SEL2 R380 T35 T34 AE35 AE36 CFG6/FC_E9 CFG7/FC_F9 CFG8/FC_G12 CFG9/FC_H12 CFG10/FC_K10 Configuration signals: The CFG signals have a default value of if not terminated on the board Refer to the Platform Design Guide for pull-down recommendations when logic low is desired CFG[0]: PCI Express Bifurcation: - With all Intel?5 Series Chipsets except P55 and P57 SKUs: Reserved (Only x16 PCI Express supported by default) - With Intel?5 Series Chipsets P55 and P57 SKUs only: = x16 PCI Express = x8 PCI Express - With Workstation and Server Ibex Peak: = x16 PCI Express = x8 PCI Express CFG[1]: Reserved (Lynnfield processor PCI Express Port Bifurcation) CFG[2]: Reserved configuration lands A test point may be placed on the board for this land CFG[3]: PCI Express* Static Lane Numbering Reversal A test point may be placed on the board for this land Lane reversal will be applied across all 16 lanes 1: No Reversal 0: Reversal In the case of Bifurcation with NO Lane Reversal, the physical lane mapping is as follows: Lanes 15:8 => Port Lanes 7:0 Lanes 7:0 => Port Lanes 7:0 In the case of Bifurcation WITH Lane Reversal, the physical lane mapping is as follows: Lanes 15:8 => Port Lanes 0:7 Lanes 7:0 => Port Lanes 0:7 CFG[6:4]: Reserved configuration lands A test point may be placed on the board for this land CFG[17:7]: Reserved configuration lands Intel does not recommend a test point on the board for this land 35 CPU_VTT VCC_SENSE VSS_SENSE VTT_SENSE VSS_SENSE_VTT E9 F9 G12 H12 K10 X_3K X_3K X_3K X_3K X_3K X_3K X_3K X_3K X_3K 35 Follow MS7588-1.0 R210 X_1KR1%0402 TP_MCP_VCCVTT_VID0 H_MCP_CFG6 H_MCP_CFG7 H_MCP_CFG8 H_MCP_CFG9 H_MCP_CFG10 H_MCP_CFG0 R381 H_MCP_CFG1 R362 H_MCP_CFG2 R361 H_MCP_CFG3 R363 H_MCP_CFG4 R368 H_MCP_CFG5 R364 H_MCP_CFG6 R365 H_MCP_CFG7 R379 H_MCP_CFG15 R359 H_VID1 H_VID[7 2] AE38 AF39 AG40 CFG0 CFG1/RSVD CFG2/RSVD CFG3/PEG_LANE_REVERSAL CFG4/RSVD CFG5/VSS A4 B3 C2 D1 TP_GFX_DPRSLPVR J10 AV38 AK12 AK13 AK14 AL12 AM15 AM16 AM18 AM19 AM20 AM21 AU40 AV1 AV39 AW2 AW38 AY37 F12 F6 G10 B12 E12 E11 C12 G11 J11 H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 H_VID7 CPU_PSI GFX_VR_EN GFX_IMON FC_AE38 VTT_SELECT FC_AG40 E8 G8 E10 F10 H10 H9 CFG 0~5 HAVE INTERNAL PULL-UPS A GFX_VR_EN GFX_IMON/RSVD GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6] H_MCP_CFG0 H_MCP_CFG1 H_MCP_CFG2 H_MCP_CFG3 H_MCP_CFG4 H_MCP_CFG5 TP36 R358 X_3K R353 X_3K R352 X_3K AF34 AH36 AH35 AG37 AH37 AF2 AF36 AK38 CPU_VTT B TDI_M TD0_M U40 U39 U38 U37 U36 U35 U34 U33 AG38 B 30,35 VTT_PGD 15 MEM_PWRGD 18 AF37 AF38 X_49.9R/1% 15 CPU_PWRGD 14,18 For DP port H_TDO_TDI_M TP1 R178 CPU_VTT VID[0]/MSID[0] VID[1]/MSID[1] VID[2]/MSID[2] VID[3]/MSID[3] VID[4]/MSID[4] VID[5]/MSID[5] VID[6] VID[7] PSI* MISC D BCLK[0] BCLK[0]* PEG_CLK PEG_CLK* BCLK[1]* BCLK[1] 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 DMI AA7 AA6 AA3 AA4 Y8 AA8 35 B CLK133M_CPU_P CLK133M_CPU_N 13 CLK133M_CPU_P 13 CLK133M_CPU_N 13 CK_DMI_P 13 CK_DMI_N H_VID0 PEG CPU1C CPU1E CPU_TDO CPU_TDI CPU_TMS R196 R201 R207 51R 51R 51R CPU_TCK CPU_TRST# R217 R209 51R 51R MICRO-STAR INT'L CO.,LTD demo board empty check list not empty Size Custom X MS-7636 MSI Document Description Sheet Date: Tuesday, October 27, 2009 Rev 1.0 CPU-CNTL/CLK/MISC of 38 CPU1A 10 MEM_MA_WE_L 10 MEM_MA_CAS_L 10 MEM_MA_RAS_L 10 MEM_MA_BANK0 10 MEM_MA_BANK1 10 MEM_MA_BANK2 10 MEM_MA_CS_L0 10 MEM_MA_CS_L1 10 MEM_MA_CS_L2 10 MEM_MA_CS_L3 10 10 10 10 10 10 10 10 MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA_CKE2 MEM_MA_CKE3 MEM_MA_ODT0 MEM_MA_ODT1 MEM_MA_ODT2 MEM_MA_ODT3 AW18 AY15 AV15 AU15 AW14 AY13 AV14 AW13 AU14 AW12 AT19 AU13 AW11 AU24 AT11 AR10 SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15] MEM_MA_WE_L MEM_MA_CAS_L MEM_MA_RAS_L AT22 AU22 AT20 SA_WE* SA_CAS* SA_RAS* MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2 AV20 AU19 AU12 SA_BA[0] SA_BA[1] SA_BA[2] MEM_MA_CS_L0 MEM_MA_CS_L1 MEM_MA_CS_L2 MEM_MA_CS_L3 AV21 AW24 AU21 AU23 SA_CS[0]* SA_CS[1]* SA_CS[2]* SA_CS[3]* MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA_CKE2 MEM_MA_CKE3 AU10 AW10 AV10 AY10 SA_CKE[0] SA_CKE[1] SA_CKE[2] SA_CKE[3] MEM_MA_ODT0 MEM_MA_ODT1 MEM_MA_ODT2 MEM_MA_ODT3 AV23 AV24 AW23 AY24 SA_ODT[0] SA_ODT[1] SA_ODT[2] SA_ODT[3] MEM_MA_CLK_H0 MEM_MA_CLK_L0 MEM_MA_CLK_H1 MEM_MA_CLK_L1 MEM_MA_CLK_H2 MEM_MA_CLK_L2 MEM_MA_CLK_H3 MEM_MA_CLK_L3 AR22 AR21 AP18 AN18 AN21 AP21 AP19 AN19 C 10 MEM_MA_CLK_H0 10 MEM_MA_CLK_L0 10 MEM_MA_CLK_H1 10 MEM_MA_CLK_L1 10 MEM_MA_CLK_H2 10 MEM_MA_CLK_L2 10 MEM_MA_CLK_H3 10 MEM_MA_CLK_L3 DDR3_DRAMRST# AV8 AK22 AM22 AL23 AK23 B SA_CK[0] SA_CK[0]* SA_CK[1] SA_CK[1]* SA_CK[2] SA_CK[2]* SA_CK[3] SA_CK[3]* SM_DRAMRST* SA_CS[4]* SA_CS[5]* SA_CS[6]* SA_CS[7]* AL10 AM10 SA_DQS[8] SA_DQS[8]* AP10 AN10 AR11 AP11 AK9 AL9 AK11 AM11 SA_ECC_CB[0] SA_ECC_CB[1] SA_ECC_CB[2] SA_ECC_CB[3] SA_ECC_CB[4] SA_ECC_CB[5] SA_ECC_CB[6] SA_ECC_CB[7] DDR_A OF 12 SA_DQS[0] SA_DQS[0]* SA_DQS[1] SA_DQS[1]* SA_DQS[2] SA_DQS[2]* SA_DQS[3] SA_DQS[3]* SA_DQS[4] SA_DQS[4]* SA_DQS[5] SA_DQS[5]* SA_DQS[6] SA_DQS[6]* SA_DQS[7] SA_DQS[7]* AK3 AJ3 AP2 AP3 AU4 AU3 AY6 AW6 AR28 AT29 AV32 AW32 AW36 AV35 AR39 AR38 MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7 SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7] AJ2 AN1 AU1 AV6 AN29 AW31 AU35 AT38 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63] AH1 AJ4 AL2 AL1 AG2 AH2 AK1 AK2 AN3 AN2 AR3 AR2 AM3 AM2 AP1 AR4 AT4 AU2 AW3 AW4 AT3 AT1 AV2 AV4 AW5 AY5 AU8 AY8 AU5 AV5 AV7 AW7 AN27 AT28 AP28 AP30 AN26 AR27 AR29 AN30 AU30 AU31 AV33 AU34 AV30 AW30 AU33 AW33 AW35 AY35 AV37 AU37 AY34 AW34 AV36 AW37 AT39 AT40 AN38 AN39 AU38 AU39 AP39 AP40 MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63 MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 11 MEM_MB_ADD[15 0] 10 10 10 10 10 10 10 10 11 MEM_MB_WE_L 11 MEM_MB_CAS_L 11 MEM_MB_RAS_L 11 MEM_MB_BANK0 11 MEM_MB_BANK1 11 MEM_MB_BANK2 MEM_MA_DATA[63 0] 10 11 11 11 11 MEM_MB_CS_L0 MEM_MB_CS_L1 MEM_MB_CS_L2 MEM_MB_CS_L3 11 11 11 11 11 11 11 11 MEM_MB_CKE0 MEM_MB_CKE1 MEM_MB_CKE2 MEM_MB_CKE3 MEM_MB_ODT0 MEM_MB_ODT1 MEM_MB_ODT2 MEM_MB_ODT3 11 MEM_MB_CLK_H0 11 MEM_MB_CLK_L0 11 MEM_MB_CLK_H1 11 MEM_MB_CLK_L1 11 MEM_MB_CLK_H2 11 MEM_MB_CLK_L2 11 MEM_MB_CLK_H3 11 MEM_MB_CLK_L3 VCC_DDR MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15 AU20 AU18 AV18 AU17 AY18 AV17 AW17 AU16 AT17 AY16 AY25 AW16 AW15 AW28 AY12 AV11 SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15] MEM_MB_WE_L MEM_MB_CAS_L MEM_MB_RAS_L AU26 AW27 AW26 SB_WE* SB_CAS* SB_RAS* MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2 AU25 AW25 AV12 SB_BA[0] SB_BA[1] SB_BA[2] MEM_MB_CS_L0 MEM_MB_CS_L1 MEM_MB_CS_L2 MEM_MB_CS_L3 AY27 AW29 AV26 AV29 SB_CS[0]* SB_CS[1]* SB_CS[2]* SB_CS[3]* MEM_MB_CKE0 MEM_MB_CKE1 MEM_MB_CKE2 MEM_MB_CKE3 AW8 AY9 AU9 AV9 SB_CKE[0] SB_CKE[1] SB_CKE[2] SB_CKE[3] MEM_MB_ODT0 MEM_MB_ODT1 MEM_MB_ODT2 MEM_MB_ODT3 AU27 AU29 AV27 AU28 SB_ODT[0] SB_ODT[1] SB_ODT[2] SB_ODT[3] MEM_MB_CLK_H0 MEM_MB_CLK_L0 MEM_MB_CLK_H1 MEM_MB_CLK_L1 MEM_MB_CLK_H2 MEM_MB_CLK_L2 MEM_MB_CLK_H3 MEM_MB_CLK_L3 AR17 AR16 AT15 AR15 AN17 AN16 AR19 AR18 SB_CK[0] SB_CK[0]* SB_CK[1] SB_CK[1]* SB_CK[2] SB_CK[2]* SB_CK[3] SB_CK[3]* AM23 AM24 AL24 AK24 SB_CS[4]* SB_CS[5]* SB_CS[6]* SB_CS[7]* AR14 AR13 SB_DQS[8] SB_DQS[8]* AR12 AT13 AN15 AP14 AM12 AN12 AN14 AP13 SB_ECC_CB[0] SB_ECC_CB[1] SB_ECC_CB[2] SB_ECC_CB[3] SB_ECC_CB[4] SB_ECC_CB[5] SB_ECC_CB[6] SB_ECC_CB[7] VCC_DDR DDR3_DRAMRST#B R270 470R 11 R262 150R C D MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 R268 470R Q45 2N3904 B E 10 MEM_MA_ADD[15 0] CPU1B VCC_DDR DDR_B R261 X_0R OF 12 R260 150R X_0R DDR3_DRAMRST#A AF4 AE5 AH6 AJ5 AN6 AM6 AR8 AP8 AT25 AR24 AP32 AR32 AR36 AR37 AL37 AM36 MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H7 MEM_MB_DQS_L7 SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7] AE4 AH4 AM7 AT7 AN24 AN32 AM33 AK35 MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63] AD7 AD6 AH8 AJ8 AC7 AC6 AF5 AE6 AG5 AH7 AK6 AL4 AG6 AG4 AJ7 AK7 AL6 AN5 AP6 AR5 AL5 AM4 AN7 AP5 AT6 AR7 AR9 AM8 AN8 AR6 AL8 AT9 AN23 AP23 AR25 AR26 AT23 AP22 AP25 AT26 AT32 AP31 AR33 AM32 AT31 AR31 AR34 AT33 AR35 AT36 AN33 AP36 AP34 AT35 AN34 AP37 AL35 AM35 AJ36 AJ37 AN35 AM34 AJ35 AL36 MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63 MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H7 MEM_MB_DQS_L7 MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 D 11 11 11 11 11 11 11 11 MEM_MB_DATA[63 0] 11 C B 10 C R258 SB_DQS[0] SB_DQS[0]* SB_DQS[1] SB_DQS[1]* SB_DQS[2] SB_DQS[2]* SB_DQS[3] SB_DQS[3]* SB_DQS[4] SB_DQS[4]* SB_DQS[5] SB_DQS[5]* SB_DQS[6] SB_DQS[6]* SB_DQS[7] SB_DQS[7]* 470R Q44 2N3904 B E R269 A C A R257 C180 X_0.1u/16X 1K/1% Q48 2N3904 B E DDR3_DRAMRST# MICRO-STAR INT'L CO.,LTD MS-7636 MSI Size Custom Document Description Rev 1.0 CPU-Memory Date: Tuesday, October 27, 2009 Sheet of 38 GPU_CORE Decoupling VCCP VCCP CPU_VTT GPU_CORE CPU_VTT VCC_DDR-Decoupling CPU_VTT CPU1F CPU POWER VCC_DDR CPU_VTT Decoupling CPU_VTT CPU_VTT C C561 X_22u/6.3X/8 C554 X_22u/6.3X/8 C553 X_22u/6.3X/8 C549 X_22u/6.3X/8 C154 22u/6.3X/8 C128 22u/6.3X/8 OF 12 C141 22u/6.3X/8 CPU POWER C147 22u/6.3X/8 VDDQ_01 VDDQ_02 VDDQ_03 VDDQ_04 VDDQ_05 VDDQ_06 VDDQ_07 VDDQ_08 VDDQ_09 VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14 VDDQ_15 VDDQ_16 VDDQ_17 VDDQ_18 VDDQ_19 D CPU SOCKET CAVITY CAPS C174 22u/6.3X/8 AJ11 AJ13 AJ15 AT18 AT21 AT10 AU11 AV13 AV16 AV19 AV22 AV25 AV28 AW9 AY11 AY14 AY17 AY23 AY26 C164 22u/6.3X/8 CPU SOCKET CAVITY CAPS VCC_DDR C158 22u/6.3X/8 C558 X_22u/6.3X/8 C556 X_22u/6.3X/8 C557 X_22u/6.3X/8 C560 X_22u/6.3X/8 VTT_67 VTT_68 VTT_69 VTT_70 VTT_71 VTT_72 VTT_73 VTT_74 VTT_75 VTT_76 VTT_77 VTT_78 VTT_79 C555 X_22u/6.3X/8 L10 M10 M11 M9 N7 P6 P7 P8 T2 V2 V6 W1 W6 C149 22u/6.3X/8 VCCPLL_01 VCCPLL_02 VCCPLL_03 T6 T7 T8 V7 V8 AB7 C117 22u/6.3X/8 AG8 AF8 AF7 VTT_61 VTT_62 VTT_63 VTT_64 VTT_65 VTT_66 C559 X_22u/6.3X/8 VTT_60 VAXG_01 VAXG_02 VAXG_03 VAXG_04 VAXG_05 VAXG_06 VAXG_07 VAXG_08 VAXG_09 VAXG_10 VAXG_11 VAXG_12 VAXG_13 VAXG_14 VAXG_15 VAXG_16 VAXG_17 VAXG_18 VAXG_19 VAXG_20 VAXG_21 VAXG_22 VAXG_23 VAXG_24 VAXG_25 VAXG_26 VAXG_27 VAXG_28 VAXG_29 VAXG_30 VAXG_31 VAXG_32 VAXG_33 VAXG_34 VAXG_35 VAXG_36 VAXG_37 VAXG_38 VAXG_39 VAXG_40 VAXG_41 VAXG_42 VAXG_43 VAXG_44 VAXG_45 VAXG_46 VAXG_47 VAXG_48 VAXG_49 C136 22u/6.3X/8 AJ23 GPU_CORE CPU1I A14 A15 A17 A18 B14 B15 B17 B18 C14 C15 C17 C18 C20 C21 D14 D15 D17 D18 D20 D21 E14 E15 E17 E18 E20 F14 F15 F17 F18 F19 G14 G15 G17 G18 H14 H15 H17 J14 J15 J16 K14 K15 K16 L14 L15 L16 M14 M15 M16 C171 22u/6.3X/8 VTT_01 VTT_02 VTT_03 VTT_04 VTT_05 VTT_06 VTT_07 VTT_08 VTT_09 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25 VTT_26 VTT_27 VTT_28 VTT_29 VTT_30 VTT_31 VTT_32 VTT_33 VTT_34 VTT_35 VTT_36 VTT_37 VTT_38 VTT_39 VTT_40 VTT_41 VTT_42 VTT_43 VTT_44 VTT_45 VTT_46 VTT_47 VTT_48 VTT_49 VTT_50 VTT_51 VTT_52 VTT_53 VTT_54 VTT_55 VTT_56 VTT_57 VTT_58 C166 X_4.7u/10X/12 AA33 AA34 AA35 AA36 AA37 AA38 AC33 AC34 AC35 AC36 AC37 AC38 AC39 AC40 AD33 AD34 AD35 AD36 AD37 AD38 AD39 AD40 AE33 AE34 AE39 AE40 AF33 AG33 AJ31 AJ32 V33 V34 V35 V36 V37 V38 V39 V40 Y33 Y34 Y35 Y36 Y37 Y38 AJ21 AJ25 AJ27 AJ29 AK20 AK21 AL20 AL21 AC8 AE8 AJ17 AJ19 AK19 AC5 C172 22u/6.3X/8 CPU POWER CPU SOCKET CAVITY CAPS OF 12 VCC1_8 VCCP B C134 22u/6.3X/8 C120 22u/6.3X/8 C118 22u/6.3X/8 C132 22u/6.3X/8 C153 22u/6.3X/8 C131 22u/6.3X/8 C144 22u/6.3X/8 C151 22u/6.3X/8 C152 22u/6.3X/8 C119 22u/6.3X/8 C133 22u/6.3X/8 OF 12 C143 22u/6.3X/8 C142 22u/6.3X/8 VCC1_8 0603 C173 22u/6.3X/8 C548 X_1u/10Y/6 C550 X_1u/10Y/6 C545 X_1u/10Y/6 C543 X_1u/10Y/6 C546 X_22u/6.3X/8 C540 X_22u/6.3X/8 C552 X_22u/6.3X/8 C542 X_22u/6.3X/8 C551 X_22u/6.3X/8 C541 X_22u/6.3X/8 C535 X_22u/6.3X/8 C547 X_22u/6.3X/8 OF 12 C536 X_22u/6.3X/8 C537 X_22u/6.3X/8 H26 H28 H29 H31 H32 H34 H35 H37 H38 H40 J18 J19 J21 J22 J24 J25 J27 J28 J30 J31 J33 J34 J36 J37 J39 J40 K17 K18 K20 K21 K23 K24 K26 K27 K29 K30 K32 K33 K35 K36 K38 K39 L17 L19 L20 L22 L23 L25 L26 L28 L29 L31 L32 L34 L35 L37 L38 L40 M17 M19 M21 M22 M24 M25 M27 M28 M30 M33 M34 M36 M37 M39 M40 N33 N35 N36 N38 N39 P33 P34 P35 P36 P37 P38 P39 P40 R33 R34 R35 R36 R37 R38 R39 R40 C123 22u/6.3X/8 B VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC C160 22u/6.3X/8 C VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC CPU1H C175 22u/6.3X/8 D A23 A24 A26 A27 A33 A35 A36 A38 B23 B25 B26 B28 B29 B31 B32 B34 B35 B37 B38 C23 C24 C25 C27 C28 C30 C31 C33 C34 C36 C37 C39 C40 D23 D24 D26 D27 D29 D30 D32 D33 D35 D36 D38 D39 E22 E23 E25 E26 E28 E29 E31 E32 E34 E35 E37 E38 E40 F21 F22 F24 F25 F27 F28 F30 F31 F33 F34 F36 F37 F39 F40 G20 G21 G23 G24 G26 G27 G29 G30 G32 G33 G35 G36 G38 G39 H19 H20 H22 H23 H25 CPU1G CPU POWER A A CPU SOCKET CAVITY CAPS MICRO-STAR INT'L CO.,LTD MS-7636 MSI Size Custom Document Description Rev 1.0 CPU-Power Sheet Date: Tuesday, October 27, 2009 of 38 stuff or unstuff ????? CPU1J CPU1K A16 A25 A28 A34 A37 AA5 AB3 AB33 AB34 AB35 AB36 AB37 AB38 AB39 AB40 AB6 AB8 AC1 AD5 AD8 AE3 AE37 AE7 AF1 AF40 AF6 AG34 AG36 AH5 AG7 AH3 AH33 AH38 AJ1 AJ12 AJ14 AJ16 AJ18 AJ20 AJ22 AJ24 AJ26 AJ28 AJ30 AJ33 AJ34 AJ40 AJ6 AJ9 AK10 AK17 AK36 AK5 AK8 AL11 AL13 AL16 AL19 AL22 AL25 AL28 AL3 AL31 AL34 AL38 AL7 AM1 AM40 AK4 AN13 AN20 AN22 AN25 AN28 AN31 AM5 AN36 AM9 AN4 AP12 AP15 AP16 AP17 AP20 AP24 AP26 AP27 AP29 AN9 AP35 D C B VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS CPU1L VDDIO AP33 AP38 AP4 AP7 AP9 AR1 AR20 AR23 AR40 AT12 AT14 AT16 AT2 AT24 AT27 AT30 AR30 AT34 AT37 AT5 AU32 AT8 AV3 AV31 AV34 AU36 AU6 AY33 AY36 AY4 AY7 B16 B24 B27 B30 B33 B36 B7 B9 C13 C16 C19 C22 C26 C29 C32 C35 C38 C5 D10 D12 D13 D16 D19 D22 D25 D28 D31 D34 D37 D4 D40 D5 D6 D8 E13 E16 E19 E21 E24 E27 E3 E30 E33 E36 E39 E4 F11 F13 F16 F2 F20 F23 F26 F29 F32 F35 F38 F8 G13 G16 G19 G22 G25 G28 G31 G34 G37 G4 G40 G9 H11 H13 H16 H18 H2 H21 H24 H27 H30 H33 H36 H39 H5 H6 J13 J17 J20 J23 J26 J29 J32 J35 J38 J4 J7 J9 K11 K13 K19 K2 K22 K25 K28 K31 K34 K37 K40 K5 K6 L13 L18 L21 L24 L27 L30 L33 L36 L39 L4 L9 M13 M18 M2 M20 M23 M26 M29 M32 M35 M38 M5 M6 M7 N34 N37 N4 N40 P2 P5 R4 T33 T36 T37 T38 T5 U4 V5 W33 W34 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 10 OF 12 VSS VSS VSS VSS VSS VSS_NCTF W35 W36 W37 W38 Y7 B39 VREF_DQ_B VREF_DQ_A close to DIMM TP_CGC TP29 R320 R323 X_0R X_0R DIMM_VREFA DIMM_VREFB A12 RSVD AD2 AE2 AF3 AG3 AU7 AH40 AJ39 RSVD RSVD RSVD RSVD VSS RSVD RSVD AN11 AY3 RSVD RSVD D NOTE:R310,R316 STUFFED,IF DDR3 DIMM VREFDQ OPTION UNSTUFFED FOLLOW DDR3 DIMM VREFDQ Platform Design Guide Change Option FOLLOW WW11, 18 2009 Havendale and Clarkdale must stuff NC/SPARE Channel A and B Output DDR3 DIMM DQ Reference 12 OF 12 Voltage NOTE: This signal is reserved for possible future use, and may not be driven on initial steppings Refer to the Platform Design Guide for DIMM DQ VREF implementation details C B GND 11 OF 12 A A MICRO-STAR INT'L CO.,LTD MS-7636 MSI Size Custom Document Description Rev 0A CPU-GND Sheet Date: Tuesday, October 27, 2009 of 38 DDRIII DIMM_A1 VCC_DDR C92 C2.2u6.3Y C169 C220p10X C30 C2.2u6.3Y C177 C2.2u6.3Y Place close to DIMM1 with DIMM2 VCC_DDR C1u6.3Y0402-RH Place close to DIMM2 VCC_DDR C138 C1u6.3Y0402-RH C112 C1u6.3Y0402-RH B 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 89 92 95 98 101 104 UPI VOLTAGE CONSOLE VREF_CA_A VCC_DDR VREF_CA_A R237 C124 C0.1u16Y0402 R231 1KR1%0402 1KR1%0402 UPI VOLTAGE CONSOLE VREF_DQ_A VCC_DDR VREF_DQ_A R414 C239 C0.1u16Y0402 R415 1KR1%0402 1KR1%0402 C102 X_C2.2u6.3Y VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS DQS0 DQS0# DQS1 DQS1# DQS2 DQS2# DQS3 DQS3# DQS4 DQS4# DQS5 DQS5# DQS6 DQS6# DQS7 DQS7# DQS8 DQS8# 16 15 25 24 34 33 85 84 94 93 103 102 112 111 43 42 MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7 DM0/DQS9 NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17# 125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162 MEM_MA_DM0 ODT0 ODT1 CKE0 CKE1 CS0# CS1# BA0 BA1 BA2 195 77 50 169 193 76 71 190 52 MEM_MA_ODT0 MEM_MA_ODT1 MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA_CS_L0 MEM_MA_CS_L1 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2 WE# RAS# CAS# RESET# 73 192 74 168 MEM_MA_WE_L MEM_MA_RAS_L MEM_MA_CAS_L CK0 CK0# CK1(NU) CK1#(NU) 184 185 63 64 MEM_MA_CLK_H0 MEM_MA_CLK_L0 MEM_MA_CLK_H1 MEM_MA_CLK_L1 VREFDQ VREFCA SCL SDA SA1 SA0 67 118 238 237 117 VREF_DQ_A VREF_CA_A SMBCLK_DDR SMBDATA_DDR 5VDIMM 0x66:RH=18K,RL=13K 11,12,15,19,21,30,35,36 SMBCLK 11,12,15,19,21,30,35,36 SMBDATA 5VDIMM R246 X_18KR1%0402 R253 X_13KR1%0402 SMBCLK SMBDATA 11 SMBCLK_DDR U11 VCC OUT1 BUS_SEL SCL OUT2 SDA GND OUT3 VREF_CA_A VREF_CA_A VREF_CA_B VREF_CA_B 11 SMBDATA_DDR MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7 7 7 7 7 7 7 7 7 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM6 MEM_MA_DM7 MEM_MA_DM7 MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 10 MEM_MA_DATA4 122 MEM_MA_DATA5 123 MEM_MA_DATA6 128 MEM_MA_DATA7 129 MEM_MA_DATA8 12 MEM_MA_DATA9 13 MEM_MA_DATA10 18 MEM_MA_DATA11 19 MEM_MA_DATA12131 MEM_MA_DATA13132 MEM_MA_DATA14137 MEM_MA_DATA15138 MEM_MA_DATA16 21 MEM_MA_DATA17 22 MEM_MA_DATA18 27 MEM_MA_DATA19 28 MEM_MA_DATA20140 MEM_MA_DATA21141 MEM_MA_DATA22146 MEM_MA_DATA23147 MEM_MA_DATA24 30 MEM_MA_DATA25 31 MEM_MA_DATA26 36 MEM_MA_DATA27 37 MEM_MA_DATA28149 MEM_MA_DATA29150 MEM_MA_DATA30155 MEM_MA_DATA31156 MEM_MA_DATA32 81 MEM_MA_DATA33 82 MEM_MA_DATA34 87 MEM_MA_DATA35 88 MEM_MA_DATA36200 MEM_MA_DATA37201 MEM_MA_DATA38206 MEM_MA_DATA39207 MEM_MA_DATA40 90 MEM_MA_DATA41 91 MEM_MA_DATA42 96 MEM_MA_DATA43 97 MEM_MA_DATA44209 MEM_MA_DATA45210 MEM_MA_DATA46215 MEM_MA_DATA47216 MEM_MA_DATA48 99 MEM_MA_DATA49100 MEM_MA_DATA50105 MEM_MA_DATA51106 MEM_MA_DATA52218 MEM_MA_DATA53219 MEM_MA_DATA54224 MEM_MA_DATA55225 MEM_MA_DATA56108 MEM_MA_DATA57109 MEM_MA_DATA58114 MEM_MA_DATA59115 MEM_MA_DATA60227 MEM_MA_DATA61228 MEM_MA_DATA62233 MEM_MA_DATA63234 MEM_MA_ODT0 MEM_MA_ODT1 MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA_CS_L0 MEM_MA_CS_L1 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2 MEM_MA_WE_L MEM_MA_RAS_L MEM_MA_CAS_L DDR3_DRAMRST#A MEM_MA_CLK_H0 MEM_MA_CLK_L0 MEM_MA_CLK_H1 MEM_MA_CLK_L1 C135 C0.1u16Y0402 7 7 C246 C0.1u16Y0402 DDEIII-240_BLUE-R DIMM1(CHANNEL-A) ADDRESS = 0:0 [SA1:SA0] SMBCLK_DDR R173 33R0402 SMBDATA_DDR R175 33R0402 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 89 92 95 98 101 104 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 120 240 236 51 54 57 60 62 65 66 69 72 75 78 170 173 176 179 182 183 186 189 191 194 197 68 53 167 79 48 49 187 198 NC/PAR_IN NC/ERR_OUT NC/TEST4 RSVD FREE1 FREE2 FREE3 FREE4 39 40 45 46 158 159 164 165 VTT VTT CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 MEM_MA_ADD[15 0] VDDSPD 188 181 61 180 59 58 178 56 177 175 70 55 174 196 172 171 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 120 240 236 68 53 167 79 48 49 187 198 NC/PAR_IN NC/ERR_OUT NC/TEST4 RSVD FREE1 FREE2 FREE3 FREE4 VTT VTT 51 54 57 60 62 65 66 69 72 75 78 170 173 176 179 182 183 186 189 191 194 197 DDR3 DIMM2 MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 107 110 113 116 119 121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 199 202 205 208 211 214 217 220 223 226 229 232 235 239 MEC1 MEC2 MEC3 UPI VOLTAGE CONSOLE(2) 2.083325V VDDSPD DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DDR3 SMBCLK 11,12,15,19,21,30,35,36 SMBDATA 11,12,15,19,21,30,35,36 MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 188 181 61 180 59 58 178 56 177 175 70 55 174 196 172 171 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 39 40 45 46 158 159 164 165 DQS0 DQS0# DQS1 DQS1# DQS2 DQS2# DQS3 DQS3# DQS4 DQS4# DQS5 DQS5# DQS6 DQS6# DQS7 DQS7# DQS8 DQS8# 16 15 25 24 34 33 85 84 94 93 103 102 112 111 43 42 MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7 DM0/DQS9 NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17# 125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162 MEM_MA_DM0 ODT0 ODT1 CKE0 CKE1 CS0# CS1# BA0 BA1 BA2 195 77 50 169 193 76 71 190 52 MEM_MA_ODT2 MEM_MA_ODT3 MEM_MA_CKE2 MEM_MA_CKE3 MEM_MA_CS_L2 MEM_MA_CS_L3 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2 WE# RAS# CAS# RESET# 73 192 74 168 MEM_MA_WE_L MEM_MA_RAS_L MEM_MA_CAS_L DDR3_DRAMRST#A CK0 CK0# CK1(NU) CK1#(NU) 184 185 63 64 MEM_MA_CLK_H2 MEM_MA_CLK_L2 MEM_MA_CLK_H3 MEM_MA_CLK_L3 VREFDQ VREFCA SCL SDA SA1 SA0 67 118 238 237 117 VREF_DQ_A VREF_CA_A SMBCLK_DDR SMBDATA_DDR VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS MEC1 MEC2 MEC3 Place close to DIMM1 VCC_DDR A VCC3 VTT_DDR 107 110 113 116 119 121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 199 202 205 208 211 214 217 220 223 226 229 232 235 239 MEC1 MEC2 MEC3 C0.1u16Y0402 MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 10 MEM_MA_DATA4 122 MEM_MA_DATA5 123 MEM_MA_DATA6 128 MEM_MA_DATA7 129 MEM_MA_DATA8 12 MEM_MA_DATA9 13 MEM_MA_DATA10 18 MEM_MA_DATA11 19 MEM_MA_DATA12131 MEM_MA_DATA13132 MEM_MA_DATA14137 MEM_MA_DATA15138 MEM_MA_DATA16 21 MEM_MA_DATA17 22 MEM_MA_DATA18 27 MEM_MA_DATA19 28 MEM_MA_DATA20140 MEM_MA_DATA21141 MEM_MA_DATA22146 MEM_MA_DATA23147 MEM_MA_DATA24 30 MEM_MA_DATA25 31 MEM_MA_DATA26 36 MEM_MA_DATA27 37 MEM_MA_DATA28149 MEM_MA_DATA29150 MEM_MA_DATA30155 MEM_MA_DATA31156 MEM_MA_DATA32 81 MEM_MA_DATA33 82 MEM_MA_DATA34 87 MEM_MA_DATA35 88 MEM_MA_DATA36200 MEM_MA_DATA37201 MEM_MA_DATA38206 MEM_MA_DATA39207 MEM_MA_DATA40 90 MEM_MA_DATA41 91 MEM_MA_DATA42 96 MEM_MA_DATA43 97 MEM_MA_DATA44209 MEM_MA_DATA45210 MEM_MA_DATA46215 MEM_MA_DATA47216 MEM_MA_DATA48 99 MEM_MA_DATA49100 MEM_MA_DATA50105 MEM_MA_DATA51106 MEM_MA_DATA52218 MEM_MA_DATA53219 MEM_MA_DATA54224 MEM_MA_DATA55225 MEM_MA_DATA56108 MEM_MA_DATA57109 MEM_MA_DATA58114 MEM_MA_DATA59115 MEM_MA_DATA60227 MEM_MA_DATA61228 MEM_MA_DATA62233 MEM_MA_DATA63234 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS MEC1 MEC2 MEC3 VCC3 C183 VCC3 VTT_DDR VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD DIMM1 D C DDRIII DIMM_A2 VCC_DDR MEM_MA_DATA[63 0] MEM_MA_DATA[63 0] C75 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 B VCC3 MEM_MA_CLK_H2 MEM_MA_CLK_L2 MEM_MA_CLK_H3 MEM_MA_CLK_L3 C116 C0.1u16Y0402 7 7 C247 C0.1u16Y0402 A DIMM2(CHANNEL-A) ADDRESS = 0:1 [SA1:SA0] MS-7588 Size Custom Document Description Rev 1.0 DDR3 Chanel-A DIMM1/2 Date: Tuesday, October 27, 2009 MEM_MA_ODT2 MEM_MA_ODT3 MEM_MA_CKE2 MEM_MA_CKE3 MEM_MA_CS_L2 MEM_MA_CS_L3 DDEIII-240_PINK-R MSI Must stuff R173 R175 C MICRO-STAR INT'L CO.,LTD X_UP6262AMA8_SOT23-8-RH D Sheet 10 of 38 DDRIII DIMM_B1 VCC_DDR DDRIII DIMM_B2 VCC_DDR VCC3 VTT_DDR VCC3 VTT_DDR VCC_DDR C125 C1u16Y Place close to DIMM3 with DIMM4 VCC_DDR C103 C1u16Y C97 C1u6.3Y0402-RH C184 C1u6.3Y0402-RH B VREF_CA_B VCC_DDR VREF_CA_B R238 C108 C0.1u16Y0402 R235 1KR1%0402 1KR1%0402 C139 X_C0.1u16Y0402 VREF_DQ_B VCC_DDR R416 R405 1KR1%0402 1KR1%0402 UPI VOLTAGE CONSOLE(3) 0x68:RH=9.1K,RL=3K A 5VDIMM VCC5 5VDIMM R407 R428 X_9.1K/1% X_0R R401 DM0/DQS9 NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17# 125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162 ODT0 ODT1 CKE0 CKE1 CS0# CS1# BA0 BA1 BA2 195 77 50 169 193 76 71 190 52 MEM_MB_ODT0 MEM_MB_ODT1 MEM_MB_CKE0 MEM_MB_CKE1 MEM_MB_CS_L0 MEM_MB_CS_L1 MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2 WE# RAS# CAS# RESET# 73 192 74 168 MEM_MB_WE_L MEM_MB_RAS_L MEM_MB_CAS_L CK0 CK0# CK1(NU) CK1#(NU) 184 185 63 64 MEM_MB_CLK_H0 MEM_MB_CLK_L0 MEM_MB_CLK_H1 MEM_MB_CLK_L1 VREFDQ VREFCA SCL SDA SA1 SA0 67 118 238 237 117 VREF_DQ_B VREF_CA_B SMBCLK_DDR SMBDATA_DDR R427 X_0R X_3K/1% SMBCLK R420 SMBDATA R419 X_0R X_0R VCC OUT1 BUS_SEL SCL OUT2 SDA GND OUT3 10,12,15,19,21,30,35,36 V1_8SET MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 VCC3 MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H7 MEM_MB_DQS_L7 7 7 7 7 7 7 7 7 MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 MEM_MB_ODT0 MEM_MB_ODT1 MEM_MB_CKE0 MEM_MB_CKE1 MEM_MB_CS_L0 MEM_MB_CS_L1 MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2 MEM_MB_WE_L MEM_MB_RAS_L MEM_MB_CAS_L DDR3_DRAMRST#B MEM_MB_CLK_H0 MEM_MB_CLK_L0 MEM_MB_CLK_H1 MEM_MB_CLK_L1 C111 C0.1u16Y0402 7 7 C255 C0.1u16Y0402 DDEIII-240_BLUE-R DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 89 92 95 98 101 104 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 68 53 167 79 48 49 187 198 120 240 236 51 54 57 60 62 65 66 69 72 75 78 170 173 176 179 182 183 186 189 191 194 197 DDR3 DIMM3(CHANNEL-B) ADDRESS = 1:0 [SA1:SA0] MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 188 181 61 180 59 58 178 56 177 175 70 55 174 196 172 171 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 39 40 45 46 158 159 164 165 DQS0 DQS0# DQS1 DQS1# DQS2 DQS2# DQS3 DQS3# DQS4 DQS4# DQS5 DQS5# DQS6 DQS6# DQS7 DQS7# DQS8 DQS8# 16 15 25 24 34 33 85 84 94 93 103 102 112 111 43 42 DM0/DQS9 NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17# 125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162 ODT0 ODT1 CKE0 CKE1 CS0# CS1# BA0 BA1 BA2 195 77 50 169 193 76 71 190 52 MEM_MB_ODT2 MEM_MB_ODT3 MEM_MB_CKE2 MEM_MB_CKE3 MEM_MB_CS_L2 MEM_MB_CS_L3 MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2 WE# RAS# CAS# RESET# 73 192 74 168 MEM_MB_WE_L MEM_MB_RAS_L MEM_MB_CAS_L DDR3_DRAMRST#B CK0 CK0# CK1(NU) CK1#(NU) 184 185 63 64 MEM_MB_CLK_H2 MEM_MB_CLK_L2 MEM_MB_CLK_H3 MEM_MB_CLK_L3 VREFDQ VREFCA SCL SDA SA1 SA0 67 118 238 237 117 VREF_DQ_B VREF_CA_B SMBCLK_DDR SMBDATA_DDR V1_8SET VREF_DQ_A VREF_DQ_B 10,12,15,19,21,30,35,36 SMBCLK SMBDATA SMBCLK SMBCLK_DDR SMBDATA SMBDATA_DDR MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H7 MEM_MB_DQS_L7 C MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7 MEM_MB_ODT2 MEM_MB_ODT3 MEM_MB_CKE2 MEM_MB_CKE3 MEM_MB_CS_L2 MEM_MB_CS_L3 MEM_MB_CLK_H2 MEM_MB_CLK_L2 MEM_MB_CLK_H3 MEM_MB_CLK_L3 C115 C0.1u16Y0402 VCC3 B 7 7 C249 C0.1u16Y0402 DDEIII-240_PINK-R DIMM4(CHANNEL-B) ADDRESS = 1:1 [SA1:SA0] SMBCLK_DDR 10 A MICRO-STAR INT'L CO.,LTD SMBDATA_DDR 10 MS-7588 MSI Size Custom X_UP6262AMA8 Document Description Rev 1.0 DDR3 Chanel-B DIMM3/4 Date: Tuesday, October 27, 2009 D Vref-DQ : Reference voltage for DQ0 DQ63, CB0 CB7 and PAR_IN When in single ended mode used for DQS0 DQS7 Vref-CA : Reference voltage for A0-A15, BA0 BA2, RAS#, CAS#, WE#, S0#, S01#, CKE0, CKE1, ODT0 and ODT1 RESET#(Output) : A synchronously forces all registered output LOW when RESET# is LOW This signal can be used during power up to ensure that CKE is LOW and DQs are High-Z U18 MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H7 MEM_MB_DQS_L7 10 122 123 128 129 12 13 18 19 131 132 137 138 21 22 27 28 140 141 146 147 30 31 36 37 149 150 155 156 81 82 87 88 200 201 206 207 90 91 96 97 209 210 215 216 99 100 105 106 218 219 224 225 108 109 114 115 227 228 233 234 NC/PAR_IN NC/ERR_OUT NC/TEST4 RSVD FREE1 FREE2 FREE3 FREE4 16 15 25 24 34 33 85 84 94 93 103 102 112 111 43 42 MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63 VTT VTT DQS0 DQS0# DQS1 DQS1# DQS2 DQS2# DQS3 DQS3# DQS4 DQS4# DQS5 DQS5# DQS6 DQS6# DQS7 DQS7# DQS8 DQS8# VDDSPD 39 40 45 46 158 159 164 165 MEM_MB_ADD[15 0] VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 120 240 236 68 53 167 79 48 49 187 198 NC/PAR_IN NC/ERR_OUT NC/TEST4 RSVD FREE1 FREE2 FREE3 FREE4 VTT VTT VDDSPD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 107 110 113 116 119 121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 199 202 205 208 211 214 217 220 223 226 229 232 235 239 MEC1 MEC2 MEC3 VREF_DQ_B C243 C0.1u16Y0402 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 89 92 95 98 101 104 DDR3 188 181 61 180 59 58 178 56 177 175 70 55 174 196 172 171 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS MEC1 MEC2 MEC3 Place close to DIMM3 DIMM4 MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 107 110 113 116 119 121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 199 202 205 208 211 214 217 220 223 226 229 232 235 239 MEC1 MEC2 MEC3 C DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS MEC1 MEC2 MEC3 D 10 122 123 128 129 12 13 18 19 131 132 137 138 21 22 27 28 140 141 146 147 30 31 36 37 149 150 155 156 81 82 87 88 200 201 206 207 90 91 96 97 209 210 215 216 99 100 105 106 218 219 224 225 108 109 114 115 227 228 233 234 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD DIMM3 MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63 51 54 57 60 62 65 66 69 72 75 78 170 173 176 179 182 183 186 189 191 194 197 MEM_MB_DATA[63 0] Sheet 11 of 38 D - Su b Level shift PLACE CLOSE TO VGA CONNECTOR, WITHIN 750 MIL OF PIN D VCC3 14 VCC5 G RGB_DDC_CLK S 14 R236 2.2K R615 150R 14 S C R242 150R C162 3.3p/25N L4 R604 150R 30L600mA100-RH C156 X_3.3p/25N VGA_B VGA_B G RGB_DDC_DATA 30L600mA100-RH C167 3.3p/25N L5 VCC5 R234 2.2K VCC3 VGA_G VGA_G 5VDDCCL D Q38 2N7002S VCC3 14 RGB_DDC_DATA L6 C168 X_3.3p/25N R247 150R R228 2.2K VCC3 14 RGB_DDC_CLK VGA_R VGA_R R620 150R R230 2.2K D 30L600mA100-RH C148 X_3.3p/25N R241 150R C155 3.3p/25N 5VDDCDA D C Q39 2N7002S Close to PCH within 250 mils D10 A VCC5 VGAFS1 C S-1N5817_DO214AC VCC3 C157 F-MICROSMD110 C140 0.1u/16Y VCC5 C106 X_0.1u/16Y VGA_B VGA_R VGA_G B VGA_15 ESD-IP4220 17 D8 X_0.1u/16Y D11 5VDDCCL VGA_12 ESD-IP4220 15 14 14 HSYNC 13 R233 VGA_12 100R/1% C122 C126 X_10p/50N 10p/50N C114 10p/50N 10 12 11 B VGA_BLUE VGA_GREEN VGA_RED 16 C127 X_0.1u/16Y VGA_15 C110 10p/50N VCC3 VSYNC/HSYNC:HVCMOS CRB pull VCC3 OPT11 VGA_DVI1A PCB VGA_DVI-RH-4 D9 100R/1% VSYNC 5VDDCDA VSYNC R229 14 vga connector HSYNC ESD-IP4220 A A MICRO-STAR INT'L CO.,LTD MS-7636 MSI Size Custom Document Description Rev 1.0 VGA Date: Tuesday, October 27, 2009 Sheet 24 of 38 dB DDC_EN note :B0B-081010C-P97 HPD_SINK DVI level shifter R284 0R R277 X_4.7K VCC5 reserve VCC3 DVI_DDPB_CLK_N DVI_DDPB_CLK_P C189 0.1u/16X C188 0.1u/16X DVI_C_CLK_N DVI_C_CLK_P 38 39 IN_D1IN_D1+ OUT_D1OUT_D1+ 23 22 DVI_DATA_CLK_DN DVI_DATA_CLK_DP DVI_DDPB_TXN0 DVI_DDPB_TXP0 C187 0.1u/16X C185 0.1u/16X DVI_C_DATA2_N DVI_C_DATA2_P 41 42 IN_D2IN_D2+ OUT_D2OUT_D2+ 20 19 DVI_DATA2_DN DVI_DATA2_DP DVI_DDPB_TXN1 DVI_DDPB_TXP1 C182 0.1u/16X C181 0.1u/16X DVI_C_DATA1_N DVI_C_DATA1_P 44 45 IN_D3IN_D3+ OUT_D3OUT_D3+ 17 16 DVI_DATA1_DN DVI_DATA1_DP DVI_DDPB_TXN2 DVI_DDPB_TXP2 C179 0.1u/16X C178 0.1u/16X DVI_C_DATA0_N DVI_C_DATA0_P 47 48 IN_D4IN_D4+ OUT_D4OUT_D4+ 14 13 DVI_DATA0_DN DVI_DATA0_DP SDA SCL SDA_SINK SCL_SINK 29 28 DVI_DDC_DATA_R DVI_DDC_CLK_R HPD HPD_SINK 30 DVI_HOT_DET OC_0_DVI OC_1_DVI PC0 PC1 25 32 10 DVI_OE# DVI_DDC_EN DVI_RT_EN# EQ_0_DVI EQ_1_DVI 34 35 OE# DDC_EN RT_EN# DVI_REXT D12 DVI_DDC_DATA_R DVI_HOT_DET X_ESD-IP4220 33 46 DVI_DDC_CLK_R VCC 40 VCC 26 VCC 21 VCC 15 VCC VCC U12 VCC 11 DVI_DDPB_TXP0 DVI_DDPB_TXN0 DVI_DDPB_TXP1 DVI_DDPB_TXN1 DVI_DDPB_TXP2 DVI_DDPB_TXN2 DVI_DDPB_CLK_P DVI_DDPB_CLK_N VCC 14 14 14 14 14 14 14 14 VCC3 D D DDCBUF_EN CFG VGA_DVI1B 25 DVI_TXD2DVI_TXD2+ DVI_TXD1DVI_TXD1+ PS8101 DVI_PWR_5V R283 VCC5 DS 1.5Kohn R273 R275 2.2K DVI_DDC_CLK_R R274 2.2K DVI_DDC_DATA_R R276 4.7K DVI_DDC_EN R252 4.7K OC_0_DVI R251 X_4.7K R244 4.7K OC_1_DVI R250 X_4.7K R285 X_4.7K EQ_0_DVI R278 X_4.7K R279 X_4.7K EQ_1_DVI R280 X_4.7K DVI_REXT R249 374R/1% DVI_RT_EN# R248 1K/1% X_4.7K VCC3 DVI_HOT_DET DVI_TXD0DVI_TXD0+ 0R PARADE VCC3 Shell D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 DVI_DDC_CLK_R DVI_DDC_DATA_R GND 27 GND GND 49 43 GND GND 37 36 GND 31 C GND REXT 24 GND gpio GND PC1/PC0 18 14 DVI_DDPB_HPD GND 14 DVI_DDPB_CTRLDATA 14 DVI_DDPB_CTRLCLK GND PCH signal Mappings DG P156 12 100ohm DVI_TXC+ DVI_TXC- DATA2 DATA2 SHIELD24 DATA4 DATA4 DDCCLK DDCDATA NC DATA1 DATA1 SHIELD13 DATA3 DATA3 VCC5 GND5 HPDET DATA0 DATA0 SHIELD05 DATA5 DATA5 SHIELDCLK CLK CLK 26 C Shell1 VGA_DVI-RH-4 VCC5 VCC3 R266 4.7K DVI_OE# D R529 X_8.2K DVI_HOT_DET Q47 2N7002S G S C170 X_2.2u/6.3X B B R271 X_100K/1% "0" "1" D7 A VCC5 DDC level shifter disable DDC level shifter enable RT_EN# Input 50 ohm termination resistor enable the input termination ; resistors are set to high impedances OE# enable the chip is power down and input termination resistors will be at high impedance disable enable C S-1N5817_DO214AC DVIFS1 DVI_PWR_5V F-MICROSMD110 DVI_PWR_5V EMI DVI_TXCR264 221R/1% DVI_TXC+ DDCBUF_EN DVI_TXD1- C107 0.01u/16X RN8 DVI_DATA_CLK_DN DVI_DATA_CLK_DP DVI_DATA2_DN DVI_DATA2_DP X_0R/8P4R DVI_TXC5 DVI_TXC+ DVI_TXD21 DVI_TXD2+ R259 221R/1% REXT C104 0.1u/25Y C105 10u/10Y/8 VCC3 C406 1u/6.3Y C412 1u/6.3Y C583 1u/6.3Y C389 0.1u/25Y C582 0.01u/16X C432 0.1u/25Y C434 C436 0.1u/25Y 0.1u/25Y DVI_TXD1+ A DDC Passive Switch [DDC_EN, DDCBUF_EN, OE#] DDC Active Buffer note PC1, PC0 DVI_TXD2- 1, 0, X On Off 00 1, 1, Off On 01 R263 221R/1% dB DVI_TXD2+ 1, 1, Off 0, X, X Off Off Off 12 dB 10 dB 11 The 4-dB equalization setting is recommended for PC motherboard level shifting to compensate PCB trace losses DVI_DATA0_DP DVI_DATA0_DN DVI_DATA1_DP DVI_DATA1_DN RN7 Close IC power pin X_0R/8P4R DVI_TXD0+ DVI_TXD03 DVI_TXD1+ DVI_TXD1- MICRO-STAR INT'L CO.,LTD DVI_TXD0- MS-7636 MSI R254 221R/1% Size Custom DVI_TXD0+ Document Description Rev 1.0 DVI transfer Date: Tuesday, October 27, 2009 A Sheet 25 of 38 HDMI level shifter 0R R834 X_4.7K reserve VCC3 VCC5 33 IN_D1IN_D1+ OUT_D1OUT_D1+ 23 22 HDMI_DATA_CLK_DN HDMI_DATA_CLK_DP HDMI_DDPD_TX1_N HDMI_DDPD_TX1_P C573 0.1u/16X C574 0.1u/16X HDMI_C_DATA1_N HDMI_C_DATA1_P 41 42 IN_D2IN_D2+ OUT_D2OUT_D2+ 20 19 HDMI_DATA1_DN HDMI_DATA1_DP HDMI_DDPD_TX0_P HDMI_DDPD_TX0_N C570 0.1u/16X C594 0.1u/16X HDMI_C_DATA2_P HDMI_C_DATA2_N 44 45 IN_D3IN_D3+ OUT_D3OUT_D3+ 17 16 HDMI_DATA2_DP HDMI_DATA2_DN HDMI_DDPD_TX2_P HDMI_DDPD_TX2_N C575 0.1u/16X C571 0.1u/16X HDMI_C_DATA0_P HDMI_C_DATA0_N 47 48 IN_D4IN_D4+ OUT_D4OUT_D4+ 14 13 HDMI_DATA0_DP HDMI_DATA0_DN 14 HDMI_DDPD_CTRLDATA 14 HDMI_DDPD_CTRLCLK SDA SCL SDA_SINK SCL_SINK 29 28 HDMI_DDC_DATA_R HDMI_DDC_CLK_R 14 HDMI_DDPD_HPD HPD HPD_SINK 30 HDMI_HOT_DET OE# DDC_EN RT_EN# 25 32 10 HDMI_OE# HDMI_DDC_EN HDMI_RT_EN# PC0 PC1 DDCBUF_EN CFG HDMI_DDC_DATA_R HDMI_TXD2+ HDMI_TXD2HDMI_TXD1+ HDMI_TXD1HDMI_TXD0+ HDMI_REXT HDMI_TXD0HDMI_TXC+ GND 27 GND GND 49 43 GND 37 GND 36 GND 31 GND GND 24 VCC5 REXT 18 34 35 GND EQ_0_HDMI EQ_1_HDMI GND 12 OC_0_HDMI OC_1_HDMI HDMI_TXCPS8101 HDMI_DDC_CLK_R HDMI_DDC_DATA_R R823 2.2K HDMI_DDC_CLK_R R833 X_4.7K R822 2.2K HDMI_DDC_DATA_R R832 0R VCC3 HDMI_PWR_5V HDMI_HOT_DET R820 4.7K HDMI_DDC_EN R826 4.7K OC_0_HDMI R818 X_4.7K R821 4.7K OC_1_HDMI R825 X_4.7K R827 X_4.7K EQ_1_HDMI R830 X_4.7K R828 X_4.7K EQ_0_HDMI R819 X_4.7K HDMI_HOT_DET D X_ESD-IP4220 CONN-HDMI19P_BLACK-RH-10 HDMI1 SHELL1 21 D2+ D2 Shield D24 D1+ D1 Shield D17 D0+ D0 Shield D0MEC1 10 CK+ 11 CK Shield 12 CK13 CE Remote 14 NC 15 DDC CLK 16 DDC DATA 17 GND 18 +5V 19 HP DET SHELL2 20 PERICOM PARADE VCC3 D38 HDMI_DDC_CLK_R 46 R831 VCC 40 VCC 26 VCC 15 11 21 VCC 38 39 VCC HDMI_C_CLK_N HDMI_C_CLK_P VCC C568 0.1u/16X C572 0.1u/16X VCC HDMI_DDPD_CLK_N HDMI_DDPD_CLK_P VCC U38 GND C HDMI_DDPD_CLK_P HDMI_DDPD_CLK_N HDMI_DDPD_TX2_P HDMI_DDPD_TX2_N HDMI_DDPD_TX1_P HDMI_DDPD_TX1_N HDMI_DDPD_TX0_P HDMI_DDPD_TX0_N HDMI_DDPD_CLK_P HDMI_DDPD_CLK_N HDMI_DDPD_TX2_P HDMI_DDPD_TX2_N HDMI_DDPD_TX1_P HDMI_DDPD_TX1_N HDMI_DDPD_TX0_P HDMI_DDPD_TX0_N D 14 14 14 14 14 14 14 14 VCC3 dB DDC_EN note :B0B-081010C-P97 :B0B-411LS2C-P22 HPD_SINK C N5I-19M0161-L06 D30 VCC5 A C HDMIFS1 HDMI_PWR_5V S-1N5817_DO214AC F-MICROSMD110 R829 402R/1% HDMI_RT_EN# R824 X_1K/1% C853 2.2u/6.3X HDMI_PWR_5V C576 0.01u/16X B "0" C577 0.1u/25Y Close IC power pin DDC level shifter disable DDC level shifter enable RT_EN# Input 50 ohm termination resistor enable the input termination ; resistors are set to high impedances OE# enable the chip is power down and input termination resistors will be at high impedance disable enable C580 1u/6.3Y C569 1u/6.3Y C579 1u/6.3Y VCC5 R839 X_100R/1% HDMI_DATA_CLK_DN HDMI_DATA_CLK_DP H HDMI_DATA1_DN DMI_DATA1_DN HDMI_DATA1_DP RN41 X_0R/8P4R HDMI_TXC6 HDMI_TXC+ HDMI_TXD12 HDMI_TXD1+ VCC3 HDMI_HOT_DET note R562 X_100K/1% HDMI_TXD2- 1, 0, X On Off 00 1, 1, Off On 01 1, 1, Off Off 10 R838 X_100R/1% dB HDMI_TXD2+ HDMI_DATA0_DN HDMI_DATA0_DP HDMI_DATA2_DN HDMI_DATA2_DP HDMI_TXD0- 0, X, X Off Off RN40 X_0R/8P4R HDMI_TXD06 HDMI_TXD0+ HDMI_TXD22 HDMI_TXD2+ 12 dB dB 11 MS-7587 Size Custom Document Description Rev 0B HDMI Date: Tuesday, October 27, 2009 A MICRO-STAR INT'L CO.,LTD MSI R837 X_100R/1% HDMI_TXD0+ HDMI_OE# Q80 2N7002S G HDMI_TXD1+ PC1, PC0 R835 4.7K D R561 X_8.2K R836 X_100R/1% REXT DDC Active Buffer C578 0.01u/16X HDMI_TXC- HDMI_TXD1- DDC Passive Switch C581 0.1u/25Y EMI DDCBUF_EN [DDC_EN, DDCBUF_EN, OE#] B VCC3 "1" HDMI_TXC+ A C595 10u/10Y/8 S HDMI_REXT Sheet 26 of 38 SATA connector (color:Black) FAN-COUNTROL CIRCUIT C450 0.01u/16X C449 0.01u/16X SATA_RX#0 SATA_RX0 SATA_RX#0 SATA_RX0 14 14 SATA_TX1 SATA_TX#1 14 14 SATA_RX#1 SATA_RX1 14 14 SATA_RX#1 SATA_RX1 SATA1_2 14 14 C499 0.01u/16X C498 0.01u/16X SATA_RX#3 SATA_RX3 SATA_RX#3 SATA_RX3 14 14 18 SIO_SYS1_FAN R417 SYS1_FAN 0R SATA7PM_BLACK-P-RH 10 11 12 13 14 16 ST_TX1 ST_TX#1 + - SATA5 ST_RX#1 ST_RX1 RX+ TX+ GND RX- TXGND GND GND GND ST_RX#0 ST_RX0 GND GND HT+1 HT+2 HT-1 HT-2 GND GND HR-1 HR-2 HR+1 HR+2 GND GND MEC2MEC1 SATA_TX3 SATA_TX#3 ST_RX#3 ST_RX3 SATA14PM_BLACK-ST-RH C D17 1N4148S SYSFAN1 FAN1_TAC U20B G LM358D_SOIC8 R404 FAN1X3 Q59 P06P03LCG_SOT89 ST_TX4 ST_TX#4 C495 0.01u/16X C496 0.01u/16X SATA_TX4 SATA_TX#4 SATA_TX4 SATA_TX#4 14 14 ST_RX#4 ST_RX4 C509 0.01u/16X C510 0.01u/16X SATA_RX#4 SATA_RX4 SATA_RX#4 SATA_RX4 14 14 R412 3.9K/1% C312 X_0.1u/16Y C D13 1N4148S SYSFAN2 FAN2_TAC SATA_RX#2 SATA_RX2 SATA_RX#2 SATA_RX2 14 14 SATA7PM_BLACK-P-RH SATA_TX5 SATA_TX#5 14 14 ST_RX#5 ST_RX5 C501 0.01u/16X C500 0.01u/16X SATA_RX#5 SATA_RX5 SATA_RX#5 SATA_RX5 14 14 R426 SYS2_FAN 0R - S SATA_TX5 SATA_TX#5 G LM358D_SOIC8 R409 FAN1X3 Q50 P06P03LCG_SOT89 R291 4.7K R300 27K SYS2_FANTAC 14,18 C200 X_0.1u/16Y R294 10K/1% 10K/1% C455 0.01u/16X C456 0.01u/16X C491 0.01u/16X C490 0.01u/16X R402 3.9K/1% SATA7PM_BLACK-P-RH ST_RX#2 ST_RX2 18 SIO_SYS2_FAN ST_TX5 ST_TX#5 U20A D 14 14 + SATA_TX2 SATA_TX#2 RX+ TX+ GND RX- TXGND GND GND GND SATA_TX2 SATA_TX#2 R440 10K/1% EC38 CD100u16SO A B C445 0.01u/16X C446 0.01u/16X SYS1_FANTAC 14,18 + RX+ TX+ GND RX- TXGND GND GND GND ST_TX2 ST_TX#2 27K +12V SATA6 R437 10K/1% SATA7PM_BLACK-P-RH SATA3 R441 4.7K + 15 ST_TX0 ST_TX#0 SATA_TX3 SATA_TX#3 C448 0.01u/16X C447 0.01u/16X SATA_TX1 SATA_TX#1 C489 0.01u/16X C488 0.01u/16X ST_RX#1 ST_RX1 C440 0.01u/16X C439 0.01u/16X D ST_TX3 ST_TX#3 C ST_TX1 ST_TX#1 C ST_RX#0 ST_RX0 +12V SATA4 A 14 14 S SATA_TX0 SATA_TX#0 D SATA_TX0 SATA_TX#0 C442 0.01u/16X C441 0.01u/16X ST_TX0 ST_TX#0 RX+ TX+ GND RX- TXGND GND GND GND D EC36 CD100u16SO B VCC5 VCC5 VCC5 R130 2.2KR/2 +12V +12V R94 2.2KR/2 R115 2.2K R77 4.7K Q15 18 SIO_CPU_FAN R128 X_0R 0R G2 S2 G1 S1 CPUFAN CPUFAN_PWM D2 D1 14,18 CPU_FANTAC R84 10K/1% 27K C33 X_0.1u/16Y MEC1 BH1X4B_WHITE-3.3MM-RH + NN-2N7002D R101 R129 14 PCH_CPU_FAN EC3 CD100u16SO A A MICRO-STAR INT'L CO.,LTD MS-7636 MSI Size Custom Document Description Date: Wednesday, October 28, 2009 Rev 1.0 SATA & e-SATA Ports and Fan Control Sheet 27 of 38 Front USB Connector USB POWER FOR PORT 4,5 USB POWER FOR PORT 6,7 USB POWER FOR PORT 8,9 VCC5 VCC5 Closed Pin2 C95 10u/10Y/8 EC51 CD470u6.3SO 18 USB_MODE USB_MODE EN UP7533A_SOT23-8 VOUT 23,30 5VDRV1_EN 13 OC#4_C C94 X_0.1u/10X OC#4_C USB_MODE S3# OC# EC19 CD470u6.3SO 18 UP7533A_SOT23-8 USB_MODE EN NEAR CONNECTOR U13 VOUT VOUT 23,30 5VDRV1_EN 13 OC#5_C OC#5_C S3# OC# USB_MODE EN +1 C517 X_0.1u/10X U7 VOUT 5VCC 5VSB S3# OC# Closed Pin2 C54 10u/10Y/8 10u/10Y/8 RUSB_VCC2 GND +1 VOUT OC#2_C 5VCC 5VSB EN 23,30 5VDRV1_EN 13 OC#2_C +1 USB_MODE VOUT U10 USB_MODE S3# OC# 18 D OC#0_C GND 23,30 5VDRV1_EN 13 OC#0_C 5VCC 5VSB U34 FUSB_VCC3 GND C79 FUSB_VCC2 5VSB Closed Pin2 C516 10u/10Y/8 5VSB C55 X_0.1u/10X EC6 CD470u6.3SO 18 USB_MODE UP7533A_SOT23-8 RUSB_VCC1 5VCC 5VSB Closed Pin2 5VSB GND VCC5 5VSB VCC5 VOUT VOUT +1 USB POWER FOR PORT 0,1 C196 X_0.1u/10X Rear USB Connector EC35 CD470u6.3SO D UP7533A_SOT23-8 NEAR CONNECTOR NEAR CONNECTOR C194 10u/10Y/8 RUSB_VCC1 VOUT C523 X_0.1u/10X EC52 CD470u6.3SO USB_MODE R218 9.76KST/4 UP7533A_SOT23-8 NEAR CONNECTOR R808 27K R812 27K OC#0_C OC#1_C R810 51K R815 51K 23,30 5VDRV1_EN 13 OC#6_C R222 27K R184 27K R117 27K R288 27K OC#2_C OC#6_C OC#4_C OC#5_C R220 51K R185 51K R103 51K FRONT USB PORT 0,1 18 USB_MODE OC#6_C S3# OC# USB_MODE EN RUSB_VCC3 5VCC 5VSB VOUT R219 5.1KST/4 R287 51K VOUT VOUT +1 RUSB_VCC2 RUSB_VCC3 GND EN FUSB_VCC3 U9 +1 5VCC 5VSB USB_MODE S3# OC# USB_MODE 18 OC#1_C FUSB_VCC1 FUSB_VCC1 GND 23,30 5VDRV1_EN 13 OC#1_C 5VSB Closed Pin2 FUSB_VCC2 C525 10u/10Y/8 U37 VCC5 5VDIMM Closed Pin2 C81 X_0.1u/10X EC11 CD470u6.3SO 5VSB UP7533A_SOT23-8 VCC5 USB POWER FOR PORT 10,11 USB_MODE for USB voltage H:Follow 5VSB L:Always off USB POWER REAL PORT 2,3 NEAR CONNECTOR REAR USB PORT 12,13 RUSB_VCC3 FUSB_VCC2 C FUSB_VCC2 C RUSB_VCC3 HDMI_USB1 13 13 USB1USB1+ 13 13 USB0USB0+ 6 SBD1- SBD0+ SBD1+ L12 SBD1SBD1+ SBD0SBD0+ D27 SBD0- SBD0SBD0+ VCC USB0USB0+ GND ESD-IP4220 VCC USB1USB1+ GND USBOC 10 SBD1SBD1+ 13 13 13 13 RN5 USB13+ USB13USB12+ USB12- 0R/8P4R/6 SBD13+ SBD13SBD12+ SBD12- SBD12SBD12+ SBD13SBD13+ SBD0+ SBD0SBD1+ SBD1- SBD13- SBD12+ SBD13+ L2 H2X5[9]M_BLACK-RH-2 NEAR CONNECTOR 13 13 USB12USB12+ 13 13 USB13USB13+ X_CMC-L12-121D017-LF 31 32 33 34 21 22 23 24 SBD12SBD12+ D5 SBD12- USB0+ USB0USB1+ USB1- RN27 0R/8P4R/6 13 13 13 13 JUSB2 SBD13SBD13+ ESD-IP4220 PWR USBUSB+ UP GND PWR USBUSB+ GND DOWN GND 35 GND 36 GND 25 GND 26 USBAM_BLACK-RH-20 NEAR CONNECTOR X_CMC-L12-121D017-LF FRONT USB PORT 2,3 RUSB_VCC2 REAR USB PORT8,9 FUSB_VCC1 FUSB_VCC1 RUSB_VCC2 SBD3- SBD2+ SBD3+ L13 B 13 13 USB3USB3+ SBD3SBD3+ 13 13 USB2USB2+ SBD2SBD2+ SBD2SBD2+ VCC USB0USB0+ GND ESD-IP4220 VCC USB1USB1+ GND USBOC 10 SBD3SBD3+ 13 13 13 13 RN4 USB9+ USB9USB8+ USB8- 0R/8P4R/6 SBD9+ SBD9SBD8+ SBD8- D26 SBD2- SBD9- SBD8+ SBD9+ L1 H2X5[9]M_BLACK-RH-2 NEAR CONNECTOR X_CMC-L12-121D017-LF USB1 D4 SBD8- SBD2+ SBD2SBD3+ SBD3- RN32 0R/8P4R/6 USB2+ USB2USB3+ USB3- JUSB1 13 13 13 13 11 SBD9SBD9+ ESD-IP4220 UP SBD8SBD8+ 13 13 USB8USB8+ SBD8SBD8+ 13 13 USB9USB9+ SBD9SBD9+ NEAR CONNECTOR 10 DOWN 12 N58-14M0031-L06 B X_CMC-L12-121D017-LF FUSB_VCC3 Front USB PORT 4,5 REAR USB PORT8,9 RUSB_VCC1 FUSB_VCC3 RUSB_VCC1 LAN_USB1A SBD4+ SBD4SBD5+ SBD5- L3 13 13 USB5USB5+ 13 13 USB4USB4+ SBD5SBD5+ SBD4SBD4+ SBD4- SBD4+ D6 SBD5- SBD5+ SBD4SBD4+ VCC USB0USB0+ GND ESD-IP4220 VCC USB1USB1+ GND USBOC 10 SBD5SBD5+ 13 13 13 13 USB11+ USB11USB10+ USB10- RN11 0R/8P4R/6 SBD11+ SBD11SBD10+ SBD10- L7 NEAR CONNECTOR H2X5[9]M_BLACK-RH-2 N58-14M0031-L06 X_CMC-L12-121D017-LF 0R/8P4R/6 SBD10- SBD10+ RN6 USB4+ USB4USB5+ USB5- 13 13 13 13 JUSB3 13 13 USB10USB10+ SBD10SBD10+ 13 13 USB11USB11+ SBD11SBD11+ X_CMC-L12-121D017-LF SBD10SBD10+ D14 SBD11- SBD11+ ESD-IP4220 SBD11SBD11+ PWR USBUSB+ GND PWR USBUSB+DOWN GND NEAR CONNECTOR UP GND GND GND GND 23 24 25 26 GND GND GND GND 27 28 29 30 RJ45_USBX2_LEDX2_TX-GIGA-RH-5 A A MICRO-STAR INT'L CO.,LTD MS-7636 MSI Size Custom Document Description Date: Tuesday, October 27, 2009 Rev 1.0 USB Connectors-10 ports Sheet 28 of 38 FRONT PANNEL D18 1N4148S C JFP2 A -12V C176 X_0.1u/16Y D 18,36 PSON# C137 X_0.1u/16Y VCC5 C86 X_0.1u/16Y 3.3V -12V 3.3V GND GND 3.3V 14 15 16 P_ON 5V 17 GND GND 18 GND 5V 19 GND GND 20 -5V POK 21 5V 5VSB 22 5V +12V 10 +12V 11 3.3V 12 23 5V 24 GND VCC3 C88 SUS_LED PWR_LED 0.1u/16Y SLED BUZ+ PLED BUZ- VCCSPK BUZ1 BUZZER-LF IDE_LED R796 X_0R VCC5 RN13 150R/8P4R H2X4[7]M_BLACK-RH C528 X_0.1u/16Y VCC5 C129 0.1u/16Y SPEAKER Z 13 X_0.1u/16Y GND D24 S-BAT54A_SOT23 C R239 10K/1% C73 25 VCC3 Q72 C520 2N3904 X_0.1u/16Y VCC5 D B R646 10K/1% SPKR 15 14 SATA_LED_SB# E JPWR1 25 ATX_5VSB Y ATX POWER CONNECTOR VCC5 X 23 IDE_LED# R232 4.7K ATX_5VSB C101 0.1u/16Y C96 VCC5 ATX_PWR_OK 18,30 C113 X_0.1u/16Y R814 330R/6 +12V 0.1u/16Y C526 X_0.1u/16Y C163 X_0.1u/16Y PWRCONN24P_BLACK-RH-2 VCC3 12,18,30 6,15,36 WDT# R804 X_0R FP_RST# R805 33R HDD+ PLED IDE_LED HDD- SLED FP_RST#_R C521 0.1u/16X 3VSB JFP1 HDD+ PWR_LED 4SUS_LED RESET- PWSW+ RESET+ PWSW- NC C527 X_0.1u/16Y H2X5[10]M_BLACK-RH R803 X_4.7K C524 X_0.1u/16Y PSIN#_R R806 X_100R/1% PWRBTIN C522 X_0.1u/16Y R800 0R PWRBTIN_NCT 21,36 18,36 C C LED ( for Fintek 71889) Update 1013 If use N3016Y LED Ctrl, SIO LED_VCC / LED_VSB can not to use TPM 5VDIMM 3VSB 3VSB JTPM1 13 TPM_CLK 18,21 PLTRST_BU3# 15,18 LPC_AD0 15,18 LPC_AD1 15,18 LPC_AD2 15,18 LPC_AD3 15,18 LPC_FRAME# R802 X_1K/1% R809 X_330R/6 Q79 36 SUS_LED 36 PWR_LED SUS_LED PWR_LED R801 X_4.7K R794 X_4.7K LED_VSB 18 LED_VCC 18 TPM_CLK PLTRST_BU3# LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# 11 13 VCC3 SERIRQ_R R807 0R SERIRQ 14,18 VCC5 12 14 H2X7[10]M-2PITCH_BLACK-RH X_NN-CMKT3904_SOT363-6-RH R813 X_330R/6 B R792 1K/1% 3VSB 5VDIMM Reserve pull high to 5VDIMM if PM don't want PLED light in deep mode B PS2 KEYBOARD & MOUSE CONNECTOR C5 X_0.1u/16Y KB_MS1 CONN-KB_MS R16 X_1K 16 17 RN1 4.7K/8P4R MSDAT 18 MSCLK 18 KBDAT 18 KBCLK MSDAT SP1 X_Short PAD MS_DT MSCLK SP2 X_Short PAD MS_CK KBDAT SP3 X_Short PAD KB_DT KBCLK SP4 X_Short PAD KB_CK 11 12 MS C31 A 10 C24 C18 C13 RUSB_VCC3 C6 0.1u/16X KB 13 14 15 18 A CP1 X_COPPER 180P/50N 180P/50N 180P/50N 180P/50N FB1 X_FB80ohm_3A_0805 MICRO-STAR INT'L CO.,LTD MS-7636 MSI Size Custom Document Description ATX PWR-Connector & Front Panel & EMI Date: Tuesday, October 27, 2009 Sheet 29 of Rev 1.0 38 VCC1_8REF 5VDIMM FOR DDR VCC1_8 +12V EN near U24 Pin3 VCC1_8REF C253 X_0.1u/16Y 5VCC_DRV R150 0R 5VDRV1 C69 0.1u/25Y G1 uP7501 Used SLP_S5# for AMT R413 C258 4.7u/10Y/8 10K/1% C241 0.1u/16X + - U17A R382 100K/1% 0.8*(R320+R315/R315) C62 22n/16X V1_8SET V1_8SET R410 12.7K/1% R392 D VCC1_8 1K/1% C236 X_0.1u/16Y R399 X_1K/1% 1.8V SFR/PCH/NVM VR Linear, 1.6A TDC +/- 5% DC+AC VCC3 3VSB VID before PWROK >3ms R772 X_4.7K R780 X_4.7K CHIP_PWGD PWROK DELAY + +12V VCC5 7501 Mode H:Support S0/S3/S5 L:Support S0/S3 Q53 N-3023_TO252 G LM358D_SOIC8 V1_8REF S1 R146 1K/1%/6 R418 16K D VOUT VIN NC C477 1u/6.3X uP7707 D MODE U21 G2 18n/16X 0R 5VDIMM S2 EMA60D03A S 5VSB_DRV 5VSBDRV1 C70 0R VCC1_8REFA S3# S5# R166 VCC3 VCC1_8REF R174 31,36 SLP_S5_LCH# Q31 GND D X_0R ATX_5VSB 5VDIMM_5VSB C74 0.1u/16X 5VCC 5VSB U8 15,18,32,35,36 SLP_S3# R494 12,15,31,36 SLP_S4# VCC3 ATX_5VSB GND 10K/1% 5VDIMM_5V 10R R163 18,29 ATX_PWR_OK R176 510R R170 VCC5 EC37 CD470u6.3SO 14,15 cpuvtt & pch vore wait 1.8v Q77 R769 12,15,35 VRM_PGD X_4.7K 5VSB X_NN-3904 C587 C0.1u25Y0402-RH 3VSB_WAKE D Q64 BOOT 6107_EN POK/EN UG 3VSB_UG PHASE 3VSB_PHASE LG 3VSB_LG R619 2.2R0805 3VSB_FB R677 1.5KR-RH R515 10KR1%0402 5VDRV2 R670 3VSB D S C Q55 X_2N3904 X_4.7KB VCC3 VCC5 5VDIMM_5V R112 X_47KR0402 C150 1u/6.3Y R111 X_27KR0402 R108 X_47KR0402 R114 X_1KR0402 Q19 C191 1u/6.3Y C186 1u/6.3Y C252 0.1u/25Y C202 0.01u/16X C244 0.1u/25Y C218 C415 0.1u/25Y 0.1u/25Y Use A control and reserve B G 4.7KR0402 Q18 R122 X_4.99KR1%0402 X_N-2N7002LT1G_SOT23 R144 G C586 X_0.1u/25Y NN-3904 CHIP_PWGD 0R Q57 X_2N7002 ATX_5VSB VCC3 EC44 CD470u6.3SO-RH C585 C3300p50X0402 R502 20KR0402-2 B R768 CHOKE8 3VSB_UG CH-3.3u8A6.0m-HF 3VSB_PHASE 3VSB_LG NN-PHKD6N02LT_SO8 R661 10K/1% GND FB C584 UP6107M8_SOT23-8-RH C1u6.3Y0402-RH Q63 P-PMBS3906_SOT23-RH G C E R496 4.7KR0402 5VSBDRV2 S N-2N7002LT1G_SOT23 10KR1%0402 VCC PWOK_SIO R366 VTT_PGD 20K/1% CLOCK GEN Watch dog Q71 3VSB_BT R776 12,18,29 WDT# 6,35 Q78 C10u10Y0805 D R683 B 3VSB_VC 2.2R0805 R779 4.7K X_20K/1% R770 10K/1% NP-P5003QVG_SOIC8-RH C390 C0.018u16X0402-RH U31 R665 R761 PWOK_SIO S 0R0402 18 EC45 CD470u6.3SO-RH +1 R674 R393 X_4.7K G E C422 5VDUAL 5VSBDRV2 Q76 X_2N7002 VCC3 G D PD PD X_20K/1% S PS PG +1 ND ND 5VDRV2 D19 S-1N5817_DO214AC A C C R760 18,29 ATX_PWR_OK 5VDUAL U30 NS NG S ATX_5VSB VCC5 VCC1_8REFA D Deep Mode WOL LAN Power CTRL Circuit C X_N-2N7002LT1G_SOT23 C47 X_C1u6.3Y0402-RH TYPE B ATX_5VSB B X_0R0402 VCC3 R847 X_20K/1% R145 X_0R0402 G2 For power 700W solution The power supply VCC3 delay 12ms after VCC5 assert The chip U7501 5VDRV1 work when the VCC5 ready (When VCC5 up to 4.2V and the 5VDRV1 delay 6ms assert), but VCC3 not ready and let the 3VSB sequence fail Q82 X_NN-2N7002D 6107_EN D2 D1 S2 G1 S1 3VSB_LAN_EN# Follow NCT3016Y-1012 EN DDR_0_9_REF U26 18,31 15,18,32,35,36 SLP_S3# 12,15,18 SLP_S5# 0.9V VTT_0_9_REF_A R86 X_0R VTT_0_9_REF VTT_0_9_REF 18,33 1.2V PCH_1_2_REF_A R305 X_0R PCH_0_9_REF PCH_0_9_REF 18,32 ATX_5VSB X_UP6264B 36 3VSB_LAN_EN# R120 56K/1% 5VSB R102 X_11K/1%DDR_1_5_REF_A C46 X_0.1u/25Y VCC5 R87 X_11K/1%VTT_0_9_REF_A C41 X_0.1u/25Y PCH_1_2_REF_A C28 X_0.1u/25Y R845 X_4.7K R846 0R TYPE A S3# S5# MODE 5VSB_DRV 5VCC_DRV 5VSBDRV2 5VDRV2 UP7501M8_SOT23-8-RH R466 1KR1% H1X2M-2PITCH_BLACK-RH C588 C0.022u16X0402-RH 1 MS-7636 Size Custom Document Description Rev 1.0 ACPI controller UPI Date: Wednesday, October 28, 2009 A MICRO-STAR INT'L CO.,LTD MSI +12V DDR_0_9_REF X_0R 2 J1 R63 +1 ATX_5VSB VCC DDR_1_5_REF_A GND 200K/1% 1.5V R118 5VDRV1 10R0402 CHIP_PWGD 5VCC 5VSB 23,28 5VDRV1_EN GND SDA R521 0.01u/16X SCL 10KR1%0402 C371 C0.1u16X0402-2 X_CD470u6.3SO X_0R +12V CD470u6.3SO X_0R R76 510R0402 R539 CD470u6.3SO R93 R559 CD470u6.3SO A SMBCLK SMBDATA VCC3 C232 18,29 ATX_PWR_OK U5 VCC5 EC43 + VCC5 R119 X_10R REF_PWR C52 X_0.1u/25Y 5VSB 5VSB SMBDATA SMBCLK SMBDATA EC33 + 10,11,12,15,19,21,35,36 10,11,12,15,19,21,35,36 EC53 + 0x50 EC54 Voltage console SMBCLK Sheet 30 of 38 DDR3_1.5V 21.25A=6A+8A+0.75A+6.5A D1 S-BAT54C_SOT23 X CHOKE2 5VDIMM_IN R17 Iripple=2.63A 1.49*2*1=2.98A>2.63A C8 C82 10u/10Y/8 1u/25X/8 C91 0.1u/25Y EC12 CD470u6.3SO D 5VDIMM CH-1.2U15A EC7 CD470u6.3SO C72 0.1u/25Y/6 C25 X_0.01u/16X FB 6103_DDR_BOOT1 PHASE UG LG 6103_DDR_PH1 6103_DDR_UG1 6103_DDR_LG1 R99 0R/6 C43 0.1u/25Y 6103_DDR_PH1 R221 2.2R/8 UP6103S8_SOP8-RH 5VDIMM_IN R78 R64 X_0R/6 C37 1u/6.3Y EC27 CD560u4SO EC24 CD560u4SO EC23 CD560u4SO C93 3.3n/50X DDR3_FB 2K/1% C21 VCC_DDR CHOKE5 CH-1.1u27A1.7m +1 C39 X_0.01u/16X R100 X_0R/6 BOOT +1 R51 X_15K/1% Vref C40 0.1u/25Y DDR_REF +1 3K/1% R50 VCC U3 DDR_0_9_REF 18,30 DDR_0_9_REF 0.9VREF 1.5VREF GND SIO 6264 2.2R/8 +1 5VDIMM Y Z +12V +1 DDR DRAM Imax=8A V1.5DDQS3: DDR I/O (6A) D X_0.01u/16X D 6103_DDR_UG1 C G R79 3K/1% S Q33 N-NTD4809NT4G_DPAK3-RH C 6103_DDR_PH1 D 6103_DDR_LG1 G Q35 S N-NTD4806NT4G_DPAK3-RH R223 10K/1% B B DDR VTT Power DDR3_FB R69 9.09K/1% To CPU Copper trace width > 250mils , Fill island behind DIMM > 400mils DDR_REF 5VSB D VCC5 R52 4.7K Q6 2N7002 G R4 0R Modify ATX_5VSB-2009.8.12 R5 X_0R D VCC_DDR ATX_5VSB R10 10K/1% Q5 2N7002 G VTT_VCC S C14 X_0.1u/10X C7 0.1u/25Y VCC_DDR U2 VREF2 ENABLE VCNTL BOOT_SEL DDRVTT_VREF 1K/1% + VIN GND VREF1 VOUT GND VTT_DDR VTT_DDR:0.75A R91 DDR3_A R90 1K/1% C uP7711 C68 1u/25X/8 C63 0.1u/25Y DDR3_A S 18 EC4 CD820u2.5SO A A SLP_S4# R31 X_4.7K R42 20K Q4 2N3904 B E 12,15,30,36 SLP_S4# 30,36 SLP_S5_LCH# MICRO-STAR INT'L CO.,LTD Only for meet Intel power down sequence MS-7636 MSI Size Custom Document Description Date: Tuesday, October 27, 2009 Rev 1.0 DDR POWER - UPI6103_1-Phase Sheet 31 of 38 PCH Core 6.8A D V1.05PCHS0: Vcc, VccExp, VccDMI, VccSATA, VccSATAPLL, VccAUPLL, VccSSC, VccDIFFCLK, VccDIFFCLKN, VccUSBCORE, VccDPLL, VccDPLL_EXP,VccDPLL_FDI (4.5A) V1.05MEM: VccMEW, VccAUX, VccME (2.3A) D VCC_DDR 3VSB C C305 C0.1u25Y0402 0R/6 R422 X_16.5KR1%0603 EC39 CD560u4SO R395 18KR1%0402 5VSB D PCH_1P05 Iripple=1.6A 1.87*1*1=1.87A>1.6A C245 X_1u/16Y/6 R424 X_10KR1%0402 EC41 CD820u2.5SO-RH-1 + 3KR1%0402 C242 X_C0.1u16Y0402 Q60 105_G G LM358D_SOIC8 R391 10KR1%0402 Q61 G 105_G EC40 CD820u2.5SO-RH-1 + R400 - U17B S C254 0.1u/16X + S N-APM3023NUC-TRL_TO252 C260 X_C2.2U6.3Y0603 0R/6 N-APM3023NUC-TRL_TO252 R430 X_7.87KR1%0402 R431 V1P05PCH_CNTRL_INPUT D 18,30 PCH_0_9_REF R433 +1 +12V PCH_0_9_REF C B B Q58 R429 15,18,30,35,36 SLP_S3# X_10KR0402 V1P05PCH_CNTRL_INPUT X_NN-CMKT3904_SOT363-6-RH C256 C0.1u25Y0402 A A MICRO-STAR INT'L CO.,LTD MS-7636 MSI Size Custom Document Description Date: Tuesday, October 27, 2009 Rev 1.0 PCH POWER - UPI6103_1-Phase Sheet 32 of 38 VTTPWRGD LEVEL SHIFT CPU_VTT VTTS0: 1.1V/1.05V CPU Uncore, MCP I/O Iripple=8.28A (30A) 6.1*2*1=12.2A>8.28A D D +12V CPU_VTT_VCC12_IN CPU_VTT C 42.2KR1%0402 S N-NTD4806NT4G_DPAK3-RH N-NTD4806NT4G_DPAK3-RH +1 1 2 +1 VCC CPU_VTT_FB C60 C3300p50X0402 C X_0R R12 3.6KR1%0402 C12 X_C0.01u16X0402 E Q14 D G C533 X_C22u6.3X/8 R34 4.7KR0402 B Q2 N-SST3904_SOT23 S C544 X_C22u6.3X/8 R43 D G R98 C539 X_C22u6.3X/8 VTT_SELECT C77 C538 X_C22u6.3X/8 3.09KR1%0402 CH-0.5u40A0.81m-RH C3 C0.1u25Y0402-RH Q25 CD820u2.5SO-RH-1 R21 6103_CPU_VTT_BOOT1 R6 0R 6103_CPU_VTT_LG1 EC8 + R26 1KR1%0402 UP6103S8_SOP8-RH C4 X_C0.01u16X0402 R141 2.2R0805 CD820u2.5SO-RH-1 C 6103_CPU_VTT_PH1 6103_CPU_VTT_UG1 6103_CPU_VTT_LG1 EC9 + C9 X_C0.01u16X0402 CPU_VTT CHOKE3 EC17 CD820u2.5SO-RH-1 + CPU_VTT FB BOOT PHASE UG LG X_H1X2M-2PITCH_BLACK-RH EC16 CD820u2.5SO-RH-1 R28 34.8KR1% Vref 6103_CPU_VTT_PH1 C1u16Y R13 X_0R R3 4.99KR1%0402 6103_CPU_VTT_BOOT1 GND 2.49KR1% C0.1u25Y0402-RH U1 18,30 VTT_0_9_REF N-NTD4809NT4G_DPAK3-RH C10u16X51206-RH-1 R70 10K/1% C2 VTT_0_9_REF R7 C20 C0.1u25Y0402-RH S +1 C27 Q13 D G CPU_VTT1 CH-1.2u15A1.7m-RH C32 C0.1u25Y CD270u16SO-RH-2 + 2.2R0805 EC2 R68 6103_CPU_VTT_UG1 CD270u16SO-RH-2 C1u25X0805-RH X_CD270u16SO-RH-2 C17 EC5 EC1 R49 2.2R0805 +12V CHOKE1 H:1.05 L:1.1 CPU_VTT B R9 1KR1%0402 VTT_SELECT R8 E C R44 0R0402 SIO_GPIO24 18 0R0402 Q3 N-SST3904_SOT23 B B A A MICRO-STAR INT'L CO.,LTD MS-7636 MSI Size Custom Document Description Date: Tuesday, October 27, 2009 Rev 1.0 CPU_VTT - UPI6103_1-Phase Sheet 33 of 38 GFX 12V VIN VCC3 CPU_VTT +12VP_GPU CHOKE4 12VP D + NN-3904 R357 X_0R R351 2.2R0805 R346 2.2R0805 V_6334_GPU C215 C1u16X0603 680R0402 H_GFX_VID7_R H_GFX_VID6_R H_GFX_VID5_R H_GFX_VID4_R H_GFX_VID3_R H_GFX_VID2_R H_GFX_VID1_R H_GFX_VID0_R C 17 32 25 26 27 28 29 30 31 VCC U14 GFX_VR_EN_R C210 C1u16X0603 18 R326 CPU_VTT CD270u16SO CD270u16SO 12VP VCC5 PGOOD EN VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 PVCC 19 BOOT 22 AXG_BOOTR342 UGATE PHASE LGATE 23 24 21 AXG_UGATE AXG_PHASE AXG_LGATE 16 15 AXG_ISEN_PLUS ISEN-15 ISEN+ ISEN- 0R0805 14 AXG_PHASE +12VP_GPU C0.22u16X0603 C89 C199 Ripplecur=2800mA C4.7u35Y1206 C10u16Y1206 C C225 X_C10p50N0402 AXG_ISEN_N ISENNO GFX 1PHASE OUTPUT C207 C226 C0.1u25Y0402 CP11 R385 100KR1%0402 R386 37.4KR1%0402 RT3 AXG_ISEN_N Q49 100KRT1%0603 AXG_UGATE R302 1R0805 X_COPPER D G S C227 C4700p16X0402 AXG_ISENO R293 N-NTD4809NT4G_DPAK3-RH 10KR0603 R390 49.9KR1%0402 AXG_PHASE 35 GPU_VSEN GPU_VSEN R289 2.2R0805 0R0402 CP12 GFX_VCC_SENSE R373 49.9/1% GFX_VSS_SENSE NC R384 100R1%0402 12 VSEN 11 RGND 10 DVC AXG_RCOMP FB AXG_CPUFB COMP AXG_COMP APA R388 100R1%0402 OFS REF FS R339 100KR1%0402 R360 22.6KR1%0402 C219 C1200p50X AXG_APA C230 C1200p50X C231 C1200p50X RN9 H_GFX_VID[6 0] H_GFX_VID5 H_GFX_VID4 H_GFX_VID3 R370 X_1KR1%0402 CPU_VTT H_GFX_VID6_R H_GFX_VID5_R H_GFX_VID4_R R307 R314 R313 R312 R311 R310 R309 R308 8P4R-0R0603 RN10 SS 33 R343 63.4KR1%0402 B R371 1KR1%0402 R354 4.99KR1%0402 C212 C4700p16X0402 X_COPPER VDIFF 100R1%0402 R347 X_174KR1%0402 R350 23.7KR1%0402 C1000p16X0402 C192 AXG_ISEN_PLUS S N-NTD4806NT4G_DPAK3-RH GND V_6334_GPU C165 D G N-NTD4806NT4G_DPAK3-RH B R372 S Q46 LG 0R0805 20 D G C1u16Y R398 0R0402 Q43 LG EC34 CD820u2.5SO-RH-1 + R265 EC31 CD820u2.5SO-RH-1 GPU_CORE AXG_LGATE GPU_CORE X_C22u6.3X1206 R389 1.82KR1%0402 C161 R374 X_C22u6.3X1206 AXG_OCSET C195 OCSET 13 CHOKE6 CH-1.1u27A1.7m EC29 1K/1% R367 EC32 +1 GFX_VR_EN C87 C10u16Y1206 GFX_VR_EN_R + CH-1.2U15A Q56 2 D R355 1K/1% R397 4.7K ISL6314CRZ_QFN32 C216 C0.01u25X0402 C224 C22p50N0402 R387 20KR1%0402 H_GFX_VID2 H_GFX_VID1 H_GFX_VID0 H_GFX_VID6 C233 X_C0.01u25X0402 H_GFX_VID3_R H_GFX_VID2_R H_GFX_VID1_R H_GFX_VID7_R 8P4R-0R0603 X_1KR0402 1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 H_GFX_VID7_R H_GFX_VID6_R H_GFX_VID5_R H_GFX_VID4_R H_GFX_VID3_R H_GFX_VID2_R H_GFX_VID1_R H_GFX_VID0_R R327 R334 R333 R332 R331 R330 R329 R328 1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 1KR0402 demo board Used GFX VR (Clarkdale Only) Switcher (7 VID), 16A TDC, 25A Imax A A MICRO-STAR INT'L CO.,LTD MS-7636 MSI Size Custom Document Description Date: Tuesday, October 27, 2009 Rev 1.0 GPU PowerISL6117_1-Phase Sheet 34 of 38 VRMPWRGD LEVEL SHIFT VCC3 C42 Q24 R149 4.7KR0402 R168 C58 X_C0.1u25Y0402-RH 100KR1%0402-RH R15 VCC5 8P4R-0R C11 2.2R0805 12VP C1u25X0805 R143 2.2R0805 C1u25X0805 VBOOT 12VP C59 C1u25X0805 RN3 C67 X_S-BAT54A_SOT23 X H_VID3 H_VID2 X_C1u6.3Y0402-RH D NN-CMKT3904_SOT363-6-RH 12VIN H_VID3_R H_VID2_R R167 BOOT1 0R0805 C64 C0.1u25X C130 C10u16X51206-RH C145 C1u16Y Y BOOT1 R205 2.2R0805 UGATE1_R UGATE1 D G S R198 Q29 N-NTD4809NT4G_DPAK3-RH 10KR COIL2 CH-0.5u40A0.81m-RH PHASE1 R206 0R0805 LGATE1 LGATE1_L D G R189 2.2R0805 Q28 D G R131 R132 R136 R137 R138 R139 R140 R134 1KR0402 1KR0402 X_1KR0402 1KR0402 X_1KR0402 X_1KR0402 X_1KR0402 1KR0402 R135 10KR1%0402 C65 X_C1000p50X0402 VTT_ENABLE C56 CPU_VSS_SENSE X_C0.1u10X0402 demo board Used R92 VCCP C16 C470p50X0402 R83 CPU_VCC_SENSE R109 49.9/1% 0R0402C48 C4700p50X-3 R89 C470p50X 6206_CPU C35 C38 0x60:RH=10K,RL=NC R105 R95 X_C1u25X0805 1KR1% X_100KR0402 R121 0R0402 SDA OUT1 6206_CPU GND 5VDIMM OUT2 OUT3 SCL GPU_VSEN 15.4KR1%-RH R127 R61 VCC5 34 VCC5 R60 CPU_VTT VCC5 18 33 32 31 30 29 TB COMP FB BOOT3 UG3 PHASE3 LG3 ISEN1 R55 BOOT2 UGATE2 PHASE2 LGATE2_L DAC EAP X_10KRT1% R36 200KR1%-1 R54 X_56KR1% R25 47KR1%0402-RH 21 TM 11 OFS C0.033u10X0402 X_C0.033u10X0402 17 RT SS 48 VR_RDY 22 VRHOT PSI1 12 PSI X_0R0402 PSI2 PSI2 10 IMAX D X_0R0402 R124 R33 PSI# Q8 X_C0.1u10X0402 X_10KR1%0402 B C78 C76 R225 2.2R0805 UGATE2_R D G S R227 R18 R19 R20 R71 0R0805 CSN R65 E X_N-SST3904_SOT23 R30 18 VCCP_IMON_SIO X_0R0402 C22 C1u25X0805 CS1- 2KR0402 C15 ISEN1 16 Q36 N-NTD4809NT4G_DPAK3-RH 10KR COIL3 CH-0.5u40A0.81m-RH 2.43KR1% 2.43KR1% 2.43KR1% CS1+ CS2+ CS3+ ISEN2 15 ISEN3 14 ISEN4 13 PWM4 23 C0.1u25X R81 X_10KR0402 R208 0R0805 LGATE2 LGATE2_L D G R224 2.2R0805 Q34 D G S RT2 X_10KRT1% R82 X_10KR0402 N-NTD4806NT4G_DPAK3-RH VCCP_IMAX VCCP_IMAX ISEN2 ISEN3 CS2+ CS1- VCC5 UP6206_ VQFN-48L-RH C23 C0.1u25X C98 C100 R245 2.2R0805 UGATE3_R UGATE3 D G S R243 10KR R226 0R0805 LGATE3 COIL4 CH-0.5u40A0.81m-RH D G D D C66 C53 C1u6.3X50402-HF 18 G1 IMON_CTL 12VP 18 12V 12V GND GND C71 C0.01u25X0402 R187 X_0R H_VID1 R180 0R R186 X_0R H_VID1 X_H1X3M-2PITCH-1MM_BLACK-RH H_VID0 R72 10KR1%0402 H_VID0 1 1 2 2 S R181 0R R97 1KR0402 SIO_GPIO23 R41 C34 C1u6.3X50402-HF NN-CMKT3904_SOT363-6-RH VTT_PGD R47 PWM_LED3 12VP VCCP X_0R0402 LED3 X_1KR X_LED04-B-20mA3.8V_1608-RH-1 VCC5 R96 X_3.3KR LGATE2_L VCCP CH-1.2u15A3.0m-RH 1R2 Enable PSI function PSI1 R11 VCCP Q12 SIO_GPIO23 VCC5 3.3KRLGATE3_L 22KR1% PSI2 R123 36KR1% 6,30 D 18 SIO_GPIO40 C109 C0.1u25Y C90 C0.1u25Y C159 C0.1u25Y C85 C0.1u25Y A G S C44 C0.1u10X0402 D G EC20 CD820u2.5SO-RH-1 + R85 1KR0402 JB2 X_1KR R80 LED04-B-20mA3.8V_1608-RH-1 EC15 CD820u2.5SO-RH-1 + R75 10KR1%0402 JB1 R46 EC28 CD820u2.5SO-RH-1 + CPU_VTT H_VID0_R A 1R1% 0R0402 D C E CPU_VTT 3VSB R40 EC14 CD820u2.5SO-RH-1 + Q11 N-SST3904_SOT23 H_VID1_R R24 EC26 CD820u2.5SO-RH-1 + 12VIN SIO_GPIO21 EC13 CD820u2.5SO-RH-1 + MIN:100ns EC10 CD1000u16EL20-RH-3 + Q16 N-2N7002LT1G_SOT23 SIO_GPIO21 PWM_LED2 JPWR2 PWRCONN4P_CREAM-RH-1 COIL1 EC25 CD1000u16EL20-RH-3 + 4.7KR0402 CS1- EC22 CD820u2.5SO-RH-1 + +CPU_VTT STABLE TO VTTWRGOOD ASSERTION EC18 X_CD1000u16EL20-RH-3 + B CS3+ VCC5 LED2 EC21 CD1000u16EL20-RH-3 + R74 R45 PWM_LED1 18 SLP_S3# 15.4KR1%-RH S2 5VSB 15,18,30,32,36 ISEN3 R57 X_0R0402 X_LED04-B-20mA3.8V_1608-RH-1 X_1KR R53 X_10KR1%0402 G R39 LED1 D1 N-SST3904_SOT23 X_C0.1u10X0402 R88 10KR1%0402 SIO_GPIO22 Q21 B B 18 SIO_GPIO22 10KR1%0402 10KR1%0402 SP11 Auto Phase Select R59 X_10KR1%0402 Q10 X_NN-2N7002DW-7-F_SOT363-6-RH G2 D2 VTT_ENABLE Q22 N-SST3904_SOT23 C61 C0.1u10X0402 X_71.5KR1%0402-RH VCC5 SP10 Q37 S S1 R113 VTT_PGD E 6,30 B E C R161 Defaul Low 30KR1%0402-RH Q9 X_N-2N7002LT1G_SOT23 G N-NTD4806NT4G_DPAK3-RH C146 C1000p50X0402 C R162 R142 1KR1%0402 4.7KR0402 Delay 10us G R240 2.2R0805 Q40 R73 S IMON_CTL 18 IMON_CTL R125 6.2KR1%0402 C10u16X51206-RH C1u16Y Q41 N-NTD4809NT4G_DPAK3-RH N-NTD4806NT4G_DPAK3-RH 12VP 3VSB 1R1% 12VIN R66 BOOT3 0R0805 C19 X_C0.1u10X0402 VRM_IMAX_R X_71.5KR1%0402-RH R14 R27 0R0402 LGATE3_L R23 15.4KR1%-RH PHASE3 R58 B SP9 C ISEN2 R56 X_0R0402 SP8 Q32 N-NTD4806NT4G_DPAK3-RH C99 C1000p50X0402 S R38 1R1% C10u16X51206-RH C1u16Y ISEN1 49 C1 C26 S C Q1 X_N-2N7002LT1G_SOT23 G C51 C0.1u25X UGATE2 R32 X_56KR1%0402 R22 C0.01u25X0402 R48 X_1KR0402 R37 PHASE2 CSP 10KR1%0402 R2 X_4.7KR0402 CPU_VTT CS1- BOOT3 UGATE3 PHASE3 LGATE3_L 24 25 26 27 SMBDATA SMBDATA 22KR1%-RH 12VIN FBRTN 56KR1%0402 C49 CPU_VSS_SENSE C50 VRM_PGD_R SMBCLK SMBCLK BOOT2 UG2 PHASE2 LG2 BOOT1 UGATE1 PHASE1 LGATE1_L R116 BOOT2 0R0805 UP6262AMA8_SOT23-8-RH X_10KR1%0402 37 36 35 34 VOUT 46 3KR1% BOOT1 UG1 PHASE1 LG1 S 0R0402 SMBCLK R126 10,11,12,15,19,21,30,36 GPU_VSEN R107 RT1 R106 10KR1%0402 10,11,12,15,19,21,30,36 R104 0R0603 C45 X_C0.01u25X0402 20 SP7 N-NTD4806NT4G_DPAK3-RH C84 C1000p50X0402 CS1+ EN GND SMBDATA C BUS_SELVCC U6 VRSEL C10p50N C57 X_C0.1u10X0402 CPU_VSS_SENSE R160 100R0402 CPU_VSS_SENSE 5VDIMM 47 19 C36 UPI VOLTAGE CONSOLE(1) VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 2.2KR1%0402 CPU_VCC_SENSE R62 100R0402 38 39 40 41 42 43 44 45 D SP6 Q27 S N-NTD4806NT4G_DPAK3-RH VCC12_1 H_VID7_R X_1KR0402 H_VID6_R X_1KR0402 1KR0402 H_VID5_R H_VID4_R X_1KR0402 1KR0402 H_VID3_R 1KR0402 H_VID2_R 1KR0402 H_VID1_R H_VID0_R X_1KR0402 5VCC V_6206 R151 R152 R153 R154 R155 R156 R158 R159 VCC12_2 U4 H_VID7_R H_VID6_R H_VID5_R H_VID4_R H_VID3_R H_VID2_R H_VID1_R H_VID0_R 28 S 8P4R-0R CPU_VTT VCCP Z VRM_PGD_R D3 Y BOOT3 H_VID7_R H_VID6_R H_VID5_R H_VID4_R 12,15,30 C10 C1u25X0805 VRM_PGD H_VID7 H_VID6 H_VID5 H_VID4 H_VID[7 2] R29 2.2R0805 12VP R148 10KR1%0402 2.2R0805 R133 X_4.7KR0402 R67 R157 1KR0402 X_S-BAT54A_SOT23 X BOOT2 Z V_6206 RN2 1KR1%0402 R169 3VSB VCCP CPU_VTT D2 Q23 N-2N7002_SOT23 S Q20 N-2N7002_SOT23 GPIO11:H X_H1X3M-2PITCH-1MM_BLACK-RH MICRO-STAR INT'L CO.,LTD MS-7636 MSI Size Custom Document Description Date: Friday, October 30, 2009 Rev 1.0 VRD11.1 - uPI 6206_3-Phase Sheet 35 of 38 resistance connect to 3VCC and connect power source to SYS_3VSB for power Reserve debug port 5020 D 6 6 6 6 XDP_CPU_BPM_N4 XDP_CPU_BPM_N5 XDP_CPU_BPM_N6 XDP_CPU_BPM_N7 TP16 TP15 10,11,12,15,19,21,30,35 SMBDATA 10,11,12,15,19,21,30,35 SMBCLK TP18 TP17 TP22 TP23 TP19 TP25 XDP_CPU_BPM_N0 XDP_CPU_BPM_N1 XDP_CPU_BPM_N2 XDP_CPU_BPM_N3 11 15 17 OBSFN_A0 OBSFN_A1 OBSDATA_A_0 OBSDATA_A_1 OBSDATA_A_2 OBSDATA_A_3 H_MCP_CFG17A H_MCP_CFG16A XDP_CPU_BPM_N4 XDP_CPU_BPM_N5 XDP_CPU_BPM_N6 XDP_CPU_BPM_N7 21 23 27 29 33 35 OBSFN_B0 OBSFN_B1 OBSDATA_B_0 OBSDATA_B_1 OBSDATA_B_2 OBSDATA_B_3 51 53 10 12 16 18 SDA SCL OBSFN_C0 OBSFN_C1 OBSDATA_C_0 OBSDATA_C_1 OBSDATA_C_2 OBSDATA_C_3 22 24 28 30 34 36 OBSFN_D_0 OBSFN_D_1 OBSDATA_D_0 OBSDATA_D_1 OBSDATA_D_2 OBSDATA_D_3 R172 R165 H_MCP_CFG8A H_MCP_CFG9A H_MCP_CFG0A H_MCP_CFG1A H_MCP_CFG2A H_MCP_CFG3A X_0R0402 X_0R0402 H_MCP_CFG4A H_MCP_CFG5A H_MCP_CFG10A H_MCP_CFG11A H_MCP_CFG6A H_MCP_CFG7A TP24 TP26 TP28 TP20 TP27 TP21 VCC_OBS_AB VCC_OBS_CD 61 TCK1 TCK0 TDO TRSTn TDI TMS 55 57 52 54 56 58 HOOK0 HOOK1 HOOK2 HOOK3 ITPCLK/HOOK4 ITPCLKB/HOOK5 RESETB/HOOK6 DBRB/HOOK7 39 41 45 47 40 42 46 48 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 13 19 25 31 37 49 59 14 20 26 32 38 50 GND18_XDP_PRESENTB 60 62 62 61 CPU_TCK CPU_TDO CPU_TRST# CPU_TDI CPU_TMS CPU_TCK CPU_TDO CPU_TRST# CPU_TDI CPU_TMS XDP_PWRGD XDP_PLRST# XDP_CPU_PWRGD 6 6 R195 6,15,18 PLTRST# X_0R R171 1.5KR0402-1 XPD_CPURST# XDP_PWRGD 0R0402 CPU_VTT XDP_CPU_BCLK_P XDP_CPU_BCLK_N XDP_CPU_BCLK_P XDP_CPU_BCLK_N R164 XDP_CPU_PWRGD FROM CPU R216 R215 X_0R0402 X_0R0402 XDP_CPU_CLK_R_P XDP_CPU_CLK_R_N D R191 X_3KR1%0402 XDP_CPU_PWRGD XDP_CPU_CLK_R_P XDP_CPU_CLK_R_N XPD_CPURST# FP_RST# R194 6,15,18 PLTRST# R200 X_1KR0402 XDP_PLRST# 1KR0402 CPU_RESET_OUT# 6,15,29 FP_RST# ASIC Timer Clock EN#/VSB Discharge NCT_XIN C404 43 44 XDP_CPU_PREQ# XDP_CPU_PRDY# XDP_CPU_BPM_N0 XDP_CPU_BPM_N1 XDP_CPU_BPM_N2 XDP_CPU_BPM_N3 CPU XDP CLOCK JXDP1 R588 10M/4 NCT_XOUT C20p50N Y3 EN# circuit CPU_VTT CPU_VTT 32.768KHZ12.5P_D-LF update 0903 ATX_5VSB X_BTB60PF-RH C R590 330K/4 C405 C C39p50N R522 3VSB_LAN_EN#_R 4.7K/4 Enable ASIC Timer Circuit NCT_XIN R589 X_4.7K/4 NCT3016Y Disable ASIC Timer Circuit Modify ATX_5VSB-2009.8.12 ATX_5VSB R508 PANEL SWITCH U27 0/6 C372 0.1u/16V/4 SMBCLK SMBDATA 15,18,30,32,35 SLP_S3# B Please not change the ASIC timer component R587 R596 0/4 R572 0/4 R582 12,15,30,31 SLP_S4# 0/4 NCT_SCL NCT_SDA VSB GND 12 SCLK 11 NCT3016Y 21 SYS5VSB_OFF 15 Mode_sel/SLP_S5#_lch/GPIO18 18 EN#/AC_LOSS#/GPIO17 17 SLP_S5# PLED1 PLED1/GPIO9/Ctl1/Wake1 PLED2 10 PLED2/GPIO10/Ctl2/Wake2 PWROK/GPIO19 30,31 R534 10K/4/1 SLP_S5_LCH# 30,31 3VSB_LAN_EN#_R R511 NCT_WAKE# 0/4 3VSB_LAN_EN# 30 R598 PS_ON#/GPIO13 NC_WAKE# NCT_PSIN# R555 33/4 0/4 13 NCT_PSON# 0/4 R579 16 Hardware default = high PSON# 18,29 1.Set Lock_GPIO_Mode =1 ATX_5VSB 3VSB N3016Y Power LED Control 2.Set GPIO16_Data =1 Update- 2009.10.22 GPIO16 Use for MEM_PWRGD Patch Circuit 3.Set GPIO16 port as output by open-drain mode ATX_5VSB 4.Porting GPIO16_Data =0 before system into deep_s3 5.Waiting CPU_PWRGD from low to high and setting GPIO16_Data =1 when resume from deep_s3 Pull-High ATX_5VSB B 18,29 NCT3016Y-A-RH Strapping PIN C382 0.1u/16V/Y/4 PWRBTIN NCT_GPIO16 15 20 3VCC_DET 3VCC/GPIO20 PWRBTIN_NCT 21,29 NCT_GPIO16 21 Power On 14 NCT_PSOUT# R570 XI / NC XOUT/ NC 0/4 NCT_PSIN# PS_OUT# RSMRST#/GPIO16 SYS5VSB_OFF 19 NCT_PWROK PS_IN# NCT_XOUT SYS5VSB_OFF ATXPG/GPIO8 SLP_S3#/GPIO3 NCT_XIN ATX_5VSB SDA 0/4 NC R592 R542 Update- 2009.10.22 If RSMRST# use to GPIO function, please pull high to ATX_5VSB else pull high to 3VSB 10K/4 X_8.2K/4 Update- 2009.8.24 GPIO16 always keep high except for deep_s3 R840 330R/6 Modify ATX_5VSB-2009.10.21 R841 330R/6 PLED1 R605 0/4 PLED2 R606 0/4 NCT_GPIO16 NCT_PSOUT# must used 1K 3VSB R569 1K/4 NCT_PSOUT# Modify ATX_5VSB-2009.8.12 A SLP_S5_LCH# (SimpleMode_Sel): 8-PIN Function: Pull-high 10k 20-PIN Full Function: Floating (Internal Pull-Down) R504 4.7K/4 VCC3 R518 X_4.7K/4 SimpleMode_Sel Full function 3VCC_DET X_4.7K/4 1K/4 NCT_PSON# NCT_WAKE# A X_0R1206 X_0R1206 Modify - 2009.8.12 resistance and S detect R272 249K/4 ATX_5VSB Simple Mode R580 R599 1K/4 5VSB R256 R255 New future for WAKE support wake up event.It's HW strap pin Pull High : Wake SYS5VSB_OFF R281 0/4 R282 D Q42 P06P03LCG_SOT89 EC30 SMD10U/10V + 18 R517 29 Trace Width 80mils use DIP CAP 10uF or 22uF NCT_PWROK 3VCC_DET must used 1K POWER ON STRAPPING PIN PIN Name 29 5VSB Power Switch ATX_5VSB Modify2009.10.22 HW default support deep_s5 Modify ATX_5VSB-2009.8.12 ATX_5VSB or 3VDual power source for power detect G SLP_S5_LCH# X_4.7K/4 R519 PWR_LED SUS_LED 10KR change to 0603 10K ohm Soft Start use X7R or X5R MICRO-STAR INT'L CO.,LTD C190 1u/10V/6 MS-7636 MSI Size Custom Document Description Rev 1.0 CPU XDP Date: Wednesday, October 28, 2009 Sheet 36 of 38 (2Ax3=6A) +12VIN UP6103 PE Slot x16 (5.5A) PEX1 Slot x3(1.5A) PCI Slot x3 (1.5A) 1394 Connect x2 (3A) D VCCP Intel 1156 CPU (86A) 95W(TDP) Up6213 +12V CPU_VTTD 30A 3VSB and 3VSB_WAKE POWER MAP Add- 2009.9.28 Intel 1156 CPU (30A) PCI-E LAN ATX_5VSB AVDD5 0.2A LT1087S ALC888S-VC2 D 3VSB_WAKE PCI-E SLOT uP6107 or uP7706 (200mA) FAN x3 (0.6A) PCI SLOT Power Delivery 5VSB uP7704 3VSB SB OTHER PCI Slot x3 C (10A) VCC5 5VSB PCH 1P05V LDO uP7501 5VDIMM UP6103 3.8A VCC_DDR 21.25A DDRIII x2(3.6A) W83310DS up7706&Linear 3VSB 4.081A PCH (6.5A) C Intel 1156 CPU (2.8A) VTT_DDR DDRIII x4(0.75A) PCH (1A) PE Slot (0.375mA X5) PCI Slot (0.375mA X2) RTL8111DL LAN (58mA+289mA) uP7533 x5 FUSB_VCC RUSB_VCC 5.5A Fron USB x4 (2A) REAL USB x6 (3A) PS2 KB/MS(500mA) B B (18.6A) VCC3 OP+MOS PCH1_8V 1.6A PCH 1.8V/CPU1.8V uP7706 JMB368_1.8V 361.3mA JMB363 (361.3mA) (1.6A) PE Slot x16 (3.0A) PEX1 Slot x2(2.0X3A=6) PCI Slot x1 (7.6AX1=7.6) A A 3.3V 58mA+289mA MICRO-STAR INT'L CO.,LTD RTL8111DL LAN (58mA+289mA) MS-7588 MSI Size Custom Document Description Rev 1.0 Power Map Date: Tuesday, October 27, 2009 Sheet 37 of 38 888S audio ), ,(IDE SW ,GB DVI,HDMI APS APS LAN, VC2 LED OC-switch PCB CPU SOCKET PCB1 MS-7636-1.0 XU1_X1 CPU SOCKET D D LGA1156 Simulation SIP1 HEATPIPE SIP2 VCC5 SIM1 BATTERY SIM2 X_PIN1*2 X_PIN1*2 C C BAT1_X1 Optical Fiducial Marks-120 HS_PCH1 MEC1 MEC1 BAT-BCR2032P-RH FM12 FM2 FM14 FM4 FM7 FM5 FM3 FM8 X_FM X_FM X_FM X_FM X_FM X_FM X_FM X_FM Optical Fiducial Marks-100 FM10 MEC2 MEC2 FM6 FM13 X_OPTICS X_OPTICS FM16 FM11 FM9 FM15 X_OPTICS X_OPTICS X_OPTICS X_OPTICS X_OPTICS HS-0404591-RH A MH1 MH2 MH6 6 X_MH001 X_MH001 X_MH001 X_MH001 X_MH001 H55EB3:3 JMB368 H55SG6DVI:Full spec X_MH001 A MICRO-STAR INT'L CO.,LTD SMD.DB-X7.RU X_CD1000uF X_CD100uF X_CD10uF X_CD470u6.3V4SO-2 PCB MH3 OPT4 PCB OPT3 PCB MH4 OPT2 PCB OPT1 B MH5 EL CAP B Mounting Holes MS-7636 MSI Size Custom Document Description Date: Wednesday, October 28, 2009 Rev 1.0 Manual & Option parts Sheet 38 of 38 ... APVDD_1.8V C365 C0.1u16Y0 402 CP8 C324 C0.1u16Y0 402 C369 C10u10Y0 805 C359 C0.1u16Y0 402 C378 C10u10Y0 805 C373 C10u10Y0 805 C338 C0.1u16Y0 402 C377 C10u10Y0 805 VOUT C364 C366 C0.1u16Y0 402 C 100 0p16X0 402 DVDD_1.8V... UP7 704 _PSOP8 R493 10KR0 402 C349 10u/10Y/8 R584 Dual Lan S0 : 0. 5A X 2=1A S3 : 50mA X 2= 100 mA X_0R0 805 C 203 C 100 0p50X0 402 5VSB C 205 0. 1u/16X C 204 C 100 0p50X0 402 5VSB C 201 0. 1u/16X R583 X_0R0 805 ... R311 R3 10 R 309 R 308 8P4R-0R0 603 RN 10 SS 33 R343 63.4KR1 %04 02 B R371 1KR1 %04 02 R354 4.99KR1 %04 02 C212 C4 700 p16X0 402 X_COPPER VDIFF 100 R1 %04 02 R347 X_174KR1 %04 02 R3 50 23.7KR1 %04 02 C 100 0p16X0 402 C192