Week8 supplementation

Supplementation Week Operating regions Basic Electronics 2019 Note : IC = IC + ICO majority minority +10 V Load line for voltage divider bias circuit I1 IC R1 18 k IB IC (mA) hFE = 50 I2 25 20 RC 260 I C (sat ) R2 4.7 k IE RE 240  VCC 10V = = = 20mA RC + RE 260Ω+240Ω 15 10 VCE (off ) = VCC = 10V 10 12 VCE (V) Q-point with amplifier operation, Where? IC IB IC(sat) IB = 50 A I C = βI B IB = 40 A IC(sat)/2 IB = 30 A Q-Point IB = 20 A IB = 10 A VCC/2 VCC IB = A VCE VCE = VCC − I C RC +VCC Switching Circuit Calculations RB IC RC IB Saturation current: ICsat IE VCC = RC To ensure saturation: IB  ICsat βdc Emitter-collector resistance at saturation and cutoff: Rsat = VCEsat ICsat Rcutoff = VCC ICEO RE The important circuit parameters: Zi = Vi/Ii input impedance Zo = Vo/Io output impedance Av = Vo/Vi voltage gain Ai = Io/Ii current gain Basic Electronics - FETEL 2019 ac analysis In summary, therefore, the ac equivalent of a transistor network is obtained by: Setting all dc sources to zero and replacing them by a short-circuit equivalent Replacing all capacitors by a short-circuit equivalent Removing all elements bypassed by the shortcircuit equivalents introduced by steps and Redrawing the network in a more convenient and logical form Basic Electronics - FETEL 2019 The re Transistor Model ac resistance of the diode dI D d re = = [ I S (eV / kT − 1)] dV dV for Si and T = 25 oC, r e 26mV = For ID = Ie >> IS Ie (a few ohms) Common-Emitter Configuration The diode re model can be replaced by the resistor re re = 26 mV Ie Current through diode: I e = I c + I b = I b + I b = (  + 1) I b  I b (generally >>1) Input impedance: Z i = Vi Vbe I e re I b re = =  Ii Ib Ib Ib Z i  re Common-Emitter Fixed-Bias Configuration The input is applied to the base The output is taken from the collector High input impedance Low output impedance High voltage and current gain Phase shift between input and output is 180 10 Common-Emitter Fixed-Bias Configuration AC equivalent re model 11 Common-Emitter Fixed-Bias Calculations Input impedance: Output impedance: Voltage gain: Zi = RB||β| e Zi  βre RE 10 βre Zo = RC||rO Zo  RC ro 10 RC V (R ||r ) Av = o = − C o Vi re Av = − RC re ro 10 RC Current gain: Ai = Io βRB ro = I i (ro + RC )(RB + βre ) Ai  β Current gain from voltage gain: ro 10 RC , R B 10 βre Ai = − AV Zi RC 12 Example 13 Basic Electronics - FETEL 2019 14 Common-Emitter Voltage-Divider Bias re model requires you to determine , re, and ro 15 Common-Emitter Voltage-Divider Bias Calculations Current gain Input impedance Output impedance Zo = RC || ro R  = R1 || R2 Zi = R  || βre Zo  RC ro 10R C Io R ro = I i (ro + RC )(R  + re ) I R  Ai = o  r 10R I i R  + re o C Ai = Ai = Voltage gain Av = Vo − RC || ro = Vi re Av = Vo R − C Vi re Io   ro 10R C , R 10 re Ii Current gain from Av Ai = − Av Zi RC ro 10R C 16 Example Basic Electronics - FETEL 2019 17 Basic Electronics - FETEL 2019 18