COMPAL CONFIDENTIAL MODEL REV:0.1 PCI / ISA PULL UP/DOWN RESISTERS PAGE 13 SODIMM -BANK 2,3 ON BOARD 32/64MB -BANK 443ZX-100M VGA ATI Mobility P PIRQA# PAGE 12 PSB PAGE 17 PAGE 16 ICS9248-92 PAGE 2,3 LCD & CRT SGRAM CLOCK Celeron uBGA2/uPGA2 CPU NAME : 888F2 LA854 IDSEL: AD11 BUS#0,DEV#0 HOST-TO-PCI BRIDGE AGP BUS MEMORY BUS IDSEL: AD12 BUS#0,DEV#1 PCI-TO-PCI BRIDGE PAGE 14,15 POWER INTERFACE PAGE 25,35 PAGE 7,8 PAGE 4,5,6 Direct CD Play PAGE 21 INTERNAL IDE IDE/FDD PCI BUS PAGE 22 IDSEL: AD15 MASTER PIRQA#, PIRQB# SIRQ IDSEL: AD24 MASTER PIRQB# IDE Damping IDSEL: AD19 MASTER PIRQC# IDSEL: AD27, AD28 MASTER 0, PIRQD# PAGE 20 PIIX4M BUS#0,DEV#7 1394 OHCI TSB12LV26 IDSEL: AD18 FUNC 0: PCI-TO-ISA BRIDGE CARDBUS AUDIO PCI1420 CS4281-CQ PAGE 26 PAGE 18 Mini PCI Connector PAGE 28 PAGE 29 FUNC 1: IDE INTERFACE FUNC 2: USB INTERFACEPIRQD# AC LINK FUNC 3: POWER MANAGEMENT PAGE 9,10,11 ISA ISA FIR/USB 1394 PHY TSB41LV01 PCMCIA SOCKET PAGE 27 PAGE 19 DC/DC POWER PAGE 32 SIO FDC37N869 PAGE 30 +2.5V POWER EC/KBC CPU_IO POWER PC87570 +3VALW POWER PAGE 23 +5VALW POWER LPT PORT +12VALW POWER CPU_CORE POWER PAGE 31 PAGE 36,37,38,39 TRACK POINT PS2/KB INTERFACE PAGE 33 BIOS EC BUFFER PAGE 24 Switchs & Connectors PAGE 34 Compal Electronics, Inc Title PROPRIETARY NOTE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND Size TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet of 40 Q18 FDV301N HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 T2 V4 V2 W3 W5 W2 ADS# AB2 ADS# AA1 AB1 Y2 E6 V21 AD9 AERR# AP0# AP1# BERR# BINIT# IERR# IERR# 4 4 BREQ0# BPRI# BNR# HLOCK# C6 U4 T4 R1 4 HIT# HITM# DEFER# V1 Y4 U3 4 4 AA21 Y21 W21 W19 U2 U1 AA2 W1 Y1 HTRDY# RS#0 RS#1 RS#2 A20M# AD10 FERR#1.5 AC12 IGNNE# AC13 PWRGD_CPU V5 SMI# AB10 A20M# IGNNE# SMI# RP64 8P4R-1K R80 R322 R323 R324 CPU_IO 9 2 2 INTR NMI STPCLK# 1 1 PREQ# @56 10K @10K 1K INTR NMI STPCLK# SLP# THERMDA THERMDC DATA PHASE SIGNALS ERROR SIGNALS BREQ0# BPRI# BNR# LOCK# HIT# HITM# DEFER# SNOOP PHASE SIGNALS BP2# BP3# BPM0# BPM1# TRDY# RS0# RS1# RS2# RSP# RESPONSE PHASE SIGNALS ARBITRATION PHASE SIGNALS A20M# FERR# IGNNE# PWRGOOD SMI# PC COMPATIBILITY SIGNALS AC15 AD13 AD14 AA14 AA11 AB20 W20 AA12 AB15 TDO TDI TMS TRST# TCK PREQ# PRDY# SELPSB0 SELPSB1 DIAGNOSTIC & TEST SIGNALS AB18 AC19 AC11 AB12 INTR/LINT0 NMI/LINT1 STPCLK# SLP# EXECUTION CONTROL SIGNALS AA15 AB16 THERMDA THERMDC THERMAL DIODE V20 T21 U21 R21 V18 P21 P20 U19 DBSY# DRDY# AA3 T1 AA18 Y20 AB21 INIT# FLUSH# RESET# AA10 AC9 A6 BCLK 2200PF 00 66MHZ 01 100MHZ 10 RESERVED C453 THERMDA THERMDC NC VCC DXP DXN NC ADD1 GND GND NC STBY SMBCLK NC SMBDATA ALERT ADD0 NC from 87570 16 15 14 13 12 11 10 SMC 21,23,24 SMD 21,23,24 MAX1617 ATF# R132 1K ATF# 24 R134 1K +5VS NMI INTR IGNNE# A20M# RP26 CPU_IO 8P4R-1.5K SLP# R100 CPUINIT# R102 STPCLK# R101 FLUSH# R320 IERR# R321 SMI# R104 PREQ# R313 CPURST# R24 1.5K 1K 680 1.5K 1.5K 270 1.5K 56.2_1% D9 35,39 VR_POK PWRGD_CPU R112 1.5K +2.5V_CLK RB751V DBSY# DRDY# 4 1K CPUINIT# FLUSH# CPURST# CPUINIT# CPURST# M3 EDGCTRLN HCLK_CPU 4,12 AA16 R66 10 MICRO-PGA R318 110_1% 11 STSEM BUS FREQUEN CY 200 C199 1UF U11 SELPSB[1:0] R133 1617VCC R312 PICCLK PICD1 PICD0 DEP0# DEP1# DEP2# DEP3# DEP4# DEP5# DEP6# DEP7# +5VS REQ0# REQ1# REQ2# REQ3# REQ4# RP# 4 4 REQUEST PHASE SIGNALS HD#[0 63] HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63 FERR# D10 D11 C7 C8 B9 A9 C10 B11 C12 B13 A14 B12 E12 B16 A13 D13 D15 D12 B14 E14 C13 A19 B17 A18 C17 D17 C18 B19 D18 B20 A20 B21 D19 C21 E18 C20 F19 D20 D21 H18 F18 J18 F21 E20 H19 E21 J20 H21 L18 G20 P18 G21 K18 K21 M18 L21 R19 K19 T20 J21 L20 M19 U18 R18 1 COPPERMINE D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# 2 21 A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# FERR#1.5 R120 10K R326 1K R103 1.5K CPU_IO CPU_IO +3VS HD#[0 63] U44A L3 K3 J2 L4 L1 K5 K1 J1 J3 K4 G1 H1 E4 F1 F4 F2 E1 C4 D3 D1 E2 D5 D4 C3 C1 B3 A3 B2 C2 A4 A5 B4 C5 E HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 HA#[3 31] HA#[3 31] D C B A C118 Compal Electronics, Inc 10PF Title PROPRIETARY NOTE 133MHZ 11 A B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND Size TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: C D SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet E of 40 A B C D PROPRIETARY NOTE VCCT_VCCA R325 CPU_IO 1.5K AD17 Y5 N5 AD20 H4 AA17 G4 1 R316 56.2_1% TESTHI TESTLO1 TESTLO2 TESTP1 TESTP2 TESTP3 TESTP4 R111 1K R70 1K 2 GHI# RTTIMPEDP C71 C148 1UF 1UF 1 1UF 2 C72 1 2 1UF 1 1 2 C73 1 1 C131 1UF 1UF 1UF 2 2 1UF 1 1 2 C103 C119 C144 C447 + C451 220U_E 1 C450 1UF 1U 1U 1U C106 C105 C104 C120 1U C84 1U 1 C86 1U 1U 1U 1 1 C108 C107 C87 1U 2 C89 1U 1 C151 C159 C163 1U 1U 1U C52 1U 1U 1 C49 1U 1U 1U 1U 1U C121 C122 C123 C124 C50 1 1 CPU_CORE 1 1 1 1 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U 1U C195 C194 C193 C169 C164 C160 C152 C142 C132 C168 C48 1 CPU_CORE 1 C42 1U C35 1U 2 C41 1U C40 1U C39 1U 1 C38 1U 2 C53 1U C57 1U C59 1U 1 C62 1U 1U C68 CPU_CORE 1 C173 C174 C179 C79 1U 1U 2.2U_0805 1U C46 1U 1U C36 C33 1U C34 1U CPU_CORE C92 C416 C427 C419 C80 C91 CPU_CORE G6 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16 G17 H6 H17 J6 J17 K6 K17 L6 L17 M6 M17 N6 N17 P1 P6 P17 R6 R17 T6 T17 U6 U17 V6 V7 V8 V9 V10 V11 V12 V13 V14 V15 V16 V17 W6 W7 W8 W9 W10 W11 W12 W13 W14 W15 W16 W17 Y6 Y7 Y8 AA6 AA7 AA8 AB6 AB7 AB8 AC6 AC7 AC8 AD6 AD7 AD8 VCCT0 VCCT1 VCCT2 VCCT3 VCCT4 VCCT5 VCCT6 VCCT7 VCCT8 VCCT9 VCCT10 VCCT11 VCCT12 VCCT13 VCCT14 VCCT15 VCCT16 VCCT17 VCCT18 VCCT19 VCCT20 VCCT21 VCCT22 VCCT23 VCCT24 VCCT25 VCCT26 VCCT27 VCCT28 VCCT29 VCCT30 VCCT31 VCCT32 VCCT33 VCCT34 VCCT35 VCCT36 VCCT37 VCCT38 VCCT39 VCCT40 VCCT41 VCCT42 VCCT43 VCCT44 VCCT45 VCCT46 VCCT47 VCCT48 VCCT49 VCCT50 VCCT51 VCCT52 VCCT53 VCCT54 VCCT55 VCCT56 VCCT57 VCCT58 VCCT59 VCCT60 VCCT61 VCCT62 VCCT63 VCCT64 VCCT65 VCCT66 VCCT67 VCCT68 VCCT69 VCCT70 VCCT71 B POWER, GROUND AND NC C413 2 CPU_CORE + C409 220U_E 6.3V + C410 220U_E 6.3V + C405 220U_E 6.3V + C411 220U_E 6.3V + C452 220U_E 6.3V + C406 220U_E 6.3V VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VID4 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VID3 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VID0 VID1 VID2 VSS159 VSS160 VSS161 R12 R14 R16 R20 T3 T5 T7 T9 T11 T13 T15 T18 T19 U8 U10 U12 U14 U16 U20 V3 V19 W4 W18 Y3 Y9 Y10 Y11 Y12 Y13 Y14 Y15 Y16 Y19 AA4 AA13 AA20 AB3 AB4 AB5 AB9 AB11 AB13 AB14 AB17 AC1 AC2 AC4 AC5 AC10 AC14 AC16 AC18 AC21 AD1 AD2 AD3 AD4 AD5 AD16 AD21 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24 A15 A16 A17 C14 D8 D14 D16 E15 G2 G5 G18 H3 H5 J5 M4 M5 P3 P4 AA5 AA19 AC3 AC17 AC20 AD15 VID4 VID3 VID0 VID1 VID2 +5V RP65 VID0 VID1 VID2 VID3 VID4 R319 8P4R-1K 1K MICRO-PGA VID[0 4] 39 VID[0 4] Compal Electronics, Inc Title SCHEMATIC, M/B LA-854 MICRO-PGA A COPPERMINE 2.2U_0805 2.2U_0805 2.2U_0805 2.2U_0805 2.2U_0805 2.2U_0805 2.2U_0805 R2 AD19 CMOSREF1 CMOSREF2 1UF 1UF AA9 AD18 CLKREF 1UF CMOSREF RSVD 1U P2 C88 CLKREF 1UF 1UF 1UF C74 CPU_CORE AB19 1UF C110 R53 2K_1% R110 C448 C150 1K_1% 1UF 1UF 1 2 R60 2K_1% R109 1.5K_1% 1UF C75 CPU_IO +2.5V_CLK +2.5V_CLK 1UF 1UF C141 C147 C146 C145 C85 1UF CPU_CORE POWER, GROUND, RESERVED SIGNALS 1UF C76 CPU_IO VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 COPPERMINE C125 C109 C90 1UF H8 H10 H12 H14 H16 J7 J9 J11 J13 J15 K8 K10 K12 K14 K16 L7 L9 L11 L13 L15 M8 M10 M12 M14 M16 N7 N9 N11 N13 N15 P8 P10 P12 P14 P16 R7 R9 R11 R13 R15 T8 T10 T12 T14 T16 U7 U9 U11 U13 U15 4.7U_0805 U44C VREF0 VREF1 VREF2 VREF3 VREF4 VREF5 VREF6 VREF7 PLL ANALOG VOLTAGE A2 A7 A8 A12 A21 B1 B5 B6 B7 B8 B10 B15 B18 C9 C11 C15 C16 C19 D2 D6 D7 D9 E3 E7 E8 E9 E10 E11 E13 E19 F3 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F20 G3 G19 H2 H7 H9 H11 H13 H15 H20 J4 J8 J10 J12 J14 J16 J19 K2 K7 K9 K11 K13 K15 K20 L5 L8 L10 L12 L14 L16 L19 M7 M9 M11 M13 M15 M20 N2 N3 N4 N8 N10 N12 N14 N16 N18 N19 N20 P5 P7 P9 P11 P13 P15 P19 R3 R4 R5 R8 R10 1UF 2 1UF 2 1UF 2K_1% E5 E16 E17 F5 F17 U5 Y17 Y18 CPU_IO VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 C51 VCCA VSSA C69 C67 C149 R308 L2 M2 2 1K_1% VCCTREF CPU_IO R307 1 U44B C99 + C415 1UF 33U_6.3X2.5 VCCT_VSSA VCCTREF 2 4.7Uh 1 L9 CPU_IO E THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC C D Size B Document Number Date: Saturday, December 23, 2000 Rev 0C 401172 Sheet E of 40 ADS# 2 2 2 C 1UF 1UF 1UF 01UF 01UF 01UF 01UF C446 C440 C444 C445 C422 C421 C424 C423 1UF 1UF 1UF RSMRST# 1UF 1UF VCCTREF CPU_IO AGPREF REFVCC5 +3V RSMRST# 1UF 1UF R135 R72 1UF 1UF 01UF 01UF 01UF C433 C439 C429 C436 C432 C438 C430 C437 D +3V 1UF BXPWROK 1K 1UF C420 C434 C431 C443 C441 C442 2 4.7U_0805 1 1 +3V + C414 220U_E B HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 2 2 10,14 SUS_STAT# 10,35 1 2 HA#[3 31] BREQ0# BPRI# BNR# HLOCK# 2 2 HA#[3 31] HIT# HITM# DEFER# 2 REFVCC5 U8A HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 DBSY# DRDY# 2 2 1K 2 G25 H22 G23 H23 G24 F26 G26 G22 F22 F23 F24 F25 E23 E26 E25 D25 D26 B25 C26 A25 C25 A24 D24 C23 B24 C24 A23 E22 D23 K21 J22 J23 K24 K25 J25 B26 H26 H24 K22 L24 L22 J26 HTRDY# RS#0 RS#1 RS#2 CPURST# HCLK_CPU 2,12 R35 D3 C418 1 HD#[0 63] ADS# HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31# HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 BREQ0# BPRI# BNR# HLOCK# HIT# HITM# DEFER# L23 K23 H25 K26 L26 L25 B23 M26 N23 R68 10 C112 5PF +5V RB751V C D B1 F7 F9 F18 F20 G6 G21 J6 J21 L11 L13 L14 L16 M12 M15 N11 N16 N22 N26 P1 P11 P16 R12 R15 T11 T13 T14 T16 V6 V21 Y6 Y21 AA7 AA9 AA18 AA20 AE1 AE26 AF2 AF14 M23 E16 M24 F17 C2 N4 P22 AE22 AE23 M25 AD4 AF3 U8D VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 GTL_REFA GTL_REFB VTTA VTTB REFVCC5 AGPREF NC0 NC1 NC2 TESTIN# SUSTAT# 443ZX-100M BXPWROK POWER and GROUND Title VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 A1 A14 A26 C5 C9 C18 C22 E3 E12 E15 E24 F6 F8 F19 F21 H6 H21 J3 J24 L12 L15 M5 M11 M13 M14 M16 M22 N1 N12 N13 N14 N15 N24 P12 P13 P14 P15 P26 R5 R11 R13 R14 R16 R22 T12 T15 V3 V24 W6 W21 AA6 AA8 AA19 AA21 AB3 AB12 AB15 AB24 AB25 AD5 AD9 AD18 AD22 AF1 AF13 AF26 Document Number Saturday, December 23, 2000 401172 E E Sheet SCHEMATIC, M/B LA-854 Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND Size TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: +3V 1UF_0805 DBSY# DRDY# HTRDY# RS#0 RS#1 RS#2 CPURST# CRESET# HCLKIN 1UF C426 VCCTREF C425 1UF 1 A HD#[0 63] B22 D22 E21 A22 D21 C21 A21 C20 B21 E20 A20 E19 B20 E18 D20 D19 D18 C19 B19 A18 A19 B18 C17 E17 D17 B17 C16 A17 C15 B16 D16 A16 B15 A15 D14 D15 B13 C14 E14 D13 A13 D12 B12 B14 C13 E13 D11 A12 B11 A11 B7 C12 C8 B10 A10 A9 A7 E11 D9 C11 C10 B8 A8 B9 HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63# 443ZX-100M AGPREF C435 01UF PROPRIETARY NOTE 2 1 2 HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63 +3V R69 3.48K_1% R84 2.32K_1% B 11 A HOST BUS INTERFACE (Processor System Bus) 2 2 of 40 Rev 0C A B R310 GDEVSEL#1 R314 GSTOP# R97 2 2 AD_STBA R105 AD_STBB R309 GFRAME# R91 R57 GREQ# GGNT# R61 SBSTB RBF# R86 PIPE# R83 R78 2 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 8.2K 14 14 14 14 GC/BE#0 GC/BE#1 GC/BE#2 GC/BE#3 14 GFRAME# 14 GIRDY# 14 GTRDY# 14 GDEVSEL# AB2 Y4 V4 U2 G_CBE0# G_CBE1# G_CBE2# G_CBE3# GFRAME# W3 GIRDY# V5 R93 14 W4 G_TRDY# W5 G_DEVSEL# Y2 G_PAR Y1 K1 M2 M1 N2 P2 P4 P3 R1 GREQ# GGNT# L5 L3 G_REQ# G_GNT# RBF# M4 RBF# PIPE# M3 PIPE# SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 100K 14 SBA[0 7] 14 14 GREQ# GGNT# 14 RBF# 14 PIPE# 14 14 14 AD_STBA AD_STBB SBSTB 14 14 14 SBA[0 7] AD_STBA R99 AD_STBB SBSTB R311 2 AC2 T5 N3 ST0 ST1 ST2 ST0 ST1 ST2 G_IRDY# GDEVSEL# GSTOP# GSTOP# G_FRAME# GTRDY# GPAR 14 +3V 8.2K G_AD0 G_AD1 G_AD2 G_AD3 G_AD4 G_AD5 G_AD6 G_AD7 G_AD8 G_AD9 G_AD10 G_AD11 G_AD12 G_AD13 G_AD14 G_AD15 G_AD16 G_AD17 G_AD18 G_AD19 G_AD20 G_AD21 G_AD22 G_AD23 G_AD24 G_AD25 G_AD26 G_AD27 G_AD28 G_AD29 G_AD30 G_AD31 L4 L2 L1 R92 18 R87 CBE0# CBE1# CBE2# CBE3# J4 G3 E4 C4 FRAME# E2 FRAME# IRDY# E1 IRDY# F5 F3 DEVSEL# PAR G5 G_STOP STOP# F4 STOP# SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 SERR# F1 SERR# PLOCK# PHOLD# PHLDA# ST0 ST1 ST2 N5 P5 GCLKIN GCLKO 9,18,26,28,29 9,18,26,28,29 9,18,26,28,29 9,18,26,28,29 FRAME# 9,13,18,26,28,29 IRDY# 9,13,18,26,28,29 TRDY# 9,13,18,26,28,29 PAR 9,13,18,26,28,29 F2 PLOCK# 13 B6 D6 PHLD# PHLDA# 9,13 9,13 REQ#0 REQ#1 REQ#2 REQ#3 REQ#4 10,29 10,29 10,26 10,18 10,28 GNT#0 GNT#1 GNT#2 GNT#3 GNT#4 29 29 26 18 28 A6 C7 F10 D8 D10 PGNT0# PGNT1# PGNT2# PGNT3# PGNT4# E7 D7 E10 E8 E9 PCIRST A3 REQ#2 GNT#2 REQ#3 GNT#3 +3VS +3VS REQ#4 R303 10K GNT#4 R302 10K 9,13,18,26,28,29 9,13,18,26,29 WSC# 10P8R-10K DEVSEL# 9,13,18,26,28,29 SERR# PREQ0# PREQ1# PREQ2# PREQ3# PREQ4# PCLKIN C/BE#0 C/BE#1 C/BE#2 C/BE#3 STOP# AE3 10 +3VS TRDY# CLKRUN# AGPCLKI AGPCLKO RP63 REQ#0 GNT#0 REQ#1 GNT#1 DEVSEL# AD_STBA AD_STBB SB_STB 9,18,26,28,29 PCI REQ ASSIGMENT REQ#0 REQ#1 REQ#2 REQ#3 REQ#4 GNT#0 GNT#1 GNT#2 GNT#3 GNT#4 REQ#0 LAN REQ#1 MODEM 1394 REQ#2 REQ#3 PCMCIA CONTROLLER REQ#4 PCI AUDIO PCIRST# 9,18,19,26,28,29 CLKRUN# AC4 B2 CLKRUN# 9,13,18,26,28,29,30 PCLK_BX 12 GCLKO K6 K2 K4 K3 K5 J1 J2 H2 H1 J5 H3 H5 H4 G1 G2 G4 D1 D3 D2 C1 A2 C3 B3 D4 E5 A4 D5 B4 B5 A5 E6 C6 TRDY# 18 14 AD[0 31] AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 E R315 GIRDY# AB5 AE2 AD3 AD2 AD1 AC3 AC1 AB4 AB1 AA5 AA3 AA4 AA2 AA1 Y5 Y3 W1 V2 W2 U5 V1 U4 U3 U1 T3 T4 T2 T1 U6 R3 R4 R2 D AD[0 31] U8C GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31 PCI INTERFACE GTRDY# GAD[0 31] GAD[0 31] AGP INTERFACE 14 C R305 R306 443ZX-100M 47 11 11 47 C417 C428 15PF 2 15PF 1 Compal Electronics, Inc Title PROPRIETARY NOTE A B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND Size TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: C D SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet E of 40 A B C D MD[0 63] U8B CSA0#/RASA0# CSA#1/RASA1# CSA2#/RASA2# CSA3#/RASA3# NC30 NC31 NC32 NC33 NC34 NC35 NC36 NC37 AE25 AD24 AD26 AC24 AC26 AB23 RCAS#0 RCAS#1 RCAS#2 RCAS#3 RCAS#4 RCAS#5 RCAS#6 RCAS#7 AD13 AC13 AC25 AB26 AE14 AC14 AA22 AA24 DQMA0/CASA0# DQMA1/CASA1# DQMA2/CASA2# DQMA3/CASA3# DQMA4/CASA4# DQMA5/CASA5# DQMA6/CASA6# DQMA7/CASA7# AE13 AD14 NC3 NC4 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 AF4 AE4 AF5 AD6 AE6 AB7 AC7 AF7 AB8 AB9 AC9 AE9 AB10 AC10 AF10 AD11 Y24 Y25 W23 W24 W26 W25 V26 U24 U23 T22 T23 T26 R24 R25 P23 N25 AC5 AE5 AB6 AC6 AF6 AD7 AE7 AC8 AD8 AF8 AE8 AF9 AD10 AE10 AB11 AC11 Y23 Y26 W22 V22 V23 V25 U22 U25 U26 T24 T25 U21 R23 R26 P24 P25 DCLKO DCLKRD DCLKWR AB21 AB22 AD25 RRAS#0 8 7,8 7,8 7,8 7,8 7,8 7,8 7,8 7,8 7,8 RMWEA# AE12 AC12 WEA# NC5 7,8 SRASA# AF16 AA17 SRASA# SRASB# 7,8 SCASA# AF12 AB13 SCASA# SCASB# AE11 AA10 AA23 AA26 AF11 AD12 AA25 Y22 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 AC22 AF23 AE24 AD23 AC23 AF24 CKE0 CKE1 CKE2 CKE3 NC14 NC15 CKE0 8 CKE2 CKE3 AF17 AB16 AE17 AC17 AF18 AE19 AF19 AC18 AC19 AE20 AD20 AF21 AC21 AF25 MMA0 MMA1 MMA2 MMA3 MMA4 MMA5 MMA6 MMA7 MMA8 MMA9 MMA10 MMA11 MMA12 MMA13 7,8 MMA[0 13] AD16 AC16 AD17 AB17 AE18 AD19 AB18 AB19 AF20 AC20 AB20 AE21 AD21 AF22 NC16 NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24 NC25 NC26 NC27 NC28 NC29 MAB0# MAB1# MAB2# MAB3# MAB4# MAB5# MAB6# MAB7# MAB8# MAB9# MAB10# MAB11# MAB12# MAB13# MDD3 MDD35 MDD34 MDD2 MDD33 MDD32 MDD0 MDD1 RP32 MDD46 MDD47 MDD15 MDD12 MDD13 MDD44 MDD45 MDD14 RP35 MDD24 MDD54 MDD59 MDD22 MDD53 MDD52 MDD51 MDD20 RP27 MDD27 MDD58 MDD57 MDD26 MDD25 MDD56 MDD55 MDD23 RP22 MDD8 MDD7 MDD38 MDD37 MDD6 MDD5 MDD36 MDD4 RP33 MDD9 MDD10 MDD11 MDD43 MDD39 MDD40 MDD42 MDD41 RP34 MDD21 MDD19 MDD18 MDD50 MDD49 MDD17 MDD16 MDD48 RP31 MDD31 MDD63 MDD62 MDD30 MDD61 MDD29 MDD28 MDD60 RP20 MDD0 MDD1 MDD2 MDD3 MDD4 MDD5 MDD6 MDD7 MDD8 MDD9 MDD10 MDD11 MDD12 MDD13 MDD14 MDD15 MDD16 MDD17 MDD18 MDD19 MDD20 MDD21 MDD22 MDD23 MDD24 MDD25 MDD26 MDD27 MDD28 MDD29 MDD30 MDD31 MDD32 MDD33 MDD34 MDD35 MDD36 MDD37 MDD38 MDD39 MDD40 MDD41 MDD42 MDD43 MDD44 MDD45 MDD46 MDD47 MDD48 MDD49 MDD50 MDD51 MDD52 MDD53 MDD54 MDD55 MDD56 MDD57 MDD58 MDD59 MDD60 MDD61 MDD62 MDD63 DCLKO1 R138 33 MMA[0 13] MD3 16 MD35 15 MD34 14 MD2 13 MD33 12 MD32 11 MD0 10 MD1 16P8R-10 MD46 16 MD47 15 MD15 14 MD12 13 MD13 12 MD44 11 MD45 10 MD14 16P8R-10 MD24 16 MD54 15 MD59 14 MD22 13 MD53 12 MD52 11 MD51 10 MD20 16P8R-10 MD27 16 MD58 15 MD57 14 MD26 13 MD25 12 MD56 11 MD55 10 MD23 16P8R-10 MD8 16 MD7 15 MD38 14 MD37 13 MD6 12 MD5 11 MD36 10 MD4 16P8R-10 MD9 16 MD10 15 MD11 14 MD43 13 MD39 12 MD40 11 MD42 10 MD41 16P8R-10 MD21 16 MD19 15 MD18 14 MD50 13 MD49 12 MD17 11 MD16 10 MD48 16P8R-10 MD31 16 MD63 15 MD62 14 MD30 13 MD61 12 MD29 11 MD28 10 MD60 16P8R-10 8 8 8 8 DCLKO MD[0 63] 7,8 +3V Pin Name MMA12 MMA10 R146 R137 1 10K 10K MMA6 R317 10K Function Low High Interal Resistor Status Register MAB12# Host Frequency Select 66MHz 100MHz Pull-down NBXCFG[13] MAB10# Quick Start Select Stop Clock Mode Quick Start Mode Pull-down PMCR[3] MAB6# Host Bus Buffer Mode Select Desktop GTL+ Mobile Low Power GTL+ Pull-down none 12 DCLKWR 12 DRAM INTERFACE RRAS#2 RRAS#3 AB14 AF15 AE15 AC15 AD15 AE16 E R131 443ZX-100M 11 @47 C204 @15PF 1 Compal Electronics, Inc Title PROPRIETARY NOTE A B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND Size TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: C D SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet E of 40 A B C D E +3V +3V DQML DQMH WE# CAS# RAS# CS# 37 38 36 40 VSS VSS VSS VSSQ VSSQ VSSQ VSSQ CKE CLK RVD RVD CKE0 CLK_SDRAM0 4MX16S CKE0 CLK_SDRAM0 12 MMA0 MMA1 MMA2 MMA3 MMA4 MMA5 MMA6 MMA7 MMA8 MMA9 MMA10 MMA13 MMA12 MMA11 23 24 25 26 29 30 31 32 33 34 22 35 21 20 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BA1 A13/BA0 RCAS#4 RCAS#5 RMWEA# SCASA# SRASA# RRAS#0 15 39 16 17 18 19 DQML DQMH WE# CAS# RAS# CS# R213 @10 +3V 32/64MB SDRAM U47 14 27 43 49 15 39 16 17 18 19 10 11 13 42 44 45 47 48 50 51 53 VCC VCC VCC VCCQ VCCQ VCCQ VCCQ RCAS#0 RCAS#1 RMWEA# SCASA# SRASA# RRAS#0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 BANK0 VSS VSS VSS VSSQ VSSQ VSSQ VSSQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BA1 A13/BA0 VCC VCC VCC VCCQ VCCQ VCCQ VCCQ 23 24 25 26 29 30 31 32 33 34 22 35 21 20 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 28 41 54 12 46 52 14 27 43 49 U48 28 41 54 12 46 52 MMA0 MMA1 MMA2 MMA3 MMA4 MMA5 MMA6 MMA7 MMA8 MMA9 MMA10 MMA13 MMA12 MMA11 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 10 11 13 42 44 45 47 48 50 51 53 CKE CLK RVD RVD 37 38 36 40 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 CKE0 CLK_SDRAM0 4MX16S +3V MMA[0 13] 6,8 MD[0 63] 6,8 MD[0 63] RCAS#[0 7] RCAS#[0 7] RMWEA# SCASA# SRASA# RRAS#0 DQML DQMH WE# CAS# RAS# CS# DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 10 11 13 42 44 45 47 48 50 51 53 CKE CLK RVD RVD 37 38 36 40 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 CKE0 CLK_SDRAM0 MMA0 MMA1 MMA2 MMA3 MMA4 MMA5 MMA6 MMA7 MMA8 MMA9 MMA10 MMA13 MMA12 MMA11 23 24 25 26 29 30 31 32 33 34 22 35 21 20 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BA1 A13/BA0 RCAS#6 RCAS#7 RMWEA# SCASA# SRASA# RRAS#0 15 39 16 17 18 19 DQML DQMH WE# CAS# RAS# CS# DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 10 11 13 42 44 45 47 48 50 51 53 CKE CLK RVD RVD 37 38 36 40 28 41 54 12 46 52 4MX16S U45 14 27 43 49 15 39 16 17 18 19 VCC VCC VCC VCCQ VCCQ VCCQ VCCQ RCAS#2 RCAS#3 RMWEA# SCASA# SRASA# RRAS#0 28 41 54 12 46 52 6,8 6,8 6,8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BA1 A13/BA0 VCC VCC VCC VCCQ VCCQ VCCQ VCCQ MMA[0 13] 23 24 25 26 29 30 31 32 33 34 22 35 21 20 VSS VSS VSS VSSQ VSSQ VSSQ VSSQ 6,8 MMA0 MMA1 MMA2 MMA3 MMA4 MMA5 MMA6 MMA7 MMA8 MMA9 MMA10 MMA13 MMA12 MMA11 VSS VSS VSS VSSQ VSSQ VSSQ VSSQ U46 14 27 43 49 C289 @15PF MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 CKE0 CLK_SDRAM0 4MX16S 3 +3V +3V +3V C217 1UF C253 1UF C254 1UF C293 1UF C294 1UF C305 1UF C331 1UF C332 1UF C216 1UF +3V C381 1000PF C510 1000PF C511 1000PF +3V C351 1000PF C263 1000PF C264 1000PF C296 1000PF C350 1000PF Compal Electronics, Inc Title PROPRIETARY NOTE A B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND Size TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: C D SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet E of 40 A B SO-DIM 144 PINS RAM MODULE CONN 6,7 MMA[0 13] 6,7 MD[0 63] 6,7 RCAS#[0 7] 6,7 RRAS#[0 3] C D E BANK2/3 MMA[0 13] MD[0 63] RCAS#[0 7] +3V +3V RRAS#[0 3] JP19 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 RCAS#0 RCAS#4 MMA0 MMA1 MMA2 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 C483 R348 22PF 33 12 CLK_SDRAM2 6,7 6,7 SRASA# RMWEA# RMWEA# RRAS#2 RRAS#3 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MMA6 MMA8 MMA9 MMA10 RCAS#2 RCAS#6 +3V R148 10K 11,12 SDAP4 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 SDAP4 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 VSS CE0# CE1# VCC A0 A1 A2 VSS DQ8 DQ9 DQ10 DQ11 VCC DQ12 DQ13 DQ14 DQ15 VSS RESVD/DQ64 RESVD/DQ65 VSS DQ32 DQ33 DQ34 DQ35 VCC DQ36 DQ37 DQ38 DQ39 VSS CE4# CE5# VCC A3 A4 A5 VSS DQ40 DQ41 DQ42 DQ43 VCC DQ44 DQ45 DQ46 DQ47 VSS RESVD/DQ68 RESVD/DQ69 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 RFU/CLK0 VCC RFU WE# RE0# RE1# OE#/RESVD VSS RESVD/DQ66 RESVD/DQ67 VCC DQ16 DQ17 DQ18 DQ19 VSS DQ20 DQ21 DQ22 DQ23 VCC A6 A8 VSS A9 A10 VCC CE2#/RESVD CE3#/RESVD VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS SDA VCC RFU/CKE0 VCC RFU RFU/CKE1 RFU RFU RFU/CLK1 VSS RESVD/DQ70 RESVD/DQ71 VCC DQ48 DQ49 DQ50 DQ51 VSS DQ52 DQ53 DQ54 DQ55 VCC A7 A11/BA0 VSS A12/BA1 A13/A11 VCC CE6#/RESVD CE7#/RESVD VSS DQ56 DQ57 DQ58 DQ59 VCC DQ60 DQ61 DQ62 DQ63 VSS SCL VCC 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 RCAS#1 RCAS#5 MMA3 MMA4 MMA5 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 CKE2 CKE3 MMA12 MMA13 CKE2 SCASA# CKE3 6,7 +3V + CLK_SDRAM3 12 C212 10UF_1206 6.3V C454 1UF C460 1UF C465 1UF C470 1UF C479 01UF C361 01UF C497 01UF R341 33 MD24 MD25 MD26 MD27 +3V MD28 MD29 MD30 MD31 C472 22PF + MMA7 MMA11 C509 10UF_1206 6.3V C495 01UF C505 1000PF C508 1000PF C208 1000PF C219 1000PF MMA12 MMA13 RCAS#3 RCAS#7 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 +3V R130 10K SCKP4 SCKP4 11,12 SO-DIMM144 4 DIMM1 Compal Electronics, Inc Title PROPRIETARY NOTE A B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND Size TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: C D SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet E of 40 SA[0 19] SD[0 15] SA[0 19] 13,23,30 SD[0 15] 13,23,30 U12A AD[0 31] 5,18,26,28,29 AD[0 31] AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 A B 12 C8 C6 D4 D2 5,13,18,26,28,29 FRAME# 5,13,18,26,28,29 IRDY# 5,13,18,26,28,29 TRDY# 5,13,18,26,28,29 STOP# 5,13,18,26,28,29 DEVSEL# 5,13,18,26,29 SERR# 5,13,18,26,28,29 PAR 5,13 PHLD# R76 5,13 PHLDA# 100 5,13,18,26,28,29,30 CLKRUN# 5,18,19,26,28,29 PCIRST# A5 B5 C5 D5 E5 A6 B6 A3 B12 A12 C10 A1 FRAME# IRDY# TRDY# STOP# DEVSEL# SERR# PAR IDSEL PHOLD# PHLDA# CLKRUN# PCIRST# D11 PCICLK PCLK_PIIX4 OSC P17 SUSCLK SYSCLK RTCX1# RTCX2 R20 RTCX2# CPUINIT# M19 L18 CPURST INIT 23 RC# N20 RCIN# 2 2 13 INTR NMI SMI# STPCLK# PX4_SLP# L19 L20 P20 J18 K20 INTR NMI SMI# STPCLK# SLP# 2 IGNNE# FERR# L17 K19 IGNNE# FERR# A20M# M20 A20M# R17 R18 CONFIG1 CONFIG2 C189 22P 10P T7 N19 +3V RTCX1 32.768KHZ @1M ISA +3V R142 34 SPKR 10K M18 PWROK V18 TEST# K17 SPKR SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 U11 T11 W11 Y11 T10 W10 U9 V9 Y9 T8 W8 U7 V7 Y7 V6 Y6 T5 W5 U4 V4 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15 V3 W3 U2 T2 W2 Y2 T1 V1 W16 T16 Y17 V17 Y18 W18 Y19 W19 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15 IOR# IOW# MEMR# MEMW# SMEMR# SMEMW# IOCS16# MEMCS16# IOCHRDY IOCHK#/GPI_0 BALE SBHE# AEN REFRESH# ZEROWS# RSTDRV CLOCK X-BUS CPU IRQs MISC BIOSCS# KBCCS#/GPO_26 MCCS# PCS0# PCS1# RTCALE/GPO_25 RTCCS#/GPO_24 XOE#/GPO_23 XDIR#/GPO_22 A20GATE IRQ0/GPO_14 IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8#/GPI_6 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 A B Y5 T4 V15 U15 W4 U3 V12 Y12 R121 T3 FQS0 Y1 R73 U10 W12 Y4 W7 Y3 W1 IOR# IOW# MEMR# MEMW# 1K 10K 13,23,30 13,23,30 13,23 13,23 IOCS16# 13 +3VS IOCHRDY 13,23,30 +3VS SBHE# 13 AEN 23,30 REFRESH# 13 ZWS# 13 RSTDRV 22,30 M2 K1 N4 L4 N5 L1 K2 M4 M3 P1 BIOSCS# 23 C GATEA20 23 IRQ0 H20 IRQ1 J20 IRQ3 T9 IRQ4 W9 IRQ5 U8 IRQ6 V8 IRQ7 Y8 Y20 IRQ8# IRQ9 U1 IRQ10 U12 IRQ11 W13 IRQ12 T13 IRQ14 V14 IRQ15 Y14 IRQ8# 13 IRQ[0 15] SERIRQ/GPI_7 J19 SIRQ 13,18,30 PIRQA# PIRQB# PIRQC# PIRQD# R3 R4 P5 G1 PIRQA# PIRQB# PIRQC# PIRQD# 13,14,18 13,18,26,29 13,28 13,29 IRQ[0 15] 13,20,21,23 D PIIX4M Compal Electronics, Inc C247 22PF Title C246 22PF 2 100K 100K 1 R179 R171 R147 23,35 SPWROFF# X3 RTCX2 D PCI CLK48 RTCX1 C135 22P 324 mBGA 2 C188 RTCCLK R116 33 R75 22 R115 33 L3 V11 48M 14MOSC 12 18,19 of C/BE0# C/BE1# C/BE2# C/BE3# 12 C PROPRIETARY NOTE PIIX4 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE#0 C/BE#1 C/BE#2 C/BE#3 5,18,26,28,29 5,18,26,28,29 5,18,26,28,29 5,18,26,28,29 AD18 B10 A10 D9 C9 B9 A9 D8 E8 B8 A8 D7 C7 B7 A7 D6 E6 E4 C4 B4 A4 D3 E3 C3 B3 E2 C2 B2 A2 D1 E1 C1 B1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND Size TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet of 40 RP12 USBP1+ USBP1USBP0+ USBP0- USB1_D+ USB1_DUSB0_D+ USB0_D- USB1_D+ USB1_DUSB0_D+ USB0_D- 32 32 32 32 8 A A CP8 8P4R-33 8P4C-33PF RP13 8P4R-15K USB Host Termination should be close to PIIX4 13,30 30 DACK#[0 3] B +3VS 13 13 13 R165 W15 U6 V2 U5 Y16 U16 U17 DREQ0# DREQ1# DREQ2# DREQ3# DREQ5# DREQ6# DREQ7# DACK#0 DACK#1 DACK#2 DACK#3 U14 W6 Y10 V5 T15 V16 W17 V10 DACK0# DACK1# DACK2# DACK3# DACK5# DACK6# DACK7# TC REQA# REQB# REQC# 4.7K 23,34,36 ACIN D12 ACIN_SYS# Q22 24 LLBATT# ACIN_SYS# RB751V 23 EXTSMI# +3V 12 CPU_STP# 12 PCI_STP# 23 ATF_INT# 13,24 LID# 24 PX4_RI# 4,35 RSMRST# 13 PBTN# 12,23 SUSA# 23 SUSB# 23 SUSC# 4,14 SUS_STAT# C PX4_RI# R154 10K +3V D11 23,34 ON/OFF M1 N2 P3 REQA#/GPI_2 REQB#/GPI_3 REQC#/GPI_4 N1 P2 P4 GNTA#/GPO_9 GNTB#/GPO_10 GNTC#/GPO_11 J17 H18 K18 APICACK#/GPO_12 APICCS#/GPO_13 APICREQ#/GPI_5 V20 U19 R1 R2 H19 P16 P18 M17 U20 W20 V19 U18 T17 T18 K16 EXTSMI# BATLOW#/GPI_9 CPU_STP#/GPO_17 PCI_STP#/GPO_18 THRM#/GPI_8 LID/GPI_10 RIA_B/GPI_12 RSMRST# PWRBTN# SUSA# SUSB#/GPO_15 SUSC#/GPO_16 SUS_ST1#/GPO_20 SUS_ST2#/GPO_21 ZZ/GPO_19 E10 A11 B11 C11 PCIREQA# PCIREQB# PCIREQC# PCIREQD# 2N7002 R161 10K 14 5,26 RB751V +3VS REQ#1 5,18 REQ#3 PBTN# 32 32 GGREQ# REQ#2 OVCUR#0 OVCUR#1 R108 D5 RB717F 5,29 PX4_RI# PX4_REQ#1 PX4_REQ#2 PBTN# 10K SDD[0 15] U12B DRQ0 DRQ1 DRQ2 DRQ3 DRQ5 DRQ6 DRQ7 TC REQA# REQB# REQC# PDD[0 15] DRQ[0 7] DRQ[0 7] DACK#[0 3] 30 USB TRACE ROUTING M IL OVCUR#0 OVCUR#1 USBP1+ USBP1USBP0+ USBP0- J1 J2 F1 H2 G2 H3 OC0# OC1# USBP1+ USBP1USBP0+ USBP0- PIIX4 of 324 mBGA DMA APIC IDE Bus Power Mgmt USB PX4_REQ#1 PDD[0 15] 20 SDD[0 15] 20 PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 F20 E18 E20 D18 D20 C20 B20 A20 A19 B19 C19 D19 D17 E19 E17 F19 PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 SDDO SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15 E15 B15 D14 C14 A14 C13 A13 C12 D12 B13 D13 B14 E14 A15 C15 D15 SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15 PDIOR# PDIOW# PIORDY PDDREQ PDDACK# PDCS1# PDCS3# PDA0 PDA1 PDA2 F17 F16 G20 F18 G19 H17 H16 G16 G18 G17 PDIOR# PDIOW# PDIORDY PDDREQ PDDACK# PDCS1# PDCS3# PDA0 PDA1 PDA2 20 20 20 20 20 20 20 20 20 20 SDIOR# SDIOW# SIORDY SDDREQ SDDACK# SDCS1# SDCS3# SDA0 SDA1 SDA2 C16 B16 D16 A16 A17 B18 C18 C17 B17 A18 SDIOR# SDIOW# SDIORDY SDDREQ SDDACK# SDCS1# SDCS3# SDA0 SDA1 SDA2 20 20 21 21 20 20 20 20 20 20 NC1 NC2 NC3 J4 N18 N3 B C PIIX4M +3VS D D R122 D8 RB717F 5,29 REQ#0 5,28 REQ#4 10K Compal Electronics, Inc PX4_REQ#2 Title PROPRIETARY NOTE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND Size TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet 10 of 40 PHY 888G1 Only +3VDDA +3V L33 +3V @F-0_0805 @F-1M R328 @F-6.34K_1% D 1 X1 X2 @F-18PF Y2 @F-24.576 MHz C459 56 PLLVDD R0 R1 59 60 XI XO 54 @F-0.1UF_10% 55 @F-18PF PWRDN DVDD DVDD DVDD DVDD +3V C457 R330 @F-1K PLL_GND B FILTER1 14 53 PD RESET# 20 21 22 PC0 PC1 PC2 27 TESTM 28 29 SE SM @F-0.1UF FILTER0 16 43 44 45 46 47 NC NC NC NC NC NC 57 58 PLLGND PLLGND 17 18 63 64 DGND DGND DGND DGND C490 C492 @F-0.1UF @F-1000PF 2 C488 +3VDDA U16 25 26 61 62 40 41 2 +3V +3VPLL +3V R327 C249 C455 +3V +3V @F-0.01UF @F-CHB2012U121_0805 C228 C484 C456 PLL_GND 2 C227 1 1 C224 2 +3VPLL C209 L34 C C461 @F-0.1UF @F-0.1UF @F-0.1UF @F-0.1UF @F-0_0805 @F-0.1UF C259 @F-0.01UF @F-0.01UF @F-0.01UF @F-0.01UF @F-0.01UF @F-4.7UF_0805 L35 C243 C250 C458 +3VDDA 1 +3V D AVDD AVDD AVDD AVDD AVDD 51 52 30 31 42 CPS ISO# 24 23 LPS CNA 15 LREQ @F-1K R331 PHY_LPS 26 C SYSCLK CTL0 CTL1 D0 D1 D2 D3 D4 D5 D6 D7 10 11 12 13 C/LKON 19 TPBIAS 38 TPA+ TPA- 37 36 TPB+ TPB- 35 34 AGND AGND AGND AGND AGND AGND 32 33 39 48 49 50 PHY_LREQ 26 PHY_SYSCLK PHY_SYSCLK 26 PHY-CTL0 26 PHY-CTL1 26 PHY-DATA0 26 PHY-DATA1 26 PHY-DATA2 26 PHY-DATA3 26 PHY-DATA4 26 PHY-DATA5 26 PHY-DATA6 26 PHY-DATA7 26 R333 PHY_SYSCLK @F-4.7K R199 2 @F-33 C268 @F-33pF R200 CMC_LKON 26 TPBIAS0 @F-1K R332 R143 @F-56 C202 @F-10K R149 @F-56 TPA0+ TPA0- @F-1UF TPB0+ TPB0- R150 @F-56 B R144 @F-56 @F-TSB41LV01 C198 @F-270PF R139 @F-5.1K JP17 TPB0TPB0+ TPA0TPA0+ 4 @F-FOXCONN-UV31413 R337 R336 @F-0_1206 @F-0_1206 A A Compal Electronics,Inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet 27 of 40 AD[0 31] 5,9,18,26,29 AD[0 31] C528 R373 U30 Place closely to CS4280 PCLK_AUD R236 12 33 C322 A 22PF 5,9,18,26,29 5,9,18,26,29 5,9,18,26,29 5,9,18,26,29 C/BE#0 C/BE#1 C/BE#2 C/BE#3 9,13 PIRQC# 5,9,18,19,26,29 PCIRST# 12 PCLK_AUD GNT#4 5,10 REQ#4 5,9,13,18,26,29,30 CLKRUN# 5,9,18,26,29 AD19 5,9,13,18,26,29 FRAME# 5,9,13,18,26,29 IRDY# 5,9,13,18,26,29 TRDY# 5,9,13,18,26,29 DEVSEL# 5,9,13,18,26,29 STOP# 13,18,26,29 PERR# 5,9,13,18,26,29 PAR 24,29 AUD_PME# 24 EC_VOLUP# 24 EC_VOLDW# R217 1 R239 +3VS PCLK_AUD 100K 2 R255 100 22PF +3VS 35 24 11 95 C/BE[0]# C/BE[1]# C/BE[2]# C/BE[3]# 78 79 80 81 82 90 96 12 13 14 17 20 21 23 64 INTA# RST# PCICLK GNT# REQ# CLKRUN# IDSEL FRAME# IRDY# TDRY# DEVSEL# STOP# PERR# PAR PME# 48 61 67 68 TEST TESTSEL VOLUP VOLDN VAUX 65 VDD5REF 70 CVDD[1] CVDD[2] 58 PCIVDD[0] PCIVDD[2] PCIVDD[3] PCIVDD[4] PCIVDD[5] PCIVDD[6] PCIVDD[7] 83 97 18 28 36 47 PCIGND[0] PCIGND[2] PCIGND[3] PCIGND[4] PCIGND[5] PCIGND[6] PCIGND[7] 84 98 19 27 37 46 CGND[3] CGND[2] CGND[1] 62 59 10 1 01UF C374 C335 + 10UF_6.3V_1206 01UF 01UF C373 1 1UF C353 1UF C356 69 1UF CRYGND 1UF C328 66 R226 +3VS C306 CRYVDD 100K R232 4.7K C309 22 16 15 R248 R216 1 IRQA IRQB IRQC R224 47 49 50 51 52 53 54 55 56 57 60 IAC_BITCLK 34 IAC_SDATAO 34 IAC_SDATAI 34 IAC_SYNC 34 IAC_RST# 34 47 JACX JACY JBCX JBCY JAB1 JAB2 JBB1 JBB2 MIDIIN MIDIOUT R225 71 72 73 74 75 63 91 76 77 100K Place component's to CS-4281 +3VS 100K R2181 100K +3VS L19 CHB1608U800 CRYVDD +3VS C307 ABITCLK ASDOUT ASDIN ASYNC ARST# ASDIN2/GPIO1 GPIO3 EECLK/GPOUT/PCREQ# EEDAT/GPIO2/PCGNT# 1000PF +3VS C308 1UF AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 45 44 43 42 41 40 39 38 34 33 32 31 30 29 26 25 100 99 94 93 92 89 88 87 86 85 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 33 A CS4281-CQ Compal Electronics, Inc Title PROPRIETARY NOTE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND Size TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet 28 of 40 Q33 @SI2301DS +3VALW +3.3VAUX D S R362 2 G JP12 +3V C375 @1UF_25V_0805 2 C383 @1UF_25V_0805 EN_WOL# D43 18 MINI_RI# PCM_RI# RJ11/RJ45 R273 23 PCM_RI# +5VALW RING# 23 RB717F @100K JP18 R211 AD21 AD19 AD17 5,9,18,26,28 C/BE#2 5,9,13,18,26,28 IRDY# 5,9,13,18,26,28,30 CLKRUN# 5,9,13,18,26 SERR# 13,18,26,28 PERR# 5,9,18,26,28 C/BE#1 AD14 AD12 AD10 AD8 AD7 PCLK_MINI AD5 AD3 W=30mils AD1 +5VS_MINIPCI 12 R187 10 C270 33PF MOD_AUDIO_MON +5VS L22 MINI_RI# W=30mils 0603 GNT#1 L18 GNT#1 +3V CHB1608U121 0603 MDMPME# 24,28 AD30 AD28 AD26 R212 AD24 MINI_IDSEL AD22 AD20 AD27 100 AD18 AD16 PAR 5,9,13,18,26,28 FRAME# TRDY# STOP# 5,9,13,18,26,28 5,9,13,18,26,28 5,9,13,18,26,28 IDSEL : AD27 +5VS_MINIPCI DEVSEL# 5,9,13,18,26,28 AD15 AD13 AD11 C342 @1000PF C245 @.1UF C368 @.1UF C389 @10U_1210 AD9 C/BE#0 5,9,18,26,28 AD6 AD4 AD2 AD0 +3VS_MINIPCI C336 C297 C275 C260 1UF 1UF 1UF 1UF MOD_AUDIO_MON C241 C265 1UF 1UF C323 AD28 5,9,18,26,28 C/BE#3 AD27 AD25 100 AD23 +3VS_MINIPCI W=40mils 1UF C295 1UF C286 10U_1210 AD31 AD29 9,13 REQ#1 +5VS_MINIPCI PIRQD# GNT#0 +3.3VAUX 5,10 PCLK_MINI W=40mils MINI_RST# 14,18,19,26 12 W=30mils PIRQD# 5,9,18,19,26,28 CBRST# CHB1608U121 0603 REQ#0 PCIRST# 5,10 PCIRST# 2 @0 R365 R366 MINI_RST# LAN RESERVED PIRQB# 9,13,18,26 PIRQB# W=40mils RING 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 2 L14 KEY 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 +3VS_MINIPCI +3V 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 KEY 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 LAN RESERVED L21 MD_SPK 34 0_0805 W=20mils TIP +3.3VAUX C256 Mini-PCI SLOT 1UF +5VS_MINIPCI Compal Electronics, Inc Title AD[0 31] AD[0 31] 5,9,18,26,28 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet 29 of 40 A B C D E SUPER I/O SMsC FDC37N869 1 LPD[0 7] U4 SD[0 7] SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 46 47 48 49 51 52 53 54 D0 D1 D2 D3 D4 D5 D6 D7 SA[0 19] SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 26 27 28 29 30 31 32 39 40 41 95 35 36 25 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 9,22 RSTDRV 9,23 AEN 9,13,23 IOR# 9,13,23 IOW# 9,13,23 IOCHRDY 10 TC 55 44 42 43 98 33 RESET AEN IOR# IOW# IOCHRDY TC 9,13,18 SIRQ 5,9,13,18,26,28,29 CLKRUN# 12 PCLK_SIO 37 92 38 SIRQ CLKRUN# CLK33 19 50 97 17 DRQ_A FDRQ(DRQ_B) PDRQ(DRQ_C) DRQ_D 9,13,23 SD[0 7] 9,13,23 SA[0 19] 10 DACK#[0 3] DACK#[0 3] DRQ[0 3] 10,13 DRQ[0 3] C114 22PF R64 DRQ0 DRQ2 DRQ3 DRQ1 33 DACK#0 DACK#2 DACK#3 DACK#1 14.3M_SIO R18 12 R37 10K +3VS 4.7UF_0805 10V DACK_A# FDACK#(DACK_B#) PDACK#(DACK_C#) DACK_D# 18 CLK14 96 IRQIN 70 13 VCC VCC 93 65 45 VSS VSS VSS VSS 69 68 67 66 64 63 62 61 BUSY PE SLCT ERROR# ACK# INIT# AUTOFD# STROBE# SLCTIN# 59 58 57 73 60 72 74 75 71 DTR2# CTS2# RTS2# DSR2# TXD2/IRTX RXD2/IRRX DCD2# RI2# 91 90 89 88 87 86 85 84 DTR1# CTS1# RTS1# DSR1# TXD1 RXD1 DCD1# RI1# 81 80 79 78 77 76 83 82 IRMODE IRRX2 IRTX2 21 23 24 RDATA# WDATA# WGATE# HDSEL# DIR# STEP# DS0# INDEX# DSKCHG# WRTPRT# TRK0# MTR0# DRVDEN0 14 10 15 12 11 100 99 DRVDEN1 16 PWRGD/GAMECS# 56 15PF LPD[0 7] 31 LPTBUSY LPTPE LPTSLCT LPTERR# LPTACK# INIT# LPTAFD# LPTSTB# SLCTIN# 31 31 31 31 31 31 31 31 31 LPD0 LPD1 LPD2 LPD3 LPD4 LPD5 LPD6 LPD7 RP61 DCD#1 RI#1 CTS#1 DSR#1 CTS#2 DSR#2 R19 DCD#2 RI#2 R20 1 +3VS RP5 CTS#2 DSR#2 DCD#2 RI#2 +3VS 2 1K +3VS 8P4R-4.7K 1K 8P4R-4.7K +5V JP1 DTR#1 CTS#1 RTS#1 DSR#1 TXD1 RXD1 DCD#1 RI#1 R293 1K IRRX IRMODE 32 32 IRTXOUT 32 RDATA# WDATA# WGATE# HDSEL# FDDIR# STEP# DRV0# INDEX# DSKCHG# WP# TRACK0# MTR0# R17 R42 1 C66 1UF 21 C58 C77 10 20 34 94 22 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 RDATA# WDATA# WGATE# HDSEL# FDDIR# STEP# DRV0# INDEX# DSKCHG# WP# TRACK0# MTR0# 3MODE# 22 22 22 22 22 22 22,24 22 22 22 22 22 22 10K 1K +5VS 888F1 Only R41 @G-1K 10 RXD1 TXD1 DSR#1 RTS#1 CTS#1 DTR#1 RI#1 DCD#1 10 @96212-1011S +3VS C81 SMsC FDC37N869 1UF 4 Compal Electronics, Inc Title PROPRIETARY NOTE A B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND Size TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: C D SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet E 30 of 40 +3V POWER U36B 74LVC125 +5V_PRN PARALLEL PORT LPTSLCT LPTPE LPTBUSY LPTACK# 10 +5V_PRN CP1 RP1 10P8R-2.7K D36 +5VS R4 2.2K RB420D +5V_PRN 30 AFD#/3M# LPTERR# LPTINIT# LPTSLCTIN# LPTSTB# AFD#/3M# R294 30 INIT# 30 SLCTIN# R295 33 +5V_PRN LPTINIT# 30 LPTAFD# 30 LPTERR# LPTSLCTIN# FD0 LPTERR# FD1 LPTINIT# FD2 LPTSLCTIN# FD3 FD4 10 FD5 FD6 RP62 10P8R-2.7K FD7 RP3 LPD3 LPD2 LPD1 LPD0 LPD7 LPD6 LPD5 LPD4 +5V_PRN 8P4R-68 FD3 FD2 FD1 FD0 RP2 FD3 FD2 FD1 FD0 FD7 FD6 FD5 FD4 30 LPTACK# 30 LPTBUSY 30 LPTPE 30 LPTSLCT LPTACK# LPTBUSY LPTPE LPTSLCT LPTACK# LPTBUSY LPTPE LPTSLCT 8P4C-220PF CP9 FD0 FD1 FD2 FD3 8P4C-220PF CP3 FD4 FD5 FD6 FD7 8P4C-220PF CP2 33 R3 R296 33 FD4 FD5 FD6 FD7 LPTSTB# C398 220PF AFD#/3M# LPTERR# LPTINIT# LPTSLCTIN# 33 14 15 16 17 18 19 20 21 22 10 23 11 24 12 25 13 8P4C-220PF JP9 LPTCN-25 8P4R-68 30 LPD[0 7] LPD[0 7] Compal Electronics, Inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet 31 of 40 USB_VCCA F2 +5VS POLYSWITCH_0.75A + C404 1UF C2 150UF_E R298 470K USB_AGND C403 R297 1000PF 560K 2 OVCUR#0 10 +3VS USB0_DUSB0_D+ USB0_DUSB0_D+ 1 10 GND AGND 1/4W W=40mils L31 CHB4516G750_1806 4516 C4 C400 LEDA 1UF @F-6.8U_A MODE0 TXD IRTXOUT MODE1 RXD IRRX FIR_SEL N.C IRTXOUT 30 IRRX 30 USB_VCCB F5 +5VS @F-HSDL-3600 POLYSWITCH_0.75A R299 + C401 1UF C407 150UF_E 888G1 Only USB_BGND 470K OVCUR#1 10 C408 R300 1000PF 560K 2 10 10 USB1_DUSB1_D+ USB1_DUSB1_D+ 1 L28 0_0805 JP14 2 L29 0_0805 1 USB_CONN1 L30 CHB4516G750_1806 4516 C402 The component's most place cloely IRDA MODULE IRMODE @F-10K @F-10K VCC 2 R380 R381 IRMODE + C1 @F-.47UF @F-6.8UF_6.3V_A 30 FIR_VCC U1 + USB_CONN1 R1 @F-2.2_1206 C3 JP13 2 +3VS L26 0_0805 L27 0_0805 10 10 FIR Module 1UF Compal Electronics, Inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet 32 of 40 888F1 Only +5VS Q50 E 47K D B U39 @G-DTA144EKA D 12 13 DRV_XY0 DRV_XY1 DRVZ SELX SELZ TP_VCC 26 27 28 29 30 C354 C386 R363 MCLK 20 PS2_CLK XCLK1 XCLK 18 17 XDAT 16 OSCIN VCC @G-1K U43 DA AD C370 C397 @G-.1UF @G-74VHC4053 OSCOUT# @G-100PF @G-4MHz 10 C385 RESET# 25 24 23 22 @G-33PF Y3 OFST VEE @G-LMV321_SOT23-5 PS2_CLK 23,34 C384 VREF 31 @G-2.7K 32 PS2_DATA 23,34 RB# SUB# LB# SB# SDB# 19 VDD GND GND 11 @G-33PF TP_VCC C393 @G-UR7HCPXZ-P444 SW_R# SW_UP# SW_L# SW_R# SW_UP# SW_L# R287 34 34 34 C 1 R268 R257 16 15 14 13 12 11 10 VCC BO AO AY AX A B C @G-96212-0611S C BX BY CY CO CX INH VEE GND 1 2 PS2_DATA SPWR0 SPWR1 SPWR2 SPWR3 SPWR4 2 @G-.1UF 21 U29 JP5 @G-100K @G-.1UF MDAT @G-1UF C512 TP_VCC E @G-3.16K_1% Z_SIG0 Z_SIG1 2 B Q49 14 15 1 R258 C @G-FMMT3904 1 C 47K @G-.1UF TP_VCC @G-100K C392 @G-1UF 34 B SW_DW# SW_DW# B Keyboard CONN PS2 CONN 23 KBD_DATA 23 KBD_CLK Q57 @SMO5 A C16 C15 220PF 220PF A 888G1 Only 220PF 1000PF L6 CHB1608U800 L5 CHB1608U800 2 C17 @F-220PF C14 C25 @F-220PF @G-220PF C26 C526 @G-220PF JP11 KBD/PS2_6 POLYSWITCH_1.1A EXT_CLK F1 +5VS C525 L39 @G-CHB1608U800 KB_VCC EXT_CLK EXT_DATA @F-220PF 23 EXT_DATA EXT_CLK @F-1000PF L4 @F-CHB1608U800 L3 @F-CHB1608U800 0603 EXT_DATA C27 C13 23 1 +5VS @F-POLYSWITCH_1.1A @SMO5 L38 @G-CHB1608U800 PS2_VCC F3 Q56 JP10 @F-KBD/PS2_6 Compal Electronics, Inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet 33 of 40 CHGRTC 1M D44 R372 100K R371 20K 2 C280 2 2 Q59 2N7002 24 MAIL_ACT_LED# D46 51ON_RST# 51RST 51RST 23 24 BUT_LOCK# R193 4.7K 24 BUTTON_LOCK# BUTTON_LOCK# D24 BTN1# INTERNET# 24 BTN2# E_MAIL# 28 28 28 28 28 +3VALW RB751V SW2 D22 R264 21 REVBTN 51ON# +3VALW 21 21 21 Q35 29 MD_SPK D19 22 22 22 CD_AGND CDROM_L CDROM_R C380 D26 1000PF RLZ20A 22K B 21 BTN4# PLAYBTN BUTTON4# 24 +3VS RB751V +5VCD E 22K DTC124EK +5VALW R267 33K BUTTON3# 24 2 1 1 1 BTN3# STOPBTN MONO_IN_R 4.7K 37 RB751V C 51ON 51ON# DM_ON DM_ON# 24 BATT_CHGI_LED# D18 DAN202U R275 23 10,23 HCH SMT1-02 ON/OFF ON/OFFBTN# ON/OFF IAC_BITCLK IAC_SDATAI IAC_SDATAO IAC_SYNC IAC_RST# 24 BATT_LOW_LED# RB751V D25 +5VS D G 2N7002 Q34 JP4 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 D C 1 HEADER 50 C522 C523 C524 10UF_1206 10UF_1206 10UF_1206 WHEN R=0,Vbe=1.35V WHEN R=33K,Vbe=0.8V S SW_DW# SW_UP# SW_R# SW_L# 24 100K C BUT_LOCK# EMAIL_ON# 23,33 PS2_CLK 23,33 PS2_DATA 33 SW_DW# 33 SW_UP# 33 SW_R# 33 SW_L# DAN202U FRDBTN PWR_LED# 51ON_RST# 21 BTN4# BTN3# 23 CDON_BTN# 23,24 VOL_UP# 23,24 VOL_DW# 23 VOL_AMP CDON# 1UF_25V_0805 BTN1# BTN2# RB751V 23 DAN202U 1UF 10K MEOFFBTN 2 1 Q26 DTA114EK 2N7002 EMAIL_ON# 10K C527 CDON_BTN# is Low , enable CD_PLAY MAIL is High , enable MAIL Q58 D20 D45 SW3 R370 RB751V D14 1N4148 D 1 +3VALW 51ON# Reset Button B B +3V BEEP# +3V R270 100K 10 24 +3V POWER C364 System Window Connector C303 1UF U37B R228 560 JP3 74LVC14 +3V POWER +5VALW 10,23,36 ACIN 24 SW_CLK/HDD_LED# 24 SW_DATA/CD_FDD_LED# 23 CAPS_LED# 23 ARROW_LED# 23 NUM_LED# 22UF U36C 74LVC125 14 R271 8.2K C314 18 PCM_SPK# R231 MONO_IN_R 23,24 +3V SPKR LID_SW# LID_SW# SW1 10 96212-1011S U37C 74LVC14 +3V POWER C319 1UF R234 A 2 560 HORNG CHIH 14 A +5VS +3VS 560 1UF 10 R223 10K D17 RB751V Compal Electronics, Inc 2 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet 34 of 40 A B E C520 1UF 1UF C521 C519 1UF C518 1UF C517 1UF D +3VS 1 +3V C516 2 +3V +3V +3V +3V C 1UF 1 +3VS +3VS +3VALW CPU_CORE CPU_CORE +3VALW RTC BATT +3V +3V +3V +RTCBATT 1 1 + C206 +3V C345 2N7002 U13B LM358 +5V +3V R243 47K LM358 + Q20 2N7002 - C205 +3VS (8.5-10A) C130 C129 01UF 1UF EC_HPOWON 9,23 MR# PFI NC U6 RST# RST PFO# 12 U36D 74LVC125 +3V POWER SPWROFF# 9,23 R250 10K 2 11 MAX708 100K 2 7SH08FU R52 J7 PAD-OPEN 4x4m 1UF 13 CPU_CORE 2 240K J6 2 R58 PAD-OPEN 4x4m +CPU_COREP C128 (4A) 1UF VR_POK +3VALW 2,39 VCC +5VS U3 GND C70 1 +3VS 2 0.33UF_0805 +5VALW(5A) PAD-OPEN 4x4m J3 +3VALWP 12 74LVC14 +3V POWER R152 200K_1% C346 1UF +5VALWP (120mA) J4 U13A R329 56K JOPEN/+12V R140 R159 100K_1% J2 +12VALW 330K 10K DC/DC INTERFACE 7SH32FU U37F R251 13 +5V +2.5V_CLK 1 +3V U32 C349 1UF 1UF 0.33UF_0805 14 RSMRST# 4,10 Q21 +3V +12VALWP RSMRST# 10 74LVC14 +3V POWER R153 100K_1% 2 CHGRTC 74LVC14 +3V POWER 11 +RTCVCC 1UF R113 56K R145 150K_1% D38 HSM1265 330K C347 1UF U37E 14 R253 +5V C191 RTCBATT U37D 14 CPU_IO J9 JOPEN +3V R252 47K + BATT1 - PAD-OPEN 4x4m J8 PAD-OPEN 4x4m 4 J5 +CPU_IOP CPU_IO (1A) +2.5V_CLK (1A) 3MMA/CPU_IO Compal Electronics, Inc J1 +2.5VP Title 3MMA/+2.5V_CLK PROPRIETARY NOTE A B THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND Size TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: C D SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet E 35 of 40 A B C D E PJP1 5A PF1 BATT+ VMB PC1 @4.7UF_1210_25V PC2 4.7UF_1210_25V PC3 4.7UF_1210_25V PC4 4.7UF_1210_25V 23 Panasonic/Sanyo# TS P/S# PR2 PR1 PR93 @47K PR94 PR95 +5VALWP 47K +3VALWP @0 6.49K_1% GND PR3 1K 25063A-07G1 +5VALWP +3VALWP PZD1 PD1 BAS40-04 RLZ10C 23 VS 51AVCC BATT_TEMP PR4 2.2K_1206 VS PC5 1UF_1206_25V PU1A - PC9 150PF 23 PR6 1.62K_0.1% PD4 @RB751V PR12 10K PU2A VBATT LM358A PR9 5.11K_0.1% PR11 150K_0.1% PR13 34.8K_1% PR14 @2.2K PC10 100PF PR15 100K_1% - 1 PD26 RB751V PR10 100K_1% LM358A PR8 301K_0.1% PC8 0.1UF_0805_25V + + +5VALWP PU1B LM358A +3VALWP PR7 100K_1% 1 PD3 AS2431 PC7 0.1UF_0805_25V PD2 BAS40-04 PC6 4700PF + PR5 100K_1% - DBV VBS PR16 15K_0.1% 5A PL1 CHC4532UX PF2 + - PC11 1000PF 1 PU2B LM358A PC12 1000PF 2 2DC-S305-B02 PC13 100PF PC14 100PF PL2 CHC4532UX PC15 1000PF PR19 453K_1% PR18 1M_0.1% PJP2 VIN PD5 EC10QS04 PR17 1K_1% DBV D G PQ1 2N7002 S PQ2 PL3 2.2UH_SPC1002 SI3443DV +CPU_IOP PD32 PR21 5.1K VIN PR24 51AVCC PQ3 2SC2411K PR25 334K_1% PR26 127K_1% - 100K + LM393 PR31 10K PQ6 DTC115EK + 37 PR29 ACIN 10,23,34 PR30 0 PU3B +RTCVREF PQ5 DTC115EK PC19 0.22UF_0805_16V PR28 47K PR32 88.7K_1% VS PR27 10K PD7 EC10QS04 PACIN 1M_1% PU3A LM393 PQ4 2SA1036K ISS355 10K PR22 + 47UF_D_6.3V PC16 PZD2 RLZ3.6B PR33 G D D 47K RB751V PR23 2.2K PC17 1000PF PD6 ACOFF# VS S D D PR20 PC18 1000PF +5V PR111 47K 10K PR34 100K 100K PC21 0.047UF PC20 @1000PF 100K PR35 105K_0.5% VR_ON 24,39 Compal Electronics, Inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet E 36 of 40 A B C P1 B+ @3MMA/GND P1 PR44 22K PR46 PR47 2.2K_1206 PACIN + - PR41 24K_0.5% PR48 P4 PC25 0.022UF_0805 100K 100K PR51 100K +5VALWP PQ13 TP0610T P3 PQ38 DTC115EK 4.7K PC24 0.22UF_0805_16V ACOFF# PD30 ISS355 PQ12 TP0610T 1 VMB 80.6K_1% PR50 S S 2.2K_1206 ACOFF# G PU4B LM358A - PD9 RB751V 1SS355 100K 100K 36 PC42 4.7UF_1206_16V PACIN PACIN PR78 G S 1 2 BATT_CHGI 23 +5VALWP PQ23 DTC115EK 100K TRICKLE 23 100K 47K PZD4 PR75 47K 2N7002 PQ24 RLZ16B Compal Electronics, Inc PC41 4.7UF_1206_16V 1 2 PD27 @RB751V 3 PR73 10K +3VALWP PD14 RB751V PR70 10K PR69 16.9K_1% 3 PR77 200_0805 - PR74 22K_0.5% +RTCVREF PR68 10K +5VALWP PR66 10K_1% D 1 PU6B LM358A + FSTCHG - FSTCHG 2 G PQ19 PC35 0.01UF PR76 100K_1% 24 PU8 S-81233SG + 2N7002 PD15 CHGRTC 3 S PC40 0.1UF PQ22 DTC115EK PU6A LM358A 5 D 1SS355 G S 2 1 PC30 PC39 4.7UF_1206_16V PD25 DBV PR72 100K 51ON# VMB PR58 1K_1% PC33 100PF 39 CHARGER_SHDN# PR71 22K PQ18 2N7002 PC37 1000PF PR65 100K PC38 0.22UF_1206_25V PC36 0.1UF_0805_25V RLZ4.3B 34 - DTC115EK PQ15 100PF PQ21 TP0610T VS VIN PR67 100K 8 1 PQ20 SI2303DS PC34 0.1UF_0805_25V PZD3 1.5K_1% D PU7 TL5001 PR62 1.5K PR63 33_1206 2 + PR61 61.9K_1% PD12 RLS4148 PD13 RLS4148 LM358A PR60 1K_1% PC31 1UF_0805_25V 100K +5VALWP PR59 PQ16 2SC2411K P1 PR64 200_1206 PQ17 2SA1036K 0.1UF VMB LM7221BIM5 PC89 100K PR55 1.5K_1% PU5B 47K - P4 PR54 0.02_2512_1% PC29 1000PF PD11 EA60QC04 + OCP 22UH_SLF12565T PC32 4.7UF_1206_16V 23 PU13 PR52 47K P4 PR57 6.8K_0805 PC28 4.7UF_1210 25V PR110 10K_1% SI4835DY PR56 PD10 RLS4148 PL4 D D D D PC27 4.7UF_1210 25V PC26 4.7UF_1210 25V S S S G 3MMA/GND 2 CHARGERIN PQ14 PJP4 PR53 11.5K_1% PQ10 2N7002 G + PD8 RB751V 1 PR49 47K D 47K PU4A LM358A PR42 10K - PC22 1UF_0805_25V 51AVCC PR45 VIN 150K PC23 100PF D PQ11 2N7002 + SI4835DY PR43 LM358A D D D D SI4835DY S S S G D D D D PR37 200K SI4835DY PU5A S S S G S S S G PQ9 D D D D DBV PR40 150_1% PQ8 4 8 PQ7 VIN PR39 150_1% E P2 PR36 0.02_2512_1% PR38 10K D P4 PJP3 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet E 37 of 40 A B C D E B+ PD16 +12VALWP RB751V PR79 10_1206 PC45 0.1UF_0805_25V PC43 4.7UF_1206_16V PD17 RB751V VL PC44 4.7UF_1206_25V 21 TIME/ON5 28 RUN/ON3 P7 P9 PC60 + 150UF_D_6.3V_KO PD20 EC10QS04 PC58 1000PF PR82 0.015_2512_1% 2 PC61 47UF_D_6.3V_SP + + PC56 4.7UF_1210 25V PC57 PQ28 4.7UF_1210 25V SI4800DY 0.018_2512_1% + PT1 P8 CDRH124B 2 +3VALWP PR81 B+ PQ27 SI4800DY GND MAX1632 47_1206 D D D D CSH3 CSL3 FB3 SKIP# SHDN# PR80 10 23 LX3 DL3 PC54 0.1UF_0805_25V 18 16 17 19 20 14 13 12 15 11 PD18 EC11FS2 D D D D 26 24 PD21 PZD5 RLZ4.3B PU9 P5 PL6 10UH_SLF12565T EC10QS04 DH3 12OUT VDD BST5 DH5 LX5 DL5 PGND CSH5 CSL5 FB5 SEQ REF SYNC RST# S S S G 27 PC55 1000PF PC51 PC52 1UF_0805_25V 470PF_0805_100V 22 BST3 25 PD19 EC10QS04 PC46 4.7UF_1206_25V PC48 0.1UF_0805_25V PC53 0.1UF_0805_25V PC50 4.7UF_1210 25V PC49 4.7UF_1210 25V PQ26 SI4800DY VL D D D D S S S G PQ25 SI4800DY V+ D D D D S S S G PC47 2.2UF_1206_25V PL5 BLM32A06_3216 8 S S S G B+ P6 PR83 100K 21,23,25,39 SUSP# SUSP# +5VALWP 51AVCC PC63 4.7UF_1206_25V + + + 51AVCC PC64 47UF_D_6.3V_SP PD22 EC10QS04 PC67 0.01UF PZD6 RLZ6.2C PC62 @47UF_D_6.3V_SP PC59 150UF_D_6.3V_KO PC65 47UF_D_6.3V_SP PC66 150UF_D_6.3V_KO PZD7 2.2K_1206 3 PR84 1K 39 MAX1632_SHDN# PC68 1000PF PR85 120K 4 Compal Electronics, Inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet E 38 of 40 A B C D E +5V PD23 RB751V PR86 20 PQ29 PQ30 SI4800DY SI4800DY B+ D D D D D D D D S S S G S S S G PC72 4.7UF_1210_25V PC73 4.7UF_1210_25V PC74 @4.7UF_1210_25V 20 D0 LX 23 VID1 19 D1 DL 13 VID2 18 D2 PGND 14 VID3 17 D3 FB CC D4 16 REF D D D D PQ31 SI4810 PQ32 SI4810 HK-RM136-15A1R4 +CPU_COREP PQ33 SI4810 PD24 BYS10-45 PR90 PC77 PC78 220UF_D_4V TON 220UF_D_4V 1SS355 GNDS 11 PGOOD 12 PR91 1K PC79 2200PF 2 100K 100K +RTCVREF CPU_CORE CPU_CORE PC84 0.1UF PTH1 MAX1711_SHDN# PR92 243K_1% VS 10K_1%_0805 25.5K PR96 2,35 PR98 PU12A LM393 PZD8 RLZ5.1B PQ36 DTC115EK 100K 100K PR101 PC82 3 + PC85 0.1UF 3 PR100 18K_1% +2.5VP 47K PR97 PR99 1K 3.65K_1% For CPU thermal protection VR_POK PQ34 2SB1132 PD28 ILIM 10 +3V PQ35 DTC115EK 1 VID4 FBS GND +5V PC81 0.22UF_0805_16V + CHARGER_SHDN# 37 PD31 BYS10-45 2 PC80 220PF + S S S G PU10 MAX1711 D D D D PL8 VID0 24 DH D D D D SKIP# S S S G 21 PC76 2200PF 22 4 BST VID[0 4] VID[0 4] VCC SHDN# PC75 0.1UF_0805_25V S S S G PR89 100K PC71 4.7UF_1210_25V 15 VDD V+ 21,23,25,38 SUSP# 1 VR_ON VR_ON PR88 PR87 PC70 0.22UF_0805_16V MAX1711_SHDN# 24,36 PC69 0.1UF_0805_25V 453K + ON/OFF MAX1632_SHDN# 38 PTH2 10K_1%_0805 VS 25.5K PR102 For Battery thermal protection + PR104 @22UF_B 3.65K_1% PD29 249K_1% PU12B LM393 100K 100K PR108 PC87 1000PF PR107 24K_0.5% PC86 0.1UF PR106 100K_1% + PZD9 RLZ5.1B PR109 PQ37 DTC115EK 1SS355 47K PR103 PR105 1K S-816A25AMC PC83 S-816A25AMC VR_ON 22UF_B VOUT VSS VIN EXT PU11 453K PC88 0.1UF 4 Compal Electronics, Inc Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C D SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet E 39 of 40 888F1 PIR LIST 06/20/00 Written by Jerry 03/13/00 Written by Jerry P3, 4, 5: Change value of U8 to 443ZX-100M P16: Change value of U24 to 512KX32X2 P24: Delete R247 and add net DD on pin of U40 P30: Change net GND_SIGNALr to GND on pin2 of JP1 P33: Change value of U39 to UR7HCPXZ-P444 P35: Change net CPI_IO to CPU_IO on pin1 of R113 03/15/00 Written by Jerry P14: Delete net +3V on pin T13, T16, T8, R5, P16, P5, R6, R15 of U10, These pins should be NC P38: Change PT1 to CDRH124B P39: Add PL8 and reserve it 03/17/00 Written by Jerry P3: Delete C175 P14: Swap SSIN and SSOUT on U15 P16: Swap VMA8 and VMA10 on U24 P34: Delete net MD_MIC on pin28 of JP4 Delete net LEFT on pin30 of JP4 Delete net RIGHT on pin31 of JP4 Delete net AGND on pin29 and pin32 of JP4 Add net BATT_LOW_LED# on pin28 of JP4 Add net BATT_CHGI_LED# on pin33 of JP4 Add net DM_ON on pin30 of JP4 Add net DM_ON# on pin31 of JP4 Add net GND on pin29 and pin32 of JP4 Change JP3 to 10pin connector and re-assign pin out Change value of SW2 to HCH SMT1-02 P36: Change value of PC16 to 47UF_D_6.3V P37: Add PD25 between net VMB and pin2 of PD15 P08: Remove @ on R348, C483, R341, and C472 P12: Change value of R180 to 10 Ohm Change package of Y1 to pin package P13: Add M6 P15: Change value of RP23 to 16P8R-56 Ohm P16: Remove @ on R230 and C320 P17: Remove @ on R21 and C55 Change value of C45, C18, C23, and C24 to 220PF P18: Add R374 and R375 for 1420RST# 06/23/00 Written by Jerry P02: Change value of R132 and R134 to 1K 06/26/00 Written by Jerry 04/28/00 Written by Jerry P03: Delete C117 P12: Add L36 for SDRAM Clock VCC P35: Add C516, C517, C518, C519, C520, and C521for EMI P14: Change value of C215 and C190 to 1UF P24: Remove @ on CP10, CP11, CP12, CP13, CP14, and CP15 07/05/00 Written by Jerry 03/20/00 Written by Jerry 04/29/00 Written by Jerry P17: Change value of L23, L24, and L25 to FCM2012C80 P14: Add R352 on net SSIN for pull down Change value of R151 to 200K P34: Change tolerance of R270 and R271 to +/- 5% P29: Short pin34 and pin36 of JP18 for PME# Short pin 111 and pin 116 of JP18 for MD_SPK P34: Delete net MOD_AUDIO_MON on pin 33 of JP4 03/21/00 Written by Jerry P23: Add R353 for G1/F1# select P22: Delete L32 P34: Add C522, C523, and C524 for SW/B ************* Rev0.4 PIR List ************** 07/08/00 Written by Jerry 05/02/00 Written by Jerry P15: Add J10 between VGA_GND and GND Add net VGA_GND on pin J4, L5, G5, E4, D4, M5, M4, F5, and K18 of U10 P23: Change value of R263 to 47K Add net OCP P32: Add R380 and R381 for 888G1 P36, 27, 38, 39: Update DC/DC circuit 05/04/00 Written by Jerry 07/10/00 Written by Jerry ************* Rev0.2 PIR List ************** P29: Add @ on L22, C342, C245, C368, and C389 P34: Short pin49 and 50 of JP4 04/20/00 Written by Jerry P24: Remove @ on D15 Add @ on D16 05/05/00 Written by Jerry P07: Add @ on R213 and C289 P23: RP56, U28, R279, R280 change VCC to +3VALW P10: Add Correct library D5 and D8 RP59 change VCC to +3V Add module port PX4_RI# on net PX4_RI# Change value of RP56 to 2.7K P12: Change value of R180 to 15 ohm P24: U21, U27, U40, U18, U23, RP55, RP60, R206, Change VCC of R164 and R201 to +3VS P14: Change VCC to +3V on pin R2 of U10 and R233 change VCC to +3VALW Add @ on U18 Change value of R151 to 200K_1% Add SST39VF040 on U49 P15: Do not populate RP23, R114, R117, R128, Change value of U21 and U27 to 74LVC244 R124, and C192 when use TFT panel Change value of U40 to 74LVC32 P17: Do not populate CP6 and CP7 and populate ohm on P29: Delete U49, C151, and R364 CP4 and CP5 when use TFT panel P34: D14, Q26, R264, and R275 chnage VCC to +3VALW Populate ohm on R21, and C55 when use TFT panel Pin10 of JP3 change VCC to +3VS Populate ohm on C18, C23, and C24 when use TFT panel P35: Delete U5 and C83 Change net B+ to +5VALW on pin1 and pin3 of JP2 Net EC_HPOWON tie to net SPWROFF# P18: Add net PCM_RI# on pin E14 of U33 C518 and C521 change VCC to +3VALW P20: Delete D32 P21: Delete L15, L17, C291, C333, C274, C273, C327, 05/08/00 Written by Jerry R237, R209, R215, R246, R238, R222, R229 and U26 P22: Change value of L32 to 0_0805 P23: Add L37 and R367, add @ on L37 P23: Add net NUM_LED# on pin 63 of U28 P36: Change value of PZD2 to RLZ3.6B Add net CAPS_LED# on pin 64 of U28 Add net ARROW_LED# on pin 65 of U28 ************* Rev0.3 PIR List ************** Add net FAN_4.6V on pin 103 of U28 Add net FAN_4.2V on pin 104 of U28 05/16/00 Written by Jerry Add Module port RING# on net RING# P24: Delete R349 and Q48 when 888F1 configuration Change package of C1206, C1210, TAN_A, and TAN_B to Add net 51RING# on pin of U34 Change net EN_DFAN to EN_DFAN# on pin5 of U34 CAP-A_B_1206_1210_TAN Add net BATT_LOW_LED# on pin of U34 05/18/00 Written by Jerry Add net BATT_CHGI_LED# on pin 16 of U34 Change net SW_CLK to SW_CLK/HDD_LED# on pin 16 of U35 P19: Change value of C486 and C298 to 1UF_25V_0805 Change net SW_DATA to SW_DATA/CD_FDD_LED# on pin 19 of U35 P27: Change value of C455 to 4.7UF_0805 Add D39 and net PX4_RI# on pin of D39 Change value of U42 to NM24C16 Add D40 and R357 for OR net PCM1_LED and PCM2_LED to net PCM_LED 06/13/00 Written by Jerry Delete net PCM1_LED on pin8 of U21 Delete net PCM2_LED on pin11 of U21 P23: Change value of C352 to 0.1UF Delete net HDD_LED# on pin13 of U21 Change value of RP56 to 10P8R_4.7K Add net PCM_LED on pin8 of U21 Delete net CLK_SMB and DAT_SMB on RP56 Add net SHDD_LED# on pin11 of U21 P24: Add R368 and R369 for SMB pull high Add net PHDD_LED# on pin13 of U21 P29: Add L22 for Mini PCI +5VS Add R356 on net CD_INTA# for pull high +5VCD P33: Add L38, L39, C525, and C526 for PS/2 Ycable Delete RP54 Pin3 of RP55 tie to net CDON#/MAIL 06/15/00 Written by Jerry Pin4 of RP55 tie to net BUTTON_LOCK# P25: Delete Q39 and C449 for FAN P03: Delete C37 and C47 Add Q55, Q54, Q53, Q52, Q51, D42, D41, R359, R360, R361, P15: Delete J10 R358, C514, and C513 for FAN P23: Change net 51ON# to CDON# P26: Add R354 and R355 for signals of SEEPROM_CLK P33: Add Q56, and Q57 for ESD and SEEPROM_DATA pull down P34: Add D45, R370, R371, D44, R372, C527, Q59, P29: Add R362 between +3.3VAUX and +3V Change VCC +3VS to +3V on L14 and L18 for MINI PCI Q58, and D46 for 51ON# signal Change value of D20 to RB751V Delete net MD_MIC on pin115 of JP18 P36: PJP2 pin2 and Pin3 short Add parts D43, R364, C515, and U49 for net RING# P39: Delete PL7 Add net MINI_RI# on pin 121 of JP18 Add R365 between pin 26 of JP18 and net PCIRST# 06/16/00 Written by Jerry Add R366 between pin 26 of JP18 and net CBRST# Add @ on R366 P13: Add H17 P30: Change DRQ and DACK# signals on U4 P17: Delete CP6, CP7, CP4, and CP5 for EMI P33: Delete C513 and add R363 on TP_VCC ADD LP1, LP2, LP3, and LP4 for EMI Add @ on F3, C13, C27, C26, C25, L4, L3, and JP10 when 888F1 P28: Add R373 and C528 for EMI 07/13/00 Written by Jerry P37: Swap VCC and GND pin on PU13 ************* Rev1.0 PIR List ************** 07/29/00 Written by Jerry P15: Change value of R158 to 22 Ohm 0/31/00 Written by Jerry P34: Change vaule of R371 to 1M 888F2 PIR LIST ************* Rev0.1 PIR List ************** 10/12/00 written by Allen P23: Add BATT_BQ from 87570 P36: Add PD30,PR111,PR112 for Smart Battery P39: Add PD31 at CPU_COREP Compal Electronics, Inc Title PROPRIETARY NOTE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND Size TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: SCHEMATIC, M/B LA-854 Document Number Rev 0C 401172 Saturday, December 23, 2000 Sheet 40 of 40 www.s-manuals.com ... C106 C105 C104 C120 1U C84 1U 1 C86 1U 1U 1U 1 1 C108 C107 C87 1U 2 C89 1U 1 C1 51 C159 C163 1U 1U 1U C52 1U 1U 1 C49 1U 1U 1U 1U 1U C1 21 C122 C123 C124 C50 1 1 CPU_CORE 1 1 1 1 1U 1U 1U 1U 1U... A_A24/CAD17 A_A25/CAD19 +3V S1_D0 S1_D1 S1_D2 S1_D3 S1_D4 S1_D5 S1_D6 S1_D7 S1_D8 S1_D9 S1_D10 S1_D 11 S1_D12 S1_D13 S1_D14 S1_D15 H14 G18 G14 U 11 R 11 U12 R12 V13 H15 G17 F19 P 11 V12 P12 W13 U13 A 11. .. VSS107 VSS108 VSS109 VSS 110 VSS 111 VSS 112 VSS 113 VSS 114 VSS 115 VSS 116 VSS 117 VSS 118 VSS 119 VSS120 VSS1 21 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS1 31 VSS132 VSS133 VSS134