1119 compal nm a311p

A B C D E 1 LCFC Confidential ACLU9 M/B Schematics Document Intel BayTrail M-Processor with DDRIIIL + NV (N15V-GM/N15S-GT) GPU 2 2013-12-22 REV:0.2 3 4 Title LC Future Center Secret Data Security Classification Issued Date 2013/08/08 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER A B C Cover Page 2013/08/05 D Size Document Number Custom Date: Rev 0.2 ACLU9 Monday, December 23, 2013 Sheet E of 59 A B C D E File Name : ACLU9 LCFC confidential NV (N15V-GM/N15S-GT) GB2B-64 Package Page 18~28 Memory BUS (DDR3L) Dual Channel PCI-Express 2x Gen2 PCIe Port5 DDR3L-SO-DIMM Page 14 1.35V DDR3L 1333 MT/s VRAM 256/128*16 DDR3L*8 4GB/2GB/1GB UP TO 8G Page 19~28 1 USB 3.0 1x HDMI HDMI Conn USB 2.0 1x Page 34 CRT VGA Conn Baytrail M (4.5W) Page 36 USB 2.0 1x Page 41 USB Left 2.0 Conn Page 41 USB 2.0 Port3 eDP Conn to USB Port USB Left 3.0 Conn USB 3.0 Port0 USB 2.0 Port0 USB 2.0 1x Int Camera USB2.0 Port2 to Camera eDP x2 Lane USB Right Int MIC Conn USB2.0 1x USB2.0 Hub Port1 Page 33 2 USB 2.0 1x SATA HDD Page 42 SATA Gen2 SATA Port0 SATA ODD Page 42 BGA-1170 25mm*27mm SATA Gen1 USB2.0 1x RTL8111GUL (1G) RTL8106EUL (10M/100M) Page 37 Page 16 SD/MMC Conn USB Board Touch Screen reserved Page 33 USB 2.0 Port2 USB2.0 1x NGFF Card WLAN&BT PCIe 1x LAN Realtek Page 38 Cardreader Realtek RTS5170USB2.0 Hub Port3 SATA Port1 USB 2.0 Port1 RJ45 Conn USB2.0 1x USB Hub PCIe 1x Page 40 PCIe Port0 USB2.0 Hub Port4 PCIe Port1 HD Audio SPI BUS Page 4~12 SPI ROM 8MB Page 07 Sub-board ( for 14") POWER BOARD Codec Conexant CX20752 Page 43 SPK Conn Page 43 USB Board EC ITE IT8586E-LQFP Page 44 Sub-board ( for 15") HP&Mic Combo Conn POWER BOARD USB Board Touch Pad Page 45 Int.KBD Page 45 Thermal Sensor NCT7718W Page 39 USB Board ODD Board 4 Issued Date Title LC Future Center Secret Data Security Classification 2013/08/08 Deciphered Date 2013/08/05 Block Diagram THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Monday, December 23, 2013 Date: Rev 0.2 ACLU9 A B C D E Sheet of 59 A B C D +5VS +3VS Power Plane B+ +3VALW +3VL +5VALW +3VALW_SOC +1.0VALW +1.8VALW +0.68VS CPU_CORE GFX_CORE S0 O O O O O S3 O O O O X O O O X X S5 S4 Battery only S5 S4 AC & Battery don't exist SIGNAL STATE O X X X X X SLP_S1# SLP_S3# SLP_S4# Full ON HIGH HIGH X +VALW +VALW_PCH ON HIGH ON +VALW +V +VS HIGH HIGH HIGH HIGH ON ON ON S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF USB Port Table USB 2.0 USB 3.0 X X XHCI +VS ON ON HIGH ON ON ON ON LOW S3 (Suspend to RAM) LOW LOW HIGH ON ON ON OFF OFF S4 (Suspend to Disk) LOW LOW LOW ON ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW ON ON OFF OFF OFF EC_SMB_DA1 IT8586E +3VALW EC_SMB_CK2 IT8586E V EC_SMB_DA2 +3VS X BATT IT8586E V Camera Cardreader BT(WLAN) TOUCH PANEL USB HUB V X X V +3VS +3VS X X X X V V V +3VS +3VS X X X V EC SM Bus2 address Device need to update Thermal Sensor EMC1403-2 Address X +3VALW_PCH ON BOM Structure AOAC@ OPT@ UMA@ 14@ 15@ 100M@ N15SGT@ N15VGM@ GIGA@ GC6@ TS@ RANKA@ RANKB@ ME@ CD@ @ BTO Item AOAC support part GPU Part UMA SKU ID part For 14" part For 15" part 100M LAN part N15SGT Part N15GSM Part GIGA LAN Part GPU GC6 Part Touch Screen part GPU VRAM RANKA PART GPU VRAM RANKB PART Connector COST DOWN Not stuff Hynix VRAM Part H4T@ M4T@ S4T@@ Device charger X X 0001 011X b PCH Port X X Charger TP Module X +3VGS Smart Battery Thermal Sensor X +3VALW Device SODIMM WLAN WiMAX X V EC SM Bus1 address USB Port (Left Side) USB HUB PCIE PORT LIST VGA PCH_SMB_CLK PCH PCH_SMB_DATA +3VALW_PCH USB Port (Right Side) SMBUS Control Table EC_SMB_CK1 USB Port (Left Side) ON HIGH SOURCE Clock LOW 3 S1(Power On Suspend) Clock BOM Structure Table External USB Port Port EHCI1 X +V SLP_S1# SLP_S3# SLP_S4# SLP_S5# Full ON +1.05VS +1.35V SIGNAL STATE +1.5VS State S5 S4/AC Only E , X > Means OFF ) Voltage Rails ( O > Means ON Micron VRAM Part Samsung VRAM Part Discrete GPU Discrete GPU WLAN LAN PCH SM Bus address Device Address DDR DIMMA 1001 000Xb Rsvd 1001_100xb VGA 0x9E Wlan PCH 0x96 TP need to update Issued Date Title LC Future Center Secret Data Security Classification 2013/08/08 2013/08/05 Deciphered Date Notes List THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Monday, December 23, 2013 Date: Rev 0.2 ACLU9 A B C D E Sheet of 59 Port Port DDI PROCESSOR Pin Names HDMI* Mapping DDI0_TXP_0 HDMI_TX2+ DDI0_TXN_0 HDMI_TX2DDI0_TXP_1 HDMI_TX1+ DDI0_TXN_1 HDMI_TX1DDI0_TXP_2 HDMI_TX0+ DDI0_TXN_2 HDMI_TX0DDI0_TXP_3 HDMI_CLK+ DDI0_TXP_3 HDMI_CLKDDI0_HPD HDMI_HPD DDI0_DDCDATA DDPB_DAT DDI0_DDCCLK DDPB_CLK UC1C {34} {34} {34} {34} {34} {34} {34} {34} HDMI D2 HDMI D1 HDMI D0 HDMI CLK HDMI_TX2+ HDMI_TX2HDMI_TX1+ HDMI_TX1HDMI_TX0+ HDMI_TX0HDMI_CLK+ HDMI_CLK- HDMI_TX2+ HDMI_TX2HDMI_TX1+ HDMI_TX1HDMI_TX0+ HDMI_TX0HDMI_CLK+ HDMI_CLK- AV3 AV2 AT2 AT3 AR3 AR1 AP3 AP2 AL3 AL1 {34} D27 HDMI_HPD C26 C28 {34} DDPB_DATA {34} DDPB_CLK B28 C27 B26 D V1P0Sx V1P0Sx V1P0Sx V1P0Sx V1P0Sx V1P0Sx V1P0Sx V1P0Sx DDI0_AUXP V1P0Sx DDI0_AUXN V1P0Sx V1P0Sx DDI1_AUXP V1P0Sx DDI1_AUXN DDI0_HPD DDI0_DDCDATA V1P8S DDI0_DDCCLK V1P8S DDI0_VDDEN DDI0_BKLTEN DDI0_BKLTCTL RC1 402_0402_1% DDI0_RCOMP_N DDI0_RCOMP_P DDI0_RCOMP_P AK13 AK12 AM14 AM13 AM3 AM2 DDI1_TXP_0 DDI1_TXN_0 DDI1_TXP_1 DDI1_TXN_1 DDI1_TXP_2 DDI1_TXN_2 DDI1_TXP_3 DDI1_TXN_3 V1P8S DDI1_HPD V1P8S DDI0_RCOMP_N DDI0_TXP_0 V1P0Sx DDI0_TXN_0 V1P0Sx DDI0_TXP_1 V1P0Sx DDI0_TXN_1 V1P0Sx DDI0_TXP_2 V1P0Sx DDI0_TXN_2 V1P0Sx DDI0_TXP_3 V1P0Sx DDI0_TXN_3 V1P0Sx V1P8S V1P8S DDI1_DDCDATA DDI1_DDCCLK DDI1_VDDEN V1P8S V1P8S DDI1_BKLTEN V1P8S DDI1_BKLTCTL V1P8S V1P8S V1P8S DDI0_RCOMP V1P0Sx DDI0_RCOMP_P V1P0Sx RESERVED_AM14 RESERVED_AH14 RESERVED_AH13 RESERVED_AF14 RESERVED_AF13 VSS_AH3 RESERVED_VSS2 VSS_AH2 RESERVED_VSS3 RESERVED_AM13 VSS_AM3 RESERVED_VSS0 VSS_AM2 RESERVED_VSS1 VGA_RED VGA_BLUE VGA_GREEN VGA_IREF VGA_IRTN C {12} GPIO_NC13 change dual mos to one mos GPIO_NC13 T2 T3 AB3 AB2 Y3 Y2 W3 W1 V2 V3 R3 R1 AD6 AD4 AB9 AB7 Y4 Y6 V4 V6 A29 C29 AB14 B30 C30 RESERVED_T2 RESERVED_T3 RESERVED_AB3 RESERVED_AB2 RESERVED_Y3 RESERVED_Y2 RESERVED_W3 RESERVED_W1 RESERVED_V2 RESERVED_V3 RESERVED_R3 RESERVED_R1 RESERVED_AD6 RESERVED_AD4 RESERVED_AB9 RESERVED_AB7 RESERVED_Y4 RESERVED_Y6 RESERVED_V4 RESERVED_V6 GPIO_S0_NC13 RESERVED_A29 GPIO_S0_NC14_C29 RESERVED_C29 RESERVED_AB14 GPIO_S0_NC12 V1P8S RESERVED_C30 VVGA_GPIO VVGA_GPIO VGA_HSYNC VGA_VSYNC VVGA_GPIO VVGA_GPIO VGA_DDCCLK VGA_DDCDATA RESERVED_T7 RESERVED_T9 RESERVED_AB13 RESERVED_AB12 RESERVED_Y12 RESERVED_Y13 RESERVED_V10 RESERVED_V9 RESERVED_T12 RESERVED_T10 RESERVED_V14 RESERVED_V13 RESERVED_T14 RESERVED_T13 RESERVED_T6 RESERVED_T4 RESERVED_P14 BAY-TRAIL-M-SOC_FCBGA1170 OF 13 V1P8S RESERVED_D32 RESERVED_N32 RESERVED_J34 RESERVED_K28 RESERVED_F28 RESERVED_F32 RESERVED_D34 RESERVED_J28 RESERVED_D28 RESERVED_M32 RESERVED_F34 REV = 1.15 RESERVED_K34 GPIO_S0_NC26 GPIO_S0_NC25 GPIO_S0_NC24 GPIO_S0_NC23 GPIO_S0_NC22 GPIO_S0_NC21 GPIO_S0_NC20 GPIO_S0_NC18 GPIO_S0_NC17 GPIO_S0_NC16 GPIO_S0_NC15 AG3 AG1 AF3 AF2 AD3 AD2 AC3 AC1 CPU_EDP_TX0+ CPU_EDP_TX0CPU_EDP_TX1+ CPU_EDP_TX1- AK3 AK2 CPU_EDP_AUX CPU_EDP_AUX# K30 P30 G30 N30 J30 M30 CPU_EDP_TX0+ {33} CPU_EDP_TX0- {33} CPU_EDP_TX1+ {33} CPU_EDP_TX1- {33} EDP CPU_EDP_AUX {33} CPU_EDP_AUX# {33} EDP_HPD DDI1_DDCDATA @ TP11 DDI1_DDCDATA Port Port DDI PROCESSOR Pin Names EDP* Mapping CPU_EDP_TX0+ DDI1_TXP_0 DDI1_TXN_0 CPU_EDP_TX0DDI1_TXP_1 CPU_EDP_TX1+ CPU_EDP_TX1DDI1_TXN_1 DDI1_AUXP CPU_EDP_AUX DDI1_AUXN CPU_EDP_AUX# DDI1_HPD EDP_HPD {12} PCH_LCD_VDDEN_Q PCH_BKLT_EN_Q PCH_BKLT_CTRL_Q AH14 AH13 AF14 AF13 AH3 AH2 BA3 AY2 BA1 AW1 AY3 CRT_R CRT_B CRT_G CRT_IREF BD2 BF2 VGA_HS VGA_VS BC1 BC2 VGA_DDC_CLK VGA_DDC_DAT CRT_R CRT_B CRT_G D {36} {36} {36} VGA_HS VGA_VS {36} {36} VGA_DDC_CLK VGA_DDC_DAT +3VS {36} {36} T7 T9 AB13 AB12 Y12 Y13 V10 V9 T12 T10 V14 V13 T14 T13 T6 T4 P14 RPC16 2.2K_0404_4P2R_5% CRT_R RC5 CRT_B VGA_DDC_CLK VGA_DDC_DAT 150_0402_1% RC6 150_0402_1% CRT_G RC7 150_0402_1% CRT_IREF RC4 357_0402_1% need to change 357 1% K34 D32 N32 J34 K28 F28 F32 D34 J28 D28 M32 F34 C XDP ? @ R4602 change from 10K to 1K, as Vienna +1.8VS +3VS +3VALW R4602 1K_0402_1% 1 RPC24 10K_0404_4P2R_5% D S2 QC3 CPU_EDP_HPD G QC1A PJT138K_SOT363-6 S 2N7002KW_SOT323-3 {33} G1 QC1B PJT138K_SOT363-6 EDP_HPD {33} R4603 100K_0402_5% 0604 S1 PCH_LCD_VDDEN_Q D1 G2 D2 PCH_ENVDD B B EDP_HPD +3VALW +3VS RC972 RPC25 10K_0404_4P2R_5% 2 QC2B PJT138K_SOT363-6 QC2A PJT138K_SOT363-6 G1 {33} S2 QC198B PJT138K_SOT363-6 QC198A PJT138K_SOT363-6 S1 PCH_BKLT_CTRL_Q D1 G2 D2 PCH_EDP_PWM S2 D2 {33} S1 G1 D1 G2 RC973 10K_0402_5% 10K_0402_5% PCH_ENBKL PCH_BKLT_EN_Q +3VS 1 +1.8VALW A A Issued Date Title LC Future Center Secret Data Security Classification 2013/03/26 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER SOC (DDI,EDP) 2013/02/01 Deciphered Date Size Document Number Custom Date: Rev 0.2 ACLU9 Monday, December 23, 2013 Sheet of 59 DDRA_DQ[63:0] DDRA_MA[15:0] {14} DDRA_DQS[7:0] {14} DDRA_DQS#[7:0] DDRA_DM[7:0] {14} {14} {14} UC1A UC1B D Swap Group to Group Swap Group to 6\7\5 {14} {14} {14} C DDRA_MA0 DDRA_MA1 DDRA_MA2 DDRA_MA3 DDRA_MA4 DDRA_MA5 DDRA_MA6 DDRA_MA7 DDRA_MA8 DDRA_MA9 DDRA_MA10 DDRA_MA11 DDRA_MA12 DDRA_MA13 DDRA_MA14 DDRA_MA15 K45 H47 L41 H44 H50 G53 H49 D50 G52 E52 K48 E51 F47 J51 B49 B50 DDRA_DM0 DDRA_DM1 DDRA_DM3 DDRA_DM2 DDRA_DM4 DDRA_DM6 DDRA_DM7 DDRA_DM5 G36 B36 F38 B42 P51 V42 Y50 Y52 M45 M44 H51 DDRA_RAS# DDRA_CAS# DDRA_WE# {14} {14} {14} DDRA_BS0# DDRA_BS1# DDRA_BS2# {14} DDRA_CS0# {14} DDRA_CS1# {14} DDRA_CKE0 {14} DDRA_CKE1 {14} DDRA_ODT0 K47 K44 D52 P44 P45 C47 D48 F44 E46 T41 P42 DDRA_ODT1 {14} M50 M48 {14} DDRA_CLK0 {14} DDRA_CLK0# P50 P48 {14} DDRA_CLK1 {14} DDRA_CLK1# {14} P41 DDRA_DRAMRST# 100K_0402_1% RC19 100K_0402_1% RC20 1 DRAM_VREF AF44 ICLK_DRAM_TERMN_0 ICLK_DRAM_TERMN_1 AH42 AF42 AD42 DDR_PWROK DDR_CORE_PWROK AB42 SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 AD44 AF45 AD45 AF40 AF41 AD40 AD41 B DRAM0_MA_00 DRAM0_MA_11 DRAM0_MA_22 DRAM0_MA_33 DRAM0_MA_44 DRAM0_MA_55 DRAM0_MA_66 DRAM0_MA_77 DRAM0_MA_88 DRAM0_MA_99 DRAM0_MA_1010 DRAM0_MA_1111 DRAM0_MA_1212 DRAM0_MA_1313 DRAM0_MA_1414 DRAM0_MA_1515 DRAM0_DQ_00 DRAM0_DQ_11 DRAM0_DQ_22 DRAM0_DQ_33 DRAM0_DQ_44 DRAM0_DQ_55 DRAM0_DQ_66 DRAM0_DQ_77 DRAM0_DQ_88 DRAM0_DQ09_C32 DRAM0_DQ_1010 DRAM0_DQ_1111 DRAM0_DQ_1212 DRAM0_DQ_1313 DRAM0_DQ_1414 DRAM0_DQ_1515 DRAM0_DQ_1616 DRAM0_DQ_1717 DRAM0_DQ_1818 DRAM0_DQ_1919 DRAM0_DQ_2020 DRAM0_DQ_2121 DRAM0_DQ_2222 DRAM0_DQ_2323 DRAM0_DQ_2424 DRAM0_DQ_2525 DRAM0_DQ_2626 DRAM0_DQ_2727 DRAM0_DQ_2828 DRAM0_DQ_2929 DRAM0_DQ_3030 DRAM0_DQ_3131 DRAM0_DQ_3232 DRAM0_DQ_3333 DRAM0_DQ_3434 DRAM0_DQ_3535 DRAM0_DQ_3636 DRAM0_DQ_3737 DRAM0_DQ_3838 DRAM0_DQ_3939 DRAM0_DQ_4040 DRAM0_DQ_4141 DRAM0_DQ_4242 DRAM0_DQ_4343 DRAM0_DQ_4444 DRAM0_DQ_4545 DRAM0_DQ_4646 DRAM0_DQ_4747 DRAM0_DQ_4848 DRAM0_DQ_4949 DRAM0_DQ_5050 DRAM0_DQ_5151 DRAM0_DQ_5252 DRAM0_DQ_5353 DRAM0_DQ_5454 DRAM0_DQ_5555 DRAM0_DQ_5656 DRAM0_DQ_5757 DRAM0_DQ_5858 DRAM0_DQ_5959 DRAM0_DQ_6060 DRAM0_DQ_6161 DRAM0_DQ_6262 DRAM0_DQ_6363 DRAM0_DM_00 DRAM0_DM_11 DRAM0_DM_22 DRAM0_DM_33 DRAM0_DM_44 DRAM0_DM_55 DRAM0_DM_66 DRAM0_DM_77 DRAM0_RAS DRAM0_CAS DRAM0_WE DRAM0_BS_00 DRAM0_BS_11 DRAM0_BS_22 DRAM0_CS_0 DRAM0_CS_2 DRAM0_CKE_00 RESERVED_D48 DRAM0_CKE_22 RESERVED_E46 DRAM0_ODT_0 DRAM0_ODT_2 DRAM0_CKP_0 DRAM0_CKN_0 DRAM0_CKP_2 DRAM0_CKN_2 DRAM0_DRAMRST DRAM_VREF DRAM0_DQSP_00 DRAM0_DQSN_00 DRAM0_DQSP_11 DRAM0_DQSN_11 DRAM0_DQSP_22 DRAM0_DQSN_22 DRAM0_DQSP_33 DRAM0_DQSN_33 DRAM0_DQSP_44 DRAM0_DQSN_44 DRAM0_DQSP_55 DRAM0_DQSN_55 DRAM0_DQSP_66 DRAM0_DQSN_66 DRAM0_DQSP_77 DRAM0_DQSN_77 ICLK_DRAM_TERM_1 ICLK_DRAM_TERMN ICLK_DRAM_TERMN_AF42 DRAM_VDD_S4_PWROK DRAM_CORE_PWROK DRAM_RCOMP_00 DRAM_RCOMP_11 DRAM_RCOMP_22 RESERVED_AF40 RESERVED_AF41 RESERVED_AD40 RESERVED_AD41 M36 J36 P40 M40 P36 N36 K40 K42 B32 C32 C36 A37 C33 A33 C37 B38 F36 G38 F42 J42 G40 C38 G44 D42 A41 C41 A45 B46 C40 B40 B48 B47 K52 K51 T52 T51 L51 L53 R51 R53 T47 T45 Y40 V41 T48 T50 Y42 AB40 V45 V47 AD48 AD50 V48 V50 AB44 Y45 V52 W51 AC53 AC51 W53 Y51 AD52 AD51 DDRA_DQ0 DDRA_DQ1 DDRA_DQ2 DDRA_DQ3 DDRA_DQ4 DDRA_DQ5 DDRA_DQ6 DDRA_DQ7 DDRA_DQ8 DDRA_DQ9 DDRA_DQ10 DDRA_DQ11 DDRA_DQ12 DDRA_DQ13 DDRA_DQ14 DDRA_DQ15 DDRA_DQ24 DDRA_DQ25 DDRA_DQ26 DDRA_DQ27 DDRA_DQ28 DDRA_DQ29 DDRA_DQ30 DDRA_DQ31 DDRA_DQ16 DDRA_DQ17 DDRA_DQ18 DDRA_DQ19 DDRA_DQ20 DDRA_DQ21 DDRA_DQ22 DDRA_DQ23 DDRA_DQ32 DDRA_DQ33 DDRA_DQ34 DDRA_DQ35 DDRA_DQ36 DDRA_DQ37 DDRA_DQ38 DDRA_DQ39 DDRA_DQ48 DDRA_DQ49 DDRA_DQ50 DDRA_DQ51 DDRA_DQ52 DDRA_DQ53 DDRA_DQ54 DDRA_DQ55 DDRA_DQ56 DDRA_DQ57 DDRA_DQ58 DDRA_DQ59 DDRA_DQ60 DDRA_DQ61 DDRA_DQ62 DDRA_DQ63 DDRA_DQ40 DDRA_DQ41 DDRA_DQ42 DDRA_DQ43 DDRA_DQ44 DDRA_DQ45 DDRA_DQ46 DDRA_DQ47 J38 K38 C35 B34 D40 F40 B44 C43 N53 M52 T42 T44 Y47 Y48 AB52 AA51 DDRA_DQS0 DDRA_DQS#0 DDRA_DQS1 DDRA_DQS#1 DDRA_DQS3 DDRA_DQS#3 DDRA_DQS2 DDRA_DQS#2 DDRA_DQS4 DDRA_DQS#4 DDRA_DQS6 DDRA_DQS#6 DDRA_DQS7 DDRA_DQS#7 DDRA_DQS5 DDRA_DQS#5 AY45 BB47 AW41 BB44 BB50 BC53 BB49 BF50 BC52 BE52 AY48 BE51 BD47 BA51 BH49 BH50 Group Group BD38 BH36 BC36 BH42 AT51 AM42 AK50 AK52 Group Swap Group to Group AV45 AV44 BB51 Group AY47 AY44 BF52 AT44 Group AT45 BG47 BE46 BD44 BF48 Group AP41 AT42 Swap Group to 6\7\5 AV50 AV48 Group AT50 AT48 AT41 Group DRAM1_MA_00 DRAM1_MA_11 DRAM1_MA_22 DRAM1_MA_33 DRAM1_MA_44 DRAM1_MA_55 DRAM1_MA_66 DRAM1_MA_77 DRAM1_MA_88 DRAM1_MA_99 DRAM1_MA_1010 DRAM1_MA_1111 DRAM1_MA_1212 DRAM1_MA_1313 DRAM1_MA_1414 DRAM1_MA_1515 DRAM1_DQ_00 DRAM1_DQ_11 DRAM1_DQ_22 DRAM1_DQ_33 DRAM1_DQ_44 DRAM1_DQ_55 DRAM1_DQ_66 DRAM1_DQ_77 DRAM1_DQ_88 DRAM1_DQ_99 DRAM1_DQ_1010 DRAM1_DQ_1111 DRAM1_DQ_1212 DRAM1_DQ_1313 DRAM1_DQ_1414 DRAM1_DQ_1515 DRAM1_DQ_1616 DRAM1_DQ_1717 DRAM1_DQ_1818 DRAM1_DQ_1919 DRAM1_DQ_2020 DRAM1_DQ_2121 DRAM1_DQ_2222 DRAM1_DQ_2323 DRAM1_DQ_2424 DRAM1_DQ_2525 DRAM1_DQ_2626 DRAM1_DQ_2727 DRAM1_DQ_2828 DRAM1_DQ_2929 DRAM1_DQ_3030 DRAM1_DQ_3131 DRAM1_DQ_3232 DRAM1_DQ_3333 DRAM1_DQ_3434 DRAM1_DQ_3535 DRAM1_DQ_3636 DRAM1_DQ_3737 DRAM1_DQ_3838 DRAM1_DQ_3939 DRAM1_DQ_4040 DRAM1_DQ_4141 DRAM1_DQ_4242 DRAM1_DQ_4343 DRAM1_DQ_4444 DRAM1_DQ_4545 DRAM1_DQ_4646 DRAM1_DQ_4747 DRAM1_DQ_4848 DRAM1_DQ_4949 DRAM1_DQ_5050 DRAM1_DQ_5151 DRAM1_DQ_5252 DRAM1_DQ_5353 DRAM1_DQ_5454 DRAM1_DQ_5555 DRAM1_DQ_5656 DRAM1_DQ_5757 DRAM1_DQ_5858 DRAM1_DQ_5959 DRAM1_DQ_6060 DRAM1_DQ_6161 DRAM1_DQ_6262 DRAM1_DQ_6363 DRAM1_DM_00 DRAM1_DM_11 DRAM1_DM_22 DRAM1_DM_33 DRAM1_DM_44 DRAM1_DM_55 DRAM1_DM_66 DRAM1_DM_77 DRAM1_RAS DRAM1_CAS DRAM1_WE DRAM1_BS_00 DRAM1_BS_11 DRAM1_BS_22 DRAM1_CS_0 DRAM1_CS_2 DRAM1_CKE_00 RESERVED_BE46 DRAM1_CKE_22 RESERVED_BF48 DRAM1_ODT_0 DRAM1_ODT_2 DRAM1_CKP_0 DRAM1_CKN_0 DRAM1_CKP_2 DRAM1_CKN_2 DRAM1_DRAMRST DRAM1_DQSP_00 DRAM1_DQSN_00 DRAM1_DQSP_11 DRAM1_DQSN_11 DRAM1_DQSP_22 DRAM1_DQSN_22 DRAM1_DQSP_33 DRAM1_DQSN_33 DRAM1_DQSP_44 DRAM1_DQSN_44 DRAM1_DQSP_55 DRAM1_DQSN_55 DRAM1_DQSP_66 DRAM1_DQSN_66 DRAM1_DQSP_77 DRAM1_DQSN_77 Swap Group to Group Swap Group to 6\7\5 BG38 BC40 BA42 BD42 BC38 BD36 BF42 BC44 BH32 BG32 BG36 BJ37 BG33 BJ33 BG37 BH38 AU36 AT36 AV40 AT40 BA36 AV36 AY42 AY40 BJ41 BG41 BJ45 BH46 BG40 BH40 BH48 BH47 AY52 AY51 AP52 AP51 AW51 AW53 AR51 AR53 AP47 AP45 AK40 AM41 AP48 AP50 AK42 AH40 AM45 AM47 AF48 AF50 AM48 AM50 AH44 AK45 AM52 AL51 AG53 AG51 AL53 AK51 AF52 AF51 D C BF40 BD40 BG35 BH34 BA38 AY38 BH44 BG43 AU53 AV52 AP42 AP44 AK47 AK48 AH52 AJ51 B OF 13 REV = 1.15 OF 13 ? BAY-TRAIL-M-SOC_FCBGA1170 +3VALW +1.35V REV = 1.15 ? @ BAY-TRAIL-M-SOC_FCBGA1170 @ RPC13 10K_0404_4P2R_5% +3VALW +1.35V +1.35V 0_0402_5% 2 D D CC18 1U_0402_10V6-K G 2N7002KDWH_SOT363-6 S QC16A {7,44} CC3 1U_0402_10V6-K S D SYS_PWROK G 2N7002KDWH_SOT363-6 CC19 1U_0402_10V6-K S A 1 2 QC5A QC16B G VDDQ_PGOOD CC2 1U_0402_10V6-K DDR_CORE_PWROK 2N7002KDWH_SOT363-6 2N7002KDWH_SOT363-6 RC29 4.7K_0402_1% 0_0402_5% S {44,55} A RC103 CC1 1U_0402_10V6-K 2 RC27 162_0402_1% DRAM_VREF 0_0402_5% RC26 29.4_0402_1% RC25 23.2_0402_1% D G 2 QC5B RC28 RPC14 10K_0404_4P2R_5% DDR_PWROK SM_RCOMP_0 RC24 4.7K_0402_1% 2 SM_RCOMP_1 RC23 SM_RCOMP_2 DDR3 Compensation Signal WIDTH:20MIL SPACING: 25MIL Length: 500Mil Issued Date Title LC Future Center Secret Data Security Classification 2013/03/26 Deciphered Date SOC (DDR3L) 2013/02/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D C DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Date: Document Number Rev 0.2 ACLU9 Monday, December 23, 2013 Sheet of 59 +1.8VS MMC1_D0 MMC1_D1 MMC1_D2 MMC1_D3 MMC1_D4 MMC1_D5 MMC1_D6 MMC1_D7 MMC1_RCOMP BA18 AY20 BD20 BA20 BD18 BC18 RC30 402_0402_1% MMC1_CMD MMC1_RST SD2_CLK SD2_D0 SD2_D1 SD2_D2 SD2_D3_CD SD2_CMD SATA_RCOMP_DN AY26 AT28 BD26 AU28 BA26 BC24 AV28 BF22 BD22 RC43 49.9_0402_1% SD3_CLK SD3_D0 SD3_D1 SD3_D2 SD3_D3 SD3_CD# SD3_CMD SD3_1P8EN SD3_PWREN SDMMC3_RCOMP BF26 RESERVED_VSS7 RESERVED_VSS6 V1P8S V1P8S V1P8S V1P8S VSS_BB7 VSS_BB5 PCIE_CLKREQ_0 PCIE_CLKREQ_1 PCIE_CLKREQ_2 PCIE_CLKREQ_3 SD3_WP_BD5 PCIE_RCOMP_P_AP14_AP14 PCIE_RCOMP_N_AP13_AP13 RESERVED_BB4 RESERVED_BB3 RESERVED_AV10 RESERVED_AV9 HDA_LPE_RCOMP VAUD HDA_RST VAUD HDA_SYNC VAUD HDA_CLK VAUD HDA_SDO VAUD HDA_SDI0 VAUD HDA_SDI1 VAUD GPIO_S0_SC_14 HDA_DOCKRST HDA_DOCKEN GPIO_S0_SC_15 LPE_I2S2_CLK LPE_I2S2_FRM LPE_I2S2_DATAOUT LPE_I2S2_DATAIN RESERVED_P34 RESERVED_N34 SD3_RCOMP RESERVED_AK9 RESERVED_AK7 V1P0_S3 BAY-TRAIL-M-SOC_FCBGA1170 @ PROCHOT AT7 AT6 PCIE_PTX_DRX_P4 PCIE_PTX_DRX_N4 AP12 AP10 PCIE_PRX_DTX_P4 PCIE_PRX_DTX_N4 AP6 AP4 PCIE_PTX_DRX_P3 PCIE_PTX_DRX_N3 AP9 AP7 PCIE_PRX_DTX_P3 PCIE_PRX_DTX_N3 2 OPT@ CC6 CC7 PCIE_CTX_C_GRX_P1 PCIE_CTX_C_GRX_N1 OPT@ 1U_0402_10V6-K 1U_0402_10V6-K 2 PCIE_CRX_GTX_P1 PCIE_CRX_GTX_N1 CC104 CC103 PCIE_PTX_C_DRX_P4 PCIE_PTX_C_DRX_N4 PCIE_PRX_DTX_P4 PCIE_PRX_DTX_N4 1U_0402_10V6-K 1U_0402_10V6-K 2 CC105 CC106 PCIE_PTX_C_DRX_P3 PCIE_PTX_C_DRX_N3 PCIE_PRX_DTX_P3 PCIE_PRX_DTX_N3 dGPU +3VS {19} {19} LAN_CLKREQ# RC968 WLAN_CLKREQ#RC969 GPU_CLKREQ#_Q PCIE_CLKREQ_2# WLAN_CLKREQ#_Q LAN_CLKREQ#_Q AP14 AP13 PCIE_RCOMP_DP PCIE_RCOMP_DN BF28 BA30 BC30 BD28 10K_0402_5% 10K_0402_5% {40} {40} {37} {37} {37} {37} +1.8VS LAN RC958 2.2K_0402_5% PCIE_RCOMP_DP PCIE_RCOMP_DN LAN_CLKREQ#_Q RC31 402_0402_1% BB4 BB3 AV10 AV9 BF20 BG22 BH20 BJ21 BG20 BG19 BG21 BH18 BG18 2 WLAN BB7 BB5 BG3 BD7 BG5 BE3 BD5 D 10K_0804_8P4R_5% {19} {19} {40} {40} 2 B MMC1_CLK SDMMC1_RCOMP AY18 SATA_RCOMP_DP PCIE_TXP_3 PCIE_TXN_3 PCIE_RXP_3 PCIE_RXN_3 AV26 BA24 C PCIE_RXP_2 PCIE_RXN_2 V1P8S V1P8S V1P8S SATA_RCOMP_P_AU18 SATA_RCOMP_N_AT18 AT22 49.9_0402_1% PCIE_TXP_2 PCIE_TXN_2 SATA_GP0 SATA_GP1 SATA_LED AU18 AT18 AV20 AU22 AV22 AT20 AY24 AU26 AT26 AU20 RC35 ICLK_SATA_TERMP RESERVED_VSS4 ICLK_SATA_TERMN RESERVED_VSS5 PCIE_CRX_GTX_P1 PCIE_CRX_GTX_N1 1U_0402_10V6-K 1U_0402_10V6-K {19} {19} PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0 LAN_CLKREQ#_Q GPU_CLKREQ#_Q PCIE_CLKREQ_2# WLAN_CLKREQ#_Q E SATA_RCOMP_DP SATA_RCOMP_DN BA12 AY14 AY12 AT10 AT9 OPT@ {19} {19} LAN_CLKREQ# {37} QC6 MMBT3904WH_SOT323-3 +1.8VS 0607 HDA_RCOMP HDA_RST_AUDIO#_R HDA_SYNC_AUDIO_R HDA_BITCLK_AUDIO_R HDA_SDOUT_AUDIO_R 1 1 RC36 RC37 RC38 RC39 RC40 2 2 C RC959 2.2K_0402_5% 49.9_0402_1% 33_0402_5% 33_0402_5% 33_0402_5% 33_0402_5% {43} HDA_RST_AUDIO# HDA_SYNC_AUDIO {43} {43} HDA_BITCLK_AUDIO HDA_SDOUT_AUDIO {43} HDA_SDIN0 {43} WLAN_CLKREQ#_Q WLAN_CLKREQ# {40} QC7 MMBT3904WH_SOT323-3 I2S_2_FS I2S_2_TXD I2S_2_FS {12} I2S_2_TXD {12} +1.8VS +1.0VS P34 N34 RC42 73.2_0402_1% @ AK9 AK7 C24 CPU_PROCHOT#_R RC44 0_0402_5% RC960 2.2K_0402_5% OPT@ H_PROCHOT# {44,51,52} GPU_CLKREQ#_Q OF 13 REV = 1.15 ? E 0_0402_5% ODD_DETECT#_SOC ODD_DA#_SOC PCIE_RXP_1 PCIE_RXN_1 PCIE_CTX_GRX_P1 PCIE_CTX_GRX_N1 RPC1 PCIE_CTX_C_GRX_P0 PCIE_CTX_C_GRX_N0 C BB10 BC10 CRB USE SATA_GP0 SOC_SCI# RC32 need check with BIOS only GPIO_S0_SC[0 7] can make SCI SATA_RXP_1 SATA_RXN_1 AV6 AV4 OPT@ CC4 CC5 AY16 BA16 PCIE_TXP_1 PCIE_TXN_1 PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0 2 2 B SATA_PRX_DTX_P1 SATA_PRX_DTX_N1 SATA_TXP1 SATA_TXN_1 AT14 AT13 1U_0402_10V6-K 1U_0402_10V6-K E SATA_PRX_DTX_P1 SATA_PRX_DTX_N1 BD10 BF10 PCIE_RXP_0 PCIE_RXN_0 PCIE_CTX_GRX_P0 PCIE_CTX_GRX_N0 C {42} {42} SATA_PTX_DRX_P1 SATA_PTX_DRX_N1 SATA_RXP_0 SATA_RXN_0 AY7 AY6 SATA_PTX_DRX_P1 SATA_PTX_DRX_N1 AU16 AV16 PCIE_TXP_0 PCIE_TXN_0 2 B {42} {42} SATA_PRX_DTX_P0 SATA_PRX_DTX_N0 SATA_TXP_0 SATA_TXN_0 C SATA_PRX_DTX_P0 SATA_PRX_DTX_N0 BF6 BG7 {42} {42} SATA_PTX_DRX_P0 SATA_PTX_DRX_N0 ODD SATA_PTX_DRX_P0 SATA_PTX_DRX_N0 D {42} {42} ACLU1 HDD Net name changed to same as ? VLV_M_D UC1D QC199 MMBT3904WH_SOT323-3 GPU_CLKREQ# OPT@ {19} change mos to 3904 B B +1.8VS +3VALW_R +1.8VS +1.8VS D2 ODD_DA# {42} EC_SCI# {44} QC13 PJA138K_SOT23-3 @ QC17B PJT138K_SOT363-6 G1 SOC_SCI# S S2 D G2 G ODD_DA#_SOC RC95 10K_0402_5% @ RC967 2.2K_0402_5% RPC9 2.2K_0404_4P2R_5% ODD_DETECT#_SOC A S1 D1 ODD_DETECT# {42} @ A QC17A PJT138K_SOT363-6 +3VS @ RC957 RC965 1 2 10K_0402_5% 10K_0402_5% ODD_DETECT# ODD_DA# Issued Date Title LC Future Center Secret Data Security Classification @ 2013/03/26 Deciphered Date 2013/02/01 SOC (PCIE&HDA&SATA&STRAPS) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Monday, December 23, 2013 Date: Rev 0.2 ACLU9 Sheet of 59 CC13 CC14 10P_0402_50V8-J 25MHZ_10PF_7V25000014 10P_0402_50V8-J CLK_PCIE_WLAN# CLK_PCIE_WLAN {37} {37} CLK_PCIE_LAN# CLK_PCIE_LAN AF9 AF7 PCIE_CLKN_11 PCIE_CLKP_11 AK4 AK6 CLK_PCIE_WLAN# CLK_PCIE_WLAN PCIE_CLKN_22 PCIE_CLKP_22 AM4 AM6 CLK_PCIE_LAN# CLK_PCIE_LAN PCIE_CLKN_33 PCIE_CLKP_33 AM10 AM9 +1.8VALW_SPI V1P8A PMC_SUSPWRDNACK V1P8A PMC_SUSCLK0_G24 PMC_SLP_S0IX V1P8A PMC_SLP_S4 V1P8A PMC_SLP_S3 V1P8A GPIO_S514_J20 GPIO_S5_14 V1P8A PMC_ACPRESENT V1P8A PMC_WAKE_PCIE_0 V1P8A PMC_BATLOW V1P8A PMC_PWRBTN V1P8A PMC_RSTBTN Internal 20K(H) V1P8S PMC_PLTRST V1P8A GPIO_S517_J24 GPIO_S5_17 V1P8A PMC_SUS_STAT V1P8A RESERVED_AM10 RESERVED_AM9 +1.8VALW_SPI PMC_SUSCLK @ +3VALW_R D26 G24 F18 F22 D22 J20 D20 F26 K26 J26 BG9 F20 J24 G18 SUSPWRDNACK PMC_SUSCLK PMC_SLP_S0IX# PMC_SLP_S4# PMC_SLP_S3# GPIO_S514_J20 PMC_ACIN PMC_PCIE_WAKE# PMC_BATLOW# PMC_PWRBTN# PMC_RSTBTN# PMC_PLTRST# C11 RTC_RST# B10 B7 EC_RSMRST# SYS_PWROK C9 A9 B8 RTC_X1 RTC_X2 BVCCRTC_EXTPAD CC17 +1.8VALW TP4 RC60 10K_0402_5% @ 0604 @ RC71 10K_0402_5% +1.8VALW PMC_ACIN EC_RSMRST# RC72 10K_0402_5% +1.8VALW 10K_0402_5% CC113 @ 100K_0402_5% 20.01U_0402_25V7K D RC61 2.2K_0402_5% for ACINneed check with power team RC69 @ 0_0402_5% {44} AC_PRESENT @ RC63 10K_0402_5% @ @ TP5 RC83 RC930 EC_RSMRST# D 0_0402_5% {40} {40} PCIE_CLKN_00 PCIE_CLKP_00 BF34 BD34 BD32 BF32 S CLK_PCIE_GPU# CLK_PCIE_GPU +1.8VALW RC82 {19} {19} AF6 AF4 CLK_PCIE_GPU# CLK_PCIE_GPU SIO_UART2_RXD SIO_UART2_TXD SIO_UART2_RTS SIO_UART2_CTS RESERVED_AD10 RESERVED_AD12 10K_0402_5% G 1,Space 15MIL 2,No trace under crystal 3,place on oppsosit side of MCP for temp influence CRYSTAL ICLK_ICOMP ICLK_RCOMP RC73 OSC2 AD14 AD13 AD10 AD12 1 GND1 4.02K_0402_1% ICLK_ICOMP 47.5_0402_1% ICLK_RCOMP CC12 18P_0402_50V8J GND2 PMC_RSTBTN# D OSC1 TP9 TP10 TP1 TP3 1 @ @ @ @ AU34 AV34 BA34 AY34 QC203 PJA138K_SOT23-3 SIO_UART1_RXD SIO_UART1_TXD SIO_UART1_RTS SIO_UART1_CTS RESERVED_AD9 RC70 RC62 YC2 YC1 32.768KHZ_12.5PF_200458-PG14 CC11 18P_0402_50V8J +1.8VS ICLK_OSCIN ICLK_OSCOUT AD9 ? VLV_M_D UC1E AH12 AH10 XTAL25_IN XTAL25_OUT 1M_0402_5% 1 XTAL25_OUT XTAL25_IN RC93 2 10M_0402_5% D QC9 RC92 RTC_X2 RTC_X1 0605 ACIN# G {44,53} RPC15 RC85 22_0402_5% PCH_SPI_CS0# PCH_SPI_SO SPI_WP# CS# SO(IO1) WP#(IO2) VSS SPI_HOLD# PCH_SPI_CLK PCH_SPI_SI C D14 G12 F14 F12 G16 D18 F16 AT34 50mA VCC HOLD#(IO3) SCLK SI(IO0) CC8 1U_0402_10V6-K XDP GD25LQ64CVIGR_TSOP8 0605 SPI ROM PCH_SPI_CS0# RC81 PCH_SPI_SI PCH_SPI_CLK VCCRTC SRTC_RST# RTC_RST# RC89 20K_0402_1% RC90 20K_0402_1% RC84 RC88 22_0402_5%PCH_SPI_CS0#_R B18 B16 C18 A17 C17 C16 B14 C15 SOC_KBRST# 2 CC10 1U_0402_6.3V6K CC9 1U_0402_6.3V6K 1 SOC_LID_OUT# JME1 SHORT PADS @ TAP_TCK TAP_TRST TAP_TMS TAP_TDI TAP_TDO TAP_PRDY TAP_PREQ RESERVED C23 C21 B22 A21 C22 PCH_SPI_SO_R 22_0402_5%PCH_SPI_SI_R 22_0402_5%PCH_SPI_CLK_R SOC_SMI# JCMOS1 SHORT PADS @ C13 A13 C19 JCMOS/JCMOS1 Place under Bottom RTCRST# Space 15Mil RC91 49.9_0402_1% GPIO_RCOMP18 ILB_RTC_X1 ILB_RTC_X2 ILB_RTC_EXTPAD N26 V1P0S V1P0S V1P0S PCU_SPI_CS_00 PCU_SPI_CS_11 PCU_SPI_MISO PCU_SPI_MOSI PCU_SPI_CLK V1P8A V1P8A V1P8A V1P8A V1P8A GPIO_S5_0 GPIO_S5_1 GPIO_S5_2 GPIO_S5_3 GPIO_S5_4 GPIO_S5_5 GPIO_S5_6 GPIO_S5_7 V1P8A V1P8A V1P8A V1P8A V1P8A V1P8A V1P8A V1P8A GPIO_S5_8 GPIO_S5_9 GPIO_S5_10 V1P8A V1P8A V1P8A SIO_PWM_00 SIO_PWM_11 V1P8A V1P8A V1P8A V1P8A V1P8A V1P8A V1P8A V1P8A V1P8A BAY-TRAIL-M-SOC_FCBGA1170 OF 13 REV = 1.15 B24 CPU_SVID_ALRT#_R A25 CPU_SVID_DAT_R C25 CPU_SVID_CLK_R AU32 AT32 {44} {5,44} 1U_0402_10V6-K RC78 RC79 RC80 20_0402_1% 16.9_0402_1% 0_0402_5% {59} CPU_SVID_ALERT# {59} CPU_SVID_DAT {59} CPU_SVID_CLK C need check power part if RES is staffed K24 N24 M20 J18 M18 K18 K20 M22 M24 +1.8VALW AV32 BA28 AY28 AY30 RC927 10K_0402_5% ? RC793 10K_0402_5% PMC_PCIE_WAKE# S PCIE_WAKE# D The ALT_GPIO_SMI.CORE_GPIO_SMI_STS@ [31:24] & ALT_GPIO_SMI.CORE_GPIO_SMI _EN[15:8] register bits correspond to GPIO_S0_SC[7:0] ALT_GPIO_SMI.SUS_GPIO_SMI_STS[23:16] & ALT_GPIO_SMI.SUS_GPIO_SMI_EN[7:0] correspond to GPIO_S5[7:0] +3VS +3VALW G +3VALW GPIO_S5_22 GPIO_S5_23 GPIO_S5_24 GPIO_S5_25 GPIO_S5_26 GPIO_S5_27 GPIO_S5_28 GPIO_S5_29 GPIO_S5_30 SIO_SPI_CS V1P8S V1P8S SIO_SPI_MISO V1P8S SIO_SPI_MOSI SIO_SPI_CLK V1P8S GPIO_RCOMP RTC RST# SVID_ALERT SVID_DATA SVID_CLK EC_RSMRST# SYS_PWROK UC2 PCH_SPI_SO_R PMC_RSMRST PMC_CORE_PWROK VRTC VRTC +1.8VALW_SPI SRTC_RST# PMC_PLT_CLK_00 PMC_PLT_CLK_11 PMC_PLT_CLK_22 PMC_PLT_CLK_33 PMC_PLT_CLK_44 PMC_PLT_CLK_55 ILB_RTC_RST to 2.2K 4R8P 2.2K_0804_8P4R_5% change 3.3K ILB_RTC_TEST BH7 BH5 BH4 BH8 BH6 BJ9 C12 2N7002KW_SOT323-3 SPI_WP# SPI_HOLD# PCH_SPI_CS0# S {37,40,44} QC168 PJA138K_SOT23-3 RPC17 10K_0404_4P2R_5% B B +1.8VALW +3VALW_R 2 1 D2 RC74 10K_0402_5% SUSWARN# D S2 SUSPWRDNACK S {44} @ QC15A PJT138K_SOT363-6 QC10 PJA138K_SOT23-3 S1 G1 RC75 10K_0402_5% RC104 100K_0402_5% G PMC_PLTRST# D1 G2 {19,37,40,44} PLT_RST# QC15B PJT138K_SOT363-6 +1.8VALW +1.8VALW +1.8VALW +1.8VALW +1.8VALW +3VALW_R +3VALW +3VALW_R S2 D2 G2 QC14A PJT138K_SOT363-6 EC_LID_OUT# {44} PMC_PWRBTN# S2 PM_SLP_S3# KBRST# QC12A PJT138K_SOT363-6 PMC_SLP_S4# D2 PBTN_OUT# QC12B PJT138K_SOT363-6 {40} SUSCLK S2 QC11B D2 PM_SLP_S4# Bay trail plaform susclk is 1.8VSA level, NGFF card need 3.3V {44} PJT138K_SOT363-6 {44} Issued Date A QC200 PJA138K_SOT23-3 Title LC Future Center Secret Data 2013/03/26 Deciphered Date SOC (RTC&SPI&PM) 2013/02/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER PMC_SUSCLK PJT138K_SOT363-6 {44} Security Classification QC14B PJT138K_SOT363-6 {44} D1 2 G1 S1 @ @ D1 G2 S1 SOC_KBRST# {44} RC933 10K_0402_5% RC932 2.2K_0402_5% @ G1 EC_SMI# 2 PMC_SLP_S3# G1 G2 0801 EC_INT_SERIRQ need change to level shift D1 RPC3 10K_0404_4P2R_5% QC11A D RPC5 10K_0404_4P2R_5% RPC4 10K_0404_4P2R_5% S S1 SOC_SMI# SOC_LID_OUT# 4 RPC7 10K_0404_4P2R_5% RPC6 2.2K_0404_4P2R_5% G A RPC2 10K_0404_4P2R_5% @ 4 0605 0603 +3VALW_R +1.8VALW +1.8VALW Document Number Size Custom Date: Rev 0.2 ACLU9 Thursday, December 26, 2013 0801 EC_INT_SERIRQ need change to level shift Sheet of 59 E2 D2 {44} LPC_AD0 {44} LPC_AD1 {44} LPC_AD2 {44} LPC_AD3 {44} LPC_FRAME# {44} CLK_PCI_EC RC114 45.3_0402_1% USB_HSIC_RCOMP RC117 49.9_0402_1% RCOMP_LPC_HVT RC118 SOC_SERIRQ RC119 22_0402_5% 0_0402_5% PCH_PCI_CLK_R A7 BF18 BH16 BJ17 BJ13 BG14 BG17 BG15 BH14 BG16 BG13 BG12 BH10 BG11 PCH_SMB_DATA PCH_SMB_CLK PCH_SMB_ALERT# V1P8A V1P8A USB_PLL_MON V1P8S V1P8S V1P8S V1P8S V1P8S V1P8S V1P8S GPIO_S0_SC_55 GPIO_S0_SC_56 GPIO_S0_SC_57 GPIO_S0_SC_58 GPIO_S0_SC_59 GPIO_S0_SC_60 GPIO_S0_SC_61 V1P8S ILB_8254_SPKR BD12 BC12 BD14 BC14 BF14 BD16 BC16 PXS_RST#_SOC GPIO_S0_SC_56 VGA_PWRGD_SOC GPIO52_SOC GPIO53_SOC PXS_PWREN_SOC GPIO_S0_SC_56 BH12 USB_HSIC1_DATA USB_HSIC1_STROBE USB_HSIC_RCOMP VLPC VLPC VLPC VLPC VLPC VLPC VLPC VLPC VLPC V1P8S V1P8S V1P8S SIO_I2C0_DATA SIO_I2C0_CLK V1P8S V1P8S SIO_I2C1_DATA SIO_I2C1_CLK V1P8S V1P8S SIO_I2C2_DATA SIO_I2C2_CLK V1P8S V1P8S SIO_I2C3_DATA SIO_I2C3_CLK V1P8S V1P8S SIO_I2C4_DATA SIO_I2C4_CLK V1P8S V1P8S SIO_I2C5_DATA SIO_I2C5_CLK V1P8S V1P8S SIO_I2C6_DATA SIO_I2C6_CLK RC116 10K_0402_5% PCH_BEEP PCH_WLAN_OFF# G1 RC112 10K_0402_5% @ {40} PCH_BT_OFF# QC19A G2 PCH_BT_OFF#_Q {40} CMOS_ON# PJT138K_SOT363-6 D C G S @ PJA138K_SOT23-3 BG24 BH24 BG25 BJ25 BG26 BH26 +1.8VS +1.8VS +1.8VS PCU_SMB_DATA V1P8S PCU_SMB_CLK V1P8S PCU_SMB_ALERT V1P8S BF27 BG27 BH28 BG28 RC966 2.2K_0402_5% @ BJ29 BG29 VGA_PWRGD_SOC PCH_WLAN_OFF#_Q PCH_BT_OFF#_Q D1 GPIO52 {19} GPIO53 {19} {22,44} QC204 PJA138K_SOT23-3 @ Description S1 GPIO52_SOC VGA_PWRGD D BH30 GPIO_S0_SC_092 BG30 GPIO_S0_SC_093 ? V1P8S V1P8S RPC8 2.2K_0404_4P2R_5% GC6@ S2 GPIO53_SOC QC21A PJT138K_SOT363-6 GC6@ B D2 Reserve for GPU QC21B PJT138K_SOT363-6 GC6@ Reserve Reserve UMA SKU Reserve Reserve GPU SKU Reserve Reserve 14’ panel Reserve Reserve 15’ panel PCH_SMB_ALERT# RPC18 USB_OC0# USB_OC1# 10K_0404_4P2R_5% 10K_0402_5% ODD_EN @ +1.8VALW RPC19 10K_0404_4P2R_5% +1.8VS +1.8VS GPIO52 GPIO53 PCH_PCI_CLK_R CC108 10P_0402_50V8-J @ RPC22 2.2K_0404_4P2R_5% RPC23 2.2K_0404_4P2R_5% 10K_0402_5% GPIO52 RC955 @ 10K_0402_5% GPIO53 RC17 @ 100K_0402_5% PXS_PWREN RC18 @ 10K_0402_5% PXS_RST# 14@ @ SOC_SERIRQ @ CC15 1U_0402_10V6-K VCCB GND EO A4 B4 PCH_SMB_DATA SERIRQ G2129TL1U_SC70-6 2 D2 SMB_DATA_S3 A {14,40} EMC CC16 1U_0402_10V6-K SERIRQ level shift need IC, not MOS for frequence 4 S2 QC20B PJT138K_SOT363-6 {44} Issued Date {14,40} Title LC Future Center Secret Data Security Classification PCB ID G1 RC98 10K_0402_5% G2 UC3 SMB_CLK_S3 QC20A PJT138K_SOT363-6 1 UMA@ RC947 2.2K_0402_5% 2 RC946 2.2K_0402_5% @ RC56 2.2K_0402_5% RC97 0_0402_5% VCCA D1 2 RC96 0_0402_5% RC57 2.2K_0402_5% 0610 RC954 S1 PCH_SMB_CLK Reserve for NV GPU +1.8VS @ PCB_ID0 PCB_ID1 PCB_ID2 PCB_ID3 A +3VS +1.8VS @ @ RC945 2.2K_0402_5% 2 1K_0402_1% ICLK_USB_TERMN_0 1K_0402_1% ICLK_USB_TERMN_1 0_0402_5% USB_PLL_MON 15@ RC944 2.2K_0402_5% 1 OPT@ RC55 2.2K_0402_5% RC105 RC106 RC108 RC54 2.2K_0402_5% 2 GC6@ +3VS RC964 4 +3VS PCH_CMOS_ON#_Q BH22 BG23 S +1.8VALW {33} QC18 QC19B PJT138K_SOT363-6 {43} G 210K_0402_5% 3 +3VS {12} PCH_WLAN_OFF#_Q USB_HSIC0_DATA USB_HSIC0_STROBE PCB_ID3 +3VS RC115 10K_0402_5% USB_RCOMPO USB_RCOMPI LPC_RCOMP ILB_LPC_AD_00 ILB_LPC_AD_11 ILB_LPC_AD_22 ILB_LPC_AD_33 ILB_LPC_FRAME ILB_LPC_CLK_00 ILB_LPC_CLK_11 ILB_LPC_CLKRUN ILB_LPC_SERIRQ +3VS H5 H4 RESERVED_H5 RESERVED_H4 ICLK_USB_TERM_1 USB_OC_00 USB_OC_11 ICLK_USB_TERMN_D10 ICLK_USB_TERMN +1.8VS RC120 2 2 H8 H7 RESERVED_H8 RESERVED_H7 @ PCB_ID2 PCB_ID1 2 USB_DP3 USB_DN3 OF 13 PCB_ID0 USB_DP2 USB_DN2 BAY-TRAIL-M-SOC_FCBGA1170 REV = 1.15 B S B4 B5 C QC201 2N7002KW_SOT323-3 @ G1 M13 USB_PLL_MON D G CC107 1U_0402_10V6-K @ G2 45.3_0402_1% @ RC170 0_0402_5% VGA_GATE# {44} RC113 D D6 C7 USBRBIAS {41} {41} USB_DP1 USB_DN1 D2 USB_RCOMP Width 20Mil Space 15Mil Length 500Mil C20 B20 USB_OC0# USB_OC1# USB_OC0# USB_OC1# USB30_TX_P1 USB30_TX_N1 {21,58} OPT@ QC4 PJA138K_SOT23-3 OPT@ LEFT USB (3.0) S2 ICLK_USB_TERMN_0 D10 ICLK_USB_TERMN_1 F10 {41} {45} USB30_TX_P1 USB30_TX_N1 {41} {41} PXS_PWREN QC8 PJA138K_SOT23-3 {19} USB Hub K10 H10 K6 K7 USB3_TXP0 USB3_TXN0 USB30_RX_P1 USB30_RX_N1 PXS_RST# K12 J12 USB20_P3 USB20_N3 PXS_RST#_SOC USB30_RX_P1 USB30_RX_N1 PXS_PWREN_SOC USB20_P2 USB20_N2 USB20_P3 USB20_N3 RC948 10K_0402_5% OPT@ D1 USB20_P2 USB20_N2 {16} {16} D4 E3 USB3_RXP0 USB3_RXN0 USB_DP0 USB_DN0 1.24K_0402_1% M4 M6 RESERVED_M4 RESERVED_M6 V1P8A V1P8A V1P8A V1P8A RC110 USB3_P1_REXT P10 P12 S1 {41} {41} RESERVED_M7 USB3_REXT0 RESERVED_P10 RESERVED_P12 RC971 2.2K_0402_5% OPT@ RC956 10K_0402_5% OPT@ RC970 2.2K_0402_5% OPT@ LEFT USB (2.0) RIGHT USB (2.0) M7 M12 J14 G14 GPIO_S5_40 GPIO_S5_41 GPIO_S5_42 GPIO_S5_43 +1.8VS P7 P6 D M16 K16 USB20_P0 USB20_N0 RESERVED_P7 RESERVED_P6 S USB20_P1 USB20_N1 USB20_P0 USB20_N0 V1P8A V1P8A V1P8A V1P8A V1P8A V1P8A V1P8A V1P8A +3VS D USB20_P1 USB20_N1 {45} {45} GPIO_S5_32 GPIO_S5_33 GPIO_S5_34 GPIO_S5_35 GPIO_S5_36 GPIO_S5_37 GPIO_S5_38 GPIO_S5_39 M10 M9 S {41} {41} LEFT USB (3.0) RESERVED_M10 RESERVED_M9 G J3 P3 H3 B12 PCB_ID0 PCB_ID1 PCB_ID2 PCB_ID3 D V1P8A G M3 L1 K2 K3 M2 N3 P2 L3 PCH_CMOS_ON#_Q ODD_EN ODD_EN +3VS GPIO_S5_31 {42} +1.8VS G2 ? VLV_M_D UC1F 2013/03/26 Deciphered Date SOC (USB&LPC&SMB) 2013/02/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Size Document Number Custom Date: Rev 0.2 ACLU9 Monday, December 23, 2013 Sheet of 59 ? VLV_M_D UC1G +1.35V +CPU_CORE RC131 100_0402_1% {59} {59} {59} VCC_SENSE +GFX_CORE D VCC_AXG_SENSE VSS_SENSE RC132 100_0402_1% P28 BB8 N28 DRAM_VDD_S4_CLK AD38 AF38 A48 AK38 AM38 AV41 AV42 BB46 VCC_SENSE VCC_AXG_SENSE VSS_SENSE +1.35V RC130 100_0402_1% VCC_SENSE VCC_AXG_SENSE VSS_SENSE CORE_VCC_SENSE_P28 UNCORE_VNN_SENSE CORE_VSS_SENSE_N28 DRAM_VDD_S4_BD49 DRAM_VDD_S4_BD52 DRAM_VDD_S4_BD53 DRAM_VDD_S4_BF44 DRAM_VDD_S4_BG51 DRAM_VDD_S4_BJ48 DRAM_VDD_S4_C51 DRAM_VDD_S4_D44 DRAM_VDD_S4_F49 DRAM_VDD_S4_F52 DRAM_VDD_S4_F53 DRAM_VDD_S4_H46 DRAM_VDD_S4_M41 DRAM_VDD_S4_M42 DRAM_VDD_S4_V38 DRAM_VDD_S4_Y38 +1.35V RC129 0_0603_5% DRAM_VDD_S4_AD38 DRAM_VDD_S4_AF38 DRAM_VDD_S4 DRAM_VDD_S4_AK38 DRAM_VDD_S4_AM38 DRAM_VDD_S4_AV41 DRAM_VDD_S4_AV42 DRAM_VDD_S4_BB46 +CPU_CORE AA27 AA29 AA30 AC27 AC29 AC30 AD27 AD29 AD30 AF27 AF29 AG27 AG29 AG30 P26 P27 U27 U29 V27 V29 V30 Y27 Y29 Y30 AF30 CORE_VCC_S0IX_AA27 CORE_VCC_S0IX_AA29 CORE_VCC_S0IX_AA30 CORE_VCC_S0IX_AC27 CORE_VCC_S0IX_AC29 CORE_VCC_S0IX_AC30 CORE_VCC_S0IX_AD27 CORE_VCC_S0IX_AD29 CORE_VCC_S0IX_AD30 CORE_VCC_S0IX_AF27 CORE_VCC_S0IX_AF29 CORE_VCC_S0IX_AG27 CORE_VCC_S0IX_AG29 CORE_VCC_S0IX_AG30 CORE_VCC_S0IX_P26 CORE_VCC_S0IX_P27 CORE_VCC_S0IX_U27 CORE_VCC_S0IX_U29 CORE_VCC_S0IX_V27 CORE_VCC_S0IX_V29 CORE_VCC_S0IX_V30 CORE_VCC_S0IX_Y27 CORE_VCC_S0IX_Y29 CORE_VCC_S0IX_Y30 0402 0402 0402 0402 +CPU_CORE 12 A TP_CORE_V1P05_S4 TP2_CORE_VCC_S0IX 10uF SE00000UD8J 4.7uF SE00000SO0J 2.2uF SE00000888J 1uF SE000000K0J OF 13 1 1 AA22 C CAD NOTE:FOR PIN AD38 AND AF38 DRAM_VDD_S4_CLK Vienna is 0402 1uF AA24 AC22 AC24 AD22 AD24 AF22 AF24 AG22 AG24 AJ22 AJ24 AK22 AK24 AK25 AK27 AK29 AK30 AK32 AM22 ? CC22 10U_0603_6.3V6M D +GFX_CORE UNCORE_VNN_S3_AA24 UNCORE_VNN_S3_AC22 UNCORE_VNN_S3_AC24 UNCORE_VNN_S3_AD22 UNCORE_VNN_S3_AD24 UNCORE_VNN_S3_AF22 UNCORE_VNN_S3_AF24 UNCORE_VNN_S3_AG22 UNCORE_VNN_S3_AG24 UNCORE_VNN_S3_AJ22 UNCORE_VNN_S3_AJ24 UNCORE_VNN_S3_AK22 UNCORE_VNN_S3_AK24 UNCORE_VNN_S3_AK25 UNCORE_VNN_S3_AK27 UNCORE_VNN_S3_AK29 UNCORE_VNN_S3_AK30 UNCORE_VNN_S3_AK32 UNCORE_VNN_S3_AM22 BAY-TRAIL-M-SOC_FCBGA1170 REV = 1.15 @ C BD49 BD52 BD53 BF44 BG51 BJ48 C51 D44 F49 F52 F53 H46 M41 M42 V38 Y38 CC20 1U_0402_10V6-K CD@ CC21 1U_0402_6.3V6K SE000000K0J CC23 CC24 CC25 CC26 4.7U_0402_6.3V6M 4.7U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M CD@ 2 2 +1.35V 1.25 A +CPU_CORE 1 CC35 22U_0805_6.3V6M CD@ CC36 22U_0805_6.3V6M 2 CC37 22U_0805_6.3V6M CD@ 2 CC109 33P_0402_50V8J B @ For CC27 2.2U_0402_6.3V6M CC28 2.2U_0402_6.3V6M CC32 2.2U_0402_6.3V6M CC29 2.2U_0402_6.3V6M CD@ CC31 33P_0402_50V8J @ CC30 1U_0402_10V6-K CC33 1U_0402_10V6-K 2 For RF CC34 33P_0402_50V8J @ B For RF RF request +GFX_CORE CC40 1U_0402_6.3V6K 2 CC39 1U_0402_6.3V6K CD@ CC110 1U_0402_6.3V6K 2 CC38 33P_0402_50V8J @ For RF request +GFX_CORE 14 A A CC41 10U_0603_6.3V6M Vienna is 0402 10uF CC42 1U_0402_6.3V6K CD@ CC43 10U_0603_6.3V6M A SE00000UD8J Issued Date Title LC Future Center Secret Data Security Classification 2013/03/26 Deciphered Date SOC (Power) 2013/02/01 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D C DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Date: Document Number Rev 0.2 ACLU9 Monday, December 23, 2013 Sheet of 59 +1.0VS_SOC +1.35VS_SOC D +1.0VS_SOC +1.0VS_SOC +1.05VS +1.0VS_SOC +1.0VS_SOC +1.0VS_SOC +1.0VALW_UNCORE_G3 实际是1.05VS +1.05VS_CORE_S3 +1.05VS_CORE_S3 +1.35VS_SOC SVID_V1P0_S3_V32 VGA_V1P0_S3_BJ6 DRAM_V1P0_S0IX_AD35 DRAM_V1P0_S0IX_AF35 DRAM_V1P0_S0IX_AF36 DRAM_V1P0_S0IX_AA36 DRAM_V1P0_S0IX_AJ36 DRAM_V1P0_S0IX_AK35 DRAM_V1P0_S0IX_AK36 DRAM_V1P0_S0IX_Y35 DRAM_V1P0_S0IX_Y36 DDI_V1P0_S0IX_AK19 DDI_V1P0_S0IX_AK21 DDI_V1P0_S0IX_AJ18 DDI_V1P0_S0IX_AM16 +1.0VALW_UNCORE_G3 UNCORE_V1P0_G3_U22 +1.0VALW_UNCORE_G3 UNCORE_V1P0_G3_V22 UNCORE_V1P0_S0IX_AN30 VIS_V1P0_S0IX_AN29 UNCORE_V1P0_S0IX_AN29 VIS_V1P0_S0IX_AN30 UNCORE_V1P0_S3_AF16 UNCORE_V1P0_S3_AF18 UNCORE_V1P0_S3_Y18 UNCORE_V1P0_S3_G1 PCIE_V1P0_S3_AM21 PCIE_V1P0_S3_AN21 AN18 AN19 AA33 AF21 AG21 V24 Y22 Y24 M14 U18 U19 AN25 Y19 C3 C5 B6 AC32 Y32 U36 AA25 AG32 V36 BD1 AF19 AG19 AJ19 +1.05VS_CORE_S3 VGA_V1P35_S3 PCIE_GBE_SATA_V1P0_S3_AN18 SATA_V1P0_S3_AN19 CORE_V1P05_S3_AA33 UNCORE_V1P0_S0IX_AF21 UNCORE_V1P0_S0IX_AG21 UNCORE_V1P0_S0IX_V24 VIS_V1P0_S0IX_V24 UNCORE_V1P0_S0IX_Y22 VIS_V1P0_S0IX_Y22 UNCORE_V1P0_S0IX_Y24 VIS_V1P0_S0IX_Y24 USB_V1P0_S3_M14 USB_V1P0_S3_U18 USB_V1P0_S3_U19 GPIO_V1P0_S3_AN25 +1.0VALW_UNCORE_G3 USB3_V1P0_G3_Y19 +1.0VALW_UNCORE_G3 USB3_V1P0_G3_C3 UNCORE_V1P0_G3_C5 UNCORE_V1P0_G3_B6 CORE_V1P05_S3_AC32 CORE_V1P0_S3_AC32 CORE_V1P05_S3_Y32 CORE_V1P0_S3_Y32 UNCORE_V1P35_S0IX_F4_U36 UNCORE_V1P35_S0IX_F5_AA25 UNCORE_V1P35_S0IX_F2_AG32 UNCORE_V1P35_S0IX_F3_V36 VGA_V1P35_S3_F1_BD1 UNCORE_V1P35_S0IX_F6 UNCORE_V1P35_S0IX_F1_AG19 ICLK_V1P35_S3_F1_AJ19 AG18 AN16 U16 +1.8VS_UNCORE_S3 DRAM_V1P35_S0IX_F1_AD36 HDA_LPE_V1P5V1P8_S3_AM32 UNCORE_V1P8_S3_AM30 UNCORE_V1P8_S3_AN32 LPC_V1P8V3P3_S3_AM27 UNCORE_V1P8_G3_U24 USB_V3P3_G3_N18 USB_V3P3_G3_P18 UNCORE_V1P8_S3_U38 VGA_V3P3_S3_AN24 PCU_V1P8_G3_V25 PCU_V3P3_G3_N22 SD3_V1P8V3P3_S3_AN27 VSS_AD16 VSS_AD18 USB_HSIC_V1P2_G3_V18 UNCORE_V1P8_G3_AA18 RTC_VCC_P22 USB_V1P8_G3_N20 PMU_V1P8_G3_U25 CORE_V1P05_S3_AF33 CORE_V1P05_S3_AG33 CORE_V1P05_S3_AG35 CORE_V1P05_S3_U33 CORE_V1P05_S3_U35 CORE_V1P05_S3_V33 VSS_A3_A3 VSS_A49_A49 VSS_A5_A5 VSS_A51_A51 VSS_A52_A52 VSS_A6_A6 VSS_B2_B2 VSS_B52_B52 VSS_B53_B53 VSS_BE1_BE1 VSS_BE53_BE53 VSS_BG1_BG1 VSS_BG53_BG53 VSS_BH1_BH1 VSS_BH2_BH2 VSS_BH52_BH52 VSS_BH53_BH53 VSS_BJ2_BJ2 VSS_BJ3_BJ3 VSS_BJ5_BJ5 VSS_BJ49_BJ49 VSS_BJ51_BJ51 VSS_BJ52_BJ52 VSS_C1_C1 VSS_C53_C53 VSS_E1_E1 VSS_E53_E53 RESERVED_F1 PCIE_V1P0_S3_AK18 PCIE_V1P0_S3_AM18 ICLK_V1P35_S3 ICLK_V1P35_S3 +1.5VS_HDA_S3 ? VLV_M_D UC1H V32 BJ6 AD35 AF35 AF36 AA36 AJ36 AK35 AK36 Y35 Y36 AK19 AK21 AJ18 AM16 U22 V22 AN29 AN30 AF16 AF18 Y18 G1 AM21 AN21 VGA_V1P0_S3 ICLK_V1P35_S3_F2 VSSA_AN16 USB_VSSA_U16 OF 13 BAY-TRAIL-M-SOC_FCBGA1170 REV = 1.15 AD36 AM32 AM30 AN32 AM27 U24 N18 P18 U38 AN24 V25 N22 AN27 AD16 AD18 V18 AA18 P22 N20 U25 AF33 AG33 AG35 U33 U35 V33 A3 A49 A5 A51 A52 A6 B2 B52 B53 BE1 BE53 BG1 BG53 BH1 BH2 BH52 BH53 BJ2 BJ3 BJ5 BJ49 BJ51 BJ52 C1 C53 E1 E53 F1 AK18 AM18 +3.3VS_SOC +1.8VALW_SOC +3.3VALW_USB/PCU_G3 VSS_AD +1.0VALW_UNCORE_G3 VSS_AD VSS_AD +1.0VALW_UNCORE_G3 0531 Change to UNCORE_V1P0_G3 VCCRTC D +1.05VS +1.0VS_SOC ? @ +1.0VS_SOC C 1.9 A+850 mA 1U_0402_6.3V6K PJ1 PJ_43x79_6 CC46 CD@ +1.0VS_SOC CC47 CAD NOTE:FOR PIN AD35 AF35 CAD NOTE:FOR PIN AF36 1 CC49 1U_0402_6.3V6K CD@ CC50 1U_0402_6.3V6K CAD NOTE:FOR PINS AJ36 AK35 AK36 CC51 1U_0402_6.3V6K CAD NOTE:FOR PINS AA36 Y35 Y36 CC52 1U_0402_6.3V6K CAD NOTE:FOR PINS AK21 2 +1.05VS RC300 0_0402_5% CC53 1U_0402_6.3V6K @ 1.0 A VGA_V1P0_S3 1U_0402_6.3V6K +1.0VS 1U_0402_6.3V6K C CAD NOTE:FOR CC48 PIN BJ6 CC114 10U_0603_6.3V6M 2 CC54 1U_0402_6.3V6K CC55 1U_0402_6.3V6K +1.35VS_SOC 0603 @ CC61 CD@ 1 CC62 CC63 CC64 +1.35VS_SOC_VGA CC60 1U_0402_10V6-K RC974 2 0_0603_5% CC115 2 @ VGA_V1P35_S3 CC101 1 1U_0402_6.3V6K CC59 CD@ 1U_0402_6.3V6K 1U_0402_6.3V6K CC58 0_0603_5% @ CAD NOTE:FOR PIN BD1 CAD NOTE:FOR CAD NOTE:FOR CAD NOTE:FOR PIN U18 U19 PINS AF21 AND AG21 PINS V24 Y22 Y24 @ +1.5VS 10U_0603_6.3V6M @ CC57 22U_0805_6.3V6M 22U_0805_6.3V6M CC56 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K @ 22U_0805_6.3V6M RC301 CAD NOTE:FOR CAD NOTE:FOR CAD NOTE:FOR PINS AM16 PINS AK19 PINS AJ18 +3VS +1.5VS_HDA_S3 RC136 +3.3VS_SOC mA+25 mA RC135 10 mA 0_0603_5% 0_0603_5% CAD NOTE:FOR PIN AM27 CC116 CC66 10U_0603_6.3V6M 1U_0402_6.3V6K CD@ 2 1 CC65 1U_0402_6.3V6K CC70 @ CC71 CD@ CAD NOTE:FOR CAD NOTE:FOR PIN AN18 PIN V23 1U_0402_6.3V6K CC69 CAD NOTE:FOR PIN Y18 G1 1U_0402_6.3V6K 0.01U_0402_25V7K CC68 CAD NOTE:FOR PIN AF16 AF18 1U_0402_6.3V6K @ 1U_0402_6.3V6K CC67 1U_0402_6.3V6K 1U_0402_6.3V6K CAD NOTE:FOR PIN AM16 CAD NOTE:FOR PIN AN25 CC72 1 CC73 CC74 1U_0402_6.3V6K 2 CAD NOTE:FOR PIN AK18 AM18 CC75 1U_0402_6.3V6K CD@ +1.8VS @ +1.8VS_UNCORE_S3 RC137 +1.35VS_SOC 10 mA 0_0603_5% ICLK_V1P35_S3 RC302 0_0402_5% CAD NOTE:FOR PIN AG18 CAD NOTE:FOR CAD NOTE:FOR CAD NOTE:FOR CAD NOTE:FOR PIN U38 PIN AM30 AN32 PIN AM30 AN32 PIN AM30 AN32 CC76 CC77 CC78 CC79 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K @ @ 2 2 ICLK_V1P35_S3 CC111 1U_0402_6.3V6K B B +1.8VALW RC138 +1.8VALW_SOC 65 mA 0_0603_5% CAD NOTE:FOR +1.0VALW +1.0VALW_UNCORE_G3 RC139 325 mA CC80 1U_0402_6.3V6K CD@ PIN AA18 CC81 1U_0402_6.3V6K +1.0VALW_UNCORE_G3 0_0603_5% CAD NOTE:FOR CC82 1U_0402_6.3V6K 2 CC83 1U_0402_6.3V6K CD@ CC84 1U_0402_6.3V6K 2 CC85 1U_0402_6.3V6K CD@ CAD NOTE:FOR PINS Y19 AND C3 CC87 0.01U_0402_25V7K CD@ PIN V18 CC86 1U_0402_6.3V6K VSS_AD 0531 删除1.2VS预留 BAY TRAIL no use VCCRTC 0603 CC112 1U_0402_10V6-K +1.35VS +1.35VS_SOC RC140 375 mA+45 mA 0_0603_5% CAD NOTE:FOR CAD NOTE:FOR CAD NOTE:FOR CAD NOTE:FOR PIN AJ19 PIN V36 PIN AD36 1 PIN AA25 CC89 CC90 CC91 CC92 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 0611 2 2 CAD NOTE:FOR PIN AD36 CAD NOTE:FOR CAD NOTE:FOR PIN AG19 PIN AF19 CC102 CC94 CC95 1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K CD@ CD@ 2 +3VALW_SOC RC141 +3.3VALW_USB/PCU_G3 50 mA 0_0603_5% A CC98 10U_0603_6.3V6M CC99 22U_0805_6.3V6M CD@ CAD NOTE:FOR PIN AA25 CC100 1U_0402_6.3V6K CD@ CAD NOTE:FOR PIN U36 CC88 1U_0402_6.3V6K CD@ CAD NOTE:FOR PIN AG32 CC93 1U_0402_6.3V6K CD@ CC96 1U_0402_6.3V6K CD@ CAD NOTE:FOR PIN N18 P18 CC97 1U_0402_10V6-K A Security Classification Issued Date Title LC Future Center Secret Data 2013/03/26 Deciphered Date 2013/02/01 SOC (Power2) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Document Number Rev 0.2 ACLU9 Monday, December 23, 2013 Date: Sheet 10 of 59 ON/OFF switch +3VL K/B Connector +3VALW 15" 14" +3VS KSO0_15 KSO[0 17] {44} D15 {44} @ 100P_0402_50V8J PWR_NUM_LED C134 @ 100P_0402_50V8J KSO16 C91 @ 100P_0402_50V8J JKB2 NOVO# NOVO# PWR_CAPS_LED C133 CAPS_LED# C117 R85 0_0402_5% 100P_0402_50V8J {44} NOVO_BTN# @ ON/OFF @ NUM_LED# C118 @ 100P_0402_50V8J KSO17 C88 @ 100P_0402_50V8J KSO2 C89 @ 100P_0402_50V8J KSO1 C90 @ 100P_0402_50V8J KSO15 C92 @ 100P_0402_50V8J KSO7 C93 @ 100P_0402_50V8J KSO6 C94 @ 100P_0402_50V8J KSI2 C95 @ 100P_0402_50V8J KSO8 C96 @ 100P_0402_50V8J KSO5 C97 @ 100P_0402_50V8J KSO13 C98 @ 100P_0402_50V8J KSI3 C99 @ 100P_0402_50V8J KSO12 C100 @ 100P_0402_50V8J KSO14 C101 @ 100P_0402_50V8J CAPS_LED# PWR_CAPS_LED KSO15 KSO10 KSO11 KSO14 KSO13 KSO12 KSO3 KSO6 KSO8 KSO7 KSO4 KSO2 KSI0 KSO1 KSO5 KSI3 KSI2 KSO0 KSI5 KSI4 KSO9 KSI6 KSI7 KSI1 CAPS_LED# D BAT54CW_SOT323-3 +3VL +3VALW @ R119 ON/OFFBTN# J5 R114 100K_0402_5% 1 R111 100K_0402_5% @ 0_0402_5% ON/OFF {44} ON/OFF KSO11 C102 @ 100P_0402_50V8J KSI7 C103 @ 100P_0402_50V8J KSO10 C104 @ 100P_0402_50V8J KSI6 C105 @ 100P_0402_50V8J KSO3 C106 @ 100P_0402_50V8J KSI5 C107 @ 100P_0402_50V8J KSO4 C108 @ 100P_0402_50V8J KSI4 C109 @ 100P_0402_50V8J KSI0 C110 @ 100P_0402_50V8J KSO9 C111 @ 100P_0402_50V8J SHORT PADS J6 KSO0 C112 @ 100P_0402_50V8J KSI1 C113 @ 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 100P_0402_50V8J SHORT PADS TP_PWR @1 C116 100P_0402_50V8J C115 100P_0402_50V8J @1 2 GND1 GND2 +3VL AZC199-02S.R7G_SOT23-3 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 NUM_LED# PWR_NUM_LED CAPS_LED# PWR_CAPS_LED KSO17 KSO16 KSO15 KSO10 KSO11 KSO14 KSO13 KSO12 KSO3 KSO6 KSO8 KSO7 KSO4 KSO2 KSI0 KSO1 KSO5 KSI3 KSI2 KSO0 KSI5 KSI4 KSO9 KSI6 KSI7 KSI1 2.2U_0603_6.3V6K C119 GND1 GND2 ACES_50503-0060N-001 ME@ {41,44} USB_ON# USB_ON# GND 30 GND1 29 GND2 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 31 32 KSO5_15 KB_5 KSI4_14 KSO1_15 KB_6 KSI5_14 KSI0_15 KB_7 KSO0_14 KSO2_15 KB_8 KSI2_14 KSO4_15 KB_9 KSI3_14 KSO7_15 KB_10 KSO5_14 KSO8_15 KB_11 KSO1_14 KSO6_15 KB_12 KSI0_14 KSO3_15 D KB_13 KSO2_14 KSO12_15 KB_14 KSO4_14 KSO13_15 KB_15 KSO7_14 KSO14_15 KB_16 KSO8_14 KSO11_14 KB_17 KSO6_14 KSO10_15 KB_18 KSO3_14 KSO15_15 KB_19 KSO12_14 KSO16_15 KB_20 KSO13_14 KSO17_15 KB_21 KSO14_14 KB_LED_PWR_15 KB_22 KSO11_14 CAPS_LED#_15 KB_23 KSO10_14 VDD_15 KB_24 KSO15_14 NUM_LED#_15 C VIN1 VOUT2 VIN2 VOUT1 EN/EN +USB_VCCB FLAG {8} {8} USB_OC1# AP2820CMMTR-G1_MSOP8 USB_OC1# R67 R66 USB20_P0 USB20_N0 1 0_0402_5% USB20_P0_CONN 0_0402_5% USB20_N0_CONN {8} {16} {16} C120 1000P_0402_50V7K @ HUB_USB20_P2 HUB_USB20_N2 {43} {43} @ HP_OUTR HP_OUTL {44} LID_SW# JUSB3 +3VS VOUT3 Low Active 2A 2 @ For EMC {43} RING2_CONN {43} RING3_CONN {43} PLUG_IN HP_OUTR HP_OUTL RING2_CONN RING3_CONN PLUG_IN 18 17 16 15 14 13 12 11 10 18 G2 17 G1 16 15 14 13 12 11 10 20 19 ACES_50505-0184N-P01 ME@ TP_P6 B L14 USB20_P0 USB20_N0 D19 2 1 ON/OFFBTN# AZ5215-01F_DFN1006P2E2 @ AZ5215-01F_DFN1006P2E2 1 D18 DT5 2 EVQPLHA15_4P A GND1 A1 B1 B GND2 For 14" 1 AZ5215-01F_DFN1006P2E2 1 EVQPLHA15_4P 2 A GND1 A1 B1 B GND2 1 2 A1 GND1 GND2 B1 EVQPLHA15_4P Change to same as ACLUA 15@ @ A B 14@ TP-R TP-R SW4 DT4 SW3 TP-L D17 DT3 TP_RIGHT Button TP_P6 GND 5 TP-L A1 GND @ TP_P5 NOVO_BTN# GND1 15@ TP_RIGHT Button GND2 DAT B1 EVQPLHA15_4P DAT CLK CLK SW2 DT2 NOVO_BTN# ON/OFFBTN# LID_SW# TP_LEFT Button TP_P5 AZ5215-01F_DFN1006P2E2 AZ5215-01F_DFN1006P2E2 B A 14@ VDD B For 15" NUM_LED# +USB_VCCB U3 JPWRB1 AZ5215-01F_DFN1006P2E2 VDD +5VALW For EMC AZ5215-01F_DFN1006P2E2 For 14" {44} Right Side USB2.0 Port X (USB/B) @ TP_P4 SW1 KSI3_15 USB I/O Connector ACES_50503-0060N-001 ME@ TP_LEFT Button KSI2_15 KB_3 KSI6_14 KB_4 KSO9_14 DT1 TP_CLK TP_DATA TP_P4 TP_P5 TP_P6 TP_CLK TP_DATA C114 1U_0402_10V6-K 1 KB_2 KSI7_14 JKB1 PWR/B Connector JTP1 {44} {44} R90 300_0402_5% 15@ ACES_50504-3041-001 ME@ TP_CLK TP_DATA @ R160 0_0402_5% R141 0_0402_5% R84 300_0402_5% 27 28 For EMC +5VS +3VS GND1 GND2 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 15" ACES_88514-02601-071 ME@ TP/B Connector C KSO[0 17] 14" {44} KSI[0 7] 1 @ R83 100K_0402_5% 2 KB_1 KSI1_14 KSI[0 7] R82 100K_0402_5% @ @ USB20_P0_CONN USB20_N0_CONN CMM21T-900M-N_4P For 15" LED {44} PWR_LED# PWR_LED# LED1 14@ R142 1.5K_0402_5% +5VALW R143 470_0402_5% +3VALW LTW-C193TS5 LED4 15@ LTW-C193TS5 {44} BATT_LOW_LED# BATT_LOW_LED# LED2 14@ LTST-C193KFKT-LC A A LED5 15@ LTST-C193KFKT-LC {44} BATT_CHG_LED# BATT_CHG_LED# LED3 14@ R144 1.5K_0402_5% +5VALW LTW-C193TS5 Issued Date 15@ Title LC Future Center Secret Data Security Classification LED6 2013/08/08 Deciphered Date 2013/08/05 KBD/PWR/IO/LED/TP Conn THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Monday, December 23, 2013 Date: LTW-C193TS5 Rev 0.2 ACLU9 Sheet 45 of 59 A B C +3VALW to +3VS AP4800BGM VGS=10V, ID=9A, Rds=18m ohm VGS=+-25V D E AP4800BGM VGS=10V, ID=9A, Rds=18m ohm VGS=+-25V +3VALW +5VALW +3VALW +5VS +1.35VS_SOC_VGA Q4607 +3VS Q4602 3VS_GATE C4605 0.01U_0402_25V7K S 2N7002KW_SOT323-3 1 D Q25 2N7002KDWH_SOT363-6 @ S 2N7002KW_SOT323-3 +5VLP AON6414AL VDS=30V VGS=20V, ID=50A, Rds=8mohm @ VGS=10V VGS(th)=2.5V Max {44,55,56,57} SUSP# Q10A C4602 0.01U_0402_25V7K @ D D Q10B G 5VS_GATE SUSP R269 C4603 1U_0402_10V6-K @ +1.8VALW 0601 ADD Q170B 2N7002KDWH_SOT363-6 D G D Q170A R899 330K_0402_5% 2N7002KDWH_SOT363-6 G S 2 C4608 C216 1U_0402_10V6-K 0_0402_5% {44,56} +1.8VS_PWREN# S +1.8VS_PWREN R266 VR_+1.5VS_PWRGD {56} 1 VR_+1.05VS_PWRGD G S @ 1000P_0402_50V7K C444 Q163B 2N7002KDWH_SOT363-6 1 R898 100K_0402_5% D 0_0402_5% 1000P_0402_50V7K C484 Q163A 2N7002KDWH_SOT363-6 0601 ADD @ R895 100K_0402_5% R894 100K_0402_5% 1 R897 330K_0402_5% Q30 AON6414AL_DFN8-5 1 0601 ADD @ R893 100K_0402_5% R892 100K_0402_5% R289 C214 1U_0402_10V6-K 2 +1.35VS_PWREN S +1.8VS_PWREN# D G @ +5VLP +20VSB +1.35VS_PWREN# 0601 ADD +1.35VS_PWREN# 1 R896 100K_0402_5% +5VALW Q28 AON6414AL_DFN8-5 +1.8VS +5VLP +5VALW +20VSB AON6414AL VDS=30V VGS=20V, ID=50A, Rds=8mohm @ VGS=10V VGS(th)=2.5V Max +1.35VS AON6414AL VDS=30V VGS=20V, ID=50A, Rds=8mohm @ VGS=10V VGS(th)=2.5V Max 0_0402_5% S 2N7002KDWH_SOT363-6 S +1.35V G 2N7002KDWH_SOT363-6 2 for 8s reset SOC off power C219 1U_0402_10V6-K @ 2 1 PCH_PWR_EN#_R 1 1000P_0402_50V7K C446 1 C4601 1U_0402_10V6-K @ S 2N7002KW_SOT323-3 G G R159 47_0603_5% @ SUSP SUSP R166 100K_0402_5% +1.0VS Q4606 AON6414AL_DFN8-5 2 Q26 D {34} Id=3.2A +0.675VS D R163 100K_0402_5% @ JUMP_43X79 S Q27 1U_0402_10V6-K C4607 @ R162 100K_0402_5% 100K_0402_5% PCH_PWR_EN# PCH_PWR_EN CC117 1 LP2301ALT1G_SOT23-3 PCH_PWR_EN @ 2N7002KDWH_SOT363-6 R161 100K_0402_5% {44,52,56,57} 16.5K_0402_1% R4607 24K_0402_1% {44} EC_3VSPWREN +5VALW @ J7 R164 +3VALW_SOC +3VALW FB 0_0402_5% G G S S Q24B D D +1.0VALW +5VALW PCH_PWR_EN#_R +20VSB +3VS_PWREN# G 2 Q24A R4601 820K_0402_5% @ EN R4606 1U_0402_10V6-K VR_+1.05VS_PWRGD 470K_0402_5% @ GND SY8089AAAC_SOT23-5 R156 0_0402_5% G R4608 R158 3VS_GATE_R D SUSP 2N7002KW_SOT323-3 +20VSB Q23 G IN Vout=0.8(1+R4606/R4607) +3VS_PWREN# 150K_0402_5% S @ R4604 100K_0402_5% R4605 100K_0402_5% LX R152 @ 470_0603_5% @ 2 C130 1U_0603_25V6M 2 @ D Q22 R165 820K_0402_5% @ AP4800BGM-HF_SO-8 R155 5VS_GATE 82K_0402_1% C131 0.01U_0402_25V7K C127 10U_0603_6.3V6M 2 R154 5VS_GATE_R 1 C129 10U_0805_25V6K @ R151 470_0603_5% @ +5VLP C126 1U_0603_25V6M +5VALW 1 @ @ AP4800BGM-HF_SO-8 C125 10U_0805_25V6K C128 10U_0805_25V6K @ C4606 4.7U_0603_6.3V6K 3 Q4601 4.7U_0603_6.3V6K +5VALW to +5VS 3 Issued Date Title LC Future Center Secret Data Security Classification 2013/08/08 Deciphered Date DC V TO VS INTERFACE 2013/08/05 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Document Number Size Custom Date: Rev 0.2 ACLU9 Monday, December 23, 2013 Sheet 46 59 of 4 A B C D E V B+ BATT B5 D Q26,+3VALW_SOC VR_+1.0VALW_PWRGD +3VALW +3VALW_SOC V V V V BATT MODE A4 PU401 V PU301 A2 PCH_PWR_EN# V V V VIN B1 PCH_RSMRST# EC PBTN_OUT# SOC EC_ON other Device B4 V PM_SLP_S3# PM_SLP_S4# 14 PLTRST# DDR_CORE_PWROK C 13 SYS_PWROK V B3 ON/OFF 15 V V A3 V A1 V AC MODE A2 +3VLP V B2 D V C V NOVO SYSON V VR_REDY (DIS) V Vb 11 +1.35V PU501 +VGA_CORE PU909 V PXS_PWREN DGPU_PWROK V V +1.05VGS PU702 V +3VG_AON QV11 V VR_+1.05VS_PWRGD PU501 +0.675V V B VGA VR_+1.5VS_PWRGD V 12 V EC_3VSPWREN PU602 +1.5VS V PU603 +1.05VS Q28 +1.35VS +1.35VGS QV14 V V Q4606 +1.0VS Va (DIS) V SUSP# Q4601 +5VS V B V V VR_ON V 10 PU901 +CPU_CORE V PXS_PWREN Q4602 +3VS Q30 +1.8VS A A Issued Date Title LC Future Center Secret Data Security Classification 2013/08/08 2013/08/05 Deciphered Date Power sequence Block THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Monday, December 23, 2013 Date: Rev 0.2 ACLU9 Sheet 47 of 59 D D C C B B A A Issued Date Title LC Future Center Secret Data Security Classification 2013/08/08 Deciphered Date Virtual symbol 2013/08/05 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Date: Document Number Rev 0.2 ACLU9 Monday, December 23, 2013 Sheet 48 of 59 H6 HOLEA H7 HOLEA H8 HOLEA PAD_SHAPET5P0X6P0B7P0D2P3 pad_SHT7P0X7P05BR10P65X10P3D2P8 Pad_ct8p0b9p0d2p8 H9 HOLEA H11 HOLEA H10 HOLEA Pad_ct8p0b9p0d2p8 pad_shapet8p8x8p0cb9p0d2p8 H12 HOLEA 1 1 H5 HOLEA H4 HOLEA 1 D H3 HOLEA pad_c2p3d2p3n H2 HOLEA pad_o2p3x2p8d2p3x2p8n H1 HOLEA pad_o2p3x2p8d2p3x2p8n pad_c2p3d2p3n NH5 HOLEA D NH4 HOLEA NH3 HOLEA NH1 HOLEA pad_shapet8p8x8p0cb9p0d2p8 pad_ct6p0d4p3 PAD_CT6P5B5P0D4P0 PAD_CT6P5B5P0D4P0 PAD_CT6P5B5P0D4P0 Pad_ct6p0b8p0d4p6 PAD_CT6P5B5P0D4P0 H22 HOLEA H23 HOLEA H21 HOLEA H20 HOLEA H19 HOLEA H18 HOLEA H17 HOLEA H16 HOLEA 1 H15 HOLEA H14 HOLEA H13 HOLEA C C CHASSIS1_GND pad_cb8p0d7p0 pad_ct6p0shapeb8p0x6p75d2p3 PAD_CT6P0shapeb10p04x10p0d2p8 pad_ct6p0b7p0d2p3 pad_shapet6p8x8p0cb8p0d2p5 PAD_ShapeT5P0X6P0-D PAD_shapeT5P0X6P0-U pad_ct5p5b6p0d3p3 pad_ct3p8b6p0d3p3 pad_ct5p5b6p0d3p3 pad_ct5p5b8p0d2p5 B+ 1 1 1 1 1 1 1 1 GP8 PAD_RT2P65X2P2 @ @ @ @ @ 2 @ B +3VS +3VALW +5VALW +3VALW C137 FFC CONN GROUND PAD 1 GP12 PAD_RT2P45X2P5 @ GP11 PAD_RT2P45X2P5 @ 1 GP10 PAD_RT2P21X2P99 @ @ +VGA_CORE GP9 PAD_RT2P21X2P99 @ 0.1U_0402_25V6 GP7 PAD_RT2P65X2P2 @ C4906 0.1U_0402_25V6 GP6 PAD_RT2P65X2P2 @ C4905 0.1U_0402_25V6 GP5 PAD_RT2P65X2P2 @ C4904 0.1U_0402_25V6 GP4 PAD_RT2P65X2P2 @ C4903 0.1U_0402_25V6 GP3 PAD_RT2P65X2P2 @ C4902 0.1U_0402_25V6 B GP2 PAD_RT2P65X2P2 @ C4901 GP1 PAD_RT2P65X2P2 @ C135 1U_0402_10V6-K @ C136 +3VS @ 1U_0402_10V6-K +GFX_CORE C138 1U_0402_10V6-K @ 2 1U_0402_10V6-K C251 @ 1U_0402_10V6-K +3VS C252 PCB Fedical Mark PAD FD1 FD2 FD3 FD4 For EMC FD5 1 1 Issued Date 1U_0402_10V6-K A Title LC Future Center Secret Data 2013/08/08 Deciphered Date Hole 2013/08/05 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Date: @ FD6 Security Classification A +1.35V Document Number Rev 0.2 ACLU9 Monday, December 23, 2013 Sheet 49 of 59 B+ Silergy SY8208CQNC Converter FOR SYSTEM D Adaptor EC_ON EN Silergy SY8032LDBC DFN10_3X3 Switch Mode +5VALW/6A PGOOD ALW_PWRGD +3VLP/ 100mA ANPEC APL5930AQBI-TRG TDFN10_3X3 Switch Mode +3VALW/ 5A PGOOD ALW_PWRGD SYSON S5 SUSP# S3 TI TPS51716RUKR WQFN20_3X3 Switch Mode FOR DDR PGOOD EN +1.35V/10A Silergy SY8032ABC SOT23-6 Switch Mode +0.675VS/2A PGOOD C +1.05VSP_VGA/2A FOR VDDR PGOOD EN PAGE 46 VR_ON SMBus +1.5VSP/1A FOR VDDR SUSP# TI BQ24737RGRR Battery Charger Switch Mode +1.0VALW/2.5A PGOOD EN PAGE 39 C D FOR VDDR SUSP# Silergy SY8206BQNC Converter FOR SYSTEM EN +5VLP/ 100mA PAGE 39 EC_ON EN Onsemi NCP6132AMNR2G QFN60_7X7 Switch Mode FOR CPU Core PGOOD PGOOD_NB CPU Core/12A Silergy SY8089AAC SOT23-5 Switch Mode GFX Core/14A VGATE +1.8VALW/1A FOR VDDR PGOOD EN B Battery Li-ion 4S1P/41WH VIDs NVDD_PWR_EN EN Onsemi NCP81172MNTWG QFN24_4X4 Switch Mode FOR GPU VDDC PGOOD Silergy SY8032ABC SOT23-6 Switch Mode +VGA_CORE/31A B +1.05VS/2A FOR VDDR EN VGA_PWRGD PGOOD A A Issued Date Title LC Future Center Secret Data Security Classification 2013/08/08 Deciphered Date 2013/08/05 Power Diagram THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Monday, December 23, 2013 Date: Rev 0.2 ACLU9 Sheet 50 of 59 +3VL VCCRTC VIN RTC_VCC PD101 RB751V-40_SOD323-2 PJ101 ACES_50299-00501-003 ME@ @ @ 1 JUMP_43X118 1 {44,53} PC102 7A_24VDC_429007.WRML ADAPTER_ID 2 APDIN1 PC104 1000P_0402_50V7K PC103 1 470P_0402_50V7K APDIN D PF101 PC101 1000P_0402_50V7K 470P_0402_50V7K JDCIN1 JRTC1 PR101 1 PD102 BAT_D 1K_0603_5% @ change to 1K FDK_ML1220-TT28 D RB751V-40_SOD323-2 SD01310018J @ RTC_VCC 20MIL +3VALW 20MIL VCCRTC 20MIL BAT_D 20MIL {53} 737_ACP 737_ACN {53} @ PC105 +1.05VS +1.05VS PC109 @ EN TMER 2 PR108 375K for 124K for 15uS 5uS @ PR106 @ RT9553AGQW_WDFN10_3X3 PR114 124K_0402_1% @ +3VALW H_PROCHOT# @ 1 PQ101 PR113 10K_0402_5% @ PR112 10K_0402_1% @ 0.1U_0402_25V6 UVSET 0_0402_5% +3VALW 24K_0402_1% @ PR110 10K_0402_1% @ +3VALW 2.94K_0402_1% PR109 10K_0402_1% @ set OVP UVP 9V 35.7K_0402_1% ILIM PR104 @ OVSET 11 RESET VCC H_PROCHOT# 2 +3VALW CSP PR103 10K_0402_5% 2 PR102 10K_0402_5% @{6,44,52} CSN PROCHOT# GND @ @ PR111 30K_0402_1% D G 2N7002KW_SOT323-3 B EC_ADAPTER PR107 @ {44} PU101 @ PC108 0.1U_0402_25V6 PC106 0.1U_0402_25V6 @ 10 0.1U_0402_25V6 @ PR105 0_0402_5% PC107 1 0.1U_0402_25V6 +5VALW C C S 45W current limit 2.8A 65W current limit 3.6A B @ New solution need verify in SDV This solution will reverse in next phase A A Issued Date Title LC Future Center Secret Data Security Classification 2013/08/08 2013/08/05 Deciphered Date DCIN / RTC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Monday, December 23, 2013 Date: Rev 0.2 ACLU9 Sheet 51 of 59 VMB2 VMB JBATT1 PL201 C8BBPH403025-1TAPING_2P BATT+ PC201 1000P_0402_50V7K PC202 0.01U_0402_25V7K 2 For KB930 > Keep PU1 circuit (Vth = 0.825V) For KB9012 (Red square) > Remove PU201 circuit, but keep PR206 PH201, PR205,PR211,PQ201,PR208,PR212 PH201 under CPU botten side : CPU thermal protection at 92+-3 degree C Recovery at 56 +-3 degree C +5VLP +3VL @ {44,53} A/D G S @ PR214 1 ADP_OCP_2 MAINPWON PR207 10K_0402_1% PH201 @ PR209 57.6K_0402_1% @ 1 Turbo_V_1 BATT_TEMP OTP_N_003 2ADP_OCP_1 PQ201 2N7002KW_SOT323-3 PR213 10K_0402_5% G718TM1U_SOT23-8 BATT_TEMP_IN OT2 RHYST2 OTP_N_002 @ 100K_0402_1%_NCP15WF104F03RC @ D NTC_V_1 PR212 0_0402_5% +3VALW OT1 TMSNS2 100K_0402_1% 1 PR206 100K_0402_1% @ H_PROCHOT# {6,44,51} GND RHYST1 {44,53} PR208 VCC TMSNS1 EC_SMB_DA1 PR211 10K_0402_1% PR205 21.5K_0402_1% @ PU201 {44,53} PR204 13.7K_0402_1% 1 PR203 4.42K_0402_1% @ +3VS EC_SMB_CK1 D ADP_I 2 {44,53} PC203 0.1U_0402_25V6 @ PR210 0_0402_5% SUYIN_200082GR007G232ZR PR202 100_0402_1% 1 EC_SMCA EC_SMDA D PF201 8A_24V_F1206HI8000V024T 2 PR201 100_0402_1% 1 GND1 GND2 @ {44} {44} 0_0402_5% @ C NTC_V PROCHOT# {44} Turbo_V 0_0402_5% PR215 {44} C +3VALW VMB2 +5VALW +3VALW UVP_1 1 PR352 1M_0402_5% P 2N7002KDWH_SOT363-6 PR232 VSBP_2 @ PJ201 JUMP_43X39 2 +20VSB PC208 0.1U_0402_25V6 PC207 0.22U_0603_25V7K {53} 1 VSBP_3 22K_0402_1% @ ALW_PWRGD {44,46,56,57} PCH_PWR_EN 2N7002KDWH_SOT363-6 S PR234 0_0402_5% PQ204 D VSBP_1 G {54} PR236 100K_0402_1% 2 BATT_LEN# S B PQ203B 2N7002KDWH_SOT363-6 PR238 PQ203A 10K_0402_1% D 2 G {44} PQ205 2N7002KW_SOT323-3 G S AS393MTR-G1_SO8 100K_0402_1% PR235 +3VL @ @ G -_1 D BATT_OUT Use BATT_TEMP to implement BATT_OUT function, New solution need verify in SDV,maybe can reverse in next phase S AS393MTR-G1_SO8 PR353 1M_0402_5% B+ PR239 100K_0402_1% -_2 VIN PR228 100K_0402_1% 2 2 G D @ +3VALW A PR237 1K_0402_1% S 2N7002KW_SOT323-3 A Title LC Future Center Secret Data Security Classification Issued Date PC210 1U_0402_6.3V6K @ O1 D O2 +_1 PR224 430K_0402_1% @ PC205 220P_0402_50V7K 1 PR223 180K_0402_1% 2 @ PU202B +_2 @ PR225 0_0603_5% +VSBP @ PQ210 TP0610K-T1-E3_SOT23-3 100K_0402_1% PR227 1 PR233 49.9K_0402_1% PU202A P G PR231 10K_0402_1% @ PQ202A +3VALW PR226 100K_0402_1% 2 @ PR230 10M_0402_5% PR229 280K_0402_1% @ PC209 0.1U_0402_25V6 +3VALW 20K_0402_1% B +5VALW G S PR222 @ PQ202B 2N7002KDWH_SOT363-6 @ D 1.78M_0402_1% 12.5V @ PC204 0.1U_0402_25V6 H_PROCHOT# G 2 @ PR221 @ AZ5215-01F_DFN1006P2E2 PC206 0.01U_0402_25V7K @ PR219 430K_0402_1% PD202 SUYIN_200082GR007G232ZR VMB2 @ PR217 221K_0402_1% 1 Reverse PD305 For EMI request PR220 499K_0402_1% 1 VMB2 EC_SMCA EC_SMDA BATT_TEMP_IN +5VALW @ PR216 10K_0402_1% PD201 AZC199-02S.R7G_SOT23-3 4 1 GND1 GND2 JBATT2 @ PR218 0_0402_5% 2013/08/08 2013/08/05 Deciphered Date BATTERY CONN/OTP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Monday, December 23, 2013 Date: Rev 0.2 ACLU9 Sheet 52 of 59 B+ PC311 PC310 P2 2 1SS355_SOD323-2 PD302 PACIN_P 59K_0402_1% PC317 737_ACDET 6 D PACIN G S PQ307A 2N7002KDWH_SOT363-6 AO4466L_SO8 14 PQ311 GND ACN ACDET CMPOUT PR313 ACP S 20 PR312 390K_0402_1% VCC PQ306B 2N7002KDWH_SOT363-6 PD303 RB751V-40_SOD323-2 PC315 0.1U_0402_25V6 PC314 1U_0603_25V6M 1 0.1U_0402_25V6 737_VCC D G PACIN_G 47K_0402_1% PR314 BTST 17 BST_CHG 2.2_0603_5% PC316 C 0.047U_0603_16V7K ACPRN ACOK REGN 16 ACOFF D 0_0402_5% PR315 737_SCL 0_0402_5% PR317 737_SDA {44,52} EC_SMB_DA1 PU301 SCL HIDRV 18 DH_CHG PR318 0.01_1206_1% BQ24737RGRR_VQFN20_3P5X3P5 SDA PR326 316K_0402_1% 1 @ DL_CHG SRP_1 13 PC321 680P_0402_50V7K @ PR320 4.7_1206_5% AO4466L_SO8 737_ILIM 100K_0402_1% PQ312 21 CHG 15 2 2N7002KDWH_SOT363-6 S PR325 0_0402_5% @ 4.7UH_PCMB063T-4R7MS_5.5A_20% 6251_SN SRP SRN PAD PR324 10_0603_5% PR322 10K_0402_5% PR323 6.8_0603_5% +3VS LODRV SRN_1 12 10 11 PQ308B D G BM# PR321 @ BATT_OUT ILIM BM# IOUT CMPIN ADP_I PC318 100P_0402_50V8J LX_CHG 1 {44,52} 2N7002KDWH_SOT363-6 PR319 1M_0402_5% 0_0402_5% ADP_I PC323 PC322 0.1U_0402_25V6 @ 737_SRP 0.1U_0402_25V6 +3VALW B BATT_TEMP B 737_SRN PC324 0.1U_0402_25V6 {44,52} BATT+ PL301 PHASE 19 S 0.1U_0402_25V6 EC_SMB_CK1 {44,52} PC320 10U_0805_25V6K {44} PQ309A G ACOFF-1 PC319 10U_0805_25V6K PR316 C 1SS355_SOD323-2 S 2 BQ24737_VDD VIN P2-2 PR311 PC312 PR310 1M_0402_5% BATT_OUT PR309 10_1206_5% {52} PC313 1U_0603_25V6M PQ308A G D S 2N7002KDWH_SOT363-6 PACIN PACIN_N 0.1U_0402_25V6 G PR308 68K_0402_1% S PR306 200K_0402_1% PQ307B 2N7002KDWH_SOT363-6 D 0.1U_0402_25V6 2N7002KDWH_SOT363-6 PQ306A D G PD301 PR307 20K_0402_1% P2_G1 PQ305 LTC015EUBFS8TL_UMT3F-3 PR305 10K_0402_1% 1 VIN 47K_0402_1% DISCHG_G-1 P2-1 D PR304 @ 737_ACN 2ACOFF-1 {51} 737_ACP BATT+ DISCHG_G {51} PC309 2200P_0402_50V7K @ PC308 4.7U_0805_25V6-K PC304 10U_0805_25V6K @ PC303 10U_0805_25V6K @ PR303 200K_0402_1% PQ303 AO4407AL_SO8 PC306 4.7U_0805_25V6-K 100P_0402_50V8J PC305 4.7U_0805_25V6-K 2 P2_G2 PC307 0.1U_0402_25V6 1 2 PC301 PQ304 LTA044EUBFS8TL_UMT3F-3 PR302 200K_0402_5% D @ PJ301 JUMP_43X118 2 PR301 0.01_1206_1% PC302 0.1U_0402_25V6 PQ302 SI4483ADY-T1-GE3_SO8 8 VIN P3 PQ301 AO4407AL_SO8 P2 Charge Option() bit[8]=1 +3VALW VIN PR328 1M_0402_5% 1 BQ24737_VDD 2 PR329 47K_0402_1% PR330 10K_0402_1% PR331 ACIN {44} 10K_0402_1% PR327 750_0603_1% D PQ310A G 2N7002KDWH_SOT363-6 S {44,51} S 2N7002KDWH_SOT363-6 D G S ADAPTER_ID_ON# {44} PQ310B 2N7002KDWH_SOT363-6 A 2 PR334 1M_0402_5% PD304 AZ5425-01F_DFN1006P2E2 D ACPRN G ADAPTER_ID PC326 0.1U_0402_25V6 PC325 680P_0402_50V7K @ ADAPTER_ID_ON#_G PR332 12K_0402_1% 2 PR333 0_0402_5% @ A PACIN PQ309B ACPRN PR335 0_0402_5% @ ACIN# {7,44} Title LC Future Center Secret Data Security Classification Issued Date ACIN# 2013/08/08 Deciphered Date 2013/08/05 CHARGER THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D C DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Date: Document Number Rev 0.2 ACLU9 Monday, December 23, 2013 Sheet 53 of 59 D D PU401 PTP401 PAD +3VALW_P PR403 4.7_1206_5% @ 100mA +3VLP @ PJ402 PL401 2.2UH_PCMB063T-2R2MS_8A_20% +3VALW_P @ +3VALW PC403 PC407 22U_0805_6.3V6M LDO FB +3VLX PR404 1M_0402_5% @ PC408 0.1U_0402_25V6 LX OUT 10 1 +3VALW_FB 0.1U_0603_25V7-M PC406 22U_0805_6.3V6M 0_0402_5% +3VBS PC405 22U_0805_6.3V6M EN1 +3V_PWRGD 2 PC404 22U_0805_6.3V6M +3VALW_EN BS GND 3V_GND EC_ON PG IN EN2 PC409 4.7U_0603_6.3V6K +3V_VIN PR401 1M_0402_5% 2 PR402 {44} 1.5A 1 PC401 0.1U_0402_25V6 JUMP_43X79 SY8206BQNC_QFN10_3X3 @ PJ401 PC402 10U_0805_25V6K B+ 4A 1 JUMP_43X79 PC410 1000P_0402_50V9-J @ 3V_GND 3V_GND 3V_GND PC411 1 PR405 1K_0402_1% +3VL +3VLP JUMPER @ C 0.01U_0402_25V7K PJ403 change 470P to 10nf for soft start time 2ms @ PJ404 3V_GND C JUMP_43X39 +3VALW PR406 100K_0402_5% {52} LX OUT PR413 +5VALW_P +5VALW_OUT1 0_0402_5% LDO PR410 4.7_1206_5% @ 100mA +5VLP +5VALW @ 3.3UH_PCMB063T-3R3MS_6.5A_20% PL402 0.1U_0603_25V7-M 5A PJ406 +5VALW_P PC420 22U_0805_6.3V6M FB +5VLX 0_0402_5% PC415 PC419 22U_0805_6.3V6M 10 PR411 1M_0402_5% 2 +5VFB +5VBS PC418 22U_0805_6.3V6M 0_0402_5% @ PC421 0.1U_0402_25V6 ALW_PWRGD PC417 22U_0805_6.3V6M EN +5V_PWRGD VCC BS 1U_0603_25V6M +5VALW_EN 5V_GND PG GND PC416 +5VVCC IN PC422 4.7U_0603_6.3V6K PC414 10U_0805_25V6K SY8208CQNC_QFN10_3X3 B +5V_VIN 2 PR409 EC_ON 1 1 JUMP_43X79 @ PR408 2.5A PC412 0.1U_0402_25V6 2 0_0402_5% @ PU402 @ PJ405 PC413 10U_0805_25V6K B+ 1 PR407 +3V_PWRGD 1 JUMP_43X79 B @ PC423 1000P_0402_50V9-J @ 5V_GND 5V_GND 5V_GND PC424 6800P_0402_25V7-K PR412 1K_0402_1% PJ407 JUMPER @ 6800pf soft start 2ms 47nf soft start 7ms 5V_GND A A Issued Date Title LC Future Center Secret Data Security Classification 2013/08/08 Deciphered Date 2013/08/05 PWR_3VALW/5VALW THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D C DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Date: Document Number Rev 0.2 ACLU9 Monday, December 23, 2013 Sheet 54 of 59 A B C D 1k for 500K 12k for 670K @ PC501 0.1U_0402_10V7K 1 1.35V_GND SUSP# {44,46,56,57} 0.1U_0402_10V7K @ S5 16 17 TRIP S3 18 19 20 VTTSNS VBST 15 PR507 PC506 0_0603_5% 0.1U_0603_25V7-M 2 BST_1.35V V5IN 0_0402_5% 13 PL501 LX_1.35V 12 11 +5VALW PQ502 JUMP_43X79 PR509 4.7_1206_5% @ 1.35V_L + 1 DIS 10A UMA -6A +1.35V JUMP_43X118 @ PC509 330U_2.5V_M 10 PR510 10K_0402_1% 2 REFIN PC513 0.1U_0402_25V6 PJ503 0.68UH_PCMC063T-R68MN_15.5A_20% AON7506_DFN PC510 1U_0603_25V6M LG_1.35V JUMP_43X118 UG_1.35V 14 GND VREF DRVL PGND VDDQSNS VTTREF 1 1.35V_SN +0.675VS @ PJ502 SW TPS51716RUKR_WQFN20_3X3 VTTGND REFIN 1.35V_GND B+ JUMP_43X79 PQ501 VTT DRVH DDR_VREF @ PJ504 AON7408L_DFN8-5 VLDOIN +VTT_REFP +0.675VSP PC511 1U_0402_6.3V6K PR508 @ PAD PC507 22U_0805_6.3V6M 2A +0.675VSP 2A +1.35V PC508 22U_0805_6.3V6M 2 MODE PGOOD 21 PC505 10U_0805_25V6K PC502 10U_0805_25V6K PC503 SYSON {44} 0.1U_0402_25V6 PC504 S3_1.35V 2 1.35V_B+ @ PU501 @ PJ501 2A PR504 0_0402_5% S5_1.35V VDDQ_PGOOD {5,44} PR505 1K_0402_1% 0_0402_5% PR501 1.35V_GND PR506 133K_0402_1% PR503 100K_0402_1% +3VALW PC512 1000P_0402_50V9-J @ 1.35V_GND 1 1.35V_GND 2 0.01U_0402_25V7K +1.35VP Vout=1.367V Iocp min=23A PR511 30.9K_0402_1% PC514 1.35V_GND 1.35V_GND PJ4 JUMPER @ 1.35V_GND 4 Issued Date Title LC Future Center Secret Data Security Classification 2013/08/08 Deciphered Date 2013/08/05 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER A B C 1.35VS/+0.675VS Size Document Number Custom Date: Rev 0.2 ACLU9 Monday, December 23, 2013 D Sheet 55 of 59 A B C D +1.8VALW _L 2A PU601 2 PC605 22U_0805_6.3V6M PC604 22U_0805_6.3V6M 1 PR604 1M_0402_5% PR605 10K_0402_1% PC607 1U_0402_10V6-K 2 PR606 0_0402_5% PCH_PW R_EN +1.8VALW _FB EN_+1.8VALW {44,46,52,57} @ PR603 47K_0402_5% SUSP# SUSP# @ PC606 680P_0402_50V7K @ {44,46,55,57} PR602 19.6K_0402_1% JUMP_43X79 @ PC603 68P_0402_50V8J SY8089AAAC_SOT23-5 FB=0.6Volt 1 EN PJ602 2 FB GND +1.8VALW 1UH_PH041H-1R0MS_3.8A_20% PL601 +1.8VALW _LX PR601 4.7_1206_5% LX 2 IN JUMP_43X79 @ PC602 22U_0805_6.3V6M +1.8VALW _VIN PC601 22U_0805_6.3V6M 2 1A 1 PJ601 +3VALW +5VALW +1.5VSP 500mA PC610 220P_0402_50V7K @ PC611 10U_0603_6.3V6M @ PR609 24K_0402_1% 2 APL5930KAI-TRG_SO8 PR608 21.5K_0402_1% VR_+1.5VS_PW RGD {44,46} +3VS +3VALW 1 1 FB PR610 100K_0402_5% @ PR617 100K_0402_5% JUMP_43X39 EN POK 1U_0402_10V6-K PC612 @ 2 2EN_1_5VSP 0_0402_5% VOUT1 VOUT2 1 VR_+1.05VS_PW RGD 1 @ JUMP_43X39 PR607 PJ604 VCNTL VIN1 VIN2 GND PC609 4.7U_0603_6.3V6K 2 PU602 PJ603 +3VALW +1.5VS 500mA PC608 1U_0603_25V6M +3VALW VFB=0.8V PR616 100K_0402_5% +1.05VS_L 3 2A PU603 EN_1.05VMP 1.05VMP_FB @ PR615 100K_0402_1% PC619 1U_0402_10V6-K PR614 1M_0402_5% Issued Date Title LC Future Center Secret Data Security Classification 2013/08/08 Deciphered Date 2013/08/05 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER A +1.05VS PR613 47K_0402_5% @ PC618 680P_0402_50V7K @ SUSP# PC617 22U_0805_6.3V6M FB=0.6Volt @ PR612 75K_0402_1% PC616 22U_0805_6.3V6M EN JUMP_43X79 PC615 68P_0402_50V8J FB SY8032ABC_SOT23-6 PJ606 GND PL602 1UH_PH041H-1R0MS_3.8A_20% 1.05VMP_LX 2 PG LX IN 2 @ 1.05VMP_VIN PR611 4.7_1206_5% 1A PC614 22U_0805_6.3V6M JUMP_43X79 PC613 22U_0805_6.3V6M PJ605 +3VALW VR_+1.05VS_PW RGD {46} B C +1.05VS/+1.5VS Document Number Size Custom Date: Rev 0.2 ACLU9 Monday, December 23, 2013 D Sheet 56 of 59 2 +3VALW PR701 100K_0402_5% {44} VR_+1.0VALW_PWRGD 1 D @ PC706 22U_0805_6.3V6M 1SNB_+1.0VALW PC709 1U_0402_10V6-K PR702 4.7_1206_5% @ JUMP_43X79 1 @ +1.0VALW_L PC705 22U_0805_6.3V6M EN +1.0VALW_LX FB +1.0VALW @ PJ702 GND 2 0_0402_5% PR705 PCH_PWR_EN LX PG SY8032ABC_SOT23-6 PR704 {44,46,52,56} IN 1UH_PH041H-1R0MS_3.8A_20% PL701 +1.0VALW_EN @ PR703 0_0402_5% {44,46,55,56} SUSP# +1.0VALW_PVIN @ 1 47K_0402_5% JUMP_43X79 PC702 2 0.1U_0402_25V6 +5VALW D PU701 PC704 22U_0805_6.3V6M PC701 22U_0805_6.3V6M 2.5A @ PJ701 @ PC711 680P_0402_50V7K @ VFB=0.6V 68.1K_0402_1% PR706 +1.0VALW_FB PR707 100K_0402_1% 2 PC712 220P_0402_50V7K C C +3VS PR708 10K_0402_5% OPT@ +1.05VSP_VGA 1.05VGS_EN 1 +1.05VGS PC717 22U_0805_6.3V6M PC716 22U_0805_6.3V6M PC715 68P_0402_50V8J 2 PC718 680P_0402_50V7K @ JUMP_43X79 B 1.05VGS_FB OPT@ 1 PR713 1M_0402_5% OPT@ OPT@ PR714 100K_0402_1% OPT@ PC719 1U_0402_10V6-K @ 0_0402_5% N15SGT@ @ OPT@ 1 PR710 4.7_1206_5% EN SY8032ABC_SOT23-6 FB=0.6Volt OPT@ PR715 1.05VGS_EN FB 1.05VGS_EN 4.7K_0402_5% N15VGM@ {22,58} EN_VGA GND @ PJ709 PL702 1UH_PH041H-1R0MS_3.8A_20% OPT@ 1.05VGS_LX OPT@ PR172 PG PD701 N15VGM@ B LX OPT@ PR711 75K_0402_1% OPT@ IN JUMP_43X79 {23,58} DGPU_PWROK PU702 1.05VGS_VIN +1.05VGS_PWRGD 1 PC714 22U_0805_6.3V6M PC713 22U_0805_6.3V6M 2 {22} @ PJ703 +3VALW 2.5A {21} A A Issued Date Title LC Future Center Secret Data Security Classification 2013/08/08 Deciphered Date 2013/08/05 +1.05VS/+1.05VS_VGA THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D C DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Date: Document Number Rev 0.2 ACLU9 Monday, December 23, 2013 Sheet 57 of 59 2 +3VGS PD705 RB751V-40_SOD323-2 OPT@ EN_VGA 1 PR9443 PR9444 100K_0402_5% @ OPT@ 10K_0402_1% EN_VGA {22,57} D PC1303 1U_0402_10V6-K OPT@ 2 N15SGT@ PR9445 0_0402_5% 3VGS_PWR_EN D {19,21} PR9442 10K_0402_5% @ N15VGM@ PR9446 0_0402_5% PXS_PWREN {8,21} +VGA_B+ NVVDD PWM_VID 20 PC1298 10U_0805_25V6K PC1295 10U_0805_25V6K PC1255 0.1U_0402_25V6 OPT@ PC1297 330U_D2_2V_Y OPT@ PC1293 330U_D2_2V_Y 1SNUB1_VGA PC1296 680P_0402_50V7K @ +VGA_B+ 1 OPT@ B OPT@ OPT@ PL706 0.24UH_PCME063T-R24MS1R145_35A_20% OPT@ PHASE2_VGA Deciphered Date PC1292 22U_0805_6.3V6M OPT@ A OPT@ Title 2013/08/05 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER OPT@ PC1291 22U_0805_6.3V6M 1 2 OPT@ PC1290 22U_0805_6.3V6M @ LC Future Center Secret Data 2013/08/08 + PC1282 680P_0402_50V7K @ @ Security Classification PC1281 330U_D2_2V_Y OPT@ + 2 OPT@ +3VS Issued Date PC1280 330U_D2_2V_Y @ PR9428 4.7_1206_5% @ PC1288 22U_0805_6.3V6M PR9432 0_0402_5% @ 1SNUB2_VGA LGATE2_VGA AON6554_DFN PC1279 1U_0402_6.3V6K OPT@ +VGA_CORE PQ994 PC1287 22U_0805_6.3V6M PR9424 PC1278 0_0603_5% 0.22U_0603_16V7K 1OPT@ BOOT2_2_VGA OPT@ PC1276 10U_0805_25V6K UGATE2_2_VGA OPT@ PR9423 0_0402_5% PC1275 10U_0805_25V6K OPT@ A C 0_0402_5% +5VS @ PR9433 OPT@ 10K_0402_5% + 2OPT@ PR9418 NCP81172MNTWG_QFN24_4X4 +5VS OPT@ PR9427 2.2_0402_5% 1 19 @ 2 PVCC_VGA BOOT2_VGA VCC_VGA 1 21 1 PC1299 1U_0402_10V6-K OPT@ + PC1301 4.7U_0603_6.3V6K 23 22 UGATE2_VGA 2 OPT@ B 24 DGPU_PWROK PR9425 10K_0402_5% +3VS 1 100_0402_5% +VGA_CORE reserve for future tune GND 25 PH2 OPT@ LG2 OPT@ PR9435 4.7_1206_5% @ PC1273 0.1U_0402_25V6 FB B+ OPT@ OPT@ PQ993 AON6414AL_DFN8-5 PVCC PH903 100K_0402_1%_NCP15WF104F03RC OPT@ PR9426 VREFOPT@ 5.9K_0402_1% PQ991 AON6414AL_DFN8-5 FBRTN PR9448 +VGA_CORE BOOT1_VGA PGND COMP PR9438 5.1K_0402_1% @ PHASE1_VGA EN_VGA BST1 HG1 PSI_VGA VID LG1 FS 11 PC1270 FB_VGA PC1269 PR9419 47P_0402_50V8J OPT@ PC1271 2FB1_VGA1 2 COMP_VGA 12 1000P_0402_50V7K PR9420 OPT@ 51_0402_1% 10P_0402_50V8J PR9421 PC1272 0_0402_5% OPT@ OPT@ VCC_SEN 2FB2_VGA1 PR9422 VCCSENSE_VGA OPT@ OPT@ 10K_0402_1% 100P_0402_50V8J 82K_0402_1% OPT@ OPT@ PH1 VREF 1 PL705 0.24UH_PCME063T-R24MS1R145_35A_20% 10 VSS_SEN REFIN BST2 18 FS HG2 VREF TALERT# 2N15VGM@ 5600P_0402_25V7-K PR9439 1OPT@ 39K_0402_1% VIDBUF PC1277 14 VSSSENSE_VGA PC1294 0.01U_0603_50V7K OPT@ PR9449 0_0402_5% OPT@ TSNS 100_0402_5% OPT@ PU909 13 N15VGM@ PR9437 6.2K_0402_1% 2 PR9431 1.74K_0402_1% N15VGM@ PR9447 PR9436 0_0402_5% N15VGM@ UGATE1_VGA OPT@ JUMP_43X79 @ PQ992 LGATE1_VGA OPT@ OPT@ GPU_VID reserve follow NV suggestion 7.5K_0402_1% PR9440 27K_0402_1% PR9434 2 1VIDBUF VREF N15VGM@ N15VGM@ PC1262 2700P_0402_50V7-K @ OPT@ EN reserve PGOOD 27 7.5 6.2 1.74 5.6 PC1261 10P_0402_50V8J 20 20 18 2.7 C PR9440 PR9434 PR9436 PR9437 PR9431 PC1277 PR9430 0_0402_5% AON6554_DFN R1 R2 R3 R4 R5 C(nF) B D N15S-GT N15V-GM PR9429 PC1300 0_0603_5% 0.22U_0603_16V7K 1BOOT1_2_VGA PR9441 OPT@ OPT@ 0_0402_5% UGATE1_2_VGA OPT@ N15S-GT use config-B N15V-GM use config-D DGPU_PWROK 17 VCCSENSE_VGA DGPU_PWROK PSI VCCSENSE_VGA VCC {20} 16 VSSSENSE_VGA 15 {20} VSSSENSE_VGA {23,57} PJ710 PSI_VGA NVVDD PWM_VID {19} PSI_VGA PC1289 22U_0805_6.3V6M NVVDD PWM_VID {19} PWR-VGA_CORE Size Document Number Custom Date: Rev 0.2 ACLU9 Monday, December 23, 2013 Sheet 58 of 59 B+ +3VALW +3VALW 1 CPU_GFX_VIN PJ_43x79_6 PJ901 3A +1.0VS 1 @ PR903 10K_0402_5% PR904 PC911 PR913 CORE_GND 133K_0402_1% GFX_RDYA PR922 PR925 CORE_GND 68K_0402_1% PR926 B+ 1K_0402_1% PC927 0.01U_0402_25V7K VR_HOT# CPU_RDY PC933 0.1U_0402_25V6 CORE_GND PC919 330U_D2_2V_Y PC918 22U_0805_6.3V6M PC917 22U_0805_6.3V6M CPU_GFX_VIN @ CORE_GND PR949 CPU_CSCOMP PC950 910_0402_1% CPU_DROOP +CPU_CORE 1000P_0402_50V9-J CORE_GND CPU_LG 2 0.47UH_PCMB063T-R47MS_18A_20% @PR946 @PR946 2.2_0603_5% PQ904 J901 JUMPER CPU_TSENSE PH902 Thinking_ERTSM0B224J CLOSE to GFX inductor B TSENSEA AON7506_DFN @PC951 @PC951 0.47U_0402_25V6K + PC948 330U_D2_2V_Y 165K_0402_1% 12A PL902 CPU_PH 1 75K_0402_1% +CPU_CORE AON7408L_DFN8-5 PR944 CORE_GND PC943 0.1U_0402_25V6 2 PR945 41.2K_0402_1% CPU_HG CPU_PH 133K_0402_1% 1 PR943 VR_IMVP_IMON {44} 2200P_0402_50V7K PC942 680P_0402_50V7K 10_0402_1% 330P_0402_50V8J 5.9K_0402_1% PQ903 PR942 PC941 2 PR948 8.25K_0402_1% 1 PH904 100K_0402_1%_NCP15WF104F03RC PC940 PH959 100K_0402_1%_NCP15WF104F03RC 2 PC937 1200P_0402_50V7-K PR947 8.25K_0402_1% 1 10P_0402_50V8J PR941 PC939 CPU_CSCOMP PC938 2 1K_0402_1% PR940 PC936 0.1U_0402_25V6 PR939 PC935 10U_0805_25V6K + PC934 10U_0805_25V6K PC932 1000P_0402_50V9-J CORE_GND CPU_CSSUM PC947 22U_0805_6.3V6M 11.8K PC946 22U_0805_6.3V6M PC931 1000P_0402_50V7K 0_0402_5% 0_0402_5% PR938 VCC_SENSE CPU_GFX_VIN 1.5A {9} +5VALW CORE_GND CORE_GND 0.1U_0402_25V6 CPU_PH 2.94K_0402_1% PR935 PC930 0.047U_0402_25V7K +CPU_CORE VSS_SENSE 20_0402_1% PC945 22U_0805_6.3V6M {9} C 0.22U_0603_25V7K PR934 PR936 PC928 2 CPU_SVID_CLK +5VALW {7} PC916 22U_0805_6.3V6M 1 16.9_0402_1% 1 PR929 0_0402_5% PC944 22U_0805_6.3V6M 0_0402_5% CPU_LG CPU_PH CPU_HG 2.2_0603_5% 1 PR933 PC920 330U_2.5V_M PR923 PC926 2.2U_0603_6.3V6K PR931 13K_0402_1% PC929 CPU_TSENSE PR937 14.3K_0402_1% CPU_DROOP CPU_SVID_ALERT# CPU_SVID_DAT {7} + CORE_GND 68U_25V_M PR932 {7} + 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 CORE_GND 2 CORE_GND @PC921 @PC921 0.47U_0402_25V6K PC924 0.22U_0603_25V7K PR921 2.2_0603_5% GFX_HG GFX_PH GFX_LG PR928 PR930 69.8_0402_1% 69.8_0402_1% VR_SVID_DATA VR_SVID_ALERT# VR_SVID_CLK PR924 30K_0402_1% 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 PWMA BSTA HGA SWA LGA BST2 HG2 SW2 NCP6132AMNR2G_QFN60_7X7 LG2 PVCC PGND LG1 SW1 HG1 BST1 +1.0VS CORE_GND 1 PR927 69.8_0402_1% +1.0VS CORE_GND VCC VDDBP VRDYA EN SDIO ALERT# SCLK VBOOT ROSC VRMP VRHOT# VRDY VSN VSP DIFF @ PC952 1U_0402_6.3V6K C +1.0VS PC925 @ 0.1U_0402_25V6 0_0402_5% 1 EC_VR_ON 10 11 12 13 14 15 TRBST# FB COMP IOUT ILIM DROOP CSCOMP CSSUM CSREF CSP3 CSP2 CSP1 TSNS DRVEN PWM CORE_GND PAD VSNA VSPA DIFFA TRBSTA# FBA COMPA IOUTA ILIMA DROOPA CSCOMPA CSSUMA CSREFA CSP2A CSP1A TSNSA PU901 PR920 14.7K_0402_1% 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 2.2_0603_5% PC923 2.2U_0603_6.3V6K 2 0.47UH_PCMB063T-R47MS_18A_20% 1 0.1U_0402_25V6 PR919 +5VALW PQ902 GFX_LG CORE_GND GFX_PH AON7506_DFN @PR916 @PR916 2.2_0603_5% GFX_DROOPA GFX_CSCOMPA GFX_CSSUMA +GFX_CORE 0_0402_5% +GFX_CORE 14A PL901 PC914 0.047U_0402_25V7K PR918 GFX_PH 2.94K_0402_1% PC922 CORE_GND +5VALW PR917 AON7408L_DFN8-5 PC913 1000P_0402_50V7K PC912 1000P_0402_50V7K CSP1A TSENSEA 0_0402_5% GFX_HG 2 PR915 VCC_AXG_SENSE PQ901 2200P_0402_50V7K PR914 6.8K_0402_1% 16.5K_0402_1% 1K_0402_1% 1 2 PR908 PH901 PR910 165K_0402_1% GFX_PH PR911 PC908 2 PC903 PC915 22U_0805_6.3V6M 1 2 CLOSE to GFX inductor @ 10P_0402_50V8J PR912 PC907 D Thinking_ERTSM0B224J 10_0402_1% 330P_0402_50V8J 75K_0402_1% 2 41.2K_0402_1% PC910 2 PR907 CORE_GND PC909 0.1U_0402_25V6 GFX_RDYA 10U_0805_25V6K CPU_RDY PR906 0_0402_5% PR909 {44} CPU_GFX_VIN 1.5A 1000P_0402_50V9-J 10U_0805_25V6K PR905 0_0402_5% {9} +GFX_CORE CPU_GFX_VIN 680P_0402_50V7K PC906 VR_CPU_PWROK GFX_DROOPA 806_0402_1% PC905 {44} D PC902 0.1U_0402_25V6 CORE_GND VR_HOT# 1200P_0402_50V7-K VR_HOT# {44} 2 2 GFX_CSCOMPA PC901 PR902 10K_0402_5% 68U_25V_M + PC904 PR901 69.8_0402_1% + PC949 330U_2.5V_M B A A Security Classification Issued Date Title LC Future Center Secret Data 2012/09/03 Deciphered Date 2012/09/03 PWR_CPU_CORE/GFX_CORE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER Document Number Rev 0.2 ACLU9 Monday, December 23, 2013 Date: Sheet 59 of 59