Optional Scaled Index Byte if the instruction uses a scaled index memory addressing mode. Displacement[r]
(1)CSC 221
Computer Organization and Assembly
Language
Lecture 32:
(2)Lecture Outline
• Encoding Real x86 Instructions• x86 Instruction Format Reference • x86 Opcode Sizes
• x86 ADD Instruction Opcode
• Encoding x86 Instruction Operands, MOD-REG-R/M Byte • REG Field of the MOD-REG-R/M Byte
• MOD R/M Byte and Addressing Modes • SIB (Scaled Index Byte)
(3)Lecture Outline
• Encoding ADD Instruction Example • Encoding ADD CL, AL Instruction• Encoding ADD ECX, EAX Instruction
• Encoding ADD EDX, DISPLACEMENT Instruction • Encoding ADD EDI, [EBX] Instruction
(4)Encoding Real x86 Instructions
• It is time to take a look that the actual machineinstruction format of the x86 CPU family
• They don't call the x86 CPU a Complex Instruction Set
Computer (CISC) for nothing!
• Although more complex instruction encodings exist, no
(5)Encoding Real x86 Instructions
Prefix Bytes
0 to special prefix values that affect the operation of instruction
One or Two byte Instruction opcode
(two bytes if the special 0Fh opcode
expansion prefix is present)
“mod-reg-r/m” byte that
spcifies the addressing mode and Instruction operand size
This byte is only required if the instruction supports register or memory
operands
Optional Scaled Index Byte if the instruction uses a scaled index memory addressing mode
Displacement This is
0,1, 2, or byte value that specifies a memory address displacement for the instruction
Imm./Constant data
(6)Encoding Real x86 Instructions
• Although the diagram seems to imply that instructions
can be up to 16 bytes long, in actuality the x86 will not allow instructions greater than 15 bytes in length
• The prefix bytes are not the opcode expansion prefix
(7)x86 Instruction Format Reference
• Another view of the x86 instruction format:Instruction Prefix Address-Size Prefix Operand-Size Prefix Segment Override Number or or or or 1 of Bytes
Number or or or 0, 1, or 0, 1, or 4 of Bytes OpCode Mod-R/M SIB Displacement Immediate
Scale Index Base
0
Mod Reg/OpCode R/M
0
Bits
(8)x86 Instruction Format Reference
•
Instructions have some combination of the
following fields (but no instruction has all parts)
– instruction prefix – sets certain options – opcode - specifies the operation to perform
– Mod R/M - specifies addressing mode/operands – SIB (scale index base) - used for array index – address displacement - used for addressing
memory
(9)x86 Instruction Format Reference
•
Displacement
•
We are really talking about an
address offset
within a segment (usually given as a named
variable or a label in code)
– it could be a relative address like the 8-bit value
used for jumping forward or backward from the current location in the code segment
– or it could be the location of a variable in the data
segment
– or it could be a FAR reference to code or data in
(10)x86 Instruction Format Reference
•
Displacement Examples
•
jmp next
– where next is a label in the current
code segment
•
add eax, var1
– where var1 is a 32-bit
variable in the current data segment
•