DSpace at VNU: Operation mechanism of Schottky barrier nonvolatile memory with high conductivity InGaZnO active layer

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DSpace at VNU: Operation mechanism of Schottky barrier nonvolatile memory with high conductivity InGaZnO active layer

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Operation mechanism of Schottky barrier nonvolatile memory with high conductivity InGaZnO active layer Thanh Thuy Trinh, Van Duy Nguyen, Hong Hanh Nguyen, Jayapal Raja, Juyeon Jang, Kyungsoo Jang, Kyunghyun Baek, Vinh Ai Dao, and Junsin Yi Citation: Applied Physics Letters 100, 143502 (2012); doi: 10.1063/1.3699221 View online: http://dx.doi.org/10.1063/1.3699221 View Table of Contents: http://scitation.aip.org/content/aip/journal/apl/100/14?ver=pdfcov Published by the AIP Publishing Articles you may be interested in Deep-level transient spectroscopy on an amorphous InGaZnO4 Schottky diode Appl Phys Lett 104, 082112 (2014); 10.1063/1.4867236 Origin of subgap states in amorphous In-Ga-Zn-O J Appl Phys 114, 163704 (2013); 10.1063/1.4826895 Quasi-reversible point defect relaxation in amorphous In-Ga-Zn-O thin films by in situ electrical measurements Appl Phys Lett 102, 122103 (2013); 10.1063/1.4796119 Electrical stability enhancement of the amorphous In-Ga-Zn-O thin film transistor by formation of Au nanoparticles on the back-channel surface Appl Phys Lett 102, 102108 (2013); 10.1063/1.4795536 Impact of interface controlling layer of Al O for improving the retention behaviors of In–Ga–Zn oxide-based ferroelectric memory transistor Appl Phys Lett 96, 232903 (2010); 10.1063/1.3452339 This article is copyrighted as indicated in the article Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions Downloaded to IP: 86.139.91.230 On: Tue, 20 May 2014 10:34:50 APPLIED PHYSICS LETTERS 100, 143502 (2012) Operation mechanism of Schottky barrier nonvolatile memory with high conductivity InGaZnO active layer Thanh Thuy Trinh,1,2 Van Duy Nguyen,3,a) Hong Hanh Nguyen,1 Jayapal Raja,1 Juyeon Jang,1 Kyungsoo Jang,1 Kyunghyun Baek,1 Vinh Ai Dao,1,2 and Junsin Yi1,a) Information and Communication Device Laboratory, School of Information and Communication Engineering, Sungkyunkwan University, South Korea Faculty of Materials Science, Vietnam National University, Ho Chi Minh City, Vietnam International Training Institute for Materials Science, Hanoi University of Science and Technology, Vietnam (Received 28 November 2011; accepted 11 March 2012; published online April 2012) Influence of Schottky contact between source/drain electrodes and high conductivity a-InGaZnO active layer to the performance of nonvolatile memory devices was first proposed The Schottky barrier devices faced to the difficulty on electrical discharging process due to the energy barrier forming at the interface, which can be resolved by using Ohmic devices A memory window of 2.83 V at programming/erasing voltage of 613 V for Ohmic and 5.58 V at programming voltage of 13 V and light assisted erasing at À7 V for Schottky devices was obtained Both memory devices using SiO2/SiOx/SiOxNy stacks showed a retention exceeding 70% of trapped charges 10 yr with C 2012 American Institute operation voltages of 613 V at an only programming duration of ms V of Physics [http://dx.doi.org/10.1063/1.3699221] In recent times, amorphous InGaZnO (a-IGZO) film has been widely studied for using as an active layer in thin-film transistors (TFTs) because of its inherent advantages, which include high uniformity, transparence, and high mobility compared to amorphous silicon.1,2 For next-generation applications, such as system-on-panel (SOP) displays, memoryin-pixel, and transparent memory, an a-IGZO-based nonvolatile memory (NVM) is required, but high operating voltages, retention loss, and cycling decay are challenges that need to be addressed before arriving at the appropriate material.3–5 The TFTs using Schottky barrier (SB) at source/drain (S/D) electrodes (SBTFT) were introduced to improve the off current in silicon TFTs.6–8 Hence, SBTFTs could be fabricated on the high carrier concentration a-IGZO layer without the problem of high off currents Otherwise, the increasing of mobility with carrier concentration is relied on IGZO system.1,9 Due to these advantages, the IGZO SBTFTs with high conductivity become potential candidates to achieve higher field effect mobility (lFE) In this study, the performance of NVM devices on a-IGZO is investigated using the memory stack of SiO2/SiOx/SiOxNy (OOxOn) that has previously been reported to show some outstanding features, such as low operating voltages and excellent retention.10,11 The devices were fabricated in two types of TFT-NVM structures with Schottky and Ohmic contacts between S/D electrodes and active layer The memory behavior of Schottky barrier NVM (SBNVM) devices is explained in comparison to the conventional Ohmic contact device (ONVM) The multi-stack OOxOn-IGZO NVM devices were fabricated in the following steps: OOxOn memory stacks were deposited using inductive-coupled plasma chemical vapor a) Authors to whom correspondence should be addressed Electronic addresses: nguyenvanduy@itims.edu.vn and yi@yurim.skku.ac.kr Tel.: ỵ82-31-290-7139 Fax: ỵ82-31-290-7159 0003-6951/2012/100(14)/143502/4/$30.00 deposition (IPCVD) process on a low-resistivity c-Si substrate as gate electrode An SiO2-blocking layer, with a thickness of 20 nm, and an SiOx storage layer, with a thickness of 20 nm at an SiH4:N2O ratio of 6:1, were sequentially deposited at 170  C Subsequently, an ultrathin amorphous silicon (a-Si) film with an SiH4:H2 gas ratio of 5:20 was deposited with a RF power of 50 W and a temperature of 200  C for Then, N2O plasma treatment was carried out for the creation of the 3.2-nm-thick SiOxNy tunneling layer After the deposition of OOxOn memory stacks, an active layer of 100-nm-thick a-IGZO film was deposited by DC-pulsed magnetron sputter using a ceramic IGZO target (Ga2O3:In2O3:ZnO ¼ 1:1:1) at room temperature The base vacuum level was maintained at a pressure lower than  10À5 Torr while the working pressure and DC power were maintained at  10À3 Torr and 140 W, respectively, during the sputtering Before deposition, the presputtering process was performed for 10 to remove any contamination that may be present on the target surface Then, the postannealing process was performed for an as-deposited sample in an air atmosphere using rapid thermal annealing equipment at a temperature of 250  C for h After the postannealing process, 150-nm-thick silver (Ag) or aluminum (Al) films were vaporized to form Schottky or conventional Ohmic devices, respectively Finally, S/D regions were patterned by the photolithography method using two maskpatterning processes The electrical and memory characteristics of the devices were measured by Semiconductor Parameter Analyzer equipment (Model EL 420C) The bottom gate NVM structures were fabricated on two kinds of a-IGZO films The high conductivity layer was deposited in only Ar ambient condition and low conductivity one was formed at Ar and O2 mixing gases with 80% O2 content After heat treatment, conductivity of the two 100nm-thick films was found to be stable with values of about 101 and 10À4 S cmÀ1, respectively The SBNVM was fabricated on high conductivity a-IGZO layer using 150-nm-thick 100, 143502-1 C 2012 American Institute of Physics V This article is copyrighted as indicated in the article Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions Downloaded to IP: 86.139.91.230 On: Tue, 20 May 2014 10:34:50 143502-2 Trinh et al Appl Phys Lett 100, 143502 (2012) FIG (a) Initial transfer characteristics and lFE of SBNVM and ONVM devices, (b) energy band diagram of IGZO Ohmic contact, and (c) Schottky contact Work functions of materials are referred from Refs 12–14 Ag electrodes, with a work function estimated to be about 4.74 eV,12 which has already been confirmed by structure analyzed (result is not shown here) The ONVM used a-lowconductivity active layer with 150-nm-thick Al electrodes with a work function of about 4.26 eV.12 TFT characteristics of the two types were measured and compared as in Fig Note that the high-conductivity IGZO-TFT using Al electrodes could not be modulated by the gate voltage like other conventional TFTs (not shown here) The advantages of the SB structure in the on current (ION) and lFE values are assumed to the high carrier concentration of a-IGZO layer The unusual finding of mobility increases when carrier concentration increases up to 1020 cmÀ3 in a-IGZO system,9 which suggests the possible explanation for the earlier results While high-conductivity a-IGZO film showed a carrier concentration and Hall mobility of about 1019 cmÀ3 and 15 cm2 VÀ1 sÀ1, the mobility in low-conductivity film could not be measured using Hall equipment When study with the same device dimensions and measurement, SB structure provides an ION approximately orders higher in magnitude than that of the Ohmic contact structure Field effect mobility of SBTFT reaches a value of about cm2 VÀ1 sÀ1 in comparison to that of about 0.1 cm2 VÀ1 sÀ1 for OTFT SBTFT operation mechanism has been proposed, in which the gate voltage modulated the SB height in order to make it possible to operate the devices (Fig 1(c)) The OTFT operates using the conventional accumulation process, with behavior very similar to those of the Si devices, because the contact at the active and electrodes does not prevent the electron from moving (Fig 1(b)) Although the programming of the SBNVM showed excellent performance, these devices showed difficulty in the erasing process As seen in Fig 2(a), even negative biasing at À15 V for 10 s did not shift the threshold voltage to the negative region corresponding to the hole-ejection process Meanwhile, the electron ejection process occurred at the positive bias voltage of 10 V for ms In order to discharge the trapped electron, fluorescent light with an intensity of 10 mW cmÀ2 was introduced during the negative-biasing process, called light-assisted erasing The erasing process can be successfully FIG Switching characteristics of (a) the SBNVM device and (c) the ONVM device; threshold voltage shift of (b) SBNVM and (d) OTFTNVM This article is copyrighted as indicated in the article Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions Downloaded to IP: 86.139.91.230 On: Tue, 20 May 2014 10:34:50 143502-3 Trinh et al Appl Phys Lett 100, 143502 (2012) FIG (a) Ohmic and Schottky properties of I–V characteristics of the MSM structure using Al and Ag electrodes, respectively and (b) diagram of voltage potential distribution over the structure obtained using bias voltages combined with light assisted However, the subthreshold swing (SS) of such light-assisted erasing process degrades when compared to the programming one Besides the hole trapping mechanism causing the threshold voltage shift, the degradation of interface state under light illumination and negative bias stress was supposed to thin film transistor using a-IGZO material.15,16 During light illumination, the electron hole pairs were generated and they created trap sites in material The stretch-out phenomena of SS can be attributed to photo- generated-traps in a-IGZO layer including interface and bulk traps In Fig 2(b), the switching properties of the SBNVM indicate the linear dependence of the threshold voltage shift and bias voltage For the programming process, only gate bias voltage was applied to the structure for ms, from 10 to 13 V causing a threshold voltage shift from about 0.5 to V Using the light-assisted process, negative bias voltages were applied from À4 to À7 V causing a threshold voltage shift from about À0.6 to À2.6 V The memory window of the SBNVM structure was calculated to be higher than about 5.5 V with light assistance While using the conventional Ohmic contact structure, the problem in the erasing process was solved as seen in Fig 2(c) The programming and erasing processes were measured from 610 to 613 V and the largest memory window achieved was about 2.83 V However, as mentioned earlier, the active layer for Ohmic contact structure needs to have a low conductivity for achieving low leakage current This is the reason for the lower performance of ONVM compared to SBNVM All the threshold voltage shifts at different programming and erasing biases are shown in Fig 2(d) From this figure, the programming performance seems to be more effective than the erasing duration as general due to the higher mobility of electron The erasing difficulty phenomenon has also been reported in some earlier studies,3–5 which could have different explanations Some reports attributed this phenomenon to the n-type conductivity behavior of IGZO, due to which very few holes are available for positive charge injection into the gate insulator to neutralize the stored negative charges.4 In this study, we attribute the electrical erasing problem of the SBNVM to the potential barrier between the Ag electrodes and a-IGZO layer The Schottky contact characteristics of IGZO/Ag are shown in Fig 3(a) by measuring current-voltage (I–V) characteristics of an Al/a-IGZO/Ag (metal-semiconductor-metal (MSM)) structure The I–V plot proves that current through the structure is blocked when a negative bias is applied on Ag electrode Meanwhile, the Ag/ a-IGZO contact seems to open out when a positive bias is applied on the electrode This kind of Schottky contact behavior is the key point for TFT operation using high conductivity a-IGZO as active layer The leakage current in reversed bias region is assumed to the trap sites distributed over metal and semiconductor junction as well as barrier height of the contact The improvement in the operation of TFT using high conductivity a-IGZO is shown in Fig Unfortunately, despite the advantages of using SB in the TFT, it causes problems in performance of the NVM devices As illustrated in Fig 3(b), when the negative bias applied on the gate electrode, the SB increases with the negative bias voltage because of the blocking current phenomenon The high resistance at this barrier redistributes the voltage dropping over the structure In this case, an additional V4 component appears FIG Retention characteristics of (a) SB NVM device for the programming process and (b) Ohmic conventional NVM structure This article is copyrighted as indicated in the article Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions Downloaded to IP: 86.139.91.230 On: Tue, 20 May 2014 10:34:50 143502-4 Trinh et al significantly reducing the voltage drop, V3, over the tunneling layer This is the reason why the threshold voltage did not shift even when the gate electrode was biased at À15 V for 10 s The light-assisted erasing process with recombination and tunneling mechanism of trapped charges caused by photon energy is the solution to this problem This erasing process is not preferred for modern NVM devices because of complexities in performance In this study, we attempted to characterize retention properties of the SBNVM using the electrical bias only for the programming process Figure demonstrates the retention characteristics of the SBNVM (Fig 4(a)) and ONVM (Fig 4(b)) The retention time was measured for 104 s and extrapolated to 10 yr The results show a residue of 87% trapped charges after 10 yr corresponding to the memory window of 2.67 V for SBNVM Meanwhile, with P/E biased at 613 V for ms, the memory window of the ONVM remains at 2.06 V corresponding to 73% trapped charges These results are matched to OOxOn NVM properties using other active materials10,11 and suitable for device applications In summary, two types of IGZO TFT/NVM with SB and Ohmic contacts have been fabricated and compared The SBTFT shows better performance compared to the conventional OTFT, which is attributed to the high conductivity The difficulty in the erasing process of SBNVM was attributed to the SB height formed at the interface of the active layer and electrodes This barrier prevents the electron in the reverse bias from moving through the electrodes This disadvantage could be solved by using the ONVM structure, which shows conventional programming/erasing processes with a memory window of 2.83 V Appl Phys Lett 100, 143502 (2012) This work was supported by Priority Research Centers Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education, Science and Technology (2011-0018397) K Nomura, H Ohta, K Ueda, T Kamiya, M Hirano, and H Hosono, Science 300, 1269 (2003) H Yabuta, M Sano, K Abe, T Aiba, T Den, H Kumomi, K Nomura, T Kamiya, and H Hosono, Appl Phys Lett 89, 112123 (2006) N C Su, S J Wang, and A Chin, IEEE Electron Device Lett 31, 201 (2010) H X Yin, S N Kim, H Lim, Y S Min, C J Kim, I H Song, J C Park, S W Kim, A Tikhonovsky, J W Hyun, and Y S Park, IEEE Trans Electron Devices 55, 2071 (2008) Y S Park, S Y Lee, and J S Lee, IEEE Electron Device Lett 31, 1134 (2010) J H Yang, C G Ahn, I B Baek, M G Jang, G Y Sung, B C Park, K J Im, and S J Lee, Thin Solid Films 517, 1825–1828 (2009) J W Shin, W J Cho, C J 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indicated in the article Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions Downloaded to IP: 86.139.91.230 On: Tue, 20 May 2014 10:34:50 ...APPLIED PHYSICS LETTERS 100, 143502 (2012) Operation mechanism of Schottky barrier nonvolatile memory with high conductivity InGaZnO active layer Thanh Thuy Trinh,1,2 Van Duy Nguyen,3,a)... Influence of Schottky contact between source/drain electrodes and high conductivity a -InGaZnO active layer to the performance of nonvolatile memory devices was first proposed The Schottky barrier. .. substrate as gate electrode An SiO2-blocking layer, with a thickness of 20 nm, and an SiOx storage layer, with a thickness of 20 nm at an SiH4:N2O ratio of 6:1, were sequentially deposited at 170

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