Trang 1 Analog Filters for Audio Frequency Range Based on Current Starved CMOS Inverter Witold Machowski, Juliusz Godek Department of Electronics AGH University of Science and Technology
MIXED DESIGN MIXDES 2011, 18th International Conference "Mixed Design of Integrated Circuits and Systems", June 16-18, 2011, Gliwice, Poland Analog Filters for Audio Frequency Range Based on Current Starved CMOS Inverter Witold Machowski, Juliusz Godek Department of Electronics AGH University of Science and Technology 30 Mickiewicza Av, 30-059 Kraków, Poland e-mail: [machowsk, godek]@agh.edu.pl Abstract—In the paper the measurement results obtained for Vdd audio frequency range CMOS analog filters implemented entirely on-chip are presented The filter itself was primarily in out dedicated for non-uniform sampling delta modulator codec [1] For several reasons the experimental chip containing the filter Vss under consideration has been manufactured twice with minor layout changes, thus the experimental data allow to discuss both Figure The transocnductor based on CMOS inverter working in weak mismatch as well as process variation impact on filter inversion performance The tuning capability, dynamic range as well as substrate noise immunity are also discussed data have been already presented in the extended version of the conference paper [2] Index Terms—CMOS circuits, analog filter II THE TRANSCONDUCTOR AND THE FILTER I INTRODUCTION The transconductor (Fig 1) is composed of CMOS inverter One of the most common desirable feature of contemporary with additional “top” and “bottom” MOSTETs in configuration analog CMOS circuits is suitability for low (sometimes even somehow resembling that of current starved inverter [eg 3] very low) voltage operation It comes from two facts – one is Thank to this circuit architecture, when supplied with voltage related with CMOS technology evolution and shrinking feature slightly below doubled threshold voltage the resulting size, which leads to significant reduction of thin oxide transconductance may be below μS level and thus allowing the underneath the MOSFET gate and consequently lowering the achievement of desired time constants Transconductance of supply voltage The second one is related to portability the stage may be tuned either by slight variations of supply for requiring adoption to new electrochemical, photovoltaic or the entire stage (or eventually after disconnecting gates of other modern supply methods “bottom” and “top” additional MOSFETs and driving them separately and independently of the global supply – this is not Another important factor is requirement for integration of shown in Fig.1, but conceptually easy to imagine Such a the entire electronic system into single chip For low frequency scheme was introduced in the second variant of the test chip) analog signal processing (especially continuous time filters) Four transconductors of this type may form a gyrator – very this creates another challenges Since integrable capacitors may useful building block for filter implementation following the have value of, say -teens of picofarads, resistors (or passive prototype The entire filter specifications was given by transconductances) appropriate for huge time constants the aforementioned application – non-uniform sampling delta corresponding to single kHz frequency have to be enormously modulation (NSDM) codec [4], despite the rest of the circuit large (or, respectively, small) In the implementation presented has not yet been implemented with architecture allowing 0.9 conceptually in [1] we accomplished the aforementioned and Volt operation The resulting filter was approximated with 6-th partially contradictory specifications using low voltage CMOS order elliptic filter with the transfer function of: inverters working in weak inversion mode and forming transconductors with gm of a few hundreds nS To make this paper more comprehendible we repeat some most important consideration about the filter specifications, synthesis and implementation However, in contrary to mentioned reference, we are going to focus on experimental results here, so the interested reader should consult paper [1] devoted mainly to system considerations, synthesis and implementation flow with simulation results Some very raw preliminary experimental 0.01s6 4.5481013 s5 7.535107 s4 0.001607s3 1.0511017 s2 8.279 105 s 3.9611025 s6 3.538104 s5 1.391109 s4 2.8911013 s3 5.0951017 s2 5.5311021 s 4.007 1025 kdy *QTv`B;?i Ü kyRR #v 2T `iK2Mi Q7 JB+`Q2H2+i`QMB+b *QKTmi2` a+B2M+2- h2+?MB+ H lMBp2`bBiv Q7 GQ/x Authorized licensed use limited to: RMIT University Library Downloaded on February 26,2024 at 03:50:34 UTC from IEEE Xplore Restrictions apply Figure The LC prototype of the filter The transfer function (1) may be implemented with LC Figure The microphotograph of the second prototype prototype filter depicted in Fig Very large inductor coils are substituted by their capacitor-gyrator equivalents The as “transient noise” simulations with Cadence spectre) were precision of capacitors in Fig.2 is obviously the desired one, in rather optimistic, providing dynamic range appropriate for practice we were able to keep digit precision, after long dedicated applications We prototyped two variants of the filter optimization process leading to the appropriate choice of in question The first prototype (Fig 4) comprised two similar elementary capacitor (all the capacitors needed for filter filters in two separate I/O rings (the whole silicon area with synthesis were realized as matrices of such an elementary unit) two rings was only slightly exceeding the minimum charged This procedure is described in more detail in [1] one for EUROPRACTICE mini@sic runs) One ring contained the entire raw filter, the second one had additional output pads III SIMULATION RESULTS AND PROTOTYPING after each filter stage The whole filter is actually a cascade of The described circuit has been intensively simulated using three biquadratic filters and the purpose of additional output BSIM3 process parameters provided by the foundry (0.35 μm pads was observation of intermediate output signals after first- AMS) Because of rather untypical solution and violation of second and third biquad, respectively Most probably due to many recommendations for analog design (weak inversion late layout alterations (forced by apparently false rule means usually more thermal noise and matching of active violations reported by ERC checks performed in MPW service elements is poor) our main concern was manufacturability of center) only the half of the prototype was operable The the proposed idea Simulation results [1] pointed that filter operable half was that containing additional output pads This should be not very sensitive to local process variations position made possible investigation of separate stages, but (“mismatch” variant of Monte Carlo simulations) sustaining unfortunately additional pads’ parasitic capacitances influenced both function and cut-off frequency, while sensibility to global the frequency response of the whole filter, distorting it from the process variations (Monte Carlo “process” option) is rather desired one For this reason we decided to resubmit the project large in the terms of cut-off frequency variations On the other In order to maximize the research yield of this remanufacturing hand, noise simulations (both in small-signal domain as well the second prototype (Fig 3) contain the variant with additional inter-stage outputs (Filter - repeated for Figure The microphotograph of the first prototype comparison with another run for the same technology), entire kdR Authorized licensed use limited to: RMIT University Library Downloaded on February 26,2024 at 03:50:34 UTC from IEEE Xplore Restrictions apply Figure The testbench for the filter raw filter (Filter - for meeting the specifications’ check) visible impact neither on passband ripple nor the shape of the Between the two filters a circuitry with controlled delay lines transfer region has been placed (in Fig marked as “aggressor”) It has been placed for experiment within another project ran at our Another measurements we performed for the filter are Department [5] but will be also exploited by us to investigate already announced investigations of interference noise caused the filters’ immunity to substrate interference noise by active semi-digital portion of the chip activity Since our circuit is dedicated for low frequency applications we IV MEASUREMENT RESULTS stimulated the delay lines by 100Hz square wave applied to the middle part of the chip It assures a spectrum of interfering For performing the measurements of the filter a testbench signals within the passband Measurement results show that depicted in Fig has been used A LT3020 low dropout due to common contra-measures we have undertaken (double voltage regulator was used for supply stabilization (about 850 guard ring embracing the filter part) assure that digital part mVolt total) The VDD and VSS voltages have slightly different activity has no influence within the passband and appears in the absolute value This asymmetry comes from unequal absolute stopband only if the usable signal level is very low values of of p-MOS and n-MOS threshold voltages and may be considered also as input signal pre-conditioning for single The circuit is capable to transfer within the passband ended supply An AD8541 OpAmp serves as a voltage buffer – sinewave with 150mVolt peak-to-peak and output signal the filter itself is matched for 4Mohm load and connecting the exhibits then a THD below 2% The total output noise for the output of the filter to 1Mohm/50Ohm test equipment would circuit with input terminated with 50Ohm resistor is about significantly influence the frequency response OpAmp 85μV within 20kHz band So despite very low supply voltage performance on the other hand guarantees that measured the circuit has a reasonable dynamic range (measured SINAD spectra are that of the filter itself The lot of 10 manufactured for aforementioned input magnitude is about 30dB – Fig 9) testchips were bonded into ceramic DIP-24 package and inserted into the testbench using a ZIF socket The whole B Comparison of two manufacturings of filter with additional circuitry has been enclosed into EMI/RFI box for shielding outputs purposes On the contrary to preliminary results [1,2] obtained by accumulated and averaged scope measurements in this The re-manufacturing of the second filter with auxiliary paper we present results obtained with the use of Agilent interstage outputs (performed just for the sake of utilizing the 4395A Spectrum/Network Analyzer.(Fig 6) For the sake of silicon area which is chargeable to the customer) gives the caeteris paribus comparison all the previous measurements have been repeated using the aforementioned equipment, using text output option for future data aggregation A The whole filter (prototype 2)results Figure Direct frequency response measurement result with 4395A Spectrum/Network Analyzer Second successful manufacturing of the entire filter proves that designed filter may be used for codec, since the whole manufacturing lot meets the specifications in the terms of allowed passband ripple as well as desired roll-of (Fig 7), while the cut off frequency may be tuned The tuning range is moreover very high – it starts from 200Hz (however with significantly increased passband ripple – Fig 8) and may reach 20kHz (with almost constant transfer region in the terms of roll-off per decade) Tuning within 3kHz-4kHz band has no kdk Authorized licensed use limited to: RMIT University Library Downloaded on February 26,2024 at 03:50:34 UTC from IEEE Xplore Restrictions apply variation Anyway we had to remember that the circuit under the test is actually a by-product, with destroyed performance, -5 due to the influence of output pads’ parasitic capacitances However the comparison is interesting from manufacturability -10 point of view Our experience with another circuits implementations [6] points out that simulation and real -15 measurement results may differ from each other very significantly It seems that the key issue is reliability of the -20 simulation models – especially when MOSFET transistors operate both in weak as well as strong inversion region in the Amplitude (dB) -25 circuit The principle of operation of the circuit presented in this paper is based exclusively on subthreshold region, so it is -30 not a big surprise we obtained results provided by the simulations with spice/spectre Moreover simulation predicted -35 much more sensitivity of the frequency response on process variations We of course realize that two independent runs not -40 necessary mean the full range changes of process parameters, and we are aware that Monte Carlo, and especially corner -45 parameters are usually overestimated and sometimes lead to very pessimistic results, however we found than on contrary to -50 1000 2000 3000 4000 5000 6000 7000 simulations (predicting cut-off frequency variations by orders of magnitude) our two fabrication runs gave at most 30% discrepancy of most figures of merits (including first of all the Frequency (Hz) cut-off frequency – Fig 10) and are not substantially more diffused than that coming from single run Figure Measured frequency responses for the prototyping lot of the entire filter V CONCLUSIONS Figure Tuning ability of the entire filter We have proposed and experimentally checked the operation of very low supply voltage CT fully CMOS Figure The spectrum of filter’s output signal (SINAD=30dB) integrable analog filter for audio frequency range The filter has satisfying performance and may be tuned within almost 10 whole audio range ACKNOWLEDGMENTS -10 The authors gratefully acknowledge the help of Professor Kuta in discussing many issues of CMOS analog design as well Magnitude [dB] -20 as Professor Wojciech Kucewicz for making available his excellent measurement laboratory and equipment -30 REFERENCES -40 [1] W Machowski, J.Godek , “Low voltage, low power CMOS inverter -50 based filter for NSDM codec” in MIXDES 2009 Proceedings of the 16th international conference, pp.306-309, àódĨ, Poland, 25–27 June, 2009 -60 1000 2000 3000 4000 5000 6000 7000 8000 9000 100 Frequency [Hz] [2] W Machowski, J.Godek, “Low voltage continuous time CMOS filters for audio frequency range,” Elektronika : konstrukcje, technologie, zastosowania, vol 20 No 12, pp 56-60, 2009 [3] M.G Johnson, E.L Hudson, “A variable delay line PLL for CPU- Coprocessor Synchronization”, IEEE J.Sol Stat Circ., vol 23 no 5, pp 1218-1223, October 1988 [4] R GolaĔski, J Koáodziej, “Adaptive Rate Delta Codec Design and Implementation” WSEAS Transactions on Electronics, vol No 3, pp 103-111, 2006 [5] ĝliwczyĔski, P Krehlik, Buczek, M LipiĔski, “Active propagation delay stabilization for fiber-optic frequency distribution using controlled electronic delay lines” IEEE Trans Instr Meas., vol 60, No 4, pp 1480-1488, 2011 [6] R GolaĔski, J Godek, J Koáodziej, W Machowski, S Kuta,” Filter implementation for CMOS adaptive sampling delta modulators”, Int J.Circ Syst and Sign Proc.,vol 5, No 2, pp 159–167, 2010 Figure 10 Comparison of frequency responses of the first biquad for two opportunity to investigate the filter sensitivity to global process manufacturing lots (traingles – run #2147 squares run #2402 kdj Authorized licensed use limited to: RMIT University Library Downloaded on February 26,2024 at 03:50:34 UTC from IEEE Xplore Restrictions apply