Utilizing highly crystalline pyroelectric material as functional gate dielectric in organic thin film transistors

COMMUNICATION www.advmat.de Utilizing Highly Crystalline Pyroelectric Material as Functional Gate Dielectric in Organic Thin-Film Transistors By Nguyen Thanh Tien, Young Gug Seol, Le Huynh Anh Dao, Hwa Young Noh, and Nae-Eung Lee* Since the first description of their use as potential elements for electronic devices,[1] in 1987, organic thin-film transistors (OTFTs) have been intensively studied, due to their potentially lower cost, higher performance, and higher compatibility with flexible electronic applications, as compared to conventional silicon technology.[2–5] Recently, new functions of OTFTs and their integrated circuits have been being considered, in an attempt to take advantage of organic electronic devices in different applications, such as memory,[6,7] radio-frequency identification (RFID),[8] and sensors.[9–12] For functional organic devices, organic smart materials with ferroelectric, piezoelectric, and pyroelectric properties can be directly integrated into the OTFT device structure Good candidates are poly(vinylidene fluoride) (PVDF) and its copolymer with trifluoroethylene, P(VDF-TrFE) The piezo- and pyroelectricity of PVDF and P(VDF-TrFE) were studied in depth,[13–22] and have been successfully applied in many research fields,[23] but the applications of these properties in OTFTs are limited to external sensing modules.[9,11] On the other hand, there have been both theoretical and experimental reports of memory applications based on the ferroelectricity of P(VDF-TrFE) in OTFTs.[6,7,24–26] High current on-off ratio and fast switching dipoles, which imply a small remnant polarization, are the key aspects in this case In applications making use of the pyroelectric and piezoelectric properties of P(VDF-TrFE), however, the switching of small remnant polarization should be avoided, and a stable large polarization is required instead Thus, physical models based on the assumption of small and easy-to-switch remnant polarizations[24–26] are not appropriate in interpreting the experimental observation in this work, showing a very large remnant polarization, and need to be modified in order to accurately interpret the experimental information In this report, we present for the first time the direct use of a highly crystalline P(VDF-TrFE) material with a very large remnant polarization as a pyroelectric gate-insulator layer in an OTFT structure for temperature-sensing applications This has the advantage of a simpler fabrication process compared to external sensing modules A poling strategy based on step-wise poling [*] N.-E Lee, N T Tien, Y G Seol, L H A Dao, H Y Noh School of Advanced Materials Science and Engineering and Center for Advanced Plasma Surface Technology, Sungkyunkwan University Suwon, Kyunggi-do 440-746 (Korea) E-mail: nelee@skku.edu DOI: 10.1002/adma.200801831 910 process[20] was required to enhance the effects of the pyroelectricity on the transistor performance (see Experimental) The output characteristics of the OTFTs were changed so as to exhibit a linear current-voltage relationship, thus providing evidence of their large polarization We introduced a modified transistor equation to fully explain this phenomenon and related problems, such as the effect of the geometry on poling The thermal behavior of the functional OTFT was also investigated, and the results showed a linear response below the phase transition temperature of P(VDF-TrFE) The temperature response of the device was primarily attributed to the pyroelectric property of the highly crystalline P(VDF-TrFE) layer, rather than to temperaturedependent changes in the other parameters, such as field-effect mobility, gate capacitance, and contact resistance The positive pyroelectric coefficient extracted from the data is also the first such value reported for highly crystalline P(VDF-TrFE) material The poling operation mode was also introduced for the purpose of obtaining its stable and reliable performance in temperaturesensor applications Figure 1a shows the output characteristics of the unpoled device, which are similar to those of conventional ferroelectric field-effect transistors (FeFETs).[25,26] After poling, the drain current-gate voltage (ID–VG) and gate current-gate voltage (IG– VG) characteristics of the device were also measured at room temperature, by sweeping the gate voltage (VG) from À40 to 40 V at various values of the drain voltage (VD), ranging from to À40 V Repeated measurements of the ID–VG transfer characteristics from the same device produced irreproducible curves due to a change in ID caused by dipoles, and the measurements obtained using ‘‘short’’ (one measurement was made and taken as the measured value) and ‘‘long’’ sampling mode (128 measurements were made and the average value was taken as the measured value) also yielded different results (not shown) These variations reflect the hysteresis phenomenon in ferroelectric materials However, a consistent peak in the IG–VG characteristics was observed at a VG of around 30 V Figure 1b shows this peak at VD ¼ À40 V for the short and long sampling modes Notably, the applied electric field induced by a negative VG is parallel to the polarization of the poled P(VDF-TrFE) layer, while a positive VG produces an anti-parallel electric field Thus, this peak agreed well with previous results,[6] pointing to the existence of dipole switching when the applied electric field exceeds the coercive field in the reverse direction This suggests that the value of VG should not be allowed to exceed VD by more than 30 V during the measurement of our device, in order to avoid dipole switching (e.g., see the measurement conditions in Figure 1c) The use of ß 2009 WILEY-VCH Verlag GmbH & Co KGaA, Weinheim Adv Mater 2009, 21, 910–915 www.advmat.de COMMUNICATION repeated measurements, and were used for the measurement of all other output characteristics of the poled devices in the remainder of this report The output characteristics of the poled device in Figure 1c are quite different from those reported in previous studies of the memory applications of ferroelectric FETs.[25,26] The ID–VD curves in Figure 1c show no current saturation in the region in which VD exceeds VG, where they were expected to be saturated The variation of ID with VG is also small These phenomena imply that there is a high density of accumulated holes at the surface of the semiconductor layer that does not originate from the gate bias Such a large holedensity may come from the polarization of the P(VDF-TrFE) layer after it was poled, which is the main difference between our device and memory devices, showing no saturation and saturation in ID, respectively Since the conventional transistor equation does not cover the assumption of such a large polarization in the gate dielectric, we introduce a modified equation, which is based on the following basic equation D ẳ "0 E ỵ Ptotal ẳ "0 "r E ỵ Pr (1) where D is the dielectric displacement, e0 and er are the vacuum and relative permittivities of P(VDF-TrFE), respectively, E is the electric field inside the gate dielectric layer, Pr is the remnant polarization, and Ptotal is the total polarization For the sake of convenience, we define an equivalent voltage V0 corresponding to Pr, Pr ¼ e0erV0/d, where d is the thickness of the gate dielectric layer As derived in the Supporting Information S3, the modified ID– VD characteristics equation is ID ¼ mC   W VD V0 ỵ VG ÞVD L (2) where m is the field-effect mobility, C is the capacitance of the P(VDF-TrFE) layer, and W and L are the width and length of the channel, respectively Table shows the linear coefficient values in Equation extracted by curve fitting at various VG values from the data in Figure 1c, and Figure shows the plot of mCW(V0 ỵ VG)/L versus VG The linearity of mCW(V0 ỵ VG)/L versus VG was clearly observed The V0 value of À132 V was calculated for the poled device at room temperature, from the slope and the intercept of the curve in Figure Noticeably, the measured capacitance of an as-deposited 500 nm P(VDF-TrFE) layer was about 16.23 nF cmÀ2, of which the dielectric constant was 9.17 The measurement condition is Figure Effects of poling on device operation a) ID–VD output characteristics before poling b) Dipole switching observed in IG–VG characteristics c) ID–VD output characteristics after poling only a few measured points is also recommended, to minimize hysteresis Figure 1c shows the output characteristics of the poled device measured at room temperature with data points at VG ¼ À10, À20, À30, and À40 V and VD between and À40V at À5V steps These sampling conditions produced stable results during Adv Mater 2009, 21, 910–915 Table Coefficients of Equation 2, extracted from the ID–VD characteristics in Figure 1c VG [V] À10 À20 À30 À40 ß 2009 WILEY-VCH Verlag GmbH & Co KGaA, Weinheim mC(V0 ỵ VG)W/L [nF sÀ1] 16.07 17.15 18.25 19.39 911 COMMUNICATION www.advmat.de Figure Linear contribution of V0 to ID corresponding to VG 0.1 V AC voltage at kHz, while the DC bias ranged from À20 to 20 V This value was slightly smaller than previously reported dielectric-constant values, ranging from 10–12.[6,11] The result could be subjected to the high crystallinity of the material It is necessary to emphasize that the capacitance was determined by the field-induced polarization of nonpolar material, which vanishes when the applied electric field is removed In the case of the P(VDF-TrFE) material, this field-induced polarization originates from polar molecules in the amorphous phase, and should be distinguished from the remnant polarization, Pr, which comes from the dipole moments between the polymer chains in the crystalline b phase.[13–15] In our case, recrystallizing the P(VDF-TrFE) layer from the melt insured a large fraction of highly crystalline b phase, or a small fraction of amorphous phase This explained why we obtained such a small capacitance value More interestingly, the capacitance value of a poled P(VDFTrFE) layer in the same thickness was reduced by a factor of 4, 3.98 nF cmÀ2, compared to that of the as deposited thin-film The reduction may be due to the high internal electric field caused by the remnant polarization As this internal electric field was rather high, which was equivalent to 132 V bias, the field-induced polarization was prevented from adapting with small applied voltages (20 $ ỵ 20 V) This prevention resulted in the reduced capacitance The calculated surface-charge density was 5.25 mC mÀ2, and was in the range similar to that reported by a previous work.[27] It is noticeable that, under a poling electric field of 60–80 MV mÀ1, a completely poled P(VDF-TrFE) layer would result in a remanent polarization value of 50–80 mC mÀ2.[6,27] Although our sample was poled under the electric field of 80 MV mÀ1, such a smaller value of semiconductor surfacecharge density than expected is presumably ascribed to the limited hole density in the pentacene layer in the device structure The ID–VD curves of the current device in Figure 1c also showed a small tendency to bend upwards, whereas they should bend downwards according to the physical meaning Actually, both the bending upwards and downwards of the curves (not shown) were observed, and this variation came from the transistor geometry features in the poling process Since the channel length is much larger than the P(VDF-TrFE) layer thickness, the poling electric field was not uniformly distributed over the entire channel Thus, there are higher electric fields near the source/drain electrodes, and these result in the larger 912 polarization of the P(VDF-TrFE) layer in these regions Since the source/drain electrodes were deposited by a shadow mask, misalignments can occur, causing overlapped areas with the gate electrode Depending on how much the difference of the overlap is, the ID–VD curves can bend upwards or downwards However, the fact that the extracted quadratic coefficients in the Equation are a hundred times smaller than the linear coefficients (see Supporting Information S4) indicates the minority of geometry effect This may be due to the conducting property of the pentacene layer in the poling condition, which greatly reduced the nonuniformity in the poling electric field According to previous works, it was argued that the pyroelectricity of P(VDF-TrFE) with a low crystallinity originates from the thermal vibration of the dipoles in the amorphous phase at high temperature, which causes a reduction of the average dipole moment in the poling direction.[13–16] However, those works did not investigate highly crystalline materials, whose dipole moments are drastically affected by the thermal expansion of the b phase crystals, since the remnant polarization of highly crystalline P(VDF-TrFE) comes from dipole moments between the polymer chains in the crystalline b phase.[13–16] In this report, we distinguish between the contributions of the two phenomena, thermal vibration and thermal expansion, to the pyroelectricity of P(VDF-TrFE) Time-dependent ID measurements were performed at fixed VG and VD values right after the poling process, while the temperature was varied The temperature was kept at 25 8C for min, and then gradually raised up to 80 8C The sample was maintained at this high temperature for min, and then cooled down to room temperature Figure 3a shows the result obtained at VG ¼ À40 V and VD ¼ À20 V In Figure 3a, there was a large decrease of ID in region III, in which the temperature was maintained at 80 8C Actually, the same phenomenon took place at room temperature in regions I and V, but they are too small to be observable on a large scale This phenomenon is attributed to the decrease in the remnant polarization of the P(VDF-TrFE) layer, and agreed well with the conclusion reached in previous reports[13–16] that the reduction in the average remnant polarization resulting from the thermal vibration is the origin of the pyroelectricity of P(VDFTrFE) This thermal vibration phenomenon resulted in the usually negative pyroelectric coefficients of P(VDF-TrFE), which imply a smaller remnant polarization at higher temperatures Moreover, we also observed in Figure 3a that the value of ID increased fairly rapidly as the temperature increased in region II, and similar behavior also occurred in the backward direction in region IV The data of regions II and IV in Figure 3a were replotted in Figure 3b, in terms of ID versus temperature By a rough estimation, the ID behavior in Figure 3b can be distinguished into a linear component, which is proportional to temperature, and a nonlinear one Since the nonlinear signal was inversely proportional to temperature and decays by time, it is reasonable to attribute this component to a negative pyroelectric phenomenon It is also important to point out that the different behaviors of ID in the forward and backward directions in Figure 3b are mainly due to the decay of ID in region III indicated in Figure 3a So, if the negative pyroelectric phenomenon can be minimized, a low thermal hysteresis and linear performance can be achieved for OTFT-based temperature-sensor applications ß 2009 WILEY-VCH Verlag GmbH & Co KGaA, Weinheim Adv Mater 2009, 21, 910–915 www.advmat.de COMMUNICATION Figure Temperature response of the poled device in continuous measurement: a) proportional ID with temperature and its decay were both observed and b) data of proportional ID with temperature were replotted We introduced a poling operation mode in order to eliminate negative pyroelectric phenomenon for sensing purposes, in which the device was continually poled except when ID was measured The measurements were taken at VG ¼ À30 V and VD ¼ À10, À20, À30, and À40 V The temperature was in the range from 25 to 60 8C, in 8C intervals The experimental data were shown in Figure 4a and, as expected, the responses of ID to temperature were linear V0 values obtained at different temperatures indicate a linear temperature-sensitive response, as shown in Figure 4b According to Equation 2, three parameters that could be attributed to the temperature-dependent behavior of ID in Figure 4a are C, m, and V0 Associated with the measured capacitance of the P(VDF-TrFE) layer at different temperatures, dependence of m on temperature could be calculated from the slope of mCW(V0 ỵ VG)/L versus VG, in Figure The measured capacitance of the P(VDF-TrFE) layer, indeed, showed an increase by a factor of 1.2 from 25 to 60 8C (see Supporting Information S5) However, the calculated m values did decrease by a similar factor, leading to an invariance of the mC values over temperature The observed opposite temperature-dependent behaviors of capacitance and mobility from 25 to 60 8C in our P(VDF-TrFE) OTFT structure implied their minor total effect in the temperature response of the device Therefore, a linear response Adv Mater 2009, 21, 910–915 Figure Temperature response of the poled device in poling operation mode: a) temperature response of ID and b) temperature sensitivity of the poled device of ID to temperature variation in P(VDF-TrFE) device can be primarily attributed to the temperature sensitive change of V0 We would like to emphasize that the obtained m values, in this situation, are an effective mobility due to probable temperature dependence of other parameters, such as, for example, contact resistance between source/drain electrode and pentacene layer and carrier transport This temperature dependence, however, depends strongly on device geometry and measurement conditions According to previous works,[28,29] contribution of Au/pentacene contact resistance to the total resistance becomes negligible compared to that of the channel resistance at a high gate bias Hence, contribution of contact resistance to the temperature-dependent behavior of device at high gate bias turned into a less important component, like our case The thermally activated hopping transport was known to occur in pentacene below room temperature, in which hole mobility increases with temperature following an Arrhenius behavior.[30,31] However, as the temperature increased above a certain elevated value, mobility in pentacene eventually started to decrease.[32–35] This phenomenon is attributed to the increased carrier scattering occurring at elevated temperature.[33] Our comparative experiment re-performed with nonpyroelectric gate ß 2009 WILEY-VCH Verlag GmbH & Co KGaA, Weinheim 913 www.advmat.de COMMUNICATION dielectric material, poly(4-vinyl phenol) (PVP), in the same OTFT structure and poling operation mode, also showed a similar behavior to previous works[32–35] (see Supporting Information S6) In the case of our P(VDF-TrFE) device, high V0 values may increase hole concentration in the pentacene layer, producing high scattering even at room temperature Thus, increasing temperature is expected to cause higher scattering, and as a result reduce the effective mobility As mentioned, the highly crystalline b-phase P(VDF-TrFE) material also showed a positive pyroelectricity, which means higher Pr at elevated temperature, due to the thermal expansion of crystals Linear temperature dependence of extracted V0, shown in Figure 4b, confirmed this assumption Thus, it is reasonable to attribute the temperature behavior of ID in Figure 4a to this positive pyroelectricity of the highly crystalline b-phase P(VDFTrFE) materials Since the variation of ID with temperature depends on the measurement conditions, as shown in Figure 4a, it is better to define the device sensitivity in terms of dV0/dT, which is 4.38 V 8CÀ1 according to Figure 4b The deviation of the calculated V0 increased by time during repeated measurements, and is about 29.81 V, or 6.8 8C after h This may be due to the quality degradation of the pentacene layer when being exposed to air for a long time This is the first report on the direct use of a pyroelectric material as a gate dielectric layer in OTFTs and their temperaturesensitive behavior A decrease in the polarization due to thermal vibration was observed at high temperatures Poling operation mode was employed to avoid this problem, and allow the use of the large positive pyroelectric contributions of highly crystalline b-phases, by thermal expansion mechanisms The linear response of the crystalline phase polarization was extracted from a modified model The linear response of the device in a certain temperature range suggests its potential application in pyroelectric thermal sensors Further works should be done on obtaining higher stability and a larger dynamic range The use of a built-in pyroelectric gate dielectric would reduce the complexity of the fabrication process Integrating various smart organic dielectric materials directly into the OTFT device structure would enable the production of a vast range of functional or smart organic electronic devices Experimental Fabrication: Figure shows the structure of the OTFTs used in this report An Ni gate electrode was deposited on a clean polyimide (PI) film by the electroplating method [36] The material of the gate dielectric is a P(VDF-TrFE) (65 mol% VDF) purchased from Piezotech S.A A solution (20 wt%) of P(VDF-TrFE) dissolved in dimethylformamide (DMF) solvent was spun on the Ni gate electrode to a layer thickness of 500 nm, followed by drying at 60 8C to remove the DMF solvent Next, the gate dielectric layer was annealed on a hot plate at temperatures of up to 200 8C, in order to melt it completely This layer was maintained at 140 8C for h, and then naturally cooled down to room temperature in nitrogen ambient, to enhance the crystallinity of the b phase A pentacene layer followed by Au source/drain electrodes were deposited by a thermal evaporator [36] Characterizations: In order to investigate the pyroelectric property of P(VDF-TrFE) in the OTFT device, a poling strategy based on step-wise poling process was employed A basic step-wise poling process was carried out on the device at room temperature with grounded source/drain electrodes, by biasing the gate electrode up to À40 V The sample was then poled continuously at À40 V, while heating it from room temperature to 80 8C, maintaining it at this temperature for h, and finally cooling it down to room temperature to maximize the poling effect The output characteristics of the device placed on a hot chuck at different temperatures ranging from 25 to 80 8C were measured using an HP 1415B semiconductor parameter analyzer, to explore the pyroelectric behavior of the highly crystalline b phase P(VDF-TrFE) material in the OTFT device The channel dimensions chosen for the device characterization were 35 mm in length and 800 mm in width The measurements were taken with only a few measuring points, in order to prevent large changes in the polarization of the P(VDF-TrFE) layer The capacitance of the P(VDF-TrFE) material was measured using an Agilent E4980A precision LCR meter in a MIM structure Acknowledgements This work was supported by a Korea Research Foundation Grant funded by the Korean Government (MOEHRD, Basic Research Promotion Fund) (KRF-2006-311-D00574) This research was also financially supported by the Ministry of Knowledge Economy (MKE) and Korea Industrial Technology Foundation (KOTEF), through the Human Resource Training Project for Strategic Technology N.T.Tien also wishes to thank N T Xuyen for her valuable discussions Supporting Information is available online from Wiley InterScience or from the author Received: July 1, 2008 Revised: September 5, 2008 Published online: December 18, 2008 [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] Figure Organic thin-film transistor structure with pyroelectric gate dielectric 914 [11] [12] [13] [14] H Koezuka, A Tsumura, T Ando, Synth Met 1987, 18, 699 G Horowitz, Adv Mater 1998, 10, 365 C D Dimitrakopoulos, P R L Malenfant, Adv Mater 2002, 14, 99 A Facchetti, M H Yoon, T J Marks, Adv Mater 2005, 17, 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insured a large fraction of highly crystalline b phase, or a small fraction... not investigate highly crystalline materials, whose dipole moments are drastically affected by the thermal expansion of the b phase crystals, since the remnant polarization of highly crystalline. .. of highly crystalline b-phases, by thermal expansion mechanisms The linear response of the crystalline phase polarization was extracted from a modified model The linear response of the device in