... time. For example, the ADDsadd data for iteration 1, while MPY and MPYH multiply data for iteration 3, LDWs load data for iteration 8, SUB decrements the counter for iteration 7, and B branches for iteration ... *A4++,A3:A2 ;64-bit data in A2 and A3|| LDDW .D2 *B4++,B3:B2 ;64-bit data in B2 and B3;cycle 2|| LDDW .D1 *A4++,A3:A2 ;64-bit data in A2 and A3|| LDDW .D2 *B4++,B3:B2 ;64-bit data in B2 and B3;cycle ... *A4++,A3:A2 ;64-bit data in A2 and A3|| LDDW .D2 *B4++,B3:B2 ;64-bit data in B2 and B3;cycle 4|| LDDW .D1 *A4++,A3:A2 ;64-bit data in A2 and A3|| LDDW .D2 *B4++,B3:B2 ;64-bit data in B2 and B3|| [A1]...