A B C D E Compal Confidential Model Name : V5WE2/T2/C2 (EA/EG/BA50_HW) File Name : LA-9531P 1 Compal Confidential 2 EA50_HW M/B Schematics Document Intel Shark Bay ULT (Hasswell + Lynx Point-LP) AMD MARS / SUN 2013-04-11 3 REV:1.0 4 ZZZ Part Number DAZ0VR00100 V5WE2_PCB Description PCB V5WE2 LA-9531P LS-9531P/9532P 2012/07/10 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/07/10 Deciphered Date Title Cover Page THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC V5WE2 M/B LA-9531P Schematic Date: A B C D Sheet Thursday, April 11, 2013 E of 52 Rev 1.0 A B C D E CRT Conn Fan Control page 28 page 36 DP to VGA ITE IT6511FN HDMI Conn eDP Conn page 26 page 25 page 27 eDP DP x lanes HDMI x lanes 2.7GT/s 2.97GT/s DDI 204pin DDR3L-SO-DIMM X1 Intel Haswell ULT page 15 BANK 0, 1, 2, Memory BUS Dual Channel Haswell ULT 204pin DDR3L-SO-DIMM X1 1.35V DDR3L 1333/1600 Processor page 16 BANK 4, 5, 6, MINI Card WLAN USB port page 31 OPI AMD SUN/MARS with DDR3 x4 or page 17~23 PCIe 2.0 5GT/s PCIe 2.0 x4 5GT/s port port Flexible IO Lynx Point - LP PCH PCIe 2.0 5GT/s USBx8 SATA3.0 port LAN(GbE) 6.0 Gb/s SATA HDD Conn 6.0 Gb/s port page 32 page 04~14 LPC BUS in (SD) USB/B (port 1,2) page 33 USB port Finger Print (port 5) page 26 USB page 25 48MHz 3.3V 24MHz Touch Screen ENE KB9012 page (port 6) page 25 USB HDA Codec ALC3225 page 36 SPI SPI ROM x2 CLK=24MHz page 30 Int Speaker page Int MIC page 36 Combo Jack page 36 page 36 34 Sub Board page Touch Pad LS-9531P Power On/Off CKT page 38 page 35 page 33 EC ROM x1 (reserved) page 34 LS-9532P DC/DC Interface CKT Int.KBD page 35 PWR/B page 35 USB port page 33 1168pin BGA Card Reader RTC CKT CMOS Camera HD Audio SATA CDROM Conn page 32 29 USB 2.0 conn x2 SATA3.0 port Boardcom 57786Xpage USB 3.0 conn x1 USB/B (port 1,2) page 33 Compal Electronics, Inc Compal Secret Data Security Classification Power Circuit DC/DC 2012/07/10 Issued Date Deciphered Date 2013/07/10 Title V5WE2 M/B LA-9531P Schematic Date: A Block Diagrams THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC page 39~49 B C D Tuesday, March 26, 2013 Sheet E of 52 Rev 1.0 A B C D SIGNAL STATE Voltage Rails VIN Description Adapter power supply (19V) S1 S3 S5 N/A N/A N/A BATT+ Battery power supply (12.6V) N/A N/A N/A B+ AC or battery power rail for power circuit N/A N/A N/A +CPU_CORE Core voltage for CPU ON OFF OFF +VGA_CORE Core voltage for GPU ON OFF OFF HIGH ON ON ON HIGH HIGH ON ON ON LOW S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF Board ID / SKU ID Table for AD channel OFF OFF ON OFF OFF +0.95VSDGPU +0.95VSDGPU switched power rail for GPU ON OFF OFF Vcc Ra/Rc/Re +1.35V +1.35V power rail for DDR3L ON ON OFF Board ID +1.5VS +1.5V power rail for CPU ON OFF OFF ON OFF OFF ON OFF OFF +3VALW +3VALW always on power rail ON ON ON* +3VLP B+ to +3VLP power rail for suspend power ON ON ON +3VS +3VALW to +3VS power rail ON OFF OFF +3VSDGPU +3VS to +3VSDGPU power rail for GPU ON OFF OFF +5VALW +5VALWP to +5VALW power rail ON ON ON* +5VS +3VALW to +5VS power rail ON OFF OFF +RTCVCC RTC power ON ON ON Address Smart Battery 0001 011X EC SM Bus2 address Device On Board Thermal Senser Address 0100 110x VGA Internal Thermal Senser 0100 000x G Senser USB 2.0 1001 000x JDIMM1 ChannelB DIMM1 1001 010x JDIMM2 PCB Revision 0.1 0.2 0.3 0.4 0.5 1.0 External USB Port USB Port(Left 3.0) USB Port(Right 2.0) USB Port(Right 2.0) Port Address DIMM0 V AD_BID typ V 0.250 V 0.503 V 0.819 V 1.185 V 1.650 V 2.200 V 3.300 V USB Port Table 0011 000x PCH SM Bus address ChannelA V AD_BID V 0.216 V 0.436 V 0.712 V 1.036 V 1.453 V 1.935 V 2.500 V EHCI1 Mini Card (WLAN+BT) Camera USB 3.0 Port XHCI USB Port(Left 3.0) BTO Item BOM Structure Unpop @ Connector CONN@ EC 932 940@ EC 9012 9012@ UMA@ UMA Component VGA@ AMD GPU SPI ROM 1ROM@ SPI ROM 2ROM@ Assembly Level 45@ Cable for Power 45PWR@ KB Backlight BL@ Debug Only DEG@ EMC Component EMC@ Reservec for EMC XEMC@ eDP to LVDS TL@ TPM Module TPM@ G-Sensor GSEN@ V5WE2/T2/C2 EA50@ Reserved BA51@ Touch Screen TS@ For IOAC IOAC@ For EDP panel EDP@ Mars component SUN component VRAM x 8pcs 128@ VRAM Selection Micron 4G x Hynix 2G x Hynix 2G x X76@ X7601@ X7603@ X7604@ 2012/07/10 MARS@ SUN@ Compal Electronics, Inc Compal Secret Data Security Classification Issued Date V AD_BID max V 0.289 V 0.538 V 0.875 V 1.264 V 1.759 V 2.341 V 3.300 V BTO Option Table Board ID Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF Device 3.3V +/- 5% 100K +/- 5% Rb / Rd / Rf 8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5% NC BOARD ID Table EC SM Bus1 address ON HIGH HIGH ON +1.5VSDGPU power rail for GPU Clock HIGH +1.05V power rail for CPU +1.8VSDGPU power rail for GPU +VS LOW +0.675VS power rail for DDR3L terminator +1.5VSDGPU +V HIGH +0.675VS +1.8VSDGPU +VALW S1(Power On Suspend) +1.05VS_VTT Device SLP_S1# SLP_S3# SLP_S4# SLP_S5# Full ON Power Plane E 2013/07/10 Deciphered Date Title Notes List THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC V5WE2 M/B LA-9531P Schematic Date: A B C D Sheet Thursday, April 11, 2013 E of 52 Rev 1.0 DP to CRT 27 27 27 27 C54 C55 B58 C58 B55 A55 A57 B57 CPU_DP1_N0 CPU_DP1_P0 CPU_DP1_N1 CPU_DP1_P1 D 26 26 26 26 26 26 26 26 HDMI C51 C50 C53 B54 C49 B50 A53 B53 CPU_DP2_N0 CPU_DP2_P0 CPU_DP2_N1 CPU_DP2_P1 CPU_DP2_N2 CPU_DP2_P2 CPU_DP2_N3 CPU_DP2_P3 DDI1_TXN0 DDI1_TXP0 DDI1_TXN1 DDI1_TXP1 DDI1_TXN2 DDI1_TXP2 DDI1_TXN3 DDI1_TXP3 HASWELL_MCP_E U1A EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1 DDI EDP DDI2_TXN0 DDI2_TXP0 DDI2_TXN1 DDI2_TXP1 DDI2_TXN2 DDI2_TXP2 DDI2_TXN3 DDI2_TXP3 EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3 EDP_AUXN EDP_AUXP EDP_RCOMP EDP_DISP_UTIL C45 B46 A47 B47 EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1 25 25 25 25 C47 C46 A49 B49 D A45 B45 D20 A43 EDP_AUXN 25 EDP_AUXP 25 EDP_COMP R1 24.9_0402_1% +VCCIOA_OUT Trace width=20 mils,Spacing=25mil,Max length=100mils EDP_DISP_UTIL 25 Rev1p2 OF 19 HASWELL-MCP-E-ULT_BGA1168 @ Reserved for ESD C94 XEMC@ T20 T2 +1.05VS_VTT R68 62_0402_5% 34,39,40 H_PROCHOT# C Reserved for ESD R184 470_0603_5% DIMM_DRAMRST# 15,16 C96 6.8P_0402_50V8C XEMC@ R8 56_0402_5% H_PROCHOT#_R K63 C95 XEMC@ R6 6.8P_0402_50V8C C60 XEMC@ 6.8P_0402_50V8C 10K_0402_5% H_CPUPWRGD C61 PROC_DETECT CATERR PECI MISC PRDY PREQ PROC_TCK PROC_TMS PROC_TRST PROC_TDI PROC_TDO JTAG PROCHOT PROCPWRGD THERMAL R11 R13 R41 Close to AV15 1 200_0402_1% SM_RCOMP0 AU60 120_0402_1% SM_RCOMP1 AV60 100_0402_1% SM_RCOMP2 AU61 DIMM_DRAMRST# AV15 AV61 DDR_PG_CTRL 15 DDR_PG_CTRL SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 SM_DRAMRST SM_PG_CNTL1 BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7 DDR3 DDR3 Compensation Signals Reserved for ESD 1120 J62 K62 E60 E61 E59 F63 F62 XDP_PRDY#_R XDP_PREQ#_R XDP_TCK_R XDP_TMS_R XDP_TRST#_R XDP_TDI_R XDP_TDO_R @ @ @ @ @ @ @ T157 T158 T159 T160 T161 T162 T163 @ @ T164 T165 C PWR Reserved for ESD D61 K61 N62 @ @ 34 H_PECI +1.35V HASWELL_MCP_E U1B 6.8P_0402_50V8C J60 H60 H61 H62 K59 H63 K60 J61 XDP_BPM#0_R XDP_BPM#1_R @ T148 @ T149 @ T150 @ T151 @ T152 @ T153 Rev1p2 OF 19 HASWELL-MCP-E-ULT_BGA1168 @ B B U1 A U1 CPU_SR16Q_C1 SR16Q@ CPU_SR170_C1 SR170@ SA00006SX70 SA00006SMB0 A U1 U1 U1 U1 CPU_QEK2_C0 QEK2@ CPU_QEK4_C0 QEK4@ CPU_QEVG_C0 QEVG@ CPU_QEVE_C0 QEVE@ SA00006SJ40 SA00006NM50 SA00006SX30 SA00006SM30 Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 Issued Date Deciphered Date 2013/07/10 Title HSW MCP(1/11) DDI,MSIC,XDP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC V5WE2 M/B LA-9531P Schematic Date: Monday, April 08, 2013 Sheet of 52 Rev 1.0 U1C HASWELL_MCP_E U1D D C DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 AH63 AH62 AK63 AK62 AH61 AH60 AK61 AK60 AM63 AM62 AP63 AP62 AM61 AM60 AP61 AP60 AP58 AR58 AM57 AK57 AL58 AK58 AR57 AN57 AP55 AR55 AM54 AK54 AL55 AK55 AR54 AN54 AY58 AW58 AY56 AW56 AV58 AU58 AV56 AU56 AY54 AW54 AY52 AW52 AV54 AU54 AV52 AU52 AK40 AK42 AM43 AM45 AK45 AK43 AM40 AM42 AM46 AK46 AM49 AK49 AM48 AK48 AM51 AK51 SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63 SA_CLK#0 SA_CLK0 SA_CLK#1 SA_CLK1 SA_CKE0 SA_CKE1 SA_CKE2 SA_CKE3 SA_CS#0 SA_CS#1 SA_ODT0 SA_RAS SA_WE SA_CAS SA_BA0 SA_BA1 SA_BA2 DDR CHANNEL A SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15 SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7 SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7 SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1 AU37 AV37 AW36 AY36 SA_CLK_DDR#0 SA_CLK_DDR0 SA_CLK_DDR#1 SA_CLK_DDR1 AU43 AW43 AY42 AY43 AY34 AW34 AU34 AU35 AV35 AY41 DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 DDRA_CKE0_DIMMA 15 DDRA_CKE1_DIMMA 15 AP33 AR32 AP32 DDRA_ODT0 15 15 15 15 DDRA_CS0_DIMMA# 15 DDRA_CS1_DIMMA# 15 @ T4 DDR_A_RAS# 15 DDR_A_WE# 15 DDR_A_CAS# 15 DDR_A_BS0 15 DDR_A_BS1 15 DDR_A_BS2 15 AU36 DDR_A_MA0 AY37 DDR_A_MA1 AR38 DDR_A_MA2 AP36 DDR_A_MA3 AU39 DDR_A_MA4 AR36 DDR_A_MA5 AV40 DDR_A_MA6 AW39DDR_A_MA7 AY39 DDR_A_MA8 AU40 DDR_A_MA9 AP35 DDR_A_MA10 AW41DDR_A_MA11 AU41 DDR_A_MA12 AR35 DDR_A_MA13 AV42 DDR_A_MA14 AU42 DDR_A_MA15 AJ61 DDR_A_DQS#0 AN62 DDR_A_DQS#1 AM58 DDR_A_DQS#2 AM55 DDR_A_DQS#3 AV57 DDR_A_DQS#4 AV53 DDR_A_DQS#5 AL43 DDR_A_DQS#6 AL48 DDR_A_DQS#7 AJ62 DDR_A_DQS0 AN61 DDR_A_DQS1 AN58 DDR_A_DQS2 AN55 DDR_A_DQS3 AW57DDR_A_DQS4 AW53DDR_A_DQS5 AL42 DDR_A_DQS6 AL49 DDR_A_DQS7 AP49 AR51 AP51 15 DDR_A_D[0 63] 15 DDR_A_MA[0 15] 15 DDR_A_DQS#[0 7] 15 DDR_A_DQS[0 7] SM_DIMM_VREFCA 15 SA_DIMM_VREFDQ 15 SB_DIMM_VREFDQ 16 AY31 AW31 AY29 AW29 AV31 AU31 AV29 AU29 AY27 AW27 AY25 AW25 AV27 AU27 AV25 AU25 AM29 AK29 AL28 AK28 AR29 AN29 AR28 AP28 AN26 AR26 AR25 AP25 AK26 AM26 AK25 AL25 AY23 AW23 AY21 AW21 AV23 AU23 AV21 AU21 AY19 AW19 AY17 AW17 AV19 AU19 AV17 AU17 AR21 AR22 AL21 AM22 AN22 AP21 AK21 AK22 AN20 AR20 AK18 AL18 AK20 AM20 AR18 AP18 HASWELL_MCP_E SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63 SB_CK#0 SB_CK0 SB_CK#1 SB_CK1 SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3 SB_CS#0 SB_CS#1 SB_ODT0 SB_RAS SB_WE SB_CAS SB_BA0 SB_BA1 SB_BA2 SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15 DDR CHANNEL B SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7 SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7 AM38 AN38 AK38 AL38 SB_CLK_DDR#0 SB_CLK_DDR0 SB_CLK_DDR#1 SB_CLK_DDR1 AY49 AU50 AW49 AV50 16 16 16 16 DDRB_CKE0_DIMMB 16 DDRB_CKE1_DIMMB 16 D AM32 AK32 DDRB_CS0_DIMMB# 16 DDRB_CS1_DIMMB# 16 AL32 DDRB_ODT0 AM35 AK35 AM33 @ T5 DDR_B_RAS# 16 DDR_B_WE# 16 DDR_B_CAS# 16 AL35 AM36 AU49 DDR_B_BS0 16 DDR_B_BS1 16 DDR_B_BS2 16 AP40 DDR_B_MA0 AR40 DDR_B_MA1 AP42 DDR_B_MA2 AR42 DDR_B_MA3 AR45 DDR_B_MA4 AP45 DDR_B_MA5 AW46DDR_B_MA6 AY46 DDR_B_MA7 AY47 DDR_B_MA8 AU46 DDR_B_MA9 AK36 DDR_B_MA10 AV47 DDR_B_MA11 AU47 DDR_B_MA12 AK33 DDR_B_MA13 AR46 DDR_B_MA14 AP46 DDR_B_MA15 C AW30DDR_B_DQS#0 AV26 DDR_B_DQS#1 AN28 DDR_B_DQS#2 AN25 DDR_B_DQS#3 AW22DDR_B_DQS#4 AV18 DDR_B_DQS#5 AN21 DDR_B_DQS#6 AN18 DDR_B_DQS#7 AV30 DDR_B_DQS0 AW26DDR_B_DQS1 AM28 DDR_B_DQS2 AM25 DDR_B_DQS3 AV22 DDR_B_DQS4 AW18DDR_B_DQS5 AM21 DDR_B_DQS6 AM18 DDR_B_DQS7 16 DDR_B_D[0 63] 16 DDR_B_MA[0 15] 16 DDR_B_DQS#[0 7] B B 16 DDR_B_DQS[0 7] Rev1p2 OF 19 HASWELL-MCP-E-ULT_BGA1168 @ Rev1p2 OF 19 HASWELL-MCP-E-ULT_BGA1168 @ A A Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 Issued Date Deciphered Date 2013/07/10 Title HSW MCP(2/11) DDRIII THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC V5WE2 M/B LA-9531P Schematic Date: Tuesday, March 26, 2013 Sheet of 52 Rev 1.0 PCH_RTCX1 10M_0402_5% PCH_RTCX2 +RTCVCC Y1 32.768KHZ_12.5PF_Q13FC135000040 1 D R69 20K_0402_1% 2 R70 20K_0402_1% C150 1U_0402_10V6K C153 15P_0402_50V8J C154 15P_0402_50V8J C149 1U_0402_10V6K ME CMOS R72 @ PCH_RTCX1 PCH_RTCX2 1M_0402_5% SM_INTRUDER# PCH_INTVRMEN PCH_SRTCRST# PCH_RTCRST# 1 R73 R74 RTCX1 RTCX2 INTRUDER INTVRMEN SRTCRST RTCRST CMOS RTCRST close RAM door T6 T7 T8 T9 HDA_BIT_CLK HDA_SYNC HDA_RST# HDA_SDIN0 @ HDA_SDOUT @ @ @ AW8 AV11 AU8 AY10 AU12 AU11 AW10 AV10 AY8 HDA_BCLK/I2S0_SCLK HDA_SYNC/I2S0_SFRM HDA_RST/I2S_MCLK HDA_SDI0/I2S0_RXD HDA_SDI1/I2S1_RXD HDA_SDO/I2S0_TXD HDA_DOCK_EN/I2S1_TXD HDA_DOCK_RST/I2S1_SFRM I2S1_SCLK 330K_0402_5% 330K_0402_5% @ SATA_RN0/PERN6_L3 SATA_RP0/PERP6_L3 SATA_TN0/PETN6_L3 SATA_TP0/PETP6_L3 RTC SATA_RN1/PERN6_L2 SATA_RP1/PERP6_L2 SATA_TN1/PETN6_L2 SATA_TP1/PETP6_L2 36 HDA_SDIN0 PCH_INTVRMEN AW5 AY5 AU6 AV7 AV6 AU7 R71 0_0603_5% +RTCVCC HASWELL_MCP_E U1E +RTCVCC 1 R101 INTVRMEN H Integrated VRM enable L Integrated VRM disable AUDIO SATA SATA_RN3/PERN6_L0 SATA_RP3/PERP6_L0 SATA_TN3/PETN6_L0 SATA_TP3/PETP6_L0 SATA0GP/GPIO34 SATA1GP/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37 * T95 51_0402_5% @ R97 T21 T19 T15 T10 T11 T22 T12 HDA for AUDIO C 36 HDA_BITCLK_AUDIO 36 HDA_SYNC_AUDIO 36 HDA_RST_AUDIO# 36 HDA_SDOUT_AUDIO RP14 EMC@ @ PCH_JTAG_RST# PCH_JTAG_TCK @ PCH_JTAG_TDI @ PCH_JTAG_TDO @ PCH_JTAG_TMS @ @ @ PCH_TCK_JTAGX @ SATA_RN2/PERN6_L1 SATA_RP2/PERP6_L1 SATA_TN2/PETN6_L1 SATA_TP2/PETP6_L1 AU62 AE62 AD61 AE61 AD62 AL11 AC4 AE63 AV2 PCH_TRST PCH_TCK PCH_TDI PCH_TDO PCH_TMS RSVD RSVD JTAGX RSVD SATA_IREF RSVD RSVD SATA_RCOMP SATALED JTAG J5 H5 B15 A15 SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0 32 32 32 32 HDD J8 H8 A17 B17 SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1 32 32 32 32 ODD D J6 H6 B14 C15 F5 E5 C17 D17 V1 U1 V6 AC1 A12 L11 @ K10 @ C12 U3 R937 0_0402_5% @ PCH_GPIO34 PCH_GPIO35 PCH_GPIO36 PCH_GPIO37 SATA_IREF T13 T14 SATA_RCOMP PCH_SATALED# R10 10K_0402_5% EC_SCI# 34,9 PCH_GPIO34 PCH_GPIO35 PCH_GPIO36 PCH_GPIO37 R75 @ +1.05VS_ASATA3PLL 0_0603_5% within 500 mils R2 3.01K_0402_1% PCH_SATALED# 35 +3VS C HDA_BIT_CLK HDA_SYNC HDA_RST# HDA_SDOUT Rev1p2 OF 19 HASWELL-MCP-E-ULT_BGA1168 @ 33_0804_8P4R_5% R163 9012@ 0_0402_5% 34 HDA_SDO R161 940@ 32,34,7 SPI_WP1#_R 4.7K_0402_5% ME Debug W=20mils trace width 10mil +RTCBATT +CHGRTC B W=20mils +RTCVCC B D23 BAS40-04_SOT23-3 C151 0.1U_0402_16V4Z +RTCBATT R446 1K_0402_5% @ 20mil +RTCBATT_R 20mil A D32 CHN202UPT_SC70-3 @ C168 0.1U_0402_16V4Z @ - +RTCVCC A + +CHGRTC +RTCBATT JBATT1 LOTES_AAA-BAT-054-K01 CONN@ Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 Issued Date SP07000H700 Deciphered Date 2013/07/10 Title HSW MCP(3/11) RTC,SATA,XDP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC V5WE2 M/B LA-9531P Schematic Date: Thursday, April 18, 2013 Sheet of 52 Rev 1.0 HASWELL_MCP_E U1F PCH_GPIO18 C43 C42 U2 PCH_GPIO19 B41 A41 Y5 XTAL24_IN 1M_0402_5% R48 XTAL24_OUT PCH_GPIO18 Y2 24MHZ_12PF_X3G024000DC1H PCH_GPIO19 PCIE LAN C2 10P_0402_50V8J C3 10P_0402_50V8J 2 D WLAN 29 CLK_PCIE_LAN# 29 CLK_PCIE_LAN +3VS 29 LAN_CLKREQ# 31 CLK_PCIE_MINI1# 31 CLK_PCIE_MINI1 31,8 MINI1_CLKREQ# CLK_PCIE_LAN# CLK_PCIE_LAN 10K_0402_5% R52 C41 B42 AD1 CLK_PCIE_MINI1# CLK_PCIE_MINI1 MINI1_CLKREQ# B38 C37 N1 +3VS PCH_GPIO23 R216 10K_0402_5% @ VGA_CLKREQ# A39 B39 U5 PCH_GPIO23 B37 A37 T2 CLK_PEG_VGA# CLK_PEG_VGA 17 CLK_PEG_VGA# 17 CLK_PEG_VGA CLKOUT_PCIE_N0 CLKOUT_PCIE_P0 PCIECLKRQ0/GPIO18 CLOCK CLKOUT_PCIE_N2 CLKOUT_PCIE_P2 PCIECLKRQ2/GPIO20 SIGNALS CLKOUT_PCIE_N3 CLKOUT_PCIE_P3 PCIECLKRQ3/GPIO21 CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P 34,35 LPC_AD0 34,35 LPC_AD1 34,35 LPC_AD2 34,35 LPC_AD3 34,35 LPC_FRAME# PCH_SPI_MOSI PCH_SPI_MISO PCH_SPI_WP1# PCH_SPI_HOLD1# DEG@ DEG@ DEG@ DEG@ DEG@ 2 2 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% A25 B25 XTAL24_IN XTAL24_OUT K21 @ M21 @ C26 C35 C34 AK8 AL8 T16 T17 XCLK_BIASREF 1 1 R140 R141 R142 R148 AN15 AP15 2 2 CLKOUT_LPC0 CLKOUT_LPC1 B35 A35 R78 3.01K_0402_1% +1.05VS_AXCK_LCPLL D 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% EMC@ 22_0402_5% TPM@ 22_0402_5% R390 R395 CLK_BCLK_ITP# CLK_BCLK_ITP @ @ CLK_PCI_LPC 34 CLK_PCI_TPM 35 T184 T183 CLKOUT_PCIE_N5 CLKOUT_PCIE_P5 PCIECLKRQ5/GPIO23 Rev1p2 HASWELL_MCP_E U1G 1 1 TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8 CLKOUT_LPC_0 CLKOUT_LPC_1 CLKOUT_PCIE_N4 CLKOUT_PCIE_P4 PCIECLKRQ4/GPIO22 AU14 LPC_AD0 AW12 LPC_AD1 AY12 LPC_AD2 AW11 LPC_AD3 LPC_FRAME# AV12 PCH_SPI_CLK PCH_SPI_CS0# PCH_SPI_CS1# R572 R599 R603 R602 R604 RSVD RSVD DIFFCLK_BIASREF CLKOUT_PCIE_N1 CLKOUT_PCIE_P1 PCIECLKRQ1/GPIO19 OF 19 C PCH_SPI_CLK_1_R PCH_SPI_CS0#_1_R PCH_SPI_MOSI_1_R PCH_SPI_MISO_1_R 32 SPI_HOLD1#_R XTAL24_IN XTAL24_OUT HASWELL-MCP-E-ULT_BGA1168 @ VGA_CLKREQ# R221 10K_0402_5% 32 32 32 32 AA3 Y7 Y4 AC2 AA2 AA4 Y6 AF1 PCH_SPI_CLK_1 PCH_SPI_CS0# PCH_SPI_MOSI_1 PCH_SPI_MISO_1 PCH_SPI_HOLD1# LAD0 LAD1 LAD2 LAD3 LFRAME SMBALERT/GPIO11 SMBCLK SMBDATA SML0ALERT/GPIO60 SMBUS SML0CLK SML0DATA SML1ALERT/PCHHOT/GPIO73 SML1CLK/GPIO75 SML1DATA/GPIO74 LPC SPI_CLK SPI_CS0 SPI_CS1 SPI_CS2 SPI_MOSI SPI_MISO SPI_IO2 SPI_IO3 SPI C-LINK CL_CLK CL_DATA CL_RST D29 design for Debug board flash SPI ROM (can be short after MP) PCH_GPIO11 PCH_SMBCLK PCH_SMBDATA PCH_GPIO60 SML0CLK SML0DATA PCH_GPIO73 SML1CLK SML1DATA AF2 AD2 AF4 @ @ @ PCH_GPIO11 PCH_SMBCLK 31 PCH_SMBDATA 31 PCH_GPIO60 C PCH_GPIO73 +3VALW_PCH T23 T24 T25 SML0CLK RP8 SML0DATA PCH_SMBDATA PCH_SMBCLK SML1CLK SML1DATA 2.2K_0804_8P4R_5% R114 R113 2.2K_0402_5% 2.2K_0402_5% Rev1p2 OF 19 HASWELL-MCP-E-ULT_BGA1168 @ +BIOS_SPI AN2 AP2 AH1 AL2 AN1 AK1 AU4 AU3 AH3 +3VS +3VS Q7A DMN66D0LDW-7_SOT363-6 2 PCH_SPI_CS0# PCH_SPI_MISO_1 PCH_SPI_IO2_1 +BIOS_SPI RP19 PCH_SPI_IO3_1 PCH_SPI_CLK_1 PCH_SPI_MOSI_1 PCH_SPI_MOSI_1 PCH_SPI_CLK_1 PCH_SPI_IO3_1 PCH_SPI_MISO_1 EN25QH64-104HIP_SO8 1ROM@ R105 1ROM@ 1K_0402_5% R106 1ROM@ 1K_0402_5% PCH_SPI_IO2_1 PCH_SPI_IO3_1 R103 2ROM@ 1K_0402_5% R102 2ROM@ 1K_0402_5% R564 940@ 1K_0402_5% PCH_SPI_HOLD1# PCH_SPI_WP1# 1 PCH_SPI_MOSI PCH_SPI_CLK PCH_SPI_HOLD1# PCH_SPI_MISO 1ROM@ 15_0804_8P4R_5% D_CK_SCLK D_CK_SCLK 15,16,37 Reserve for EMI(Near SPI ROM) C152 10P_0402_50V8J 2 R104 XEMC@ +3VS PCH_SPI_CLK_1 XEMC@ 33_0402_5% 0.1U_0402_16V7K 2ROM@ RP20 PCH_SPI_MOSI PCH_SPI_MOSI_2 PCH_SPI_CLK PCH_SPI_CLK_2 PCH_SPI_HOLD1# PCH_SPI_IO3_2 PCH_SPI_MISO PCH_SPI_MISO_2 33_0804_8P4R_5% 2ROM@ U7 PCH_SPI_CS1# PCH_SPI_MISO_2 PCH_SPI_IO2_2 CS# DO WP# GND VCC HOLD# CLK DI PCH_SPI_IO3_2 PCH_SPI_CLK_2 PCH_SPI_MOSI_2 EN25QH32-104HIP_SO8 2ROM@ SML1CLK Q8A DMN66D0LDW-7_SOT363-6 PU 2.2K at EC side (+3VS) EC_SMB_CK2 18,24,34 C67 33_0402_5% 2ROM@ R109 D_CK_SDATA 15,16,37 Q7B DMN66D0LDW-7_SOT363-6 +3VS PCH_SPI_WP1# D_CK_SDATA PCH_SMBCLK 32,34,6 SPI_WP1#_R CS# VCC DO(IO1) HOLD#(IO3) WP#(IO2) CLK GND DI(IO0) R108 15_0402_5% 1ROM@ PCH_SMBDATA R119 4.7K_0402_5% B 0.1U_0402_16V7K U6 PCH_SPI_WP1# R116 4.7K_0402_5% C66 940@ RB751V40_SC76-2 1 D29 B 2 +3VS R305 9012@ 0_0402_5% SML1DATA EC_SMB_DA2 18,24,34 Q8B DMN66D0LDW-7_SOT363-6 Reserve for EMI(Near SPI ROM) A U6 RP19 MX25L6406EM2I-12G_SO8 940@ SA00004G600 U6 R108 33_0402_5% 2ROM@ C453 10P_0402_50V8J 2 R402 XEMC@ PCH_SPI_CLK_2 XEMC@ 33_0402_5% 2012/07/10 Issued Date 33_0804_8P4R_5% 2ROM@ EN25QH16-104HIP_SO8 2ROM@ SA00004UG00 Compal Electronics, Inc Compal Secret Data Security Classification SD309330A80 A Deciphered Date 2013/07/10 Title HSW MCP(4/11) CLK,SPI,SMBUS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC V5WE2 M/B LA-9531P Schematic Date: Tuesday, March 26, 2013 Sheet of 52 Rev 1.0 1 +3VS R59 32 XDP_DBRESET# DEG@ 0_0402_5% R227 10K_0402_5% DSWODVREN - On Die DSW VR Enable Enable(DEFAULT) Disable * LH SYS_RESET# R124 R125 D SUSWARN# @ SYS_PWROK R61 R62 R63 1 @ 34 PCH_PWROK 11,34 VCCST_PG_EC PCH_PWROK_R @ R117 PCH_RSMRST# @ R110 @ R79 34 PCH_RSMRST# SUSWARN# 34 PBTN_OUT# 10K_0402_5% Note: EC is +3VL change to @ +3VALW_PCH R156 AK2 AC3 AG2 AY7 AB5 AG7 SUSACK# SYS_RESET# 0_0402_5% SYS_PWROK_R 0_0402_5% PCH_PWROK_R 0_0402_5% PM_APWROK R64 0_0402_5% PLT_RST# 0_0402_5% PCH_RSMRST#_R SUSWARN# 0_0402_5% PBTN_OUT#_R PCH_ACIN 8.2K_0402_5% PCH_BATLOW# T31 @ AW6 AV4 AL7 AJ8 AN4 AF3 AM5 SUSACK SYS_RESET SYS_PWROK PCH_PWROK APWROK PLTRST AW7 AV5 AJ5 DSWVRMEN DPWROK WAKE CLKRUN/GPIO32 SUS_STAT/GPIO61 SUSCLK/GPIO62 SLP_S5/GPIO63 RSMRST SUSWARN/SUSPWRDNACK/GPIO30 PWRBTN ACPRESENT/GPIO31 BATLOW/GPIO72 SLP_S0 SLP_WLAN/GPIO29 V5 AG4 AE6 AP5 DSWODVREN PCH_RSMRST#_R PCH_PCIE_WAKE# 1K_0402_5% 8.2K_0402_5% CLKRUN# LPCPD# SUSCLK PM_SLP_S5# AJ6 AT4 AL5 AP4 AJ7 PM_SLP_S4# PM_SLP_S3# @ @ PM_SLP_LAN# C (Have internal PD) PCH_PWROK R207 10K_0402_5% @ 11,46 VGATE EDP_BKLCTL EDP_BKLEN EDP_VDDEN DDPB_CTRLCLK DDPB_CTRLDATA DDPC_CTRLCLK DDPC_CTRLDATA eDP SIDEBAND VCC A Y B8 A9 C6 24,25 PCH_INV_PWM 34 ENBKL 25 PCH_ENVDD EC_SMI# VGA_ON DGPU_HOLD_RST# PCH_GPIO80 T26 34 EC_SMI# 38,9 VGA_ON DGPU_HOLD_RST# R310 10K_0402_5% @ VGATE_3V PCH_GPIO55 37 G_SEN_INT PCH_GPIO51 U17 NC +3VS +1.05VS_VTT HASWELL_MCP_E U1I +3VS 0: Port B or C is not detected U43 MC74VHC1G08DFT2G_SC70-5 @ R208 10K_0402_5% R65 0_0402_5% C 1: Port B or C is detected G A SYS_PWROK P Y VGATE_3V +3VALW_PCH DDPC_CTRLDATA: Port C Detected * DDPB_CTRLDATA: Port B Detected PCH_ACIN B T29 not support Deep S4,S5 can NC HASWELL-MCP-E-ULT_BGA1168 @ +3VS @ PM_SLP_S4# 34 PM_SLP_S3# 34 T30 T96 R118 @ 10K_0402_5% RB751V40_SC76-2 PCH_PWROK T27 T28 Rev1p2 OF 19 Note: Deep Sx need use EC GPIO for ACPRESENT function 34,39,41 ACIN D PCH_PCIE_WAKE# 29 +3VALW_PCH +3VS CLKRUN# 35 LPCPD# 35 SUSCLK 34 PM_SLP_S5# 34 R120 R157 @ @ SLP_S4 SLP_S3 SLP_A SLP_SUS SLP_LAN +3VALW_PCH R245 100K_0402_5% @ @ D21 2 330K_0402_5% 330K_0402_5% @ SYSTEM POWER MANAGEMENT R206 0_0402_5% 34,35 PLT_RST# B +RTCVCC HASWELL_MCP_E U1H VGATE_3V 34 U6 P4 N4 N2 AD4 @ U7 L1 L3 R5 L4 PCH_GPIO55 G_SEN_INT Project_ID1 PCH_GPIO51 Project_ID0 PIRQA/GPIO77 PIRQB/GPIO78 PIRQC/GPIO79 PIRQD/GPIO80 PME DISPLAY GPIO GPIO55 GPIO52 GPIO54 GPIO51 GPIO53 DDPB_AUXN DDPC_AUXN DDPB_AUXP DDPC_AUXP DDPB_HPD DDPC_HPD EDP_HPD B9 2.2K_0402_5% C9 R271 D9 DDI2_CTRL_CK DDI2_CTRL_CK 26 D11 DDI2_CTRL_DATA DDI2_CTRL_DATA 26 C5 B6 B5 A6 DDI1_AUX_DN DDI1_AUX_DN 27 DDI1_AUX_DP DDI1_AUX_DP 27 C8 A8 D6 CPU_DP_HPD 27 CPU_HDMI_HPD 26 CPU_EDP_HPD 25 B GND 74AUP1G07GW_TSSOP5 @ OF 19 Rev1p2 HASWELL-MCP-E-ULT_BGA1168 @ +3VS R405 0_0402_5% @ R403 0_0402_5% @ +3VS MINI1_CLKREQ# 31,7 DEVSLP0 32,9 +3VS R391 100K_0402_5% VGA@ IN1 IN2 OUT PLT_RST_BUF# 29,31 R416 100K_0402_5% U30 MC74VHC1G08DFT2G_SC70-5 R214 10K_0402_5% R215 10K_0402_5% Project_ID0 Project ID Project_ID1 R204 10K_0402_5% @ R205 10K_0402_5% @ A U37 MC74VHC1G08DFT2G_SC70-5 VGA@ +3VS +3VS PLT_RST# PLTRST_VGA# 17 VCC OUT GND IN2 IN1 GND DGPU_HOLD_RST# PLT_RST# VCC G_SEN_INT PCH_GPIO80 MINI1_CLKREQ# DEVSLP0 10K_0804_8P4R_5% RP27 *V5WE2/T2 Reserved Reserved Reserved Project_ID1 Project_ID0 GPIO54 GPIO53 0 1 1 A Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 Issued Date Deciphered Date 2013/07/10 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC V5WE2 M/B LA-9531P Schematic Date: HSW MCP(5/11) PM,GPIO,DDI Tuesday, March 26, 2013 Sheet of 52 Rev 1.0 +3VS +3VS RP24 D RP25 RP26 RP16 RP28 RP29 RP30 C RP31 RP32 R311 10K_0402_5% PCH_GPIO67 PCH_GPIO65 PCH_GPIO6 PCH_GPIO64 10K_0804_8P4R_5% PCH_GPIO84 PCH_GPIO0 PCH_GPIO3 PCH_GPIO89 10K_0804_8P4R_5% PCH_GPIO17 PCH_GPIO23 PCH_GPIO76 PCH_GPIO50 10K_0804_8P4R_5% PCH_GPIO70 PCH_GPIO51 PCH_GPIO55 RP36 PCH_GPIO88 PCH_GPIO92 PCH_GPIO85 PCH_GPIO39 10K_0804_8P4R_5% +1.05VS_VTT PCH_GPIO51 PCH_GPIO83 PCH_GPIO55 SERIRQ 10K_0804_8P4R_5% EC_IN_RW PCH_GPIO69 PCH_GPIO4 PCH_GPIO7 10K_0804_8P4R_5% PCH_GPIO5 PCH_GPIO1 PCH_GPIO94 PCH_GPIO93 10K_0804_8P4R_5% PCH_GPIO2 PCH_GPIO91 PCH_GPIO90 PCH_GPIO38 10K_0804_8P4R_5% PCH_GPIO19 PCH_GPIO36 VGA_ON EC_KBRST# 10K_0804_8P4R_5% PCH_GPIO18 PCH_GPIO35 PCH_GPIO48 PCH_GPIO34 10K_0804_8P4R_5% PCH_GPIO71 PCH_GPIO49 PCH_GPIO16 PCH_GPIO37 10K_0804_8P4R_5% HASWELL_MCP_E U1J R144 1K_0402_5% D P1 PCH_GPIO76 PCH_GPIO8 AU2 AM7 EC_LID_OUT# AD6 Y1 PCH_GPIO16 T3 PCH_GPIO17 PCH_GPIO24 AD5 PCH_GPIO27 AN5 PCH_GPIO28 AD7 PCH_GPIO26 AN3 34 EC_LID_OUT# PCH_GPIO19 PCH_GPIO36 VGA_ON 38,8 PCH_GPIO56 PCH_GPIO57 PCH_GPIO58 PCH_GPIO59 PCH_GPIO44 PCH_GPIO47 PCH_GPIO48 PCH_GPIO49 PCH_GPIO50 PCH_GPIO71 PCH_GPIO13 PCH_GPIO14 PCH_GPIO25 PCH_GPIO45 PCH_GPIO46 PCH_GPIO18 PCH_GPIO35 PCH_GPIO34 PCH_GPIO37 EC_SCI# 34,6 EC_SCI# R66 0_0402_5% @ AG6 AP1 AL4 AT5 AK4 AB6 U4 Y3 P3 Y2 AT3 AH4 AM4 AG5 AG3 PCH_GPIO9 AM3 PCH_GPIO10 AM2 P2 DEVSLP0 C4 PCH_GPIO70 L2 PCH_GPIO38 N5 PCH_GPIO39 V2 PCH_SPKR 32,8 DEVSLP0 36 PCH_SPKR BMBUSY/GPIO76 GPIO8 LAN_PHY_PWR_CTRL/GPIO12 GPIO15 GPIO16 GPIO17 GPIO24 GPIO27 GPIO28 GPIO26 GPIO56 GPIO57 GPIO58 GPIO59 GPIO44 GPIO47 GPIO48 GPIO49 GPIO50 HSIOPC/GPIO71 GPIO13 GPIO14 GPIO25 GPIO45 GPIO46 CPU/ MISC GPIO LPIO GPIO9 GPIO10 DEVSLP0/GPIO33 SDIO_POWER_EN/GPIO70 DEVSLP1/GPIO38 DEVSLP2/GPIO39 SPKR/GPIO81 PCH_GPIO23 THERMTRIP RCIN/GPIO82 SERIRQ PCH_OPI_RCOMP RSVD RSVD GSPI0_CS/GPIO83 GSPI0_CLK/GPIO84 GSPI0_MISO/GPIO85 GSPI0_MOSI/GPIO86 GSPI1_CS/GPIO87 GSPI1_CLK/GPIO88 GSPI1_MISO/GPIO89 GSPI_MOSI/GPIO90 UART0_RXD/GPIO91 UART0_TXD/GPIO92 UART0_RTS/GPIO93 UART0_CTS/GPIO94 UART1_RXD/GPIO0 UART1_TXD/GPIO1 UART1_RST/GPIO2 UART1_CTS/GPIO3 I2C0_SDA/GPIO4 I2C0_SCL/GPIO5 I2C1_SDA/GPIO6 I2C1_SCL/GPIO7 SDIO_CLK/GPIO64 SDIO_CMD/GPIO65 SDIO_D0/GPIO66 SDIO_D1/GPIO67 SDIO_D2/GPIO68 SDIO_D3/GPIO69 D60 H_THERMTRIP# V4 T4 SERIRQ AW15 PCH_OPIRCOMP AF20 @ T106 AB21 @ T32 R6 L6 N6 L8 R7 L5 N7 K2 J1 K3 J2 G1 K4 G2 J3 J4 F2 F3 G4 F1 E3 F4 D3 E4 C3 E2 PCH_GPIO83 PCH_GPIO84 PCH_GPIO85 PCH_GPIO86 DGPU_PRSNT# PCH_GPIO88 PCH_GPIO89 PCH_GPIO90 PCH_GPIO91 PCH_GPIO92 PCH_GPIO93 PCH_GPIO94 PCH_GPIO0 PCH_GPIO1 PCH_GPIO2 PCH_GPIO3 PCH_GPIO4 PCH_GPIO5 PCH_GPIO6 PCH_GPIO7 PCH_GPIO64 PCH_GPIO65 PCH_GPIO66 PCH_GPIO67 EC_IN_RW PCH_GPIO69 RP23 EC_KBRST# 34 SERIRQ 34,35 R145 49.9_0402_1% C EC_IN_RW 35 Rev1p2 10 OF 19 HASWELL-MCP-E-ULT_BGA1168 @ +3VALW_PCH B +3VS RP37 RP38 RP39 RP40 R248 10K_0402_5% PCH_GPIO11 SUSWARN# USB_OC3# 10 +3VALW_PCH +3VALW_PCH USB_OC1# 10 R301 10K_0402_5% PCH_GPIO56 +3VS RP35 PCH_GPIO10 PCH_GPIO11 SUSWARN# USB_OC3# 10K_0804_8P4R_5% PCH_GPIO8 USB_OC1# PCH_GPIO13 PCH_GPIO26 10K_0804_8P4R_5% PCH_GPIO45 PCH_GPIO14 PCH_GPIO44 PCH_GPIO46 10K_0804_8P4R_5% DGPU_HOLD_RST# PCH_GPIO47 PCH_GPIO24 PCH_GPIO28 10K_0804_8P4R_5% PCH_GPIO58 PCH_GPIO59 PCH_GPIO27 PCH_GPIO25 10K_0804_8P4R_5% USB_OC2# PCH_GPIO60 USB_OC0# PCH_GPIO9 10K_0804_8P4R_5% PCH_GPIO73 R269 R303 10K_0402_5% 1 RP34 @ 1K_0402_1% PCH_SPKR B PCH_GPIO57 SPKR / GPIO81 : NO REBOOT DGPU_HOLD_RST# 1: ENABLED * USB_OC2# 10 PCH_GPIO60 USB_OC0# 10,33 0: DISABLED (Have internal PD) +3VS +3VALW_PCH PCH_GPIO66 PCH_GPIO86 R247 PCH_GPIO73 @ 10K_0402_5% EC_LID_OUT# GPIO15 : TLS Confidentiality R272 R273 R270 @ 1K_0402_1% 1K_0402_1% 1K_0402_5% @ GSPI0_MOSI / GPIO86 : Boot BIOS Strap SDIO_D0 / GPIO66 : Top-Block Swap Override +3VS R306 10K_0402_5% UMA@ * 1: Intel ME TLS with confidentiality 1: ENABLED 0: Intel ME TLS with no confidentiality 0: SPI ROM (Have internal PD) (Have internal PD) * 1: ENABLED * 0: DISABLED (Have internal PD) A GPIO87 DGPU_PRSNT# DGPU_PRSNT# DIS,Optimus UMA R219 10K_0402_5% VGA@ A Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 Issued Date Deciphered Date 2013/07/10 Title HSW MCP(6/11) GPIO,LPIO THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC V5WE2 M/B LA-9531P Schematic Date: Tuesday, March 26, 2013 Sheet of 52 Rev 1.0 HASWELL_MCP_E U1K C76 C77 1 VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K PEG_GTX_C_HRX_N0 F10 PEG_GTX_C_HRX_P0 E10 PEG_HTX_C_GRX_N0 C78 PEG_HTX_C_GRX_P0 C79 1 VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K PEG_HTX_GRX_N0 PEG_HTX_GRX_P0 PEG_GTX_HRX_N1 PEG_GTX_HRX_P1 C80 C81 1 VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K PEG_GTX_C_HRX_N1 F8 PEG_GTX_C_HRX_P1 E8 PEG_HTX_C_GRX_N1 C82 PEG_HTX_C_GRX_P1 C83 1 VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K PEG_HTX_GRX_N1 PEG_HTX_GRX_P1 PEG_GTX_HRX_N2 PEG_GTX_HRX_P2 C84 C85 1 VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K PEG_GTX_C_HRX_N2 H10 PEG_GTX_C_HRX_P2 G10 PEG_HTX_C_GRX_N2 C86 PEG_HTX_C_GRX_P2 C87 1 VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K PEG_HTX_GRX_N2 PEG_HTX_GRX_P2 PEG_GTX_HRX_N3 PEG_GTX_HRX_P3 C88 C89 1 VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K PEG_GTX_C_HRX_N3 E6 PEG_GTX_C_HRX_P3 F6 PEG_HTX_C_GRX_N3 C90 PEG_HTX_C_GRX_P3 C91 1 VGA@ 0.1U_0402_16V7K VGA@ 0.1U_0402_16V7K PEG_HTX_GRX_N3 PEG_HTX_GRX_P3 B22 A21 PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 G11 F11 PCIE_PTX_DRX_N3 PCIE_PTX_DRX_P3 C29 B30 PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 F13 G13 PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4 B29 A29 PEG_GTX_HRX_N0 PEG_GTX_HRX_P0 PEG_GTX_HRX_N[0 3] 17 PEG_GTX_HRX_P[0 3] 17 D PEG_HTX_C_GRX_N[0 3] 17 PEG_HTX_C_GRX_P[0 3] 17 PCIE LAN 29 PCIE_PRX_DTX_N3 29 PCIE_PRX_DTX_P3 C155 C160 29 PCIE_PTX_C_DRX_N3 29 PCIE_PTX_C_DRX_P3 WLAN 1 0.1U_0402_16V7K 0.1U_0402_16V7K 31 PCIE_PRX_DTX_N4 31 PCIE_PRX_DTX_P4 C156 C157 31 PCIE_PTX_C_DRX_N4 31 PCIE_PTX_C_DRX_P4 1 0.1U_0402_16V7K 0.1U_0402_16V7K C23 C22 B23 A23 B21 C21 G17 F17 C C30 C31 F15 G15 B31 A31 PERN5_L0 PERP5_L0 USB2N0 USB2P0 PETN5_L0 PETP5_L0 USB2N1 USB2P1 PERN5_L1 PERP5_L1 USB2N2 USB2P2 PETN5_L1 PETP5_L1 USB2N3 USB2P3 PERN5_L2 PERP5_L2 USB2N4 USB2P4 PETN5_L2 PETP5_L2 USB2N5 USB2P5 PERN5_L3 PERP5_L3 USB2N6 USB2P6 PETN5_L3 PETP5_L3 USB2N7 USB2P7 PERN3 PERP3 USB3.0 P1 PETN3 PETP3 USB PCIe USB3.0 P2 PETN4 PETP4 R232 R155 1 @ 3.01K_0402_1% 0_0603_5% @ E15 @ E13 A27 B27 USB3RN1 USB3RP1 USB3TN1 USB3TP1 PERN4 PERP4 USB3RN2 USB3RP2 USB3TN2 USB3TP2 AN8 AM8 USB20_N0 USB20_P0 AR7 AT7 USB20_N1 USB20_P1 AR8 AP8 USB20_N2 USB20_P2 USB20_N0 33 USB20_P0 33 USB2 Port (USB3.0 P0) USB20_N1 33 USB20_P1 33 USB2 Port USB20_N2 33 USB20_P2 33 USB2 Port AR10 AT10 D AM15 AL15 USB20_N4 USB20_P4 AM13 AN13 USB20_N5 USB20_P5 AP11 AN11 USB20_N6 USB20_P6 AR13 AP13 USB20_N7 USB20_P7 G20 H20 USB20_N4 31 USB20_P4 31 Mini Card(WLAN+BT) USB20_N5 33 USB20_P5 33 Finger Print USB20_N6 25 USB20_P6 25 Touch Screen USB20_N7 25 USB20_P7 25 Camera PCH_USB3_RX0_N 33 PCH_USB3_RX0_P 33 C33 B34 USB3 Port PCH_USB3_TX0_N 33 PCH_USB3_TX0_P 33 E18 F18 B33 A33 PERN1/USB3RN3 PERP1/USB3RP3 C USB3.0 P3 / PCIE P1 PETN1/USB3TN3 PETP1/USB3TP3 PERN2/USB3RN4 PERP2/USB3RP4 USB3.0 P4 / PCIE P2 USBRBIAS USBRBIAS RSVD RSVD PETN2/USB3TN4 PETP2/USB3TP4 OC0/GPIO40 OC1/GPIO41 OC2/GPIO42 OC3/GPIO43 +1.05VS_AUSB3PLL T33 T34 PCIE_RCOMP PCIE_IREF RSVD RSVD PCIE_RCOMP PCIE_IREF AJ10 USBRBIAS AJ11 AN10 @ T35 AM10@ T36 AL3 AT1 AH2 AV3 R154 22.6_0402_1% USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC0# USB_OC1# USB_OC2# USB_OC3# 11 OF 19 CAD note: Route single‐end 50‐ohms and max 450‐mils length Avoid routing next to clock pins or under stitching capacitors. Recommended minimum spacing to other signal traces is 15 mils 33,9 9 C612 0.1U_0402_16V4Z @ Rev1p2 HASWELL-MCP-E-ULT_BGA1168 @ B B A A Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 Issued Date Deciphered Date 2013/07/10 Title HSW MCP(7/11) PCIE,USB THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC V5WE2 M/B LA-9531P Schematic Date: Tuesday, March 26, 2013 Sheet 10 of 52 Rev 1.0 A B C D +5VS VIN 1 @ PR102 47K_0402_1% - BATT_TEMP 34,40 @ PR104 1.5M_0402_5% @ PC106 100P_0402_50V8J @ PR101 100K_0402_1% 2 @ PD102 LL4148_LL34-2 + O 1 S @ PU102A LM393DR_SO8 1 2 G P @ PC105 0.022U_0402_16V7K D @ PQ101A DMN66D0LDW-7_SOT363-6 @ PR103 10K_0402_1% G 34,4,40 H_PROCHOT# EMI@ PC104 1000P_0603_50V7K 2 EMI@ PC102 100P_0603_50V8 +3VALW ESD@ PC101 0.1U_0603_25V7K DC_IN_S1 2 GND GND EMI@ PL101 HCB2012KF-121T50_0805 CONN@ PJP101 ACES_50305-00441-001_4P @ PR106 47K_0402_1% @ PR108 68_1206_5% - ACIN 34,41,8 2 @ PR107 1.5M_0402_5% @ PR109 68_1206_5% VS 35 51ON# @ PR105 0_0402_5% +3VLP - @ PC109 0.1U_0603_25V7K 930@ PC108 0.22U_0603_25V7K 930@ PR111 22K_0402_1% 2 930@ PR110 100K_0402_1% 1 930@ PQ102 TP0610K-T1-E3_SOT23-3 + O 4 JUMP_43X39 N1 @ PD103 LL4148_LL34-2 S 2 BATT+ @ PJ101 @ PQ101B DMN66D0LDW-7_SOT363-6 @ PD101 LL4148_LL34-2 930@ PD104 LL4148_LL34-2 G @ PC107 0.022U_0402_16V7K D @ PU102B LM393DR_SO8 P VIN G H_PROCHOT# 2 PBJ101 @ + PR113 560_0603_5% PR112 560_0603_5% +CHGRTC +RTCBATT ML1220T13RE 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 Deciphered Date 2013/07/10 Title DCIN V5WE2 M/B LA-9531P Schematic THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C Tuesday, March 26, 2013 D Sheet 39 of 52 Rev 0.1 A B C D +3VLP 1 1 @ PR230 10K_0402_1% BATT_TEMP 34,39 @ PU204 @ PR231 100K_0402_1% EC_SMB_CK1 34,41 2 EC_SMB_DA1 34,41 MAINPWON VCC TMSNS1 GND RHYST1 OT1 TMSNS2 1 2 @ PR229 10K_0402_1% PR203 1K_0402_1% PR208 1K_0402_1% 2 PR201 100_0402_1% @ PC209 0.1U_0603_25V7K EMI@ PC202 1000P_0402_50V7K PR202 100_0402_1% +3VLP 2 PR206 6.49K_0402_1% BATT+ EMI@ PL201 HCB2012KF-121T50_0805 1 CONN@ PJP201 SUYIN_200275GR008G13GZR 10 GND GND BATT_S1 7 BI TH EC_SMCK EC_SMDA 2 1 @ PR232 47K_0402_1% OT2 RHYST2 @ PH202 100K_0402_1%_TSM0B104F4251RZ G718TM1U_SOT23-8 2 For KB9012 OTP @ PQ202 TP0610K-T1-E3_SOT23-3 1.2V, Active 65W 84W,1.2V 56W,1.2V 56 2.255V, Recovery 90W 117W,1.2V 77W,1.2V PH201 under CPU botten side : CPU thermal protection at 92 degree C ( shutdown ) Recovery at 56 degree C +3VLP 120W 34,42 MAINPWON D S G S MAINPWON @ PQ204 2N7002KW_SOT323-3 @ PR221 1_0402_1% VCC TMSNS1 GND RHYST1 ~OT1TMSNS2 PH201 100K_0402_1%_TSM0B104F4251RZ 2 @ PR222 10.5K_0402_1% B value:4250K±1% +VSB PR204 127K_0402_1% H_PROCHOT#_EC 34 65W@ PR225 78.7K_0402_1% 90W@ PR225 53.6K_0402_1% +VSBP VCIN1_PROCHOT 34 @ PR222 16.2K_0402_1% G718TM1U_SOT23-8 @ PJ201 1 VCIN0_PH 34 @ PR220 9.53K_0402_1% ~OT2 RHYST2 90W@ PR218 78.7K_0402_1% 2 PU201 @ 65W@ PR218 23.2K_0402_1% @ PR217 100K_0402_1% PR228 12.4K_0402_1% @ PR214 21K_0402_1% 2 1 34,39,4 H_PROCHOT# @ PQ203 2N7002KW_SOT323-3 @ PC208 1U_0402_6.3V6K @ PC207 0.1U_0603_25V7K @ PR216 100K_0402_1% D G +EC_VCCA ADP_I 34,41 42 SPOK Recovery @ @ PR213 100K_0402_1% @ PR219 0_0402_5% Active 92 1 2 @ +VSBP PC206 0.1U_0603_25V7K VL @ PR212 22K_0402_1% 1 1 @ PR211 100K_0402_1% 34 EC_SPOK PC205 0.22U_0603_25V7K B+ For KB9012 sense 20mΩ PR227 1_0402_1% @ @ 2 For 65W adapter==>action 84W , Recovery 56W For 90W adapter==>action 117W , Recovery 77W PR226 0_0402_5% JUMP_43X39 34 ECAGND Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 Deciphered Date 2013/07/10 Title BATTERY CONN / OTP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.1 V5WE2 M/B LA-9531P Schematic Date: A B C Tuesday, March 26, 2013 D Sheet 40 of 52 A B C D D for reverse input protection S G SRN SRN 11 PR322 422K_0402_1% L >H H >L PR305 1_0402_1% PC308 0.01U_0402_50V7K PC318 10U_0603_25V6M PC315 10U_0603_25V6M CSON1 PC317 0.1U_0402_25V6 Typ 18.006V 17.593V Max 18.504V 18.237V Close EC Typ Max 4.006A 4.108A ADP_I 34,40 @ PC325 0.1U_0402_25V6 S Min 3.906A EC_SMB_DA1 34,40 PC324 100P_0402_50V8J Min 17.520V 16.967V ILIM and external DPM EC_SMB_CK1 34,40 D PC326 2200P_0402_50V7K PQ308 2N7002KW_SOT323-3 G Vin Detector PR324 64.9K_0402_1% @ PR325 0_0402_5% CSOP1 +3VALW 2 34,38,43,44,45 SUSP# 34 FSTCHG BATT+ 3 PR317 316K_0402_1% ACDET PQ307 PDTC115EU_SOT323-3 PR323 100K_0402_1% 2 CSON1 PR315 6.8_0603_5% BQ24735_BATDRV PR314 10_0603_5% CSOP1 12 2 PR321 2M_0402_1% SRP PC322 0.01U_0402_25V7K VIN PR318 2M_0402_1% 13 ILIM 1 ACDET PR320 100K_0402_1% 34,39,8 ACIN BATDRV SCL ACOK ACDRV DL_CHG 14 10 ACOK SRP SDA PR316 100K_0402_1% CMSRC PL302 PR312 10UH_FDSD0630-H-100M-P3_3.8A_20% 0.01_1206_1% BQ24735_LX CHG PQ306 SIS412DN-T1-GE3_POWERPAK8-5 15 PC321 0.1U_0603_25V7K GND PC314 0.1U_0402_25V6 @EMI@ PC316 @EMI@ PR313 680P_0402_50V7K 4.7_1206_5% 2 ACP IOUT PQ305 SIS412DN-T1-GE3_POWERPAK8-5 PC313 1U_0603_25V6K LODRV BQ24735_ACDRV PR310 0_0603_5% BQ24735_BST 16 17 BTST 18 DH_CHG BQ24735_LX ACN ACDET +3VLP PR306 4.12K_0603_1% PD303 RB751V-40_SOD323-2 BQ24735RGRR_QFN20_3P5X3P5 BQ24735_CMSRC @ DH_CHG-1 PAD PR311 0_0603_5% DH_CHG REGN HIDRV 21 VCC PU301 19 PC312 1U_0603_25V6K PHASE 2 1 BQ24735_ACP BQ24735_ACN BQ24735_BATDRV 1 PC310 0.047U_0402_25V7K PR309 10_1206_1% 1 PD302 BAS40CW_SOT323-3 EMI@ PC307 2200P_0402_50V7K VIN @EMI@ PC305 0.1U_0402_25V6 4x4x2 EMI@ PL301 1.2UH_PNS40201R2YAF_3A_30% PC304 10U_0603_25V6M PC306 0.1U_0402_25V6 PR308 4.12K_0603_1% PR307 4.12K_0603_1% 2 CHG_B+ PR303 0.02_1206_1% PC302 0.1U_0402_25V6 @ B+ PC303 10U_0603_25V6M P2 PQ303 SIS412DN-T1-GE3_POWERPAK8-5 5 PC301 2200P_0402_50V7K 100ppm P1 PQ302 AON6414AL_DFN8-5 PR304 1_0402_1% VIN PR301 3M_0402_5% PC311 0.1U_0603_25V7K PR302 1M_0402_5% PQ304 SIS412DN-T1-GE3_POWERPAK8-5 20 PC309 0.1U_0402_25V6 PQ301 2N7002KW_SOT323-3 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 Deciphered Date 2013/07/10 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC CHARGER V5WE2 M/B LA-9531P Schematic Date: A B C Tuesday, March 26, 2013 D Sheet 41 of 52 Rev 0.1 D D @ PR415 0_0402_5% LDO +3VLP PC422 4.7U_0603_6.3V6K SY8208BQNC_QFN10_3X3 PR416 100K_0402_1% 40 SPOK 1K_0402_1% 2 +3VALWP 1UH_FDSD0630-H-1R0M-P3_11A_20% @EMI@ PC423 3.3V LDO 150mA~300mA C PR414 PL402 LX_3V 0.01U_0402_25V7K FB-1_3V B+ PC413 22U_0805_6.3V6M PG 10 PC428 PR401 499K_0402_1% ENLDO_3V5V PC414 22U_0805_6.3V6M OUT PR404 PC401 2BST-1_3V 0_0603_5% 0.1U_0603_25V7K PC416 22U_0805_6.3V6M 2 +3VALWP GND BST_3V @ PR413 0_0402_5% 3V5V_EN LX @ FB_3V PC411 22U_0805_6.3V6M BS PR410 1K_0402_1% 2 EN2 3V_EN_R 680P_0603_50V7K 4.7_1206_5% IN @EMI@ PR409 13V_SN PC405 10U_0805_25V6K PC408 10U_0805_25V6K EMI@ PC410 2200P_0402_50V7K @EMI@ PC403 0.1U_0402_25V6 EN1 3V_VIN IN @ PC425 4.7U_0603_6.3V6K PR405 150K_0402_1% EN1 and EN2 dont't floating PU401 EMI@ PL401 HCB2012KF-121T50_0805 @ PC426 4.7U_0603_6.3V6K B+ C Vout is 3.234V~3.366V TDC=8A @ PJ401 +3VALWP 2 +3VALW 1ENLDO_3V5V JUMP_43X118 @ PR411 0_0402_5% BS 3V5V_EN FB_5V PC427 6800P_0402_25V7K FB-1_5V PR403 0_0603_5% PC404 0.1U_0603_25V7K 2BST-1_5V BST_5V PR412 1K_0402_1% B PL403 VL SY8208CQNC_QFN10_3X3 +5VALWP 1UH_FDSD0630-H-1R0M-P3_11A_20% PC412 22U_0805_6.3V6M LDO LX_5V PC415 22U_0805_6.3V6M PG 10 PC418 22U_0805_6.3V6M OUT PC417 22U_0805_6.3V6M LX VCC GND 680P_0603_50V7K 4.7_1206_5% @ PJ402 +5VALWP 1 2 +5VALW JUMP_43X118 Vout is 4.998V~5.202V 5V LDO 150mA~300mA PR407 2.2K_0402_5% 1 PC421 4.7U_0603_6.3V6K PC420 4.7U_0603_6.3V6K 34,40 MAINPWON EN2 SPOK 34,35 EC_ON EN1 VCC_3.3V IN @ @EMI@ PC402 0.1U_0402_25V6 EMI@ PC409 2200P_0402_50V7K PC407 10U_0805_25V6K B 5V_VIN PU402 @EMI@ PC424 @EMI@ PR408 15V_SN EMI@ PL404 HCB2012KF-121T50_0805 PC406 10U_0805_25V6K B+ TDC=8A @ PR402 0_0402_5% A A PR406 1M_0402_1% PC419 4.7U_0603_6.3V6K 3V5V_EN 2012/07/10 Issued Date EN1 and EN2 dont't floating Compal Secret Data Security Classification @ 2013/07/10 Deciphered Date Title Compal Electronics, Inc 3VALW/5VALW THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Tuesday, March 26, 2013 Date: Rev 0.1 V5WE2 M/B LA-9532P Schematic Sheet 42 of 52 A G PR504 8.45K_0402_1% 1 2 + PC506 330U_2.5V_M Rds=4.2mΩ(Typ) 5.0mΩ(Max) 12 11 +5VALW PR505 5.1_0603_5% PC509 1U_0603_10V6K +3VALW @ PJ504 1 +1.35VP +1.35V 2 JUMP_43X118 PGOOD_1.35V @ PJ506 +0.675VSP 2 +0.675VS JUMP_43X79 FB=0.75V To GND = 1.5V To VDD = 1.8V @ PJ511 +0.95VSDGPUP 2 JUMP_43X118 +0.95VSDGPU S PR510 10K_0402_1% @ PJ505 @ PR509 8.06K_0402_1% 1 @ PC511 0.1U_0402_25V6 JUMP_43X118 PC510 1U_0603_10V6K VGA@ PR532 0_0402_5% On On Hi On On Lo Lo On Off (Hi-Z) Off Off Off (Discharge) (Discharge) (Discharge) Note: S3 - sleep ; S5 - power off 14 2012/07/10 VGA@ PC538 22U_0805_6.3V6M VGA@ PC537 22U_0805_6.3V6M VGA@ PC536 22U_0805_6.3V6M 1 VGA@ PC535 22U_0805_6.3V6M 1 @EMI@ PR533 4.7_0402_1% VGA@ PR536 100K_0402_1% @EMI@ PC539 680P_0402_50V7K RT/CLK 2 BOOT 13 FB=0.799V +0.95VSDGPUP Ipeak=4.28A ; 1.2Ipeak=5.136A ;Imax=2.996A F=131904/(PR534^0.9492)=1000KHz, PR534=169KΩ Compal Electronics, Inc Compal Secret Data Security Classification Issued Date VGA@ PC540 22P_0402_50V8J Hi Lo 10 +0.95VSDGPUP VGA@ PR535 19.1K_0402_1% Hi S3 0.675VSP 11 S0 PWRGD SS/TR PWRPD COMP GND VGA@ PL506 1UH_PCMB063T-1R0MS_12A_20% LX_0.95V VTT_REFP 15 PH VSENSE GND S5 PH VGA@ PU504 TPS54618 12 VGA@ PC542 2200P_0402_50V7K VIN PH SNUB_0.95V 17 VIN VGA@ PC541 VGA@ PR537 3300P_0402_50V7K 18K_0402_1% 2 VGA@ PR534 169K_0402_1% 2 EN 16 VIN AGND VGA@ PC534 22U_0805_6.3V6M PC533 22U_0805_6.3V6M @ S3 VGA@ PC531 0.22U_0603_10V7K 0.95V_VIN VGA@EMI@ PL505 HCB2012KF-121T50_0805 S4/S5 ESD@ PC507 680P_0402_50V7K PR508 887K_0402_1% 1.35V_B+ +3VALW 1.35VP EMI@ PC503 2200P_0402_50V7K 2 ESD@ PR503 4.7_1206_5% 44,45,47 VGA_PG STATE PC502 10U_0805_25V6K 13 DCR:8.5mΩ 14 +1.35VP 6.6x7.3x3.8 TAI-TECH PQ503 S TR MDU1512RH 1N POWERDFN56-8 LG_1.35V PR506 10K_0402_1% PGOOD TON 10 S5 FB VDD 15 B+ PL501 S COIL 1.5UH 20% TMPB0604M-1R5MN-Z01 11A 16 UGATE 18 17 PHASE CS VDDP VDDQ D 2 SUSP @ PC512 0.1U_0402_25V6 @ PQ501 2N7002KW_SOT323-3 PQ502 MDV1525URH_PDFN33-8-5 JUMP_43X39 VLDOIN BOOT 20 19 RT8207MZQW_WQFN20_3X3 VTTREF PGND @ PR507 0_0402_5% 34,38 SYSON 38 SUSP PC508 0.033U_0402_16V7K GND @ PR501 680K_0402_1% 34,38,41,44,45 SUSP# +1.35VP 15 DDR_VTT_PG_CTRL VTTSNS +VTT_REFP LGATE S5_1.35V VTTGND S3 PAD PC504 0.1U_0603_25V7K BST_1.35V-1 LX_1.35V VTT PU501 21 @ PR513 0_0402_5% PR502 2.2_0603_5% BST_1.35V Output Cap PAD S3_1.35V PC501 10U_0805_25V6K +0.675VSP PC505 10U_0805_25V6K 120% 115% UG_1.35V @ PJ503 +1.35VP 2012/9/6 OVP=110% EMI@ PL507 HCB2012KF-121T50_0805 1.35V_B+ ESD@ PC521 0.1U_0402_25V6 +1.35VP Ipeak = max{ 0.7*Ibudget, 1st +2nd max loading} Ipeak = max{ 12.34*0.7 , 4.2+8.14 } Ipeak=12.34A ; 1.2Ipeak=14.808A ;Imax=8.638A 1/2Delta I=0.7353A (F=300K Hz) PR504=(1.2Ipeak-1/2Delta I) *Rds(on)(max)*1.2/9uA=8.45Kohm choose PR504=8.45Kohm (for safety >1.2Ipeak) Rds(on)=5.0m ohm(max) ; Rds(on)=4.2m ohm(typical) Ilimit_min=(8.366K*9uA)/(5.0m*1.2)=15.058A Ilimit_max=(8.535K*11uA)/(4.2m*1.2)=22.352A Iocp=Ilimit+1/2Delta I=15.79A~23.09A Iocp(min)>1.2Ipeak Deciphered Date 2013/07/10 Title 1.35VP/0.675VSP/0.95VSDGPUP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 0.1 V5WE2 M/B LA-9531P Schematic Date: A Tuesday, March 26, 2013 Sheet 43 of 52 VFB= 0.704V Vo=VFB*(1+11.5K/10K)= 1.5V Freq=290KHz(typ) DRVL TP 470 200 100 39 C VGA@ PR514 470K_0402_1% +5VALW DL_1.5VSG 11 TPS51212DSCR_SON10_3X3 VGA@ PC515 1U_0603_10V6K 290 340 380 430 Rds=13.5mΩ(Typ) 16.5mΩ(Max) VGA@ PR515 11.5K_0402_1% 1 2 @ PC518 10U_0603_25V6M +1.5VSDGPUP + VGA@EMI@ PR518 4.7_1206_5% VGA@ PC523 330U_2.5V_M VGA@EMI@ PC522 680P_0402_50V7K C FB=0.704V VGA@ PL502 4.7UH_PCMB063T-4R7MS_5.5A_20% 2 Resistance(KΩ) Frequency(KHz) SW_1.5VSG D V5IN TST DH_1.5VSG VFB VGA@ PC514 0.1U_0603_25V7K SW BST_1.5VSG B+ DRVH EN FB_1.5VSG RF_1.5VSG TRIP 10 3 VBST TRIP_1.5VSG 43,45,47 VGA_PG PGOOD VGA@ PR517 2.2_0603_1% VGA@ PU502 VGA@ PC517 10U_0603_25V6M VGA@ PQ504 SIS412DN-T1-GE3_POWERPAK8-5 Cesr= 15m ohm Ipeak= 4.7A Imax= 3.29A Iocp=5.64A Iocp= 5.72A~6.43A VGA@ PR512 56.2K_0402_1% VGA@EMI@ PL504 HCB2012KF-121T50_0805 1.5VSG_B+ VGA@ PQ505 SI7716ADN-T1-GE3_POWERPAK8-5 D @EMI@ PC519 0.1U_0402_25V6 VGA@EMI@ PC516 2200P_0402_50V7K +3VS VGA@ PR516 10K_0402_1% @ PC526 1U_0402_6.3V6K +1.5VSDGPU 1 @ PC524 22U_0805_6.3V6M @ PR522 22K_0402_5% @ PC527 0.1U_0402_25V6 PC525 22U_0805_6.3V6M FB_1.5VSP PR521 22.6K_0402_1% 2 FB=0.8V PR519 20K_0402_1% B +1.5VSP 1 @ PJ509 +1.5VSDGPUP +1.5VSP_ON 34,38,41,43,45 SUSP# @ PR523 0_0402_5% FB EN POK GND PC528 4.7U_0603_6.3V6K PU503 APL5930KAI-TRG_SO8 VCNTL VOUT VIN VIN VOUT B PC529 0.022U_0402_16V7K Note:Iload(max)=3A JUMP_43X118 @ PJ510 1 2 JUMP_43X118 Ien=10uA, Vth=0.3V, notice the res and pull high voltage from HW @ PJ508 A +1.5VSP 2 +1.5VS A JUMP_43X39 Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 Issued Date Deciphered Date 2013/07/10 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC +1.5VSP/+1.5VSDGPUP Rev 0.1 V5WE2 M/B LA-9531P Schematic Date: Tuesday, March 26, 2013 Sheet 44 of 52 +1.05VSP Ipeak=5.36A ; Imax=3.752A ; 1.2Ipeak=6.432 Delta I=0.xxxxA=>1/2Delta I=0.xxxxA,F= 800K Hz(typ) PR603 1K_0402_1% D D SUSP# 34,38,41,43,44 @ PR607 1M_0402_1% B+ PC606 0.1U_0402_25V6 2 PC629 22U_0805_6.3V6M PC628 22U_0805_6.3V6M PC627 22U_0805_6.3V6M @ @EMI@ PC607 680P_0402_50V7K PC608 4.7U_0603_6.3V6K +3VS PC601 4.7U_0603_6.3V6K 2 PR618 10K_0402_1% C @EMI@ PR604 4.7_0805_5% SY8208DQNC_QFN10_3X3 @ PC614 0.1U_0402_25V6 +3VALW LDO PG FB_+1.05VSP +1.05VSP PC626 22U_0805_6.3V6M PR619 1M_0402_1% PL601 0.68UH_PCMC063T-R68MN_15.5A_20% BYP SW_+1.05VSP ILMT BST_+1.05VSP PC625 22U_0805_6.3V6M 10 LX PR602 PC605 0_0603_5% 0.1U_0603_25V7K 2 GND EN_+1.05VSP PC624 22U_0805_6.3V6M BS 1 EN PC623 10U_0805_25V6K IN FB @ PR613 10K_0402_1% +3VS PC604 10U_0805_25V6K @EMI@ PC602 0.1U_0402_25V6 EMI@ PC603 2200P_0402_50V7K PU601 VFB=0.6V @ PJ602 +1.05VSP 2 +1.05VS_VTT JUMP_43X118 @ PJ603 2 11,34 VCCST_PWRGD C PR605 100K_0402_1% PC609 4700P_0402_25V7K JUMP_43X118 PR608 127K_0402_1% +3VS @ PC615 1U_0402_6.3V6K +3VS Note:Iload(max)=3A 2 1 @ VGA@ PR616 15.8K_0402_1% 2 @ PR617 22K_0402_5% Ien=10uA, Vth=0.3V, notice the res and pull high voltage from HW PC622 22U_0805_6.3V6M 2 FB_1.8VSDGPU 43,44,47 VGA_PG VGA@ PR614 20K_0402_1% FB=0.8V +1.8VSDGPU VGA@ PC621 22U_0805_6.3V6M FB VGA@ PC620 0.022U_0402_16V7K EN POK GND VGA@ PC618 4.7U_0603_6.3V6K PR611 15.8K_0402_1% @ PR612 22K_0402_5% VGA@ PU603 APL5930KAI-TRG_SO8 VCNTL VOUT VIN VIN VOUT 1 PC612 22U_0805_6.3V6M @ B Note:Iload(max)=3A 1 +1.8VS_6511_ON @ PC617 1U_0402_6.3V6K @ PC616 0.1U_0402_25V6 FB_1.8VS_6511 +1.8VS_6511 PC613 22U_0805_6.3V6M PR609 20K_0402_1% FB=0.8V PC611 0.022U_0402_16V7K 1 @ PR610 0_0402_5% 27 6511_PWR_EN FB EN POK GND PC610 4.7U_0603_6.3V6K B PU602 APL5930KAI-TRG_SO8 VCNTL VOUT VIN VIN VOUT A A Ien=10uA, Vth=0.3V, notice the res and pull high voltage from HW Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 2013/07/10 Deciphered Date Title +1.05VSP/+1.8VSDGPU/+1.8VS_6511 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC V5WE2 M/B LA-9531P Schematic Date: Sheet Tuesday, March 26, 2013 45 of 52 Rev 0.1 PC706 68U_25V_M_R0.36 @EMI@ PC705 0.1U_0402_25V6 EMI@ PC704 2200P_0402_50V7K PC709 10U_0805_25V6K PR715 2.21K_0402_1% EMI@ PC714 EMI@ PR714 680P_0402_50V7K 4.7_1206_5% PR716 24.9K_0402_1% PH702 PR717 10K_0402_1%_TSM0A103F34D1RZ 3.01K_0402_1% 2 Close choke B value:3435K PC711 0.1U_0402_25V6 C CSN1 CSP1 VGATE 11,8 VDD +3VS @ PR724 0_0402_5% PC746 1U_0402_6.3V6K Use X7R is better or far away inductor Maximum current: 32A @ PR725 2K_0402_1% PC741 0.1U_0402_25V6 PR731 130_0402_1% PR730 75_0402_1% @ 2 51622_VREF PR729 54.9_0402_1% +1.05VS_VTT Close to PWR IC VR_ALERT# 11 VR_SVID_CLK 11 VR_HOT# 34 V5A PC743 PR728 PC744 1500P_0402_50V7K 10K_0402_1% 0.33U_0402_10V6K 1 DCR:0.82mΩ±5% PC712 0.082U_0402_16V7K 2 CSP1-1 VR_SVID_DATA 11 COMP PR727 3.48K_0402_1% PR734 10K_0402_1% 33 32 31 30 29 28 27 26 25 PR726 10K_0402_1% 1 VDIO PWM1 VDD DROOP PC742 100P_0402_50V8J D PGOOD GFB VFB CPU_PHASE1 PC740 1U_0603_10V6K VR_ON 11 SKIP# N/C B+ +CPU_CORE 10 F-IMAX 12 11 OCP-I B-RAMP 14 13 IMON THERM O-USR N/C PAD 24 TPS51622RSM_QFN32_4X4~D PU3 ALERT# VFB PWM2 VCLK 23 PWM1 PU701 CSP2 VR_HOT# GFB CSN2 GND 0_0402_5% 0_0402_5% SKIP# V5A PR721 PR722 VR_ON CSN1 VREF 11 VCC_SENSE @ 15 16 22 @ 11 VSS_SENSE SLEWA VBAT 21 +3VS CSP1 + PL702 0.22UH_PCMB104T-R22MS_35A_20% +5VS PU702 CSD97374CQ4M_SON8_3P5X4P5 SKIP# SKIP# VIN BOOT_R VDD PGND1 BOOT VSW PWM PGND2 2.2_0603_5% 1CPU_BOOT1 0.1U_0603_25V7K 2CPU_BOOT1-1 PWM1 PR701 PC701 COMP @ C 17 DROOP CSP1 1 EMI@ PC749 1000P_0402_50V7K F-IMAX PR713 10K_0402_1% VBAT 18 CSN1 PR718 0_0402_5% 19 PR719 0_0402_5% 20 EMI@ PL701 HCB2012KF-121T50_0805 2 B-RAMP O-USR @ @ OCP-I PR712 39K_0402_1% CPU_B+ PC703 10U_0805_25V6K PR709 PR710 392K_0402_1% 56K_0402_1% 2 @ PR711 10K_0402_1% SLEWA CPU_B+ PC702 10U_0805_25V6K THERM PC747 0.1U_0402_25V6 D @ PR707 PR704 392K_0402_1% 8.87K_0402_1% 2 Close MOS PC748 4700P_0402_25V7K 2 PR708 10K_0402_1% PR705 PR702 150K_0402_1% 100K_0402_1% 2 1 B value:4250K PR706 PR703 39K_0402_1% 274K_0402_1% 2 51622_VREF PH705 100K_0402_1%_TSM0B104F4251RZ B +5VS PR732 22_0603_5% PC745 2.2U_0402_6.3V6M B Consider use 0603 for inrush power VIN 12V-20V MAX current 32A Thermal current 10A Dynamic current 27A Over current level 45A Switching frequency 600KHz Boot voltage 1.7V DC Load- line 2m Ohm A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 2013/07/10 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC +CPU_CORE V5WE2 M/B LA-9531P Schematic Date: Sheet Tuesday, March 26, 2013 46 of 52 Rev 0.1 1 0 0 +3VSDGPU @ PR837 10K_0402_1% VGA@ PR802 2.2_0603_5% BOOT2_VGA VGA@ PC806 0.22U_0603_10V7K BOOT2_2_VGA UGATE2_VGA VGA@ PR848 2.2_0603_5% UGATE2-1_VGA VGA@ PL804 S COIL 0.22UH 20% FDUE0640-H-R22M=P3 25A +VGA_CORE VGA@EMI@ PR805 4.7_1206_5% VGA@ PR806 3.65K_0402_1% V2N_VGA LGATE2_VGA VGA@ PR838 10K_0402_1% VGA@ PR840 10K_0402_1% VGA@ PR842 10K_0402_1% 2 @ PR846 10K_0402_1% @ PR844 10K_0402_1% GPU_VID_1 GPU_VID_2 GPU_VID_3 GPU_VID_4 GPU_VID_5 D PHASE2_VGA 2 @ PR839 10K_0402_1% @ PR804 0_0402_5% @ PR841 10K_0402_1% VGA@ PR845 10K_0402_1% @ PR803 1_0402_1% 18 GPU_DPRSLPVR VGA@ PR843 10K_0402_1% @ PC805 0.1U_0402_25V6 B+ VGA@EMI@ PL803 HCB2012KF-121T50_0805 1 VGA@EMI@ PL801 HCB2012KF-121T50_0805 DCR: 0.97mΩ±5% 7x7x4 VGA@ PR809 10K_0402_1% 2V1N_VGA VSUM+_VGA 0.9V +VGA_B+ VGA@ PC804 10U_0805_25V6K VID0 VGA@ PC803 10U_0805_25V6K VID1 VGA@ PR807 10K_0402_1% VID2 VGA@EMI@ PC802 2200P_0402_50V7K VID3 @EMI@ PC801 0.1U_0603_25V7K VID4 1 38 VGA_ON_R VID5 1 @ PR801 0_0402_5% D VID6 18 18 18 18 18 GPU_VID_5 GPU_VID_4 GPU_VID_3 GPU_VID_2 GPU_VID_1 AMD MARS XT Default Voltage VGA@ PQ804 MDU1511RH_POWERDFN56-8-5 VGA Chipset VGA@ PR808 1_0402_1% VGA@ PQ803 MDU1516URH_POWERDFN56-8-5 VSUM-_VGA ISEN2_VGA VGA@EMI@ PC807 680P_0402_50V7K 30 29 28 27 26 25 24 23 22 21 C @ PR812 0_0402_5% @ PR813 0_0402_5% +5VS VGA_CORE Freq.=400KHz Imax=27.00A Ipeak=40.50A Iocp=49.00A LL= disable Cesr= xx mOHM VGA@ PC810 1U_0603_10V6K 11 12 13 14 15 16 17 18 19 20 AGND VGA@ PU801 ISL62883CHRTZ-T_TQFN40_5X5 @ PR817 0_0402_5% @ PR819 0_0402_5% VGA@ PR836 953_0402_1% Layout Note: Place near Phase1 Choke VGA@ PC819 10U_0603_25V6M VGA@ PC820 10U_0603_25V6M +VGA_CORE 7x7x4 VGA@ PR833 10K_0402_1% 2V2N_VGA VSUM-_VGA VSUM+_VGA VGA@EMI@ PC828 680P_0402_50V7K DCR: 0.97mΩ±5% VGA@ PR832 1_0402_1% VGA@EMI@ PR829 4.7_1206_5% VGA@ PR830 3.65K_0402_1% 2 1 V1N_VGA LGATE1_VGA B VGA@ PL802 S COIL 0.22UH 20% FDUE0640-H-R22M=P3 25A VGA@ PR831 10K_0402_1% VGA@ PR826 2.61K_0402_1% PHASE1_VGA VGA@ PR828 11K_0402_1% @ PC824 0.1U_0603_25V7K VGA@ PC823 0.22U_0603_16V7K 2 UGATE1-1_VGA VGA@ PC821 0.22U_0603_10V7K 2 VGA@ PR835 10_0402_5% VGA@ PR824 2.2_0603_5% BOOT1_1_VGA VGA@ PH801 10K_0402_1%_TSM0A103F34D1RZ 20 VSS_GPU_SENSE 2 VGA@ PC826 1000P_0402_50V7K VGA@ PC822 330P_0402_50V7K @ PC825 330P_0402_50V7K 1 20 VCC_GPU_SENSE @ PR827 82.5_0402_5% VSUM+_VGA @ PC827 0.01U_0402_25V7K +VGA_CORE VGA@ PR847 2.2_0603_5% UGATE1_VGA VGA@ PR823 10_0402_5% VGA@ PQ801 MDU1516URH_POWERDFN56-8-5 VGA@ PC818 0.22U_0603_25V7K VSUM-_VGA +VGA_B+ +5VS BOOT1_VGA B VGA@ PC817 1U_0603_10V6K 1 VGA@ PR820 324K_0402_1% +VGA_B+ VGA@ PR821 1_0402_1% ISEN1_VGA VGA@ PQ802 MDU1511RH_POWERDFN56-8-5 ISEN2_VGA +5VS VGA@ PR818 3.57K_0402_1% VGA@ PC812 470P_0402_50V7K VGA@ PC816 0.22U_0402_10V4Z 1 41 VGA@ PR816 499_0402_1% 2 VGA@ PC814 150P_0402_50V8J 2 BOOT2 UGATE2 PHASE2 VSSP2 LGATE2 VCCP PWM3 LGATE1 VSSP1 PHASE1 PGOOD PSI# RBIAS VR_TT# NTC VW COMP FB ISEN3 ISEN2 1 @ PC809 33P_0402_50V8J VGA@ PC813 47P_0402_50V8J 1 10 43,44,45 VGA_PG VGA@ PC815 0.22U_0402_10V4Z VGA@ PC811 1000P_0402_50V7K VGA@ PR815 5.9K_0402_1% +3VS CLK_EN# DPRSLPVR VR_ON VID6 VID5 VID4 VID3 VID2 VID1 VID0 VGA@ PR810 100K_0402_1% VGA@ PR811 47K_0402_1% VGA@ PC808 1U_0603_10V6K ISEN1 VSEN RTN ISUMISUM+ VDD VIN IMON BOOT1 UGATE1 C 40 39 38 37 36 35 34 33 32 31 VGA@ PR814 10K_0402_1% +3VSDGPU ISEN1_VGA VSUM-_VGA A VGA@ PC829 0.1U_0402_25V6 A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 Deciphered Date 2013/07/10 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D C DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: +GPU_COREP Document Number V5WE2 M/B LA-9531P Schematic Sheet Tuesday, March 26, 2013 47 of 52 Rev 0.1 PWR Rule CPU DCLL=1.5m ohm dedign 330uF/9m *0, 22uF *30 1 2 2 2 2 2 2 1 2 D For BOT side PC927 22U_0805_6.3V6M PC926 22U_0805_6.3V6M PC925 22U_0805_6.3V6M @ PC909 22U_0805_6.3V6M PC908 22U_0805_6.3V6M PC907 22U_0805_6.3V6M @ PC924 22U_0805_6.3V6M @ PC906 22U_0805_6.3V6M @ PC923 22U_0805_6.3V6M PC922 22U_0805_6.3V6M PC921 22U_0805_6.3V6M PC920 22U_0805_6.3V6M @ PC905 22U_0805_6.3V6M PC904 22U_0805_6.3V6M D PC903 22U_0805_6.3V6M PC902 22U_0805_6.3V6M +CPU_CORE +CPU_CORE 2 For TOP side C PC956 22U_0805_6.3V6M PC941 22U_0805_6.3V6M PC955 22U_0805_6.3V6M PC940 22U_0805_6.3V6M 2 PC954 22U_0805_6.3V6M 1 PC939 22U_0805_6.3V6M 2 PC953 22U_0805_6.3V6M 1 PC938 22U_0805_6.3V6M 2 PC952 22U_0805_6.3V6M 1 PC937 22U_0805_6.3V6M PC951 22U_0805_6.3V6M @ PC950 22U_0805_6.3V6M PC949 22U_0805_6.3V6M @ PC936 22U_0805_6.3V6M 22u *25, @*7 C PC935 22U_0805_6.3V6M PC934 22U_0805_6.3V6M B B A A Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 Issued Date Deciphered Date 2013/07/10 Title CPU_CORE_CAP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC V5WE2 M/B LA-9531P Schematic Date: Tuesday, March 26, 2013 Sheet 48 of 52 Rev 0.1 VGA@ PC1031 2.2U_0402_6.3V6M VGA@ PC1032 10U_0402_6.3V6M VGA@ PC1042 22U_0805_6.3V6M VGA@ PC1043 22U_0805_6.3V6M VGA@ PC1026 560U_2.5V_M + + 2@ PC1027 330U_D2_2.5VY_R9M Issued Date VGA@ PC1038 10U_0402_6.3V6M VGA@ PC1025 560U_2.5V_M VGA@ PC1037 10U_0402_6.3V6M VGA@ PC1014 10U_0402_6.3V6M VGA@ PC1024 2.2U_0402_6.3V6M + VGA@ PC1036 10U_0402_6.3V6M VGA@ PC1013 2.2U_0402_6.3V6M VGA@ PC1023 10U_0402_6.3V6M VGA@ PC1018 10U_0402_6.3V6M VGA@ PC1017 2.2U_0402_6.3V6M VGA@ PC1016 2.2U_0402_6.3V6M VGA@ PC1015 2.2U_0402_6.3V6M VGA@ PC1012 10U_0402_6.3V6M VGA@ PC1022 10U_0402_6.3V6M 1 VGA@ PC1035 2.2U_0402_6.3V6M VGA@ PC1034 10U_0402_6.3V6M VGA@ PC1011 10U_0402_6.3V6M VGA@ PC1021 2.2U_0402_6.3V6M 1 VGA@ PC1010 2.2U_0402_6.3V6M 2 VGA@ PC1020 2.2U_0402_6.3V6M 1 VGA@ PC1009 10U_0402_6.3V6M 2 C VGA@ PC1019 2.2U_0402_6.3V6M 1 VGA@ PC1008 2.2U_0402_6.3V6M VGA@ PC1007 10U_0402_6.3V6M VGA@ PC1006 2.2U_0402_6.3V6M VGA@ PC1005 10U_0402_6.3V6M VGA@ PC1004 2.2U_0402_6.3V6M VGA@ PC1003 10U_0402_6.3V6M VGA@ PC1002 10U_0402_6.3V6M VGA@ PC1001 2.2U_0402_6.3V6M 2 D VGA@ PC1033 10U_0402_6.3V6M VGA@ PC1030 2.2U_0402_6.3V6M VGA@ PC1041 22U_0805_6.3V6M 1 VGA@ PC1029 10U_0402_6.3V6M 2 VGA@ PC1040 22U_0805_6.3V6M 1 VGA@ PC1028 10U_0402_6.3V6M 2 B VGA@ PC1039 22U_0805_6.3V6M +VGA_CORE +VGA_CORE Security Classification 2012/07/10 Deciphered Date 2013/07/10 AMD MARS GPU_CORE 560uF*2+330uF*1 10uF*8+2.2uF*16 D C AMD MARS meet ripple 22uF*5+10uF*11 B A A Compal Secret Data Title Compal Electronics, Inc THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC VGA_CORE CAP V5WE2 M/B LA-9531P Schematic Date: Tuesday, March 26, 2013 Sheet 49 of 52 Rev 0.1 Version change list (P.I.R List) Item D C Fixed Issue Reason for change Rev PG# Modify List Page of for PWR Date PR801 change to 20K Add PC805, PR814 Delete PR615, PC619, PR511, PC513, PR530, PR531, PC530 Tune VGA sequence Tune VGA sequence VGA Module Design Module Design change 3/5V solution Change RTC type to non-charge Check no need keep with HW 3/5V 39 39 EMI request EMI request Costdown Phase 11/06 DVT 11/13 DVT 11/13 DVT 11/20 DVT Un-pop PR112, PR113 Delete PR112, PR113, PBJ101 EMI Add PR518, PC522, PR714, PC714, PR829, PC828, PR806, PC807, PC749 Change PR701 to 2.2 EMI confirm remove EMI Delete PL102, PC103, PC101, PL202, PC201 and PL703 SY8208B/C update 42 42 Adjust output voltage and add Cff 45 Modify VR_ON to VGA_ON_R net 47 11 Improve CPU transient character 46 Change PL402, PL403 from 5x5x3 to 7x7x3 12/13 DVT2 12/22 DVT2 Add PR411, PR413 Add PC609 into 4700P 12/22 DVT2 Change PR608 from 133K to 127K Change PR801 from 20K to 01/04 DVT2 Reserve PC805 Change PR709 from 150K to 390K, PR732 from 10 to 22, 01/09 DVT2 12 13 Improve CPU transient character Tune sequence 48 42 14 15 16 17 18 19 20 ohm reduce To meet MARS/AMD ripple SPEC Provide 3/5V PG signal to EC Modify H-Gate resistor +1.05V ripple close upper and mean too low 10 VGA_CORE can't disable 21 EMI request ESD request ESD request ME issue Use HW to control VCIN1 function D Recovery at PVT phase 11/20 DVT 11/26 DVT PC745 from 1U to 2.2U, PC711 from 0.082U to 0.1U Unpop PC902 01/09 DVT2 02/04 PVT Change PR801,PR507,PR513,PR523 to R-pad Add PC1028~PC1043 Add PR416 Change PR847, PR848 from to 2.2 Add PC101 into 0.1uF Add PC521, PR503, PC507 Add PR204 Change PC303,PC304,PC315,PC318,PC517, PC819,PC820 from 0805 to 0603 02/22 02/22 02/22 02/25 02/26 02/26 03/05 Change PC428 from 4700p to 10n, PC427 from 0.047u to 6.8n 49 42 47 39 43 40 Shrink component to reduce Z height C PVT PVT PVT PVT PVT PVT PVT 03/26 PVT2 B B A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2012/07/10 2013/07/10 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PIR (PWR) V5WE2 M/B LA-9531P Schematic Date: Sheet Tuesday, March 26, 2013 50 of 52 Rev 0.1 A B A > B1 Change List C D 1123A 1.Delete +3VALW to +3VALW_PCH MOS Circuit: Page12, Delete C589,C414,R77,Q10,C590,C591 Page34, Delete U28.16 PCH_PWR_EN# off page 2.Page12, Unpop R210 ,Pop L3 and C22 for +1.05VS_VTT high ripple 3.Unpop and Componment reduce Page16, Delete C824,C828,C831,C836,C839 for unpop reduce Page20, Delete C870,C871,C923,C922,C921,C920 for unpop reduce Page27, Change R399,L30,L47 TO R_Short Delete C456,C637,C474,C497,C580,C581 Pop R80 and unpop R396,Q25,C411,R584,Q52 Page28, Delete C606,C646,C607 Change R239 to R_short Page29, Delete C775,C776,C778,C781,C782 Page31, Delete C461,C462 Change R423 to R_short Page32, Delete C161 Change R308 to R_short Page34, Change R495 to R_short Page36, Chagne L55,L54,L52 to R_short 4.Page24, SWAP RP41.1,RP41.2 5.Page27, Change R123,R127 Pull high to +HDMI_5V_OUT 1122A Page22, Add X7603@ for VRAM 2Gb*4 HYN 128M16 Add X7604@ for VRAM 2Gb*8 HYN 128M16 1121A Page06, Add R937 for EC_SCI# Path to GPIO34 Page09, RP28.5 connect to GPIO34 1120A Page06, Delete chargeable RTC circuit Change ODD to SATA port1 Page32, Modify ODD SATA netname to SATA port 1203A 1.Page11, R169 change to @ 2.Page36, Mound R417 (Cancel AMIC@) 3.Page18, R898, R899, R409, D22 change BOM Structure to VGA@ 4.Page34, R485, R483 change to 9012@ R479, R478 change to 940@ 5.Page35, C663, SW4, SW5 change to 9012@ 6.Page19, Delete R1035, X7601/X7603/X7604 7.Page17, R1006 change to VGA@ 8.Page09, R306 add BOM structure UMA@ 9.Page06, C153, C154 change to 15P_0402 10 Page18, C848, C849 change to 12P_0402 11.Page07, C2, C3 change to 10P_0402 1129A 1.Page32, JODD1.11 Reserve a TestPoint for DFT 2.Page29, Pop C779, C783 3.Page17, Update U51 BOM Structure for BOM Select 4.Page04, Add QDJC@ BOM Structure for U1 1128A 1.Page18, Add D22 to prevent GPU_ACIN leakage 2.Broadcom recommend modify(Add componment Function Field is 45.1) Page29, Add C803 0.1uF to U48.20(VDDO_CR), Page29, Add L74(BLM31PG601SN1) between Q6.1 and +3V_LAN Add C820 (1uF) to Q6.1 Page30, Add L75(BLM31PG601SN1) between Q9.1 and +XDPWR_SDPWR_MSPWR Add C820 (1uF) to Q9.1 3.Page18, Change L69 to R_Short 4.Page20, Change L72 to BLM18AG121SN1D (the same to L71) 5.SW confirmed function Page08, unpop R245,d21 (ACPRESENT PCH no need) Page36, unpop R529 (EC_BEEP no need) 6.Default EC_SCI# to GPIO34 Page06, Pop R937 Page09, Unpop R66 7.Reserve DGPU_HOLD_RST# direct to PLTRST_VGA# path Page08, Add R405 0ohm connect DGPU_HOLD_RST# and PLTRST_VGA# 8.Page35, Chagne R702 to 680ohm (ME confirm) 9.Page35, Delete SW1 (debug) for Layout convenience 10.Page24,Change L6 to (4.7uH_SH00000GS00) same as Q5WV8 11.Page29,Change RP22 to R768,R769,R770.R771 for SD 3.0 EMI 1127A 1.Page24, Change U50.11 connect from L6.2 to L6.1 2.Page34, Change R502 from R_short to 940@ 0ohm 3.Page36, Change R237,R238 to 60 Ohm(Codec vendor recommend) 4.Page09, Add R67 for EC_SCI# -> GPIO 10 option 1126A 1.Page36, Delete D26 (ESD Confirm) 2.EMI part Schematics modify(EMI confirm1123) Page26, Change R368,R369,R370,R371,R372,R373,R374,R375 to 0403 R_short Page28, Change R175,R180 to 0603 R_short Page36, Change L36,L38,L51,R527,R528,R532,R533 to 0603 R_short Page32, Delete C408,C398 Page33, Delete R453,R455,R456,R457 3.Page38, Change 3/5 VS circut BOM Structer to 35V@ 4.Page32, Modfiy JHDD1 to LTCX004LGA0 (S H-CONN CCM C127043HR022M27FZR 22P H3.05 HDD) Modfiy JODD1 to LTCX004HZ00 (S H-CONN SANTA 20190X-X 13P H3.6 ODD) Page29, +1.2V_LAN_OUT add 680P for EMI Page37, Modify H21 from 2P5 to 3P0 Page38, Add jump for power cousumption measure J36(+3VS),J37(+5VS) Delete XDP port and related circuit Page04, Delete C63,C64,C96,C97,C98,R20,R21,R22,R23,R27~R31 Delete R3,R86,R87,R88,R89,R90,R91,R4,C92,C93 Delete R5,R14,R15,R16,R7,R19,R25,C35,JXDP1 Page07, Delete R66,R67 ESD DVT Modify: Page08, Delete C39 Page24, Delete D6 Page28, Delete D7,D18 Page30, Delete D38 Page33, Delete D16 Page35, Delete D25,D30,D34 Page36, Delete D26,R544,C572 Page37, Delete ESD TP JUMPs: J10,J20,J17,J21,J16,J19,J18 J22,J24,J28,J25,J29,J23,J27 J26,J30,J31,J33,J32,J34,J35 Page29, C786 change to EMC@ Page04, Add C96 to DIMM_DRAMRST# Page33, C487 change to EMC@ and 0.1uf Delete D4 Page26, C378 change to EMC@ C387 change to EMC@ 1119A Page06, Add a nochargeable RTC battery Page15, Add R191 for DDR_VTT_PG_CTRL pull high +5VS option Add page24, Reserve eDP to LVDS translator (RTD2132R) Add bom structure TL@(translate) and EDP@(eDP mode) Page25, Add R947 for ENVDD option Add connect TL_INVT_PW to INVTPWM Add connect RTD2132R TL_HPD to EDP_HPD Modify JLVDS1 pin net name fo Co-Lay eDP & LVDS E 1107A Page04, Move R25 to JXDP1.60 Update U1 option component for CPU Page6,8, Change EC_SMI from GPIO77 to GPIO34 Delete R445 Page07, Change Y2 to X3G024000DC1H(SJ10000CS00) Page08, U17, U43, R310 change to @ Mount R65 R310.1 change to +3VS Change all 932@ to 940@ R161, D29, R564, U6, R569, C522, C523, C552, D36, Q39, R522,R586, R589, R607, R610, R624, R693, U41, U44, C516, C518, D28, R146, R158, R159, R160, R496, R499, R504, R507, R508, R511, R601, U28, U29 Page11, R169 change to XDP@ Page12, add C414 and change PCH_PWR_EN to PCH_PWR_EN# delete Q33, R561, R563 Page16, delete R58, R298, R300, C163, R299, R302 Page17, Add option component (U51) for SUN_XT 10 Page19, Add R900, R901 with BOM structure @ 11 Page24, delete R405, U20, R362, R401, C164 Change U8 to G5243AT11U(SA000028Y10) 12 Page25, delete R367, D7, F1, D8, D19 13 Page26, change L47, L48 to BLM18AG121SN1D(SM010030010) 14 Page27, Delete D31, F2, C450 15 Page28, Delete R781, D23, R782, R785, U49, C803 16 Page29, Delete R792 change T1 to GST5009-E (SP050006B10) 17 Page30, delete R414, C166 R438, Q20 change to @ Change U9 to G5243AT11U(SA000028Y10) with BOM@ 18 Page31, delete R595, R587, Q34, R597, R596, R562 19 Page32, Change U25 to SY6288D10CAC_MSOP8(SA00004KB10) Change JUSB1 to OCTEK_USB-09EAAB(DC233008O20) Delete R472, R469, R460, R462, C635, U46, R459, R463, R464 20 Page33, Mount R503 Change R506 to 8.2K Change R509 to R_Short with BOM @ Delete R491, R493, D20 21 Page34, add R535 (100K_0402) Mount R632 21 Page35, L51 change to BLM18AG121SN1D(SM010030010) Change JMIC1 to ACES_88266-02001(SP020008Y00) Delete R143, R668, R162, R181, C719, R671 23 Page37, delete R424, C169 Change U12 to G5243AT11U(SA000028Y10) 24 Page43, SW1 change BOM Structure to @ 1015A Modify BOM Structure/Function Field for EMC@(45.1) Page06, RP14 Page07, RP19, R390 Page24, L11 Page25, R368, R369, R370, R371, R372, R373, R374, R375 Page27, L42, L45, L46,R175, R180 Page28, R774 Page29, R897, C814, D39 Page32, L24, L25, R458, R461 Page35, R527, R528, R532, R533, L36, L38, D1, C62 Modify BOM Structure/Function Field for XEMC@(45.1) Page04, C63, C64, C96, C97, C98, C94, C95, C60, C92, C93, C35 Page07, R104, C152, R402, C453 Page08, C39 Page24, C528, C549, C364, C365, D6 Page25, D2, L13, L14, L15, L16 Page28, C792, C786 Page29, R26, C26, C806, C807, C808, C809, JP1, JP2, D38 Page31, C408, C398 Page32, D15, D16, D4, C487, R453,R455, R456, R457, L26 Page33, R477, C501, R513, C520, C506, C507, C511 Page34, C551, C553, D25, D30, D34 Page35, R548, C573, R671, C719, C556, C550, C444, C445, D27, D37, D26, R544, C572 Page36, C630 Modify Function Field to 45.1 only (BOM Structure is same as before) Page04, R27, R28, R29, R30, R31 Page07, RP20 Page33, R160 Page35, R143, L51 Display BOM structure and Value of U1 (CPU) Display BOM structure of R0402_0OHM-NEW and R0603_0OHM-NEW (R Short Pad show BOM Structure @) Page08, Update note of GPIO66 4 2012/07/10 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/07/10 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PIR-HW1 V5WE2 M/B LA-9531P Schematic Date: A B C D Sheet Tuesday, March 26, 2013 E 51 of 52 Rev 1.0 A B C D E C > Pre-MP Change List B1 > B2 Change List B2 > C Change List 0114 -1.Page03, Add U1 with QDJA@ 2.Page30, R897 change to SM01000LU00 3.Page24, L63,L73 change to SM01000EJ00 4.Page25, L11 change to SM01000EJ00 5.Page36, L33 change to SM01000EJ00 6.Page31, U9, C165 with IOAC@ 0110 -1.Page32, Delete R312,R313,R314,R315 Add C392,C393,C391,C394 with EA50@ 2.Page27, Add C35 3.Page38, Delete Q45,R570,R571 0108 -1 Page33, R458, R461 change to R0402_0OHM-NEW Add JFP1 Page26, Delete L13, L14, L15, L16 Page29, Delete C792, C99 Page31, Delete J4 Page10,25 change Touch screen port from USB port to port6 Page25,34 change net name of TS_INT to TS_EN Page10 add USB port for Finger Print Page38, Add C19 Page26, Add C396, C398 10.Page36, Mount C554 11.Page38, Mount C979 12.Page35, Reserved SW6,SW7,SW8,SW9 13.Page32, Add C534, C535, C536, C537 for JHDD2 with BA51@ change C391,C392,C393,C394 to R312,R313,R314,R315 Update Power schematics 0107 -1 Page06, R937 change to R0402_0OHM-NEW R75 change to R0603_0OHM-NEW Page07, R108 change to 15_0402_5% with 1ROM@ RP19 change to 15_0804_8P4R_5% with 1ROM@ Add R105, R106 with 1ROM@ for PCH_SPI_IO2_1, PCH_SPI_IO3_1 Change R102, R103, R109, U7, C67, PR20 to 2ROM@ Page08, R62, R65 change to 0402_0OHM-NEW Page10, Change Touch Screen USB port frum Port3 to Port5 R155 change to R0603_0OHM-NEW Page24, Change Q53 to @ Page25, R947,R363,R949 change to R0402_0OHM-NEW Add C376,C377,C388,C389 with TL@ Add R414, R426 Add R424, R425 with @ Page27, R80 change to R0603_0OHM-NEW L48 change to R0603_0OHM-NEW Page29, C99 change to XEMC@ R774 change to 56_0402_5% Page32, R49, R593 change to R0805_0OHM-NEW Page34, R236 change to R0805_0OHM-NEW 10 Page38, R926 change to R0402_0OHM-NEW 0103 -1.Page35, R698,R701 change to 680 ohm R702 change to 499 ohm 2.Page18, Un-mount C847 3.Page38, Add U38, R77, C63 Update Power Schematics 1228 -1 Page25, Add USB20_P3/N3 on JLVDS1.35/36 Add R81 Page35, Delete JTP1, R609, R610, C552, R693, R607, R608, D36 Page34, change Q50 to L2N7002LT1G_SOT23-3 change R506 to 18K_0402_5% 0306 1.Page27, Mount R410, R411 Change R240, R241 with @ Change R418 to 4.7K 0304 1.Page20, Mount C872, C873, C874, C889, C917, C918, C919 2.Page25, change C371,C372, C369, C370 with EDP@ 3.Page33, Change L24, L25 to SM070001E00 0301 1.Page08, change R62,R65 to ohm 2.Page12, Add C408 3.Page34, Add D25 Reserved D26 0227 1.Page29, Del R766 2.Page32, change JDB1 to E-T_1001K-F50C-05R_50P-S 0226B -Modify for ESD 1.Page11, Mount C13,C14 (10U_0603) 1.Page12, Change C40 to 10U_0603 Mount C31 (1U_0402) 3.Page15, Mount C117 (10U_0603) Add C161 10U_0603 4.Page33, Mount C483 with 0.1U Reserved D3 with XEMC@ 5.Page38, Add C39, C64,C92,C93 22U_0805 Update power schematics 0226 -1.Page12, Del T99 2.Page27, Mount R204,R241, R407,R408 Change R412,R413 with @ 3.Page28, Add R312 with @ 4.Page34, Del R590 (Add offpage for H_PROCHOT#_EC) Del R505 Update Power Schematics 0221 -1.Page18, R898, R899 change to R0402_0OHM-NEW 2.Page25, Add TS@ for R81, R414, R426 0411 Change U51 PN to R3 (SA00006G610, SA000061J20) Page06, unmount R446, C168, D32 Mount D23, C151 0329 1.Page04, Add SR16Q@ and SR170@ for U1 2.Page06, Change C151, D23 with @ Mount R446, D32, C168 0326 1.Page1, Change PCB PN to DA60000XL10 2.Page29, Mount C815 Update Power Schematics 0321 1.Page8, G_SEN_INT change from GPIO80 to GPIO52 2.Page34, change R506 to 100K_0402_5% 0219 -1.Page08,34,37 G_SEN_INT connecto to PCH_GPIO80 Change U2.4, U2.6 to D_CK_SCLK/D_CK_SDATA 2.Page29, Reserved C815 3.Page22, Add C1024, C1025, C1026, C1023, C1027, C1028, C1029, C1030 with 128@ 4.Page23, Add C1031, C1032, C1033, C1034, C1038, C1036, C1037, C1035 with VGA@ 5.Page38, Reserved R556, R574, Q55, R557, R575, Q41, R570, R571, Q45 0218 -1.Page06, Update Y1 CIS Symbol Add D23, C151 Change R446, D32, C168 to @ 2.Page18, Change C823, C827, U52, R798 with @ 2.Page29, Add R781, C792 3.Page30, Add R782 and Mount C822 2.Page34, Change R506 to 33K 4 2012/07/10 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2013/07/10 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PIR-HW1 V5WE2 M/B LA-9531P Schematic Date: A B C D Sheet Friday, April 26, 2013 E 52 of 52 Rev 1.0 www.s-manuals.com ... SR1 70@ SA 000 06SX 70 SA 000 06SMB0 A U1 U1 U1 U1 CPU_QEK2_C0 QEK2@ CPU_QEK4_C0 QEK4@ CPU_QEVG_C0 QEVG@ CPU_QEVE_C0 QEVE@ SA 000 06SJ 40 SA 000 06NM 50 SA 000 06SX 30 SA 000 06SM 30 Compal Electronics, Inc Compal. .. PR229 10K _04 02_1% PR 203 1K _04 02_1% PR 208 1K _04 02_1% 2 PR 201 100 _04 02_1% @ PC 209 0. 1U _06 03_25V7K EMI@ PC 202 100 0P _04 02_50V7K PR 202 100 _04 02_1% +3VLP 2 PR 206 6.49K _04 02_1% BATT+ EMI@ PL 201 ... C 100 8 10U _06 03_6.3V6M C 100 7 10U _06 03_6.3V6M C 100 6 10U _06 03_6.3V6M C 103 4 10U _06 03_6.3V6M 2 C 103 3 10U _06 03_6.3V6M C 103 2 10U _06 03_6.3V6M VGA@ C 103 1 10U _06 03_6.3V6M VGA@ VGA@ VGA@ C 100 9 10U _06 03_6.3V6M