Compal LA d641p rev 1 схема

A B C D E Model Name : B5/B7W1A File Name : LA-D641P 1 Compal Confidential 2 B5/B7W1A M/B Schematics Document Intel Apollo lake UMA 2016-07-22 REV:1.A 3 For 1A PCB PCB15A@ ZZZ2 Part Number DA6001K401A Description PCB 1NU LA-D641P REV1A MB PCB17A@ ZZZ3 Part Number DA6001K411A Description PCB 1NU LA-D641P REV1A MB PCB15@ ZZZ Part Number DA6001K4000 Description PCB 1NU LA-D641P REV0 MB PCB17@ ZZZ Part Number DA6001K4100 Issued Date PCB 1NU LA-D641P REV0 MB Compal Electronics, Inc Compal Secret Data Security Classification Description 2014/03/19 2015/03/18 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Cover Page Rev 1.A B5W1A_LA-D641PR1A Date: A B C D Monday, July 25, 2016 Sheet E of 45 A B C D E DDR3L-ON BOARD 1Rx16 CHA:DDR3L-Memory Down eDP Conn P.16,17 P.25 P.21 1 CHB:204pin DDR3L-SO-DIMM X1 HDMI Conn P.20 P.18 Memory BUS port Dual Channel 1.35V DDR3L 1600 DDI x2 EDPx1 USB2.0 x8 port port port port port port port PCIE 2.0 x1 port RJ45 Conn Touch Panel RTL8111H/GUS P.20 Apollo Lake LAN(GbE) P.22 USB 3.0 Conn P.26 SOC USB 2.0 Conn USB 2.0 On Sub/B P.26 P.26 HD Camera Conn P.20 Card Reader RTS5170 On Sub/B port P.26 EMMC eMMC BGA 1296 balls USB3.0 x1 P.19 31 x 24 mm SATA 3.0 x2 port P.25 P.25 PCIE 2.0 x1 port NGFF WLAN/BT port page 05~15 HD Audio P.23 HDA Codec ALC233 P.29 I2C BUS LPC BUS SATA ODD Conn SPI ROM 1.8V (8MB) P.09 EC ENE KB9022 SATA HDD Conn RTC CKT Speaker Int MIC P.29 P.29 UAJ on Sub/B P.27 P.14 P.28 P.28 PS2 BUS (reserve I2C) DC/DC Interface CKT P.31 Power Circuit DC/DC Touch Pad PS2/I2C P.32~P.41 SPI Int.KBD LED/Power On/Off P.28 Sub Board LS-D671P USB/Audio/CR Fan Control P.30 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification P.26 2014/03/19 2015/03/18 Deciphered Date Title Block Diagrams THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.A B5W1A_LA-D641PR1A Date: A B C D Monday, July 25, 2016 Sheet E of 45 A B C Voltage Rails E Board ID / SKU ID Table for AD channel Power Plane D Description S0 S3 S4/S5 +19V_VIN 19V Adapter power supply ON ON ON BATT+ 12V Battery power supply ON ON ON +19VB AC or battery power rail for power circuit (19V/12V) ON ON ON +RTCVCC RTC Battery Power ON ON ON +1.24VALW +1.24v Always power rail ON ON OFF +1.8VALW +1.8v Always power rail ON ON OFF +3V_SOC +3v Always power rail for SOC ON ON OFF +3VALW +3.3v Always power rail ON ON ON +5VALW +5.0v Always power rail ON ON ON +1.35V +1.35V power rail for DDR3L ON ON ON +3V_PTP +3.3V power rail for PTP ON ON OFF +VNN other (non core) logic voltage for SOC ON OFF OFF +VCC_VCGI Core & GFX voltage for SOC ON OFF OFF +0.675VS +0.675V power rail for DDR3L Terminator ON OFF OFF +1.05VS +1.05v System power rail ON OFF OFF +1.8VS +1.8v system power rail ON OFF OFF +3VS +3.3v system power rail ON OFF OFF +5VS +5.0v system power rail ON OFF OFF BOARD ID Table_LA-D641P Board ID 01 02 03 04 05 PCB Revision EVT_LA-D641PR01 DVT_LA-D641PR02 PVT(DVT2)_LA-D641PR03 Pre MP_LA-D641PR10 Pre MP_LA-D641PR1A 43 level BOM table 2 43 Level BOM Structure 431A2BBOL07 SMT MB AD641 B5W1A QKT4 HDMI 233@/8111H@/NBYOC@/CMC@/PCB15@/QKT4@ 431A2BBOL08 SMT MB AD641 B5W1A QKTY 2G HDMI 233@/8111H@/NBYOC@/CMC@/PCB15@/QKTY@/MD@ Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF 431A2BBOL09 SMT MB AD641 B5W1A QKTW 2G HDMI 233@/8111H@/NBYOC@/CMC@/PCB15@/QKTW@/MD@ Note : ON** dGPU optimus on 431A2BBOL60 SMT MB AD641 B7W1A QKT4 HDMI 233@/8111H@/NBYOC@/CMC@/PCB17@/QKT4@ 431A2BBOL61 SMT MB AD641 B7W1A QKT4 2G HDMI 233@/8111H@/NBYOC@/CMC@/PCB17@/QKT4@/MD@ 431A2BBOL62 SMT MB AD641 B7W1A QKTY 2G HDMI 233@/8111H@/NBYOC@/CMC@/PCB17@/QKTY@/MD@ 431A2BBOL63 SMT MB AD641 B7W1A QKTW 2G HDMI 233@/8111H@/NBYOC@/CMC@/PCB17@/QKTW@/MD@ EC SMBUS Routing Table EC EC_SMB_CK1 EC_SMB_DA1 Power BAT CHGR NGFF +3VALW V V X +3VS X X V EC_SMB_CK2 EC_SMB_DA2 Description SOC SMBUS Routing Table Power SOC BOM Option Table DIMM1 DIMM2 SMB Address SOC_SMBCLK SOC_SMBDATA +3VS V V I2C Map Power I2C Address +1.8VALW to +TS_PWR I2C Port3 I2C Port4 +1.8VALW to +3V_PTP Touch PAD 0xXX X V Touch Panel 0xXX V X Item Unpop Connector EMC requirement EMC requirement depop Touch Screen I2C TPM NTPM Power Button CODEC(ALC233) CODEC(ALC255) RTL 8111H RTL8111GUS Hynix DRAM on board Samsung DRAM on board intel CMC BOM Structure @ CONN@ EMC@ @EMC@ TSI@ TPM@ NTPM@ DBG@ 233@ 255@ 8111H@ 8111GUS@ HYN@ SAM@ CMC@ Item with BYOC without BYOC EMMC EMMC V5.0 A0 Step need to stuff Kingston 32G EMMC PRE QS CPU QLB5 PRE QS CPU QLB6 PRE QS CPU QLB8 15" PCB 1.0 17" PCB 1.0 Memory down 15" PCB 1.A 17" PCB 1.A Micron DRAM on board BOM Structure BYOC@ NBYOC@ EMMC@ EMMCV5@ A0S@ KINGSTON32G@ QLB5@ QLB6@ QLB8@ PCB15@ PCB17@ MD@ PCB15A@ PCB17A@ MCN@ Compal Electronics, Inc Compal Secret Data Security Classification Issued Date BOM Option Table 2014/03/19 2015/03/18 Deciphered Date Title Notes List THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.A B5W1A_LA-D641PR1A Date: A B C D Monday, July 25, 2016 Sheet E of 45 A B VR_ON SVID control RT3601EAGQW (PU901) RT3601EAGQW (PU801) C 4800mA 21000mA D E +VNN +VCC_VCGI 1 SYSON RT8207MZQW (PU501) 6400mA +1.35VP SUSP# ADAPTER PJ501 3V_EN SY8286BRAC (PU401) +1.35V +3VALWP EN_1.05VS SY8003ADFC (PU601) +19VB CHARGER +0.675VSP 3000mA PJ601 +1.05VP ohm +1.05VS +1.05VS_SOC_SRAM ohm +1.05VS_SOC_DDI ohm +1.05VS_SOC_FHV0 ohm +1.05VS_SOC_FUSE BATTERY ohm 2 +1.05VS_SOC_FHV1 3V_EN SY6288C20AAC (UQ12) 150mA VNN_PWRGD SY8032ABC (PU701) 1192mA +1.8V_PG SY8032ABC (PU802) 1300mA +3V_SOC 785mA DMG2301U (QQ25) +1.8VALWP +1.24VALWP PJ704 +1.8VS ohm +1.24VALW +1.24V_1.35VALW_GLML ohm +1.24V_1.35VALW_PLL ohm +1.24V_1.35VALW_USB2 ohm SUSP# 5354mA EM5209VF (U11) +3VS +1.24V_1.35VALW_MPHY ohm +3VS_WLAN ENVDD LAN_PWR_EN EC_ON SY8286CRAC (PU402) 6000mA +5VALWP SUSP# SY6288C20AAC (UL1) 70mA EM5209VF (U11) 4716mA SY6288C20AAC (UX8) +3V_LAN +5VS JPA1 J8 SY6288C20AAC (US21) +VDDA +5VS_HDD ohm USB_PWR_EN +LCDVDD +5VS_ODD +USB3_VCCA 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 2015/03/18 Deciphered Date Title Power Rail THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.A B5W1A_LA-D641PR1A Date: A B C D Monday, July 25, 2016 Sheet E of 45 A B C EDP_TXP0 EDP_TXN0 EDP_TXP1 EDP_TXN1 AH10 AH9 EDP_AUXP EDP_AUXN RC242 EDP_RCOMP_P AG6 2EDP_RCOMP_N AG5 402_0402_1% EDP_TXP_0 EDP_TXN_0 EDP_TXP_1 EDP_TXN_1 1.05V EDP_TXP_2 EDP_TXN_2 EDP_TXP_3 EDP_TXN_3 EDP_AUXP 1.05V EDP_AUXN EDP_RCOMP_P EDP_RCOMP_N CAD note: Trace width=20 mils,Spacing=25mil,Max length=100mils DDI0_TXP_0 DDI0_TXN_0 DDI0_TXP_1 1.05VDDI0_TXN_1 DDI0_TXP_2 DDI0_TXN_2 DDI0_TXP_3 DDI0_TXN_3 DDI1_TXP_0 DDI1_TXN_0 DDI1_TXP_1 1.05VDDI1_TXN_1 DDI1_TXP_2 DDI1_TXN_2 DDI1_TXP_3 DDI1_TXN_3 DDI0_AUXP HDMI DDC (Port C) C49 B49 C54 A54 SOC_DP0_CTRL_DATA SOC_DP0_CTRL_CLK DDI0_DDC_SDA DDI0_DDC_SCL DDI1_DDC_SDA DDI1_DDC_SCL 1.05V DDI0_AUXN DDI1_AUXP DDI0_RCOMP_P DDI0_RCOMP_N HDMI_TX2+ HDMI_TX2- HDMI_TX1+ HDMI_TX1- HDMI_TX0+ HDMI_TX0- HDMI_CLK+ HDMI_CLK- AF2 AF3 AD3 AD2 AC1 AC2 AB3 AB2 AM16 AM15 AK16 AK15 AG1 DDI0_RCOMP_P AG2 DDI0_RCOMP_N 402_0402_1% RC243 OF 23 DDI_DDC NC to disable (PDG0p9 Page228) APL_BGA1296 PreMP modify B0 step APL_SOC @ UC1H T52 P57 T54 T55 UC1 SR2YB@ S IC FH8066802980002 SR2YB B0 1.1G FCBGA SA0000A3X40 T57 P58 P51 UC1 SR2YA@ AC49 AC48 AC51 AB51 S IC FH8066802979803 SR2YA B0 1.1G FCBGA SA0000A3V40 UC1 SR2Y9@ AC52 AB58 AB54 AB55 T5008 @ T5132 @ SDIO_D0 SDIO_D1 SDIO_D2 SDIO_D3 EMMC_D0 EMMC_D1 EMMC_D2 EMMC_D3 1.8VEMMC_D4 EMMC_D5 EMMC_D6 EMMC_D7 1.8V SDIO_CMD SDIO_CLK SDIO_PWR_DWN# SDCARD_D0 SDCARD_D1 SDCARD_D2 1.8V/3.3V SDCARD_D3 EMMC_CLK EMMC_RCLK EMMC_CMD V58 T58 T59 V51 V52 Y49 V55 V57 EMMC_D0 EMMC_D1 EMMC_D2 EMMC_D3 EMMC_D4 EMMC_D5 EMMC_D6 EMMC_D7 Y58 V54 Y51 EMMC_CLK EMMC_RCLK EMMC_CMD SDCARD_CMD SDCARD_CLK SDCARD_CD# 1.8V SDCARD_LVL_WP S IC FH8066802979703 SR2Y9 B0 1.1G FCBGA SA0000A3U40 +1.8VALW OF 23 DDI1_AUXN 1.8V AK3 AK2 AM3 AM2 AH3 AH2 AL2 AL1 APL_SOC @ UC1F S IC FH8066802980002 SR2Z7 B1 1.1G FCBGA SA0000A3X60 AP2 AP3 UC1 SR2Z6@ MDSI_A_DP_0 MDSI_C_DP_0 MDSI_A_DN_0 MDSI_C_DN_0 MDSI_A_DP_1 MDSI_C_DP_1 MDSI_A_DN_1 MDSI_C_DN_1 MDSI_A_DP_2 MDSI_C_DP_2 1.24V MDSI_A_DN_2 MDSI_C_DN_2 MDSI_A_DP_3 MDSI_C_DP_3 1.24V MDSI_A_DN_3 MDSI_C_DN_3 MDSI_A_CLKP MDSI_A_CLKN MDSI_C_CLKP MDSI_C_CLKN 1.24V B51 C51 S IC FH8066802979803 SR2Z6 B1 1.1G FCBGA SA0000A3V60 MIPI_I2C_SDA MIPI_I2C_SCL PNL0_VDDEN 1.8V From HDMI A50 C50 HDMI_HPD# M45 M43 S IC FH8066802979703 SR2Z5 B1 1.1G FCBGA SA0000A3U60 GPIO_199 1.8V GPIO_200 PNL0_BKLTEN PNL0_BKLTCTL 1.8V PNL1_BKLTEN OF 23 PNL1_BKLTCTL 4 Y A INVT_PWM_SOC INVT_PWM_SOC NL17SZ07DFT2G_SC70-5 SA00004BV00 +3VS INVT_PWM_SOC 4.7K_0402_5% RC1161 AM9 AM7 C47 ENVDD B47 DDI1_ENBKL C46 DDI1_PWM ENVDD RPC41 DDI1_ENBKL DDI1_ENBKL ENVDD DDI1_PWM 100K_0804_8P4R_5% PNL1_VDDEN MDSI_A_TE 1.8V MDSI_C_TE AK7 AK6 AM5 AM6 AM12 AM10 AK13 AM13 NC AP12 AP10 AR2 AR1 AP15 AP13 AP6 AP5 UC1 SR2Z7@ UC1 SR2Z5@ DDI1_PWM UC64 P APL_BGA1296 PreMP modify B1 step G E APL_SOC @ UC1E AG7 AG9 AG12 AG10 AC6 AC5 AC7 AC9 D C52 B53 ORB & CRB un stuff need to check CKL later C53 APL_BGA1296 Compal Secret Data Security Classification Issued Date 2014/05/19 Deciphered Date 2015/12/31 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC APL(1/11)DDI,MSIC,XDP,EDP Size Document Number Custom Date: A B C D Compal Electronics, Inc B5W1A_LA-D641PR1A Sheet Monday, July 25, 2016 E Rev 1.A of 45 Non-Interleaved Memory DDR_M0_D[0 15] @ UC1A DDR_M0_D0 DDR_M0_D1 DDR_M0_D2 DDR_M0_D3 DDR_M0_D4 DDR_M0_D5 DDR_M0_D6 DDR_M0_D7 DDR_M0_D8 DDR_M0_D9 DDR_M0_D10 DDR_M0_D11 DDR_M0_D12 DDR_M0_D13 DDR_M0_D14 DDR_M0_D15 DDR_M0_D16 DDR_M0_D17 DDR_M0_D18 DDR_M0_D19 DDR_M0_D20 DDR_M0_D21 DDR_M0_D22 DDR_M0_D23 DDR_M0_D24 DDR_M0_D25 DDR_M0_D26 DDR_M0_D27 DDR_M0_D28 DDR_M0_D29 DDR_M0_D30 DDR_M0_D31 D DDR_M0_D[16 31] AY62 AY61 BE62 BG62 BD63 AW62 AW63 BD62 AV59 AU63 AU62 AV58 AV57 AT55 AT54 AY59 AY57 BB57 BD59 BF59 AV54 AY55 AV52 BD58 BE56 BD54 BF58 BE50 BD50 BB50 BA50 BB54 DDR_M0_D[32 47] APL_SOC MEM_CH0_DQ0 MEM_CH0_DQ1 MEM_CH0_DQ2 MEM_CH0_DQ3 MEM_CH0_DQ4 MEM_CH0_DQ5 MEM_CH0_DQ6 MEM_CH0_DQ7 MEM_CH0_DQ8 MEM_CH0_DQ9 MEM_CH0_DQ10 MEM_CH0_DQ11 MEM_CH0_DQ12 MEM_CH0_DQ13 MEM_CH0_DQ14 MEM_CH0_DQ15 MEM_CH0_DQ16 MEM_CH0_DQ17 MEM_CH0_DQ18 MEM_CH0_DQ19 MEM_CH0_DQ20 MEM_CH0_DQ21 MEM_CH0_DQ22 MEM_CH0_DQ23 MEM_CH0_DQ24 MEM_CH0_DQ25 MEM_CH0_DQ26 MEM_CH0_DQ27 MEM_CH0_DQ28 MEM_CH0_DQ29 MEM_CH0_DQ30 MEM_CH0_DQ31 C MEM_CH0_DQ32 MEM_CH0_DQ33 MEM_CH0_DQ34 MEM_CH0_DQ35 MEM_CH0_DQ36 MEM_CH0_DQ37 MEM_CH0_DQ38 MEM_CH0_DQ39 MEM_CH0_DQ40 MEM_CH0_DQ41 MEM_CH0_DQ42 MEM_CH0_DQ43 MEM_CH0_DQ44 MEM_CH0_DQ45 MEM_CH0_DQ46 MEM_CH0_DQ47 MEM_CH0_DQ48 MEM_CH0_DQ49 MEM_CH0_DQ50 MEM_CH0_DQ51 MEM_CH0_DQ52 MEM_CH0_DQ53 MEM_CH0_DQ54 MEM_CH0_DQ55 MEM_CH0_DQ56 MEM_CH0_DQ57 MEM_CH0_DQ58 MEM_CH0_DQ59 MEM_CH0_DQ60 MEM_CH0_DQ61 MEM_CH0_DQ62 MEM_CH0_DQ63 AR39 AV37 AW37 AR37 AT37 AT41 AR41 AW35 BJ44 BG39 BG40 BJ40 BG43 BG44 BH45 BH41 BA34 BE34 BD34 BD37 BB37 BE39 BD39 BB34 BJ38 BG34 BG33 BH33 BG38 BH37 BG37 BJ34 DDR_M0_D32 DDR_M0_D33 DDR_M0_D34 DDR_M0_D35 DDR_M0_D36 DDR_M0_D37 DDR_M0_D38 DDR_M0_D39 DDR_M0_D40 DDR_M0_D41 DDR_M0_D42 DDR_M0_D43 DDR_M0_D44 DDR_M0_D45 DDR_M0_D46 DDR_M0_D47 DDR_M0_D48 DDR_M0_D49 DDR_M0_D50 DDR_M0_D51 DDR_M0_D52 DDR_M0_D53 DDR_M0_D54 DDR_M0_D55 DDR_M0_D56 DDR_M0_D57 DDR_M0_D58 DDR_M0_D59 DDR_M0_D60 DDR_M0_D61 DDR_M0_D62 DDR_M0_D63 DDR_M0_D[48 63] DDR_M1_D[0 15] DDR_M1_D[16 31] BJ26 BG30 BH31 BG31 BH27 BG27 BG26 BJ30 BA30 BB30 BE30 BD30 BE25 BB27 BD25 BD27 BG24 BJ20 BH23 BJ24 BG20 BG21 BH19 BG25 AT27 AW29 AR27 AT23 AV27 AR25 AR23 AW27 OF 23 APL_BGA1296 B DDR_M0_DQS0 DDR_M0_DQS#0 DDR_M0_DQS1 DDR_M0_DQS#1 DDR_M0_DQS2 DDR_M0_DQS#2 DDR_M0_DQS3 DDR_M0_DQS#3 DDR_M0_DQS4 DDR_M0_DQS#4 DDR_M0_DQS5 DDR_M0_DQS#5 DDR_M0_DQS6 DDR_M0_DQS#6 DDR_M0_DQS7 DDR_M0_DQS#7 DDR_M0_MA0 DDR_M0_MA1 DDR_M0_MA2 DDR_M0_MA3 DDR_M0_MA4 DDR_M0_MA5 DDR_M0_MA6 DDR_M0_MA7 DDR_M0_MA8 DDR_M0_MA9 DDR_M0_MA10 DDR_M0_MA11 DDR_M0_MA12 DDR_M0_MA13 DDR_M0_MA14 DDR_M0_MA15 T242 T243 DDR_M0_DQS0 DDR_M0_DQS#0 DDR_M0_DQS1 DDR_M0_DQS#1 DDR_M0_DQS2 DDR_M0_DQS#2 DDR_M0_DQS3 DDR_M0_DQS#3 DDR_M0_DQS4 DDR_M0_DQS#4 DDR_M0_DQS5 DDR_M0_DQS#5 DDR_M0_DQS6 DDR_M0_DQS#6 DDR_M0_DQS7 DDR_M0_DQS#7 BB63 BC62 AT59 AT58 BB59 BB58 BD52 BB52 AV39 AW39 BJ42 BG42 BB35 BD35 BG36 BH35 BD47 BB47 DDR_M0_MA0 DDR_M0_MA1 DDR_M0_MA2 DDR_M0_MA3 DDR_M0_MA4 DDR_M0_MA5 DDR_M0_MA6 DDR_M0_MA7 DDR_M0_MA8 DDR_M0_MA9 DDR_M0_MA10 DDR_M0_MA11 DDR_M0_MA12 DDR_M0_MA13 DDR_M0_MA14 DDR_M0_MA15 BG50 BG51 BH51 BD41 BE41 BJ52 BG53 BG55 BH53 BG52 BH49 BH55 BG54 BG46 BG56 BG57 @ @ AR35 AT34 APL_SOC MEM_CH0_DQSP0 MEM_CH0_DQSN0 MEM_CH0_DQSP1 MEM_CH0_DQSN1 MEM_CH0_DQSP2 MEM_CH0_DQSN2 MEM_CH0_DQSP3 MEM_CH0_DQSN3 MEM_CH0_DQSP4 MEM_CH0_DQSN4 MEM_CH0_DQSP5 MEM_CH0_DQSN5 MEM_CH0_DQSP6 MEM_CH0_DQSN6 MEM_CH0_DQSP7 MEM_CH0_DQSN7 MEM_CH0_DQSP8 MEM_CH0_DQSN8 MEM_CH1_DQ32 MEM_CH1_DQ33 MEM_CH1_DQ34 MEM_CH1_DQ35 MEM_CH1_DQ36 MEM_CH1_DQ37 MEM_CH1_DQ38 MEM_CH1_DQ39 MEM_CH1_DQ40 MEM_CH1_DQ41 MEM_CH1_DQ42 MEM_CH1_DQ43 MEM_CH1_DQ44 MEM_CH1_DQ45 MEM_CH1_DQ46 MEM_CH1_DQ47 MEM_CH1_DQ48 MEM_CH1_DQ49 MEM_CH1_DQ50 MEM_CH1_DQ51 MEM_CH1_DQ52 MEM_CH1_DQ53 MEM_CH1_DQ54 MEM_CH1_DQ55 MEM_CH1_DQ56 MEM_CH1_DQ57 MEM_CH1_DQ58 MEM_CH1_DQ59 MEM_CH1_DQ60 MEM_CH1_DQ61 MEM_CH1_DQ62 OF 23MEM_CH1_DQ63 BF6 BD10 BE14 BB10 BA14 BB14 BD14 BE8 AV12 BD6 BD5 BB7 AV10 AY9 AY7 BF5 AU2 AT10 AT9 AU1 AY5 AV5 AV6 AV7 AY2 BD2 BD1 BE2 AW1 AW2 AY3 BG2 D DDR_M1_D32 DDR_M1_D33 DDR_M1_D34 DDR_M1_D35 DDR_M1_D36 DDR_M1_D37 DDR_M1_D38 DDR_M1_D39 DDR_M1_D40 DDR_M1_D41 DDR_M1_D42 DDR_M1_D43 DDR_M1_D44 DDR_M1_D45 DDR_M1_D46 DDR_M1_D47 DDR_M1_D48 DDR_M1_D49 DDR_M1_D50 DDR_M1_D51 DDR_M1_D52 DDR_M1_D53 DDR_M1_D54 DDR_M1_D55 DDR_M1_D56 DDR_M1_D57 DDR_M1_D58 DDR_M1_D59 DDR_M1_D60 DDR_M1_D61 DDR_M1_D62 DDR_M1_D63 DDR_M1_D[48 63] C MEM_CH0_MA0 MEM_CH0_MA1 MEM_CH0_MA2 MEM_CH0_MA3 MEM_CH0_MA4 MEM_CH0_MA5 MEM_CH0_MA6 MEM_CH0_MA7 MEM_CH0_MA8 MEM_CH0_MA9 MEM_CH0_MA10 MEM_CH0_MA11 MEM_CH0_MA12 MEM_CH0_MA13 MEM_CH0_MA14 MEM_CH0_MA15 MEM_CH0_BA0 MEM_CH0_BA1 MEM_CH0_BA2 MEM_CH0_ODT0 MEM_CH0_ODT1 NCTF1 NCTF2 NCTF3 NCTF4 MEM_CH0_CLKP0 MEM_CH0_CLKN0 MEM_CH0_CLKP1 MEM_CH0_CLKN1 MEM_CH0_CKE0 MEM_CH0_CKE1 MEM_CH0_CS0# MEM_CH0_CS1# MEM_CH0_RESET# MEM_CH0_CAS# MEM_CH0_VREFCA MEM_CH0_VREFDQ APL_SOC @ UC1D MEM_CH0_CB0 MEM_CH0_CB1 MEM_CH0_CB2 MEM_CH0_CB3 MEM_CH0_CB4 MEM_CH0_CB5 MEM_CH0_CB6 MEM_CH0_CB7 MEM_CH0_RAS# MEM_CH0_WE# OF 23 Follow PDG 1P0 Page 82 (conrirm with intel OK) MEM_CH1_DQ0 MEM_CH1_DQ1 MEM_CH1_DQ2 MEM_CH1_DQ3 MEM_CH1_DQ4 MEM_CH1_DQ5 MEM_CH1_DQ6 MEM_CH1_DQ7 MEM_CH1_DQ8 MEM_CH1_DQ9 MEM_CH1_DQ10 MEM_CH1_DQ11 MEM_CH1_DQ12 MEM_CH1_DQ13 MEM_CH1_DQ14 MEM_CH1_DQ15 MEM_CH1_DQ16 MEM_CH1_DQ17 MEM_CH1_DQ18 MEM_CH1_DQ19 MEM_CH1_DQ20 MEM_CH1_DQ21 MEM_CH1_DQ22 MEM_CH1_DQ23 MEM_CH1_DQ24 MEM_CH1_DQ25 MEM_CH1_DQ26 MEM_CH1_DQ27 MEM_CH1_DQ28 MEM_CH1_DQ29 MEM_CH1_DQ30 MEM_CH1_DQ31 APL_BGA1296 @ UC1B DDR_M1_D[32 47] APL_SOC @ UC1C DDR_M1_D0 DDR_M1_D1 DDR_M1_D2 DDR_M1_D3 DDR_M1_D4 DDR_M1_D5 DDR_M1_D6 DDR_M1_D7 DDR_M1_D8 DDR_M1_D9 DDR_M1_D10 DDR_M1_D11 DDR_M1_D12 DDR_M1_D13 DDR_M1_D14 DDR_M1_D15 DDR_M1_D16 DDR_M1_D17 DDR_M1_D18 DDR_M1_D19 DDR_M1_D20 DDR_M1_D21 DDR_M1_D22 DDR_M1_D23 DDR_M1_D24 DDR_M1_D25 DDR_M1_D26 DDR_M1_D27 DDR_M1_D28 DDR_M1_D29 DDR_M1_D30 DDR_M1_D31 AW48 AW47 BB43 AW45 AV48 AV47 BD43 BA45 BJ48 BG49 BH57 DDR_M0_BS0 DDR_M0_BS1 DDR_M0_BS2 AW43 AW41 DDR_M0_ODT0 DDR_M0_ODT1 DDR_M0_BS0 DDR_M0_BS1 DDR_M0_BS2 @ @ T240 T241 AT43 BB41 BH58 BJ58 BD45 BE45 BB48 BD48 DDR_M0_CLK0 DDR_M0_CLK#0 BH61 BH60 DDR_M0_CKE0 DDR_M0_CKE1 AR43 BA41 DDR_M0_CS#0 DDR_M0_CS#1 AR34 DDR_M0_DRAMRST# BH47 DDR_M0_CAS# BG47 DDR_M0_RAS# BG48 DDR_M0_WE# DDR_M0_CLK0 DDR_M0_CLK#0 DDR_M0_CKE0 DDR_M0_CKE1 DDR_M0_CS#0 DDR_M0_CS#1 DDR_M0_DRAMRST# DDR_M0_CAS# DDR_M0_RAS# DDR_M0_WE# DDR_M1_DQS0 DDR_M1_DQS#0 DDR_M1_DQS1 DDR_M1_DQS#1 DDR_M1_DQS2 DDR_M1_DQS#2 DDR_M1_DQS3 DDR_M1_DQS#3 DDR_M1_DQS4 DDR_M1_DQS#4 DDR_M1_DQS5 DDR_M1_DQS#5 DDR_M1_DQS6 DDR_M1_DQS#6 DDR_M1_DQS7 DDR_M1_DQS#7 DDR_M1_MA0 DDR_M1_MA1 DDR_M1_MA2 DDR_M1_MA3 DDR_M1_MA4 DDR_M1_MA5 DDR_M1_MA6 DDR_M1_MA7 DDR_M1_MA8 DDR_M1_MA9 DDR_M1_MA10 DDR_M1_MA11 DDR_M1_MA12 DDR_M1_MA13 DDR_M1_MA14 DDR_M1_MA15 DDR_M1_DQS0 DDR_M1_DQS#0 DDR_M1_DQS1 DDR_M1_DQS#1 DDR_M1_DQS2 DDR_M1_DQS#2 DDR_M1_DQS3 DDR_M1_DQS#3 DDR_M1_DQS4 DDR_M1_DQS#4 DDR_M1_DQS5 DDR_M1_DQS#5 DDR_M1_DQS6 DDR_M1_DQS#6 DDR_M1_DQS7 DDR_M1_DQS#7 BG28 BH29 BD29 BB29 BJ22 BG22 AV25 AW25 BB12 BD12 BB5 BB6 AT5 AT6 BC2 BB1 BD23 BE23 DDR_M1_MA0 DDR_M1_MA1 DDR_M1_MA2 DDR_M1_MA3 DDR_M1_MA4 DDR_M1_MA5 DDR_M1_MA6 DDR_M1_MA7 DDR_M1_MA8 DDR_M1_MA9 DDR_M1_MA10 DDR_M1_MA11 DDR_M1_MA12 DDR_M1_MA13 DDR_M1_MA14 DDR_M1_MA15 BG9 BG10 BH9 BD16 BB16 BG11 BJ12 BG14 BG12 BH11 BG7 BH13 BG13 BH3 BG15 BG16 T244 T245 @ @ MEM_CH1_CB0 MEM_CH1_CB1 MEM_CH1_CB2 MEM_CH1_CB3 MEM_CH1_CB4 MEM_CH1_CB5 MEM_CH1_CB6 MEM_CH1_CB7 MEM_CH1_BA0 MEM_CH1_BA1 MEM_CH1_BA2 MEM_CH1_ODT0 MEM_CH1_ODT1 NCTF1 NCTF2 NCTF3 NCTF4 MEM_CH1_MA0 MEM_CH1_MA1 MEM_CH1_MA2 MEM_CH1_MA3 MEM_CH1_MA4 MEM_CH1_MA5 MEM_CH1_MA6 MEM_CH1_MA7 MEM_CH1_MA8 MEM_CH1_MA9 MEM_CH1_MA10 MEM_CH1_MA11 MEM_CH1_MA12 MEM_CH1_MA13 MEM_CH1_MA14 MEM_CH1_MA15 MEM_CH1_CLKP0 MEM_CH1_CLKN0 MEM_CH1_CLKP1 MEM_CH1_CLKN1 MEM_CH1_CKE0 MEM_CH1_CKE1 MEM_CH1_CS0# MEM_CH1_CS1# MEM_CH1_RESET# MEM_CH1_CAS# AR29 AT30 MEM_CH1_VREFCA MEM_CH1_VREFDQ OF 23 Follow PDG 1P0 Page 82 (conrirm with intel OK) APL_BGA1296 DDR_M0_DRAMRST# MEM_CH1_DQSP0 MEM_CH1_DQSN0 MEM_CH1_DQSP1 MEM_CH1_DQSN1 MEM_CH1_DQSP2 MEM_CH1_DQSN2 MEM_CH1_DQSP3 MEM_CH1_DQSN3 MEM_CH1_DQSP4 MEM_CH1_DQSN4 MEM_CH1_DQSP5 MEM_CH1_DQSN5 MEM_CH1_DQSP6 MEM_CH1_DQSN6 MEM_CH1_DQSP7 MEM_CH1_DQSN7 MEM_CH1_DQSP8 MEM_CH1_DQSN8 MEM_CH1_RAS# MEM_CH1_WE# AR21 AT21 AW23 AW21 BA19 AW19 BA23 BB23 BH6 BG8 BH15 DDR_M1_BS0 DDR_M1_BS1 DDR_M1_BS2 AW16 AV16 DDR_M1_ODT0 DDR_M1_ODT1 DDR_M1_BS0 DDR_M1_BS1 DDR_M1_BS2 DDR_M1_ODT0 DDR_M1_ODT1 AV17 BB17 BH17 BJ16 B BD19 BE19 BB21 BD21 DDR_M1_CLK0 DDR_M1_CLK#0 DDR_M1_CLK1 DDR_M1_CLK#1 BG18 BG17 DDR_M1_CKE0 DDR_M1_CKE1 BD17 AW17 DDR_M1_CS#0 DDR_M1_CS#1 AR30 DDR_M1_DRAMRST# BH4 DDR_M1_CAS# BJ6 DDR_M1_RAS# BH7 DDR_M1_WE# DDR_M1_CLK0 DDR_M1_CLK#0 DDR_M1_CLK1 DDR_M1_CLK#1 DDR_M1_CKE0 DDR_M1_CKE1 DDR_M1_CS#0 DDR_M1_CS#1 DDR_M1_DRAMRST# DDR_M1_CAS# DDR_M1_RAS# DDR_M1_WE# APL_BGA1296 CC219 1U_0402_16V7K @EMC@ A A DDR_M1_DRAMRST# CC220 1U_0402_16V7K EMC@ For ESD request 05/04 Compal Secret Data Security Classification Issued Date 2014/05/19 2015/12/31 Deciphered Date Title Compal Electronics, Inc APL(2/11)DDRIII THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.A B5W1A_LA-D641PR1A Date: Monday, July 25, 2016 Sheet of 45 +1.8VALW APL_SOC @ UC1L USB2 MB USB2 SUB/B BT Touch screen Camera CardReader V12 V10 V16 V15 Y13 V13 V9 V7 Y9 Y10 AB6 AB7 AC12 AC10 V5 V6 USB2_DP0 USB2_DN0 USB2_DP1 USB2_DN1 USB2_DP2 USB2_DN2 USB2_DP3 USB2_DN3 USB2_DP4 3.3V USB2_DN4 USB2_DP5 USB2_DN5 USB2_DP6 USB2_DN6 USB2_DP7 USB2_DN7 AC16 B55 C55 AC15 USB2_VBUS_SNS 1.8VUSB2_OC0# USB2_OC1# USB2_OTG_ID T61 T62 R63 3.3V SMB_DATA SMB_CLK SMB_ALERT# SVID0_ALERT_B RC522 RC524 RC525 USB_OC0# USB_OC1# USB_OC1# SMB 210K_0402_5% 210K_0402_5% 210K_0402_5% @ USB2_VBUSSENSE RC526 USB_ID RC516 SOC_SMBDATA SOC_SMBCLK SOC_SMBALERT# C18 C17 B17 1.05VSVID0_DATA SVID0_CLK USB2_VBUSSENSE USB_OC0# USB_OC1# USB_ID 0_0402_5% 0_0402_5% @ D (Link to DDR) DVT2 modify When USB OTG feature is not required, SOC_SVID_DAT SOC_SVID_CLK SOC_SVID_ALERT# SVID ALERT +1.05VS Place the PU resistors close to CPU 12 OF 23 USB2/3 MB D @ T4951 @ T4952 USB20_P1 USB20_N1 USB20_P2 USB20_N2 USB20_P3 USB20_N3 USB20_P4 USB20_N4 USB20_P5 USB20_N5 USB20_P6 USB20_N6 USB20_P7 USB20_N7 APL_BGA1296 RC179 68_0402_5% SOC_SVID_ALERT# RC180 DMIC_CLK_AB2_GPIO_82 I2S1_SDO_GPIO_78 J62 K61 K62 H63 G62 I2S2_SDO_GPIO_88 M57 K59 M58 H59 K58 M55 HDA_RST# I2S3_SDO_GPIO_92 M61 L62 L63 M62 AVS_DMIC_DATA_1 AVS_DMIC_CLK_A1 AVS_DMIC_DATA_2 1.8V AVS_DMIC_CLK_B1 3.3V Y61 Y62 W62 W63 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 AVS_DMIC_CLK_AB2 LPC_CLKOUT0 LPC_CLKOUT1 AVS_I2S1_WS_SYNC AVS_I2S1_SDI AVS_I2S1_SDO 1.8V AVS_I2S1_BCLK AVS_I2S1_MCLK LPC_SERIRQ LPC_FRAME# LPC_CLKRUN# AVS_I2S3_WS_SYNC AVS_I2S3_SDI 1.8V AVS_I2S3_SDO AVS_I2S3_BCLK 11 OF 23 2 2 RC247 RC490 20_0402_1% 20_0402_1% AB62 LPC_SERIRQ RC536 V61 LPC_FRAME# RC539 V62 LPC_CLKRUN# RC538 20_0402_1% 20_0402_1% 20_0402_1% AB61 LPC_CLK_0 AA62 LPC_CLK_1 20_0402_1% 20_0402_1% 20_0402_1% 20_0402_1% LPC_IO0_R LPC_IO1_R LPC_IO2_R LPC_IO3_R To EC LPC_SERIRQ_R LPC_FRAME#_R LPC_CLKRUN#_R VR) SOC_SVID_DAT SOC_SVID_DAT For TPM SMB level shift 1K_0402_5% 1K_0402_5% 1K_0402_5% C (To VR) 1.8V/3.3V selection is done by harware strap GPIO_78 Pu 1K > PDG 0p7 P.240 +3V_SOC SOC_XTAL19_IN SOC_XTAL19_OUT Place the PU resistors close to CPU RC181 169_0402_1% To TPM R27 P29 OSCIN OSCOUT +1.05VS SVID DATA To EC To TPM LPC_CLK0_R LPC_CLK1_R AG62 AF61 AG63 AE60 AF62 OSC_CLK_OUT_0 OSC_CLK_OUT_1 OSC_CLK_OUT_2 1.8V OSC_CLK_OUT_3 OSC_CLK_OUT_4 AVS_I2S2_WS_SYNC AVS_I2S2_SDI AVS_I2S2_SDO 1.8V AVS_I2S2_BCLK AVS_I2S2_MCLK RC532 RC531 RC534 RC533 LPC_IO0 LPC_IO1 LPC_IO2 LPC_IO3 C (To SOC_SVID_ALERT#_R M54 P54 M52 P52 220_0402_5% APL_SOC @ UC1K SOC_SMBALERT# RC501 SOC_SMBCLK RC499 SOC_SMBDATA RC500 +3VS APL_BGA1296 +3VS B APL_SOC MCSI_CLKP_0 MCSI_CLKN_0 1.24V MCSI_CLKP_2 MCSI_CLKN_2 GP_CAMERASB0 GP_CAMERASB1 GP_CAMERASB2 1.8V GP_CAMERASB3 GP_CAMERASB4 GP_CAMERASB5 MCSI_RX_CLK0_P 1.24V MCSI_RX_CLK0_N MCSI_RX_CLK1_P MCSI_RX_CLK1_N GP_CAMERASB6 1.8VGP_CAMERASB7 GP_CAMERASB8 GP_CAMERASB9 GP_CAMERASB10 GP_CAMERASB11 M23 P23 J21 H21 M25 L25 H25 J25 SOC_SMBDATA DVT2 modify PreMP modify @ QC2507A L2N7002DW 1T1G_SC88-6 RC517 @ 20_0402_5% RC519 @ 20_0402_5% DDR_SMB_DA RC248 SOC_XTAL19_IN L23 J23 F25 E25 2SOC_XTAL19_OUT 200K_0402_5% Y7 R35 L34 M34 M35 R34 E30 CC137 15P_0402_50V8J 3 MCSI_RX_DATA0_P MCSI_RX_DATA0_N MCSI_RX_DATA1_P MCSI_RX_DATA1_N 1.24VMCSI_RX_DATA2_P MCSI_RX_DATA2_N MCSI_RX_DATA3_P MCSI_RX_DATA3_N GND OF 23 A @ DDR_SMB_CK QC2507B L2N7002DW 1T1G_SC88-6 GND CC7 15P_0402_50V8J L37 P34 J34 H30 M37 F30 SOC_SMBCLK M19 L19 H19 F19 MCSI_DP_0 MCSI_DN_0 MCSI_DP_1 MCSI_DN_1 MCSI_DP_2 1.24V MCSI_DN_2 MCSI_DP_3 MCSI_DN_3 DDR_SMB_CK DDR_SMB_DA @ UC1G P17 M17 P21 R21 L17 J17 F17 E17 RC2570 RC2569 @ @ 2.2K_0402_5% 2.2K_0402_5% B A Change P/N to SJ10000N700 19.2MHz_12pF APL_BGA1296 19.2MHZ_10PF_7M19200019 Compal Secret Data Security Classification 2014/05/19 Issued Date Deciphered Date 2015/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title APL(3/11)SPI,ESPI,SMB,LPC Size Document Number Custom Rev 1.A B5W1A_LA-D641PR1A Date: Compal Electronics, Inc Monday, July 25, 2016 Sheet of 45 L2 L1 K7 M7 NGFF WLAN+BT CC28 CC27 PCIE_PTX_C_DRX_P3 PCIE_PTX_C_DRX_N3 PCIE_PRX_DTX_P3 PCIE_PRX_DTX_N3 1U_0402_16V7K 1U_0402_16V7K RC246 402_0402_1% PCIE_PTX_DRX_P3 PCIE_PTX_DRX_N3 PCIE_PRX_DTX_P3 PCIE_PRX_DTX_N3 P3 P2 P12 P10 PCIE_RCOMPP PCIE_RCOMPN F6 F5 D PCIE_P5_USB3_P2_TXP PCIE_P5_USB3_P2_TXN PCIE_P5_USB3_P2_RXP PCIE_P5_USB3_P2_RXN N2 M2 H5 H6 APL_SOC @ UC1I D PCIE_P0_TXP PCIE_P0_TXN PCIE_P0_RXP PCIE_P0_RXN PCIE_P4_USB3_P3_TXP PCIE_P4_USB3_P3_TXN 1.24V PCIE_P4_USB3_P3_RXP PCIE_P4_USB3_P3_RXN PCIE_P3_USB3_P4_TXP PCIE_P3_USB3_P4_TXN PCIE_P3_USB3_P4_RXP PCIE_P3_USB3_P4_RXN PCIE_P1_TXP PCIE_P1_TXN 1.24V PCIE_P1_RXP PCIE_P1_RXN PCIE_P2_TXP PCIE_P2_TXN PCIE_P2_RXP PCIE_P2_RXN PCIE2_USB3_SATA3_RCOMP_P PCIE2_USB3_SATA3_RCOMP_N OF 23 PCIE_WAKE0# 1.8V PCIE_WAKE1# PCIE_WAKE2# PCIE_WAKE3# V3 V2 P7 P6 R1 R2 T10 T12 T2 T3 M5 M6 PCIE_PTX_DRX_P2 1U_0402_16V7K PCIE_PTX_DRX_N2 1U_0402_16V7K PCIE_PRX_DTX_P2 PCIE_PRX_DTX_N2 2 CC26 CC25 PCIE_PTX_C_DRX_P2 PCIE_PTX_C_DRX_N2 PCIE_PRX_DTX_P2 PCIE_PRX_DTX_N2 GLAN R62 P62 P61 N62 APL_BGA1296 C C APL_SOC @ UC1J USB2/3 MB HDD B ODD J1 J2 K9 K10 K3 K2 F2 G2 PCH_USB3_TX1_P PCH_USB3_TX1_N PCH_USB3_RX1_P PCH_USB3_RX1_N Y3 Y2 T9 T7 SATA_PTX_DRX_P0 SATA_PTX_DRX_N0 SATA_PRX_DTX_P0 SATA_PRX_DTX_N0 W1 W2 T5 T6 SATA_PTX_DRX_P1 SATA_PTX_DRX_N1 SATA_PRX_DTX_P1 SATA_PRX_DTX_N1 USB3_P0_TXP USB3_P0_TXN USB3_P0_RXP USB3_P0_RXN 1.24V USB3_P1_TXP USB3_P1_TXN USB3_P1_RXP USB3_P1_RXN PCIE_CLKOUT0P PCIE_CLKOUT0N PCIE_CLKOUT1P 1.05VPCIE_CLKOUT1N PCIE_CLKOUT2P PCIE_CLKOUT2N PCIE_CLKOUT3P PCIE_CLKOUT3N SATA_P0_TXP SATA_P0_TXN 1.24V SATA_P0_RXP SATA_P0_RXN 1.8V PCIE_CLKREQ1# PCIE_CLKREQ2# PCIE_CLKREQ0# PCIE_CLKREQ3# SATA_P1_USB3_P5_TXP USB_SSIC_0_TX_P 1.24V SATA_P1_USB3_P5_TXN USB_SSIC_0_TX_N 1.05V SATA_P1_USB3_P5_RXP USB_SSIC_0_RX_P SATA_P1_USB3_P5_RXN USB_SSIC_0_RX_N C11 B11 C10 A10 A7 B8 B7 B5 AK62 AH62 AH61 AJ62 CLKREQ_PCIE#0 CLKREQ_PCIE#1 LAN_CLKREQ# WLAN_CLKREQ# CLK_PCIE_LAN CLK_PCIE_LAN# CLK_PCIE_WLAN CLK_PCIE_WLAN# GLAN LAN_CLKREQ# WLAN_CLKREQ# GLAN NGFF WL+BT(KEY E) NGFF WL+BT(KEY E) B AH13 AH12 AG16 AG15 10 OF 23 +1.8VALW APL_BGA1296 RPC26 CLKREQ_PCIE#1 WLAN_CLKREQ# LAN_CLKREQ# CLKREQ_PCIE#0 10K_0804_8P4R_5% A A Compal Secret Data Security Classification Issued Date 2014/05/19 Deciphered Date 2015/12/31 Title Compal Electronics, Inc APL(4/11)HDA,EMMC,CSI2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.A B5W1A_LA-D641PR1A Date: Monday, July 25, 2016 Sheet of 45 +3V_SOC DVT2 modify +1.8VALW 1K_0402_5% RC344 10K_0402_5% PM_RST_BTN# RC343 WAKE# 1K_0402_5% @ T5134 @ @ 0_0402_5% EC_KBRST# 0_0402_5% SOC_PWROK_R RC249 PM_RST_BTN# RC252 PBTN_OUT# RC339 1K_0402_5% AC_PRESENT SOC_PWROK D @ AD61 AC62 AK54 AG55 WAKE# AE62 SUSCLK AD62 PM_RST_BTN# AK55 PBTN_OUT# AG57 SOC_PLTRST# AH51 PM_BATLOW# AK49 AC_PRESENT AG49 SOC_PWROK_R E47 H_PROCHOT# AC57 EC_RSMRST# PMC_SUSPWRDNACK AC63 PM_SLP_S0# PM_SLP_S3# PM_SLP_S4# +1.8VALW H_THERMTRIP# PreMP modify H_PROCHOT# +3V_SOC 100K_0402_5% 10K_0402_5% 10K_0402_5% 20K_0402_5% 100K_0402_5% PM_BATLOW# RC335 PBTN_OUT# RC520 @ PMC_SUSPWRDNACK RC521 @ checklist Page.31 RC253 SOC_PWROK RC518 @EMC@ ESD request 10/22 1U_0402_16V7K CC145 @EMC@ CC144 1U_0402_16V7K @ EC_RSMRST# PMC_SUSPWRDNACK H_THERMTRIP# PMU_SLP_S0# PMU_SLP_S3# PMU_SLP_S4# PMU_WAKE# PMU_SUSCLK PMU_RSTBTN# PMU_PWRBTN# 3.3V PMU_PLTRST# PMU_BATLOW# PMU_AC_PRESENT SOC_PWROK PROCHOT# RSM_RST# SUSPWRDNACK H48 J47 J45 F48 H_THERMTRIP# ESD request 10/22 close CPU side PROCHOT# power rail:1.8V EC_RSMRST# I2C_3_SDA I2C_3_SCL I2C_4_SDA I2C_4_SCL SUS_STAT# NCTF1 14 OF 23 UART_0_CRTS#_GPIO_40 B43 C43 UART_1_CRXD C42 A42 UART_1_CTXD_GPIO_43 @ T5136 UART_1_CRTS#_GPIO_44 H41 J41 M41 L41 D UART_TXD_NGFF UART_RXD_NGFF UART_2_CRTS_DCTS H50 J50 L48 P48 M48 EDP_HPD# From eDP E52 R30 APL_SOC SOC_SPI_CLK SOC_SPI_SI SOC_SPI_SO SOC_SPI_IO2 SOC_SPI_IO3 SOC_SPI_CS#0 SPI_CS1# P NC Y @ NL17SZ07DFT2G_SC70-5 SA00004BV00 G A T5130 @ SOC_PLTRST# C56 A58 B58 B60 B61 B57 C57 SOC_PLTRST# J52 H54 F52 H52 F54 SIO_SPI_0_TXD SIO_SPI_0_RXD 1.8V SIO_SPI_0_FS0 SIO_SPI_0_FS1 SIO_SPI_0_CLK SPI_0_TX_GPIO_110 SPI_0_FS0_GPIO_105 SPI_0_FS1_GPIO_106 SPI_0_CLK_GPIO_104 H58 H57 K55 F61 F58 SIO_SPI_1_TXD SIO_SPI_1_RXD 1.8V SIO_SPI_1_FS0 SIO_SPI_1_FS1 SIO_SPI_1_CLK SPI_1_TX_GPIO_117 E62 C62 D61 E56 D59 F62 SIO_SPI_2_TXD SIO_SPI_2_RXD 1.8V SIO_SPI_2_FS0 SIO_SPI_2_FS1 SIO_SPI_2_FS2 SIO_SPI_2_CLK C SPI_1_FS0_GPIO_112 SPI_1_FS1_GPIO_113 SPI_1_CLK_GPIO_111 SPI_2_TX_GPIO_123 SPI_2_FS1_GPIO_120 SPI_2_FS2_GPIO_121 SPI_2_CLK_GPIO_118 FST_SPI_CLK FST_SPI_MOSI_IO0 FST_SPI_MISO_IO1 FST_SPI_IO2 1.8V FST_SPI_IO3 FST_SPI_CS0# FST_SPI_CS1# 13 OF 23 APL_BGA1296 PLT_RST_BUF# LPSS_I2C0_SDA LPSS_I2C0_SCL LPSS_I2C1_SDA LPSS_I2C1_SCL LPSS_I2C2_SDA LPSS_I2C2_SCL LPSS_I2C3_SDA 1.8V LPSS_I2C3_SCL LPSS_I2C4_SDA LPSS_I2C4_SCL LPSS_I2C5_SDA LPSS_I2C5_SCL LPSS_I2C6_SDA LPSS_I2C6_SCL LPSS_I2C7_SDA LPSS_I2C7_SCL 2RC99 @ PMC_SPI_FS1 PMC_SPI_FS2 PMC_SPI_CLK @ UC1M UC56 1.8VPMC_SPI_FS0 GPIO_213 GPIO_214 1.8V GPIO_215 AR62 AR63 AN62 AM61 AP59 AP58 AM62 AL62 AP52 AP54 AP49 AP51 AL63 AK61 AP62 AP61 PM_RST_BTN# @EMC@ +3VS 1U_0402_16V7K CC14 2 PMC_SPI_TXD PMC_SPI_RXD UART_0_CTXD_GPIO_39 @ T5135 PBTN_OUT# 0_0402_5% For Touch Screen +1.8VALW RC492 47K_0402_5% LPSS_UART2_TXD LPSS_UART2_RXD LPSS_UART2_CTS# LPSS_UART2_RTS# B45 C45 UART_0_CRXD C44 A46 APL_BGA1296 ESD request 10/22 PLT_RST_BUF# LPSS_UART1_RTS# PMIC_I2C_SDA PMIC_I2C_SCL M47 L47 P47 PDG0p7 P.34 PLTRST# V1P8/V3P3(The I/O voltage selection is done by using Hardware Strap GPIO_88) DVT2 modify +3V_SOC @ RC1162 4.7K_0402_5% LPSS_UART1_TXD LPSS_UART1_RXD 1.8V LPSS_UART1_CTS# 1.8V AG58 C LPSS_UART0_TXD LPSS_UART0_RXD LPSS_UART0_CTS# LPSS_UART0_RTS# PMIC_PWRGOOD PMIC_THERMTRIP# PMIC_STDBY PMIC_RESET# F47 H45 @ AC_PRESENT 10K_0402_5% RC537 @EMC@ SOC_PLTRST# 100P_0402_50V8J CC138 1U_0402_16V7K CC140 EMC@ 1U_0402_16V7K CC139 EMC@ 100K_0402_5% RC483 1U_0402_16V7K CC143 @EMC@ APL_SOC @ UC1N RC342 1K_0402_5% 1K_0402_5% 2 I2C3_SCL_PNL RC1147 I2C3_SDA_PNL RC1150 RC1143 I2C_3_SDA RC1144 I2C_3_SCL @ @ B +TS_PWR G @ CC8 RC514 3.3K_0402_5% SOC_SPI_IO2_0_R1 1U_0402_16V7K RC1001 3.3K_0402_5% SOC_SPI_IO3_0_R1 For Touch Pad +1.8VALW Need to check Follow CRB 0.9 P.65 I2C3_SDA_PNL D G S RC1000 D I2C_3_SCL_L I2C_3_SDA_L S SOC_SPI_CS#0_R1 @ D 0_0402_5% 1RC2566 1RC2565 I2C_3_SCL 3.3K_0402_5% RC999 S 2.2K_0402_5% TSI@ 2.2K_0402_5% TSI@ +VCC_SPI 4I2C3_SDA_PNL TSI@ QC2511A DMN63D8LDW-7_SOT363-6 SB000013K00 6I2C_3_SCL_L I2C3_SCL_PNL TSI@ QC2512B TSI@ QC2511B PJT138KA 2N SOT363-6 DMN63D8LDW-7_SOT363-6 SB000016K00 SB000013K00 I2C_3_SDA_L D +VCC_SPI G +1.8VALW TSI@ QC2512A PJT138KA 2N SOT363-6 SB000016K00 S I2C_3_SDA B G +3VALW +1.8VALW +TS_PWR TSI@ 2.2K_0402_5% TSI@ 2.2K_0402_5% I2C3_SCL_PNL +3V_PTP DVT2 modify 1K_0402_5% 1K_0402_5% 2 @ @ RC1153 I2C_4_SDA RC1152 I2C_4_SCL I2C_4_SDA_L RC528 I2C_4_SCL_L RC529 I2C4_SCL_TP 0_0402_5% I2C4_SDA_TP 0_0402_5% I2C4_SCL_TP @ @ 8M SPI ROM(Support ISH) +1.8VALW I2C4_SDA_TP RC1156 RC1157 2.2K_0402_5% 2.2K_0402_5% +3V_PTP +VCC_SPI DVT2 modify RC2564 RC2563 D I2C_4_SCL QC2509A PJT138KA 2N SOT363-6 SB000016K00 I2C_4_SDA QC2509B PJT138KA 2N SOT363-6 SB000016K00 I2C_4_SCL_L I2C_4_SDA_L EMI request 11/03 I2C4_SCL_TP QC2508A DMN63D8LDW-7_SOT363-6 SB000013K00 @ I2C_4_SDA_L I2C4_SDA_TP QC2508B DMN63D8LDW-7_SOT363-6 SB000013K00 @ I2C_4_SCL_L I2C4_SCL_TP @ @ 2.2K_0402_5% 2.2K_0402_5% G @EMC@ CC9 10P_0402_50V8J @EMC@ G +3VALW RC341 1K_0402_5% D SA00006ZV10 SOC_SPI_IO3_0_R1 SOC_SPI_CLK_0_R1 SOC_SPI_SI_0_R1 S SOC_SPI_CS#0_R1 RC491 SOC_SPI_CLK_0_R1 RC52 S @ CS# VCC DO(IO1) HOLD#(IO3) WP#(IO2) CLK GND DI(IO0) W25Q64DWSSIG_SO8 D SOC_SPI_CS#0 0_0402_5% SOC_SPI_CLK 33_0402_5% G A SOC_SPI_CS#0_R1 SOC_SPI_SO_0_R1 SOC_SPI_IO2_0_R1 D 0_0804_8P4R_5% UC2 S 8SOC_SPI_SO_0_R1 7SOC_SPI_SI_0_R1 6SOC_SPI_IO2_0_R1 5SOC_SPI_IO3_0_R1 S G SOC_SPI_SO SOC_SPI_SI SOC_SPI_IO2 SOC_SPI_IO3 RPC5 I2C4_SDA_TP A 1.8V SPI ROM Compal Secret Data Security Classification Issued Date 2014/05/19 Deciphered Date 2015/12/31 Title Compal Electronics, Inc APL(5/11)CLK,GPIO THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.A B5W1A_LA-D641PR1A Date: Monday, July 25, 2016 Sheet of 45 Intel HDA issue, Fix on QS sample 09/01 D D DVT2 modify HDA_SDIN0_AUDIO RC4983 HDA_SYNC 249_0402_1% @ RC79 680_0402_1% @ For Intel 560733 Sighting Alert,2016 WW04 Audio SDI Pin Issue Customers can remove (un-stuffed) the workaround when this issue is fixed in QS sample HDA for AUDIO RPC9 C HDA_BITCLK_AUDIO HDA_SYNC_AUDIO HDA_SDOUT_AUDIO HDA_RST_AUDIO# HDA_BIT_CLK HDA_SYNC HDA_SDOUT HDA_RST# TP_INT# TS_INT_R# 33_0804_8P4R_5% HDA_SDIN0 HDA_SDIN0 APL_SOC @ UC1O T5137 @ DBG_PTI_DATA_0 DBG_PTI_DATA_1 DBG_PTI_DATA_2 DBG_PTI_DATA_3 DBG_PTI_DATA_4 DBG_PTI_DATA_5 DBG_PTI_DATA_6 DBG_PTI_DATA_7 DBG_PTI_CLK_3 T5131 @ T5133 @ SATA_GP0 SATA_GP1 A38 B33 C39 B39 B35 A34 B31 H39 B29 A30 L39 C34 E39 C30 C38 F39 C36 C35 J39 C33 B27 C26 A26 B25 C25 +1.8VALW GPIO_0 GPIO_25 GPIO_1 GPIO_26 GPIO_2 GPIO_27 GPIO_3 GPIO_28 GPIO_4 GPIO_29 1.8V GPIO_5 GPIO_30 GPIO_6 GPIO_31 GPIO_7 GPIO_32 GPIO_8 GPIO_33 GPIO_9 1.8V GPIO_10 GPIO_11 GPIO_12 GPIO_13 ISH_GPIO_0 GPIO_14 ISH_GPIO_1 GPIO_15 ISH_GPIO_2 GPIO_16 ISH_GPIO_3 GPIO_17 1.8VISH_GPIO_4 GPIO_18 ISH_GPIO_5 GPIO_19 ISH_GPIO_6 GPIO_20 ISH_GPIO_7 GPIO_21 ISH_GPIO_8 GPIO_22 ISH_GPIO_9 GPIO_23 GPIO_24 15 OF 23 C27 C31 C29 B37 H35 C37 H34 F35 F34 AM48 AK58 AK51 AM54 AM51 AM49 AM57 AM55 AM52 AK57 EC_SCI# SOC internal PU EC_SCI# EC_LID_OUT# GPIO30 GPIO31 HDA_BIT_CLK HDA_SYNC HDA_SDIN0 HDA_SDOUT C MEMORY_STRAP_0 MEMORY_STRAP_1 MEMORY_STRAP_2 MEMORY_STRAP_3 SOC_SPKR S ME_EN Circuit follow A4WAL EC need modify code 10K_0402_5% @ RC553 G QC63 @ L2N7002LT1G_SOT23-3 RC550 D @ @ 10K_0402_5% SPI_2_CLK_GPIO_118 RC551 B @ UC1Q APL_SOC RC1052 0_0402_5% 2 RC552 PreMP modify 10K_0402_5% RC78 1K_0402_1% 10K_0402_5% +1.8VALW @ APL_BGA1296 AP57 C63 E16 E63 F12 F14 F16 H12 H14 H16 J16 L16 M10 M12 M16 GPIO30 GPIO31 NCTF1 PWM0 NCTF2 1.8V PWM1 NCTF3 PWM2 NCTF4 PWM3 NCTF5 NCTF6 1.8V GPIO_216 NCTF7 NCTF8 GPIO_217 NCTF9 GPIO_218 NCTF10 GPIO_219 NCTF11 1.8V NCTF12 NCTF13 NCTF14 NCTF15 17 OF 23 B41 C41 F41 E41 PWM0_GPIO_34 PWM1_GPIO_35 VCC1P24_1P35_SEL B P30 M29 M30 L30 APL_BGA1296 SW request 1104 A A Compal Secret Data Security Classification 2014/05/19 Issued Date Deciphered Date 2015/12/31 Title Compal Electronics, Inc APL(6/11)GPIO THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.A B5W1A_LA-D641PR1A Date: Monday, July 25, 2016 Sheet 10 of 45 B UQ1 RQ2 0_0402_5% @ CQ2 1U_0402_16V7K 0_0402_5% @ +5VALW 12 CT1 VBIAS 5VS_ON VOUT1 VOUT1 ON1 +5VALW @ CQ4 1U_0402_16V7K VIN1 VIN1 3VS_ON @ CT2 VIN2 VIN2 VOUT2 VOUT2 CQ1 470P_0402_50V7K 10 CQ7 1U_0402_16V7K EC_SUSPWRDNACK EC_SUSPWRDNACK +5VS_OUT JPQ2 JP@ +5VS_OUT +5VS CQ8 1U_0402_16V7K JUMP_43X118 +1.8V_PG TPS22966DPUR_SON14_2X3 CQ6 1U_0402_16V7K 470P_0402_50V7K CQ3 15 GPAD 2 Q2509,Q2510,Q2511 Change to SB00000I200 Vgs = 0.49V~1V Power-off sequencing schematic +3VS_OUT JUMP_43X118 11 GND ON2 +3VS +1.24VALW_OFF 1 +3VS_OUT D RQ1 Rise Time: 3.3V@330pF = 889.68us 5.0V@330pF = 1348us JPQ1 JP@ 14 13 S 1 +3VALW DVT2 modify SUSP# CQ5 1U_0402_16V7K E D D S VIH=1.2~5.5V 3.3V@100k/0.1uF=3.538ms 3.3V@120k/0.1uF=4.272ms C D A S G Q21 L2N7002LT1G_SOT23-3 @ PreMP modify +3VALW CQ9 IN DVT2 modify EN_3V_SOC 1_0402_5% +3V_SOC_ON @ @ SPOK OUT GND EN_3V_SOC RQ3 CQ10 1U_0402_16V7K need to check VNN_PWRGD @ UQ2 1U_0402_16V7K EN OC +1.8VALW_OFF +3V_SOC G CQ11 1U_0402_16V7K SPOK SY6288C20AAC_SOT23-5 +3V_SOC_OFF G JPQ3 JP@ SPOK 47K_0402_5% @ RQ4 +3V_SOC_ON Q22 L2N7002LT1G_SOT23-3 @ +3VALW Q23 L2N7002LT1G_SOT23-3 @ +3V_SOC JUMP_43X79 2 +1.8VALW TO +1.8VS +5VALW +0.675VS_VTT @ R25 @ 100K_0402_5% 20_0603_5% R27 100K_0402_5% @ SUSP +0.675VS_VTT_R D S R28 470_0603_5% @ 1 R26 470_0603_5% 2 +1.8VS @ RQ5 +1.35V_VDDQ +5VALW +1.8VALW SUSP# SUSP SYSON +1.35V_R Q5B L2N7002DW1T1G_SC88-6 3 Q4B @ L2N7002DW1T1G_SC88-6 SYSON Q5A L2N7002DW1T1G_SC88-6 SYSON# @ S R30 10K_0402_5% @ D EN_1.8VS# G SUSP# @ @ 2 1 CQ12 1U_0402_6.3V6K R29 470_0603_5% EN_1.8VS# Q4A L2N7002DW1T1G_SC88-6 G RQ6 EN_1.8VS# 1K_0402_5% SYSON# QQ1 DMG2301U-7_SOT23-3 QQ2 L2N7002LT1G_SOT23-3 PVT modify 4 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 2015/03/18 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC DC INTERFACE Rev 1.A B5W1A_LA-D641PR1A Date: A B C D Monday, July 25, 2016 Sheet E 31 of 45 +19V_ADPIN @ PJP101 ACES_50305-00441-001_4P D 5A_Z120_25M_0805_2P +19V_ADPIN GND GND +19V_VIN D EMI@ PC101 100P_0603_50V8 2 EMI@ PL101 PR111 0_0402_5% EMI@ PC102 1000P_0603_50V7K @ +3VLP +CHGRTC C C - PBJ1 @ + PR112 560_0603_5% PR113 560_0603_5% +RTCBATT ML1220T13RE B B A A Compal Secret Data Security Classification Issued Date 2011/07/08 2015/07/08 Deciphered Date Title Compal Electronics, Inc PWR DCIN / Pre-charge THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.A B5W1A_LA-D641PR1A Date: Monday, July 25, 2016 Sheet 32 of 45 33 EC_SMB_CK1 33 @ PC202 0.1U_0603_25V7K PR207 1K_0402_1% 2 34 +RTCVCC MAINPWON MAINPWON VCC TMSNS1 GND RHYST1 OT1 TMSNS2 OT2 RHYST2 @ PR208 47K_0402_1% @ PH201 100K_0402_1%_NCP15WF104F03RC G718TM1U_SOT23-8 CVILU_CI9908M2HR0-NH @ PU201 @ PR201 100K_0402_1% BATT_TEMP D @ PR205 10K_0402_1% EC_SMB_DA1-1 EC_SMB_CK1-1 BATT_TS BATT_B/I @ PR204 10K_0402_1% +3VLP PR206 6.49K_0402_1% @ PJP201 1 2 3 4 5 6 7 8 GND 10 GND D EC_SMB_DA1 100_0402_1% 100_0402_1% +3VLP PR202 PR203 C PC201 1000P_0603_50V7K 1 +17.4V_BATT EMI@ PL201 5A_Z120_25M_0805_2P EMI@ PQ201 BSS138LT1G_SOT23-3 BI_S 2 1 S G BI_GATE EMI@ PL202 5A_Z120_25M_0805_2P EMI@ PC203 0.01U_0603_50V7K @ PR217 0_0402_5% 2015/09/30 update +17.4V_BATT+ Close to fan D PR209 100K_0402_5% C When PR210=16.9K For KB9022 OTP Active Recovery VCIN0_PH(V) 92'C, 1V 56'C, 2V PH202(ohm) 7.3092K 26.11K VCIN1_PROCHOT For KB9022 sense 20mΩ Active Recovery PR211 65W 84.5W,0.61V 84.5W,0.61V 19.1KΩ SD034191280 45W 58.5W,0.61V 58.5W,0.61V 10KΩ SD034100280 130% 130% VCIN1_PROCHOT=PW/19*20*0.02*PR214/(PR211+PR214) +EC_VCCA ADP_I 65W@ PR211 19.1K_0402_1% PR210 16.9K_0402_1% B PR211 10K_0402_1% 45W@ 2 B 33 VCIN0_PH +19VB_5V @ PR212 80.6K_0402_1% Close to CPU COMMON PART @ T1 VCIN1_BATT_DROP @ @ PR216 0_0402_5% PR214 10K_0402_1% @ PR215 0.1U_0402_25V6 T2 @ PC204 @ PR213 0_0402_5% 2 1 VCIN1_PROCHOT PH202 100K_0402_1%_NCP15WF104F03RC 2 10K_0402_1% ECAGND A A Compal Secret Data Security Classification Issued Date 2011/07/08 2015/07/08 Deciphered Date Title Compal Electronics, Inc PWR-BATTERY CONN/OTP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.A B5W1A_LA-D641PR1A Date: Monday, July 25, 2016 Sheet 33 of 45 A B C D Vgs = 20V Vds = 60V Id = 250mA D S 2N7002KW _SOT323-3 +19V_P2 ILIM PR324 316K_0402_1% PC320 0.01U_0402_25V7K PR317 100K_0402_1% PC315 10U_0805_25V6K PC314 10U_0805_25V6K 2 CSOP1 1 PR312 4.7_1206_5% @EMI@ CSON1 PC317 0.1U_0402_25V6 PQ305 AON7506_DFN33-8-5 +3VLP H/L Side AON7506 SB000010A00 Rds(on):13~15.8mohm Vgs=20V Vds=30V ID= 10.5A (Ta=70C) 10 SCL SDA IOUT PR311 0.01_1206_1% +17.4V_BATT +3VALW @ PR316 316K_0402_1% +19V_VIN PC319 0.1U_0603_16V7K BQ24725A_BATDRV BQ24725A_ILIM PR318 422K_0402_1% BQ24725A_ACDET For 4S per cell 4.35V battery BQ24725A_ACDET BATDRV 11 SRN 12 PR313 10_0603_1% CSOP1 SRP1 PR314 6.8_0603_1% CSON1 SRN1 14 13 PC318 680P_0402_50V7K @EMI@ ACDRV DL_CHG SRP PQ306 AON7506_DFN33-8-5 15 CHG1 4.7UH_5.5A_20%_7X7X3_M 2 CMSRC ACIN Choke 4.7uH SH00000YC00 (Common Part) (Size:6.6 x 7.3 x mm) (DCR:28m~33m) Support max charge 3.5A Power loss: 0.245W CSR rating: 1W PL302 VSRP-VSRN spec < 81.28mV BQ24725A_LX GND ACOK PC313 1U_0603_25V6K ACP PR315 5 BQ24725A_REGN LODRV BQ24725A_IOUT +3VLP 100K_0402_1% @ PR308 0_0603_5% DH_CHG 16 PR307 2.2_0603_5% BQ24725A_BST2 17 BTST DH_CHG 18 VF = 0.37V ACN ACDET BQ24725A_ACDRV 2BQ24725A_BATDRV_1 PC316 0.1U_0402_25V6 PR306 10_1206_1% BQ24725A_LX PD302 RB751V-40_SOD323-2 BQ24735RGRR_QFN20_3P5X3P5 BQ24725A_CMSRC 1 PAD 1 PR305 4.12K_0603_1% REGN HIDRV PU301 19 1U_0603_25V6K BQ24725A_BATDRV PC311 0.047U_0402_25V7K PHASE 1 1 PC312 21 VF = 0.5V PD301 BAS40CW _SOT323-3 BQ24725A_VCC2 PC309 0.1U_0402_25V6 PR310 4.12K_0603_1% BQ24725A_ACN BQ24725A_ACP PR309 4.12K_0603_1% ACFET MDU1512 SB00000SY00 Rds(on):4.2~5mohm Vgs=20V Vds=30V ID= 24.2A (Ta=70C) PC308 0.1U_0402_25V6 BQ24725A_ACDRV_1 +19V_VIN Isat: 4A DCR: 27mohm @EMI@PC306 0.1U_0402_25V6 EMI@ PL301 1UH +-30% 2.8A PQ304 AON7506_DFN33-8-5 +19VB_CHG PR303 0.02_1206_1% 20 PC302 0.1U_0402_25V6 @ PR304 0_0402_5% PQ302 MDU1512RH_POW ERDFN56-8-5 2 PC301 2200P_0402_50V7K +19V_P1 BATFET AON7506 SB000010A00 Rds(on):13~15.8mohm Vgs=20V Vds=30V ID= 10.5A (Ta=70C) 2014/01/21 update PL301 change Common part SH00000YG00 EMI@ PC305 2200P_0402_25V7K PQ303 AON7506_DFN33-8-5 +19V_VIN Need check the SOA for inrush PC304 10U_0805_25V6K PC303 10U_0805_25V6K 3M_0402_5% PC307 0.01U_0402_50V7K RBFET AON7506 SB000010A00 Rds(on):13~15.8mohm Vgs=20V Vds=30V ID= 10.5A (Ta=70C) PR302 PR301 1M_0402_5% +19VB VCC G PC310 0.1U_0402_25V6 PQ301 Protection for reverse input 2 BATT_4S 4S_BATT@ PQ307 LTC015EUBFS8TL_UMT3F PR320 0_0402_5% EC_SMB_CK1 32 EC_SMB_DA1 32 ADP_I 32 4S_BATT@ PR323 100K_0402_1% PC322 100P_0402_50V8J 1 @ PR322 0_0402_5% PR319 66.5K_0402_1% 1 PC321 2200P_0402_50V7K 4S_BATT@ PR321 2M_0402_1% PC323 100P_0402_50V8J Close EC chip 2N7002KW _SOT323-3 S Vin Dectector D 35 SUSP# 4S_BATT@ PQ308 G L >H H >L Min 17.16V 16.76V Typ 17.63V 17.22V Max 18.12V 17.70V Compal Secret Data Security Classification VILIM = 20*ILIM*Rsr ILIM = 3.3*100/(100+316)/20/0.01 = 3.966 A Issued Date 2013/10/01 Deciphered Date 2014/05/24 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Date: A B C Compal Electronics, Inc CHARGER Document Number Rev 1.A Common Circuit Monday, July 25, 2016 Sheet D 34 of 45 PR402 499K_0402_1% ENLDO_3V5V BS @ PC410 22U_0603_6.3V6M PC408 22U_0603_6.3V6M 2 PC407 22U_0603_6.3V6M +3VALWP @EMI@ PR405 4.7_1206_5% 1 NC 15 12 11 21 PC411 4.7U_0603_6.3V6M C Vout is 3.234V~3.366V Ipeak=4.78A Imax=3.35A PR403 1K_0402_5% 1 PC416 0.1U_0402_25V6 PC424 4.7U_0603_6.3V6M VL 2 +5VALW B PC427 22U_0603_6.3V6M PC428 22U_0603_6.3V6M @ PC423 22U_0603_6.3V6M PC422 22U_0603_6.3V6M 1 PC421 22U_0603_6.3V6M +5VALWP PR408 @EMI@ 5V LDO 150mA~300mA 21 PC420 22U_0603_6.3V6M 1 @EMI@ LDO 15 OUT FF 13 JUMP_43X118 LX_5V PC419 4.7U_0603_6.3V6M 16 NC GND +3VALW PL404 1.5UH_PCMB053T-1R5MS_6A_20% 19 VCC NC Choke 1.5uH SH000016800 (Common Part) (Size:4.9 x 5.2 x mm) (DCR:20m~25m) 18 17 +5VALWP BS IN IN PG ENLDO_3V5V PR409 2.2K_0402_5% @ PR410 0_0402_5% 10 GND 11 @ PR413 0_0402_5% IN IN LX GND EN1 SPOK GND @ PJ402 20 LX EN2 LX 12 JUMP_43X118 PU402 SY8286CRAC_QFN20_3X3 LX_5V +3VALWP @ PR407 0_0603_5% EC_ON +3VLP 16 BST_5V 5V_EN B 32 MAINPWON 17 @ PJ401 @EMI@ PC418 0.1U_0402_25V6 2 EMI@ PC417 2200P_0402_50V7K 2 18 3.3V LDO 150mA~300mA +19VB_5V PC415 4.7U_0603_25V6K 1 LX_3V +19VB_5V JUMP_43X79 GND PL402 1.5UH_PCMB053T-1R5MS_6A_20% 19 PC425 15V_SN EMI@ PL403 5A_Z120_25M_0805_2P PC414 4.7U_0603_25V6K 1 PC403 0.1U_0402_25V6 20 PC402 1000P_0402_25V8J 3V_FB 3V_EN @ PJ404 NC SPOK 1 LDO NC OUT PG Check pull up resistor of SPOK at HW side +19VB IN GND PR412 100K_0402_5% 2 ENLDO_3V5V +3VALWP C IN LX GND EN2 GND 14 10 LX FF D Choke 1.5uH SH000016800 (Common Part) (Size:4.9 x 5.2 x mm) (DCR:20m~25m) LX EN1 IN LX_3V 13 14 JUMP_43X79 IN @EMI@ PC401 0.1U_0402_25V6 @ PJ403 BST_3V1 +19VB_3V 680P_0603_50V7K 4.7_1206_5% EMI@ PC404 2200P_0402_50V7K 1 @ PR401 0_0603_5% PU401 SY8286BRAC_QFN20_3X3 @EMI@ PC412 680P_0603_50V7K 13V_SN EMI@ PL401 5A_Z120_25M_0805_2P PC405 10U_0805_25V6K +19VB +19VB PR404 150K_0402_1% D PC409 22U_0603_6.3V6M Vout is 4.998V~5.202V Ipeak=7A Imax=4.9A A PR411 1M_0402_1% PC426 4.7U_0402_6.3V6M 5V_EN PC413 1000P_0402_25V8J 5V_FB PR406 1K_0402_5% EC VDD0 is +3VL, PC426 UNPOP EC VDD0 is +3VALW, PC426 POP A Compal Secret Data Security Classification 2012/07/10 Issued Date 2013/07/10 Deciphered Date Title Compal Electronics, Inc 3VALW/5VALW THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Monday, July 25, 2016 Date: Rev 1.A B5W1A_LA-D641P Sheet 35 of 45 D D BST_1.35VP PC507 10U_0603_6.3V6M VTTREF_1.35VP PC509 0.033U_0402_16V7K FB +1.35VP FB_1.35VP PR505 8.2K_0402_1% +1.35VP B PR507 470K_0402_1% +19VB_1.35VP Frequency S3 VDDQ S5 VDD C VTTREF 21 VTT BOOT VLDOIN 19 20 18 17 VDDP EN_0.675VSP B PR506 5.1_0603_5% GND RT8207PGQW _W QFN20_3X3 +5VALW UGATE PHASE CS 11 VTTSNS 10 1U_0402_10V6K PQ502 SI7716ADN-T1-GE3_POW ERPAK8-5 VDD_1.35VP PAD VTTGND PGND PC516 PC522 22U_0603_6.3V6M PC521 22U_0603_6.3V6M PC520 22U_0603_6.3V6M @ PC515 22U_0603_6.3V6M PC514 22U_0603_6.3V6M @ PC513 22U_0603_6.3V6M @ PC512 22U_0603_6.3V6M PC511 22U_0603_6.3V6M 1 PC510 22U_0603_6.3V6M @EMI@ PC517 680P_0402_50V7K +5VALW PR504 5.1_0603_5% LGATE EN_1.35VP PR502 13K_0402_1% CS_1.35VP 13 PC508 1U_0402_10V6K 12 @EMI@ PR503 4.7_1206_5% 14 TON PQ501 AON7408L_DFN8-5 1 LG_1.35VP 15 IOCP PGOOD Choke 1.5uH SH000016700 (Common Part) (Size:7.3 x 6.6 x mm) (DCR:14m~15m) PC506 10U_0603_6.3V6M PU501 PL502 1.5UH_PCMC063T-1R5MN_9A_20% 2LX_1.35VP +0.675VSP LX_1.35VP C Vout=1.365V +1.35VP TON_1.35VP PC505 0.1U_0603_25V7K +1.35VP 0.675Volt +/- 5% TDC 0.7A Peak Current 1A UG_1.35VP 1 PR501 2.2_0603_5% BST_1.35VP_R PC504 10U_0805_25V6K JUMP_43X79 2 PC503 10U_0805_25V6K 2 2 @ PJ503 EMI@ PC502 2200P_0402_50V7K +19VB_1.35VP 16 @EMI@ PC501 0.1U_0402_25V6 +19VB Pin19 need pull separate from +1.35VP If you have +1.35V and +0.675V sequence question, you can change from +1.35VP to +1.35VS +19VB_1.35VP EMI@ PL501 5A_Z120_25M_0805_2P L/S SI7716 Rds(on) :typ:13.5mOhm, max:16.5mOhm Idsm(TA=25)=16A, Idsm(TA=70)=9.5A @ PR509 0_0402_5% PR508 10K_0402_1% SYSON @ PC518 0.1U_0402_10V7K H/S AON7408 Rds(on) :typ:27mOhm, max:34mOhm Idsm(TA=25)=7.5A, Idsm(TA=70)=5.5A Choke: 7x7x3 Rdc=14mohm(Typ), 15mohm(Max) SUSP# PR510 1_0402_1% @ PC519 0.1U_0402_10V7K +1.35VP @ PJ501 JUMP_43X118 2 +1.35V_VDDQ +0.675VSP @ PJ502 JUMP_43X39 2 +0.675VS_VTT 33 Switching Frequency: 530kHz Ipeak=6.4A, Imax=4.48A Iocp~7.7A OVP: 110%~120% VFB=0.75V, Vout=1.365V Vout=0.75*(1+Rup/Rdown) =0.75*(1+(8.06/10)) =1.354 [x1.002] Vout=0.75*(1+Rup/Rdown) =0.75*(1+(8.2/10)) =1.365 [x1.01] A A Compal Secret Data Security Classification Issued Date 2014/07/31 Deciphered Date 2015/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Size Document Number Custom Rev 1.A B5W1A_LA-D641P Date: Compal Electronics, Inc RT8207K Monday, July 25, 2016 Sheet 36 of 45 A B C D 1 @ PJ602 +1.05VP 2 +1.05VS JUMP_43X79 +3VS @ PR601 0_0402_5% PR602 100K_0402_5% PL601 1UH_2.8A_30%_4X4X2_F 2 PR606 10K_0402_1% PC607 22U_0603_6.3V6M FB_1.05VP SNUB_1.05VP FB=0.6V Rup PR605 7.68K_0402_1% PC605 22U_0603_6.3V6M SY8003ADFC_DFN8_2X2 +1.05VP Vout=1.0608V LX_1.05VP PC603 68P_0402_50V8J NC PGND LX PC602 22U_0603_6.3V6M EN IN JUMP_43X79 PG Choke 1uH SH00000YG00 (Common Part) (Size:3.8 x 3.8 x 1.9 mm) (DCR:20m~25m) Ipeak=3A Imax=2.1A Rdown @EMI@ PR604 4.7_0603_5% 1 FB @EMI@ PC606 680P_0402_50V7K @ PJ601 PGND SGND @ PC604 22U_0603_6.3V6M PU601 2 +1.05VSP_PG PR603 1M_0402_5% @ +3VALW EN_1.05VS PC601 0.1U_0402_16V7K 1 EN_1.05VP Note: When design Vin=5V, please stuff snubber to prevent Vin damage 3 Vout=0.6V* (1+Rup/Rdown) 4 Compal Secret Data Security Classification Issued Date 2011/06/13 Deciphered Date 2012/06/13 Title SY8003A THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.A B5W1A_LA-D641P Date: A B C Monday, July 25, 2016 Sheet D 37 of 45 D D @ PJP702 JUMP_43X79 2 +1.8VALWP Choke 1uH SH00000YG00 (Common Part) (Size:3.8 x 3.8 x 1.9 mm) (DCR:20m~25m) PC701 22U_0603_6.3V6M +1.8VALWP Ipeak=0.8A Imax=0.56A FB_1.8VALW FB=0.6V C PR706 2 0.1U_0402_16V7K Rup SNUB_1.8VALW 1 1M_0402_1% C @ PC705 2 EN_1.8VALW_R PR705 20K_0402_1% PC713 22U_0603_6.3V6M PR703 4.7_0603_5% @EMI@ PR702 EN PC704 22U_0603_6.3V6M FB Vout=1.8V GND PL701 1UH_2.8A_30%_4X4X2_F LX_1.8VALW +3VALW PG @ PC703 22U_0603_6.3V6M PR701 100K_0402_5% LX PC702 68P_0402_50V8J IN VIN_1.8VALW +1.8V_PG @ PR704 0_0402_5% EN_1.8VALW PU701 SY8032ABC_SOT23-6 @ PJP701 JUMP_43X79 2 +3VALW 37 1 +1.8VALW @EMI@ PC706 Rdown 10K_0402_1% 2 680P_0402_50V7K Note: When design Vin=5V, please stuff snubber to prevent Vin damage Vout=0.6V* (1+Rup/Rdown) @ PJP704 +1.24VALWP 2 +1.24VALW JUMP_43X79 Choke 1uH SH00000YG00 (Common Part) (Size:3.8 x 3.8 x 1.9 mm) (DCR:20m~25m) PC707 22U_0603_6.3V6M B B PU702 SY8032ABC_SOT23-6 PL702 Vout=1.242V PR709 10.7K_0402_1% +1.8V_PG @EMI@ PR708 4.7_0603_5% EN_1.24V Rup FB=0.6V 1 FB_1.24V @EMI@ PC712 680P_0402_50V7K PR712 10K_0402_1% Rdown @ Ipeak=1.3A Imax=0.91A SNUB_1.24V 2 PR711 1M_0402_1% PC711 0.1U_0402_16V7K 37 @ PR710 0_0402_5% PC714 22U_0603_6.3V6M 1 +1.24VALWP 1UH_2.8A_30%_4X4X2_F LX_1.24V EN 2 FB LX GND PC710 22U_0603_6.3V6M +1.24VALW_PG PG @ PC709 22U_0603_6.3V6M IN 37 @ PJP703JUMP_43X79 2 PR707 100K_0402_5% PC708 68P_0402_50V8J +3VALW +3VALW Note: When design Vin=5V, please stuff snubber to prevent Vin damage Vout=0.6V* (1+Rup/Rdown) A A Compal Secret Data Security Classification Issued Date 2011/06/13 Deciphered Date 2012/06/13 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title SY8032 Size C Date: Compal Electronics, Inc Document Number Rev 1.A B5W1A_LA-D641P Monday, July 25, 2016 Sheet 38 of 45 0.68uH Choke 7x7x4 7x7x3 Size and DCR 0.67m +-5% 0.9m +-5% PH802 10K(3370K) 1K(3650K) PR831 10K PR802 and PR804 pull high resistor are pop at the end of VR SVID Other VR is unpop Note SVID_ALERT# pull high resistor is at HW side confirm with power sequence, +1.05VS it need behind +5VS 1K ISEN @ PC802 0.1U_0402_25V6 14 VSEN UGATE PC814 470P_0402_50V7K PC815 100P_0402_50V8J FB_VCCGI 24 LG_VCCGI 10 LX_VCCGI UG_VCCGI BST_VCCGI PQ802 AON6794_DFN5X6-8-5 LG_VCCGI RGND_VCCGI 22 COMP FB GND VCC_VCGI (LL=6m) FSW = 600kHz DCR = 0.67 mohm +/- 5% ISEN1P ISEN1N EMI@ PC808 2200P_0402_50V7K @EMI@ PC807 0.1U_0402_25V6 @EMI@ PC854 0.1U_0402_25V6 1 PC812 0.47U_0402_25V6K PR830 PR831 300_0402_1% 10K_0402_1% 2AVcore1_NTC @ PR844 0_0201_5% 2AVcore1_NTC_R PH802 10K_0402_1%_B25/50 3370K Close to PL802 TYP MAX H/S_AON6428 Rds(on) = 11.3 mohm , 14.5 mohm L/S_AON6794 Rds(on) = 2.8 mohm , 3.5 mohm 20 21 DRVEN 15 PVCC 12 PR828 750_0603_1% B +5VALW AISP1 AVcore1 PC821 0.1U_0402_25V6 2 Local sense, for debug only Close output cap that near choke PR836 22_0402_1% PR835 100K_0402_5% @ @ PC818 0.1U_0402_25V6 1 2 PR834 100_0402_1% [49] VR_PWRGD PC819 1U_0402_10V6K VCC +VCC_VCCGI1 @ PC817 0.1U_0402_25V6 @ PR843 0_0402_5% 29 RGND PR833 45.3K_0402_1% PR832 10K_0402_1% 2 AISP1_R 11 PWM SET3 AISP1 SET2 VR_READY @ PC813 0.1U_0402_25V6 10U_0805_25V6K @ PC806 +VCC_VCGI PL802 0.15UH_NA 36A_20% 23 COMP_VCCGI 10U_0805_25V6K PC805 10U_0805_25V6K PC804 Choke 0.15uH SH00001EE00 (Common Part) (Size:6.8 x 7.3 x 3.8 mm) (DCR:0.67m +-5%) LX_VCCGI PHASE 25 AVcore1 SET1 C UG_VCCGI 1 PSYS LGATE VSEN_VCCGI @ PC855 33U_25V_NC_6.3X4.5 @ PR804 169_0402_1% EN VDIO PU801 PQ801 AON6428L_DFN8-5 26 +19VB [49] RT3601EAGQW_WQFN28_4X4 27 10U_0805_25V6K PC803 ALERT#_VCCGI VCC_VCGI_ON @ PR842 0_0402_5% [49] VCC_VCGI_SENSE_P [49] VCC_VCGI_SENSE_N EN: high > 0.7V, Low < 0.3V SDIO_VCCGI VCLK_VCCGI VIN BOOT B @ PR815 0_0402_5% PR820 2.2_0603_5% BST_VCCGI SET1_VCCGI SET2_VCCGI SET3_VCCGI 28 +19VB_VCC_VCGI PC811 0.22U_0402_16V7K 19 PSYS_VCCGI SOC_SVID_DAT [11] @ PC809 0.1U_0402_25V6 VCCGI_VR_EN ALERT# 13 VCLK PR819 1_0603_5% Height 4.5 mm 33u_SF000007200 [11] +19VB_VCC_VCGI SOC_SVID_ALERT#_R Height mm 68u_SF000000W00 EMI@ PL801 5A_Z120_25M_0805_2P VRHOT# Vboot=0V + SOC_SVID_CLK [11] @ PR807 0_0402_5% PR810 20_0402_1% VREF_VCCGI PR808 PR805 576_0402_1% 49.9K_0402_1% 2 PR814 8.06K_0402_1% PR812 41.2K_0402_1% TSEN_VCCGI_R1 17 PR818 38.3K_0402_1% PH801 100K_0402_1%_B25/50 4250K PR806 100_0402_1% Height mm 100u_SF000000I80 @EMI@ PC816 @EMI@ PR827 680P_0603_50V7K 4.7_1206_5% SNUB_VCCGI @ PR829 100_0402_1% PR840 200_0402_1% PR811 10K_0402_1% Local sense, for debug only Close output cap that near choke Close to PQ801 PC810 0.22U_0402_25V6K PR837 PR826 140_0402_1% 8.25K_0402_1% 2 PR816 27K_0402_1% PR824 19.1K_0402_1% C PR825 2K_0402_1% SET1 connect to 5V is into test mode The output is 1.05V PR821 PR817 562_0402_1% 26.1K_0402_1% 2 VREF_VCCGI @ PR802 84.5_0402_1% VR_HOT# 90 degreeC ALERT# 87.3 degreeC IMON VREF VREF_VCCGI PR809 3.9_0402_1% PC801 0.47U_0402_6.3V6K 2 COMP PR813 57.6K_0402_1% 1.11K @ PR841 73.2K 0_0402_5% IMON_VCCGI 37.4K 68.1K PR841 +19VB_VCC_VCGI 18 40.2K PR813 IMON PR833 TSEN_VCCGI 665 16 604 [49] VR_HOT# TSEN PR828 +VCC_VCGI D 549 243 PR830 D PC820 2.2U_0603_10V6K +3VS +5VALW +VCC_VCGI +VCC_VCGI @ PC843 1U_0402_6.3V6K PC842 1U_0402_6.3V6K PC841 1U_0402_6.3V6K PC840 1U_0402_6.3V6K PC839 1U_0402_6.3V6K PC838 1U_0402_6.3V6K PC837 1U_0402_6.3V6K PC836 1U_0402_6.3V6K PC835 1U_0402_6.3V6K PC834 1U_0402_6.3V6K PC833 1U_0402_6.3V6K 1 PC832 1U_0402_6.3V6K PC831 22U_0603_6.3V6M @ PC853 22U_0603_6.3V6M PC830 22U_0603_6.3V6M PC829 22U_0603_6.3V6M @ +VCC_VCGI close CPU solder ball pin PC852 22U_0603_6.3V6M PC827 22U_0603_6.3V6M PC849 22U_0603_6.3V6M PC851 22U_0603_6.3V6M PC826 22U_0603_6.3V6M PC848 22U_0603_6.3V6M PC828 22U_0603_6.3V6M PC825 22U_0603_6.3V6M PC847 22U_0603_6.3V6M @ PC850 22U_0603_6.3V6M PC824 22U_0603_6.3V6M PC823 22U_0603_6.3V6M PC846 22U_0603_6.3V6M PC845 22U_0603_6.3V6M 1 PC822 22U_0603_6.3V6M 1 A PC844 22U_0603_6.3V6M 2pcs close choke, others close CPU + @ PC856 330U_D1_2VY_R9M POS CAP (D2) Height 1.9 mm 330u_SGA00009S00 Compal Secret Data Security Classification Issued Date A 2011/06/13 Deciphered Date 2012/06/13 Title RT3601EA VCCGI THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.A B5W1A_LA-D641P Date: Monday, July 25, 2016 Sheet 39 of 45 PR902 and PR904 pull high resistor are pop at the end of VR SVID Other VR is unpop +1.8VALW SVID_ALERT# pull high resistor is at HW side +1.05VS PR901 1K_0402_5% D PR904 169_0402_1% EN: high > 0.7V, Low < 0.3V VR_ON [49] +19VB_VNN EMI@ PL901 5A_Z120_25M_0805_2P 2 PR915 1_0402_1% VNN VR_EN 1 29 +3VALW ISEN1N ISEN1P 20 21 DRVEN 15 PVCC 12 PC917 1U_0402_10V6K PC918 2.2U_0603_10V6K AISP2 +VNN (LL=0m) FSW = 600kHz DCR = 6.2 mohm +-5% DaulMOS AON7934 TYP MAX H/S Rds(on) = 12.4 mohm , 15.8 mohm L/S Rds(on) = 9.1 mohm , 11.6 mohm PC910 0.47U_0402_25V6K PR929 PR930 255_0402_1% 1K_0402_1% 2AVcore2_NTC @ PR944 2AVcore2_NTC_R 0_0201_5% PH902 1K_0402_5%_TSM0B102J3652RE B Close to PL902 AVcore2 PC919 0.1U_0402_25V6 Local sense, for debug only Close output cap that near choke PR935 100K_0402_5% +5VALW +VCC_VNN VCC VR_READY @ PC916 0.1U_0402_25V6 Confirm HW the pull high resister The GND trace need close to CPU pin AE47 or AE48 Differential with VNN_SENSE 1 [49] VNN_PWRGD PR934 100_0402_1% @ PQ901 AON7934_DFN3X3A8-10 RGND @ PC915 0.1U_0402_25V6 RGND_VNN 10 PR925 221_0603_1% LG_VNN D1 FB @ PR943 0_0402_5% D2/S1 COMP GND 22 D1 AISP2_R LX_VNN AISP2 24 PL902 0.47UH_NA 12.2A_20% @EMI@ PC911 @EMI@ PR924 680P_0603_50V7K 4.7_1206_5% SNUB_VNN 23 D1 BST_VNN G2 FB_VNN EMI@ PC907 2200P_0402_50V7K +VNN S2 PC909 0.22U_0402_16V7K S2 UG_VNN LX_VNN 10 COMP_VNN PR933 100K_0402_1% C Choke 0.47uH SH00001ED00 (Commom Part) (Size:5.7 x 5.4 x 3.0 mm) (DCR:6.2m +-5%) UG_VNN UGATE PC913 68P_0402_50V8J PR920 2.2_0603_5% BST_VNN LG_VNN VSEN PR936 22_0402_1% 1 PR932 10K_0402_1% +19VB AVcore2 14 11 D1 PWM SET3 G1 SET2 BOOT PC912 330P_0402_50V7K 2 @ PJ901 JUMP_43X79 2 SET1 @ PR942 0_0402_5% @ PC914 0.1U_0402_25V6 PSYS @EMI@ PC906 0.1U_0402_25V6 RT3601EAGQW_WQFN28_4X4 10U_0805_25V6K PC905 10U_0805_25V6K PC904 PU901 PHASE 25 SOC_SVID_DAT [11] PC903 0.1U_0402_25V6 LGATE VSEN_VNN [11] EN SDIO_VNN ALERT#_VNN VDIO ALERT# VCLK VCLK_VNN VREF VRHOT# 17 18 VIN @ SOC_SVID_ALERT#_R S2 26 SDIO_VNN PR910 20_0402_1% SOC_SVID_CLK [11] 27 @ PR908 0_0402_5% 28 ALERT#_VNN 19 PR906 100_0402_1% 2 13 IMON TSEN PC908 0.22U_0402_25V6K 16 PR919 1_0603_5% IMON_VNN TSEN_VNN +19VB_VNN PR940 301_0402_1% Vboot=1.05V VREF_VNN PR911 41.2K_0402_1% TSEN_VNN_R1 VCLK_VNN 2 @ PR941 PR914 0_0402_5% 30K_0402_1% 2 1 PR928 11.3K_0402_1% @ PR939 0_0402_5% PR926 11.8K_0402_1% PR937 PR927 210_0402_1% 15.8K_0402_1% 2 +VNN [49] VNN_SENSE @ PR938 0_0402_5% @ PR931 100_0402_1% PR909 3.9_0402_1% PH901 100K_0402_1%_B25/50 4250K PSYS_VNN SET1_VNN SET2_VNN SET3_VNN Local sense, for debug only Close output cap that near choke PR902 84.5_0402_1% PR905 150K_0402_1% Close to PQ901 PR912 7.15K_0402_1% PR913 10K_0402_1% PR907 1K_0402_5% C PR922 191K_0402_1% PR921 287K_0402_1% SET1 connect to 5V is into test mode The output is 1.05V PR923 1.54K_0402_1% PR917 140K_0402_1% VREF_VNN VR_HOT# 90 degreeC ALERT# 87.3 degreeC PC901 0.47U_0402_6.3V6K [49] VR_HOT# VREF_VNN PC902 0.1U_0402_25V6 D B +5VALW PC926 22U_0603_6.3V6M PC927 22U_0603_6.3V6M PC928 22U_0603_6.3V6M PC929 22U_0603_6.3V6M PC939 22U_0603_6.3V6M PC940 22U_0603_6.3V6M PC941 22U_0603_6.3V6M PC942 22U_0603_6.3V6M PC925 22U_0603_6.3V6M PC938 22U_0603_6.3V6M 2 PC924 22U_0603_6.3V6M PC937 22U_0603_6.3V6M PC932 1U_0402_6.3V6K PC923 22U_0603_6.3V6M PC936 22U_0603_6.3V6M PC931 22U_0603_6.3V6M PC922 22U_0603_6.3V6M PC935 22U_0603_6.3V6M close CPU solder ball pin A Compal Secret Data Security Classification Issued Date PC930 22U_0603_6.3V6M PC921 22U_0603_6.3V6M PC934 22U_0603_6.3V6M 1 +VNN PC920 22U_0603_6.3V6M 1 A 2pcs close choke, others close CPU PC933 22U_0603_6.3V6M +VNN 2011/06/13 Deciphered Date 2012/06/13 Title RT3601EA VNN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Rev 1.A B5W1A_LA-D641P Date: Monday, July 25, 2016 Sheet 40 of 45 Version change list (P.I.R List) Item Fixed Issue Design update Design update Reason for change Page of for PWR Rev PG# 01 34 Power Sequence Modify 02 40 Change the PQ305 from MDV1528 to AON7506 Change the PQ306 from MDV1527 to AON7506 Change the PR935.2 from connect +1.8VALW to +3VALW Design update Solution Change 02 34 Design update Solution Change 02 39 Solution Change D Design update Power Sequence Modify 02 38 Design update CPU transient test result 02 39 C Solution Change Modify List Date Phase 12/01 EVT 12/11 DVT Change the PL302 from 10uF to 4.7uF 12/15 DVT Change the PC803, PC804, PC805, PC806 from 4.7uF_0603 *4 to 10uF_0805 *3 12/15 DVT D Change the PR704.2 net name from VNN_PWRGD to EN_1.8VALW 12/28 Add the PR707.2 page symbol +1.24VALW_PG Change the PC814 from 270pF to 470pF Change the PR833 from 40.2k Ohm to 45.3k Ohm Change the PR828 from 604 Ohm to 750 Ohm Change the PR830 from 243 Ohm to 300 Ohm 12/31 Change the PR813 from 68.1k Ohm to 57.6k Ohm Change the PC856 to un-pop DVT DVT 02 39 Delete the jump PJ801 12/31 DVT Design update Change the P/N to comment part 02 39 Change the PL802 P/N from SH00001D900 to SH00001EE00 01/05 DVT Design update Solution Change 02 35 Change the PR401 from Ohm to R-short Change the PR407 from Ohm to R-short 01/28 DVT 10 Design update Cancel Co-lay 03 34,39 Delete the jump PJ301 and capacitance PC857 04/25 DVT-2 11 Design update Solution Change 03 36,37 38,39 04/25 DVT-2 12 Design update Solution Change 03 39,40 04/28 DVT-2 13 Design update Solution Change 03 40 04/28 DVT-2 14 Design update Solution Change 03 40 04/28 DVT-2 05/04 DVT-2 05/17 Pre MP 06/20 Pre MP Design update 15 Design update CPU transient test result 03 40 16 Design update Solution Change 1.0 40 17 Design update ME red ink result 1.0 36 18 Design update CPU transient test result 1.0 40 19 Design update 1.0 39,40 Change the PR509, PR601, PR704, PR710, PR815 from Ohm to R-short Change the PR842, PR843, PR807, PR942, PR943, PR908 from Ohm to R-short Change the PC930, PC931 from 0402 1uF to 0603 22uF Change the PC924, PC929, PC931, PC933, PC939 from un-pop to pop for PVT test Change the PC913 from 39pF to 68pF Change the PR933 from 100k Ohm to 60.4k Ohm Change the PR925 from 191 Ohm to 221 Ohm Change the PR929 from 232 Ohm to 255 Ohm Change the PR914 from 21.5k Ohm to 35.7k Ohm Change the PL902 from 0.68uH to 0.47uH Change the PR942 from R-short to Ohm C B B Solution Change Add PC520、PC521、PC522 to on-pup, and change PC512、PC513、PC515 to un-pop Change the PR914 from 35.7k Ohm to 30k Ohm Change the PR933 from 60.4k Ohm to 100k Ohm Change the PR841, PR938, PR939, PR941, PR942 from Ohm to R-short 07/07 Pre MP 07/07 Pre MP A A 2011/07/08 Issued Date Compal Electronics, Inc Compal Secret Data Security Classification Deciphered Date 2015/07/08 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PIR (PWR) Rev 1.A B5W1A_LA-D641P Date: Monday, July 25, 2016 Sheet 41 of 45 COMPAL CONFIDENTIAL D AC MODEL NAME: B5W1A Power Sequence Block Diagram PCB NAME: LA-D641P REVISION: DATE: 2015/10/27 +19VB AC DC +5VALW +3VALW C +3V_SOC DC ON_OFFBTN# Power Button D EC_ON 3V_EN EC_RSMRST# PBTN_OUT# ENE9022 SOC 10 PM_SLP_S4# C 3V_EN 12 PM_SLP_S3# +1.8VALW +1.24VALW 15 SOC_PWROK EN_1.8VALW +1.8V_PG 16 PLT_RST# Note: 1.7 to need over 10ms need to check (compal setting 30ms) 2.10 to 11 need under 2.5~4ms 3.+0.675VS rising time need need to check under 100us 4.12 to +1.05VS need under 5ms 5.14 to 15 need set 5ms~100ms (compal setting 20ms) VR_ON +VNN B +1.35V 11 SYSON B 13A EN_1.05VS +1.05VS +0.675VS +1.8VS +3.3VS +5VS 14 1.05VS_PG 13B SUSP# A A +VCC_VCGI SVID Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/08/21 Deciphered Date 2015/08/21 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Power Sequence Size C Date: Document Number Rev 1.A B5W1A_LA-D641PR1A Monday, July 25, 2016 Sheet 42 of 45 B5W1A Power UP Sequence 2016-04-12 Plug EC V0.15 S0>S3 S5->S0 in S3>S0 S0>S5 ACIN ACIN SOC +3VLP EC_ON 0ms DC mode 209.8us -> -> 2.110ms D +3VLP -> 1.444ms +5VALW -> 8.824s 8.824s +3V_EN -> +3VALW 3V_EN +3VALW(+3V_SOC) SPOK -> 681.2us -> 1.441ms 1.057ms -> 15.93us D SPOK PVT modify VR_ON +VNN EN_1.8VALW -> -> 4.267ms -> 1.780ms -> 7.794ms -> 6.464ms -> 13.84ms -> 124us -> 1.783ms -> VR_ON 111.7us +VNN 8.784ms -> 9.403us EN_1.8VALW -> 1.495ms -> 2.688ms +1.8VALW -> 3.495ms -> +1.24VALW +1.8VALW 6.356ms +1.24VALW ON/OFF C ON/OFF EC_RSMRST# PBTN_OUT# PM_SLP_S4# 36.78ms -> -> 3.314ms 30ms -> -> -> 15.00us -> 3.434us PBTN_OUT# 15.3ms EC_SLP_S4# 15.3ms EC_SLP_S3# PM_SLP_S3# -> 14.81ms -> -> 819.9us -> 28.76ms SYSON SYSON +1.35V -> -> 17.6ms 44.92ms -> 23.94ms 1.730ms +1.35V -> 18.79ms -> 3.310us -> 494.5us +0.675VS 1.355ms +1.05VS SUSP# SUSP# -> 2.888us -> 540us +0.675VS -> 1.341ms +1.05VS -> +1.8VS 1.232ms -> 366.2us +3VS -> B 534us -> 1.695ms -> 1.299ms -> -> ms -> 1.103ms -> -> 1.748ms -> 342.9us -> 1.539ms -> 567.7us -> 1.331ms -> -> -> 2.898ms s +1.8VS +3VS +5VS +5VS -> -> 518us 35.95us 1.803ms 37us 8.910ms -> -> 9.750ms -> 7.800ms -> 7.790ms -> 33.52ms -> 10.04ms -> 1.759ms -> 6.462ms SOC_PWROK -> 6.502ms VCC_VCGI_ON VCC_VCGI_ON -> 105.7ms -> 67.95us -> 698.8ns -> 229.16ms -> 86.98us +VCC_VCGI +VCC_VCGI -> 1799ms VR_PWRGD -> SOC_PLTRST# 191.6ms -> -> 145.1us B 1.05VSP_PG 1.05VSP_PG SOC_PWROK C EC_RSMRST# -> -> -> 528.5ps VR_PWRGD 165.5ms SOC_PLTRST# A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/08/21 Deciphered Date 2015/08/21 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC Title Power Sequence Size C Date: Document Number Rev 1.A B5W1A_LA-D641PR1A Monday, July 25, 2016 Sheet 43 of 45 Version change list (P.I.R List) Item D C Page of for HW Reason for change Design update Design update Design update Design update Design update Design update Design update Design update Design update 10 Design update 11 Design update 12 Design update 13 B Fixed Issue Design update 14 Design update 15 16 Design update Design update Rev PG# Modify List Date Phase Remove SOC side ODD_EN UC56 need PU to +3VS 0.2 0.2 P.09 P.09 only need reserve EC side ODD_EN Remove RC492 and add RC1162 12/28 DVT 12/28 DVT GPIO43 need to PD 0.2 P.11 RC408 un-stuff, pop RC433 12/28 DVT Diode may cause leakage 0.2 P.19 D1 un-stuff, pop U2 12/28 DVT 0.2 P.27 reserve only 12/28 DVT 0.2 P.27 add EC pin EN_1.8VALW 12/28 DVT for EC Board ID 0.2 P.27 change RB506 to 15K 12/28 DVT Change speaker bead PN by sourcer request for 1.8VS discharge 0.2 P.29 12/28 DVT 0.2 P.31 Change LA2,LA3,LA4,LA5 PN from SM01000CC00 to SM01000OW00 add R29,QQ2 12/28 DVT for 1.8VS soft start 0.2 P.31 pop CQ12 12/28 DVT Reserve PD and follow EVT SMT BOM 0.2 P.09 Reserve RC492 and pop RC99 12/29 DVT 0.2 P.21 Remove RY11,RY12,QY2 12/29 DVT reserve VNN_PWRGD(Pin117) & +1.24VALW_PG(Pin118) for power sequence control +1.8VALW For cost reivew DFX highlight EM5209VF_DFN14_3X2 footprint symbol dosen't release For enlarge H13~15 Screw GND pad to avoid thermal module scrape to PCB follow memory down white paper follow vendor's suggestion 0.2 P.31 0.2 P.30 change UQ1 footprint to DVT 12/29 TPS22966DPUR_SON14_2X3 change Screw hole from 4.2mm to 3.6mm DVT 01/05 0.2 0.2 P.17 P.07 change RD154,RD155 to 1K change CC7,CC137 to 15pF 01/08 DVT 01/08 DVT 17 Design update follow vendor's suggestion 0.2 P.12 change CC15,CC16 to 15pF 01/08 DVT 18 Design update For part count 0.2 P.20 RX10,RX11 change to R short 01/22 DVT 19 Design update For cost down experiment 0.2 P.09 20 21 Design update Design update For HDMI part count Follow intel checklist 0.2 0.2 P.21 P.09 22 Design update For ohm part count 0.2 23 Design update For common component For common component 24 Design update 25 26 27 Design update Design update Design update For intel suggestion For I2C cost down For DVT phase part count reduce 28 Design update For common part 29 30 Design update Design update for H_THERMTRIP# reserve For correct to ABO material 31 Design update For DVT phase A 32 Design update For Intel 2016 WW04 Sightings Report update(560733) change RC524,RC525,RC528,RC529 location 01/22 for QC2511 & QC2508 cost down change RY1~5,RY7,RY8,RY10 to 1ohm 01/22 Remove RPC27,add RC342~344 for 01/22 PM_RST_BTN# need to PU 2.7K RG8,RC213,RC211 change to R short 01/22 P.09, P.28 0.2 P.07,21 SB00000DH00 change to SB00000PV00 30,31 0.2 P.18 change SE00000G880 to SE076104K80(CD48,50,51,54,58) 0.2 P09,27 H_THERMTRIP# connect to EC pin 126 0.2 P.09 unpop QC2508,pop RC528,RC529 0.2 P.26 USB3 CMC change to R short (Del LS21~LS22,add RS24~27) 0.2 P.30 change CF1 SE00000MA00 to SE107475K80 (10V change to 6.3V) 0.2 P.27 reserve RB490 0.2 P.12 change 105_0402_1% from SD00000FY8L to SD00000FY00 0.2 P.05 change CPU PN for ES2 QKKW(SA00009S800),QKKX@(SA00009S900), QKKY@(SA00009SA00) 0.2 P.10 Change RC79 from 1K_0402_1% to 680_0402_1% C DVT DVT DVT B DVT 01/22 DVT 01/22 DVT 01/22 DVT 01/28 DVT 01/28 DVT 01/29 DVT 01/29 DVT 01/29 DVT 02/02 DVT A 02/02 DVT Compal Electronics, Inc Compal Secret Data Security Classification Issued Date D 2014/03/19 2015/03/18 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PWR_PIR Rev 1.A B5W1A_LA-D641PR1A Date: Monday, July 25, 2016 Sheet 44 of 45 Version change list (P.I.R List) Item D C B Fixed Issue Page of for HW Reason for change Rev PG# 33 34 Design update Design update For different Fan table for 1.8VS discharge 0.2 P.27 0.3 P.31 35 36 37 Design update Design update Design update verify +3V_SOC for cost down For intel request follow CRB 0.3 P.31 0.3 P.27 0.3 P.9 38 39 Design update Design update for BOM structure option for part count reduce 40 41 42 43 44 Design Design Design Design Design update update update update update Intel HDA issue, Fix on QS sample Follow APL PDG v1.2 suggestion Follow APL Checklist v1.2 suggestion Follow APL Checklist v1.2 suggestion For ohm part count reduce 45 46 47 48 49 50 51 52 53 Design Design Design Design Design Design Design Design Design update update update update update update update update update For part count reduce 0.3 for option SM Bus 0.3 for part count reduce 0.3 intel checklist v1.2 update 0.3 Update DVT2 Board ID 0.3 Connect PMC_SUSPWRDNACK from SOC to EC0.3 Update circuit 0.3 add +1.8VS discharge circuit 0.3 Update Pre MP Board ID 1.0 54 55 Design update Design update 56 57 58 59 60 61 62 63 64 65 66 67 68 0.3 0.3 0.3 0.3 0.3 1.0 1.0 Design update Design update Design update Design Design Design Design Design Design Design Design Design Design For For For For For For For For For For 1.0 1.0 1.0 1.0 1.A 1.A 1.A 1.A 1.A 1.A part count reduce +1.35V power ohm part count reduce part count reduce MP BOM intel spec udpate intel spec udpate PCB update Acer request intel signting Modify List 1.0 1.0 1.0 Date Add 17" EC board ID 02/02 QQ2 change to Q4B,and stuff Q4 & R25, 04/12 un stuff QQ2 Un stuff RQ3 as DVT memo 04/12 change H_THERMTRIP# to EC pin 101 04/12 SOC_PLTRST# reserve PU +3VS change to 04/12 +3V_SOC change memory down BOM structure to MD@04/12 HDMI RY1~RY5,RY7~RY8,RY10 change to R 04/25 short 04/25 RC4983&RC779 un-stuff Del RPC28, add RC522,RC524,RC525,RC516 04/25 un stuff RC383,and BIOS internal PU 04/25 un stuff RY14,and BIOS internal PU 04/25 RL1,RC99,RC528,RC529,RC1052,RG2 04/25 0.3 P.16 0.3 P.21 PDG 1.5 update RC517,RC519,RC480,RC481,RC476,RC145, RC146,RD165,RL13,RB482 chagne to RS For ME EN For part count reduce For intel PDG update update update update update update update update update update update P.10 P.7 P.24 P.21 P9 10 22 23 P.31 P.18 P.18 P.9 P.27 P.27 P.5 P.31 P.27 RQ1,RQ2 change from 1ohm to RShort reserve RD168 to PU +3VALW RD165 change to 0ohm RC344 change from 2.7K to 10K RB506 change to 20K(15") and 200K(17") Stuff RB489 Update QS CPU in circuit stuff R29 & QQ2 change EC board ID 15" to 27K,17" to 240K P.21 RY17&RY18 un stuff P.7,13,14 for ohm part count reduce 18,22,24 P.10 RC1052 change to 0ohm P.31 UQ2 un stuff P.12 swap JCMOS1 & JCMOS2,SOC_SRTCRST# & SOC_RTCTEST# P.13 RC476 & RC481 change to 0_0603 P.14 add RC147 for +1.35V R short P.29 change RA24,RA27 to R short P.12 RC340 & RC402 change to @CMC@ P.05 Update B0 & B1 CPU P.12 un stuff RC273,RC266,RC268 P.12 change RC245,RC93 to 57.6K stuff RC251 P.27 Add 1A board ID P.11 Add Micron on board RAM P.9 Un stuff RC343 Phase DVT D DVT2 DVT2 DVT2 DVT2 DVT2 DVT2 DVT2 DVT2 DVT2 DVT2 DVT2 04/25 DVT2 04/26 DVT2 04/26 DVT2 04/26 DVT2 04/26 DVT2 05/12 PVT 05/24 PVT 05/24 PVT 06/27 PreMP C 06/27 PreMP 06/27 PreMP 06/27 PreMP 06/27 PreMP 07/04 PreMP 07/04 PreMP 07/05 PreMP 07/05 PreMP 07/05 PreMP 07/22 PreMP 07/22 PreMP 07/22 PreMP 07/22 PreMP 07/22 PreMP 07/22 PreMP B A A Issued Date Compal Electronics, Inc Compal Secret Data Security Classification 2014/03/19 2015/03/18 Deciphered Date Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC AND CONTAINS CONFIDENTIAL Size Document Number AND TRADE SECRET INFORMATION THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Custom DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC PWR_PIR Rev 1.A B5W1A_LA-D641PR1A Date: Monday, July 25, 2016 Sheet 45 of 45 ... 11 5 11 7 11 9 12 1 12 3 12 5 12 7 12 9 13 1 13 3 13 5 13 7 13 9 14 1 14 3 14 5 14 7 14 9 15 1 15 3 15 5 15 7 15 9 16 1 16 3 16 5 16 7 16 9 17 1 17 3 17 5 17 7 17 9 18 1 18 3 18 5 18 7 18 9 19 1 19 3 19 5 19 7 19 9 2 01 203 DDR_M1_CKE0 2-3A... 14 0 14 2 14 4 14 6 14 8 15 0 15 2 15 4 15 6 15 8 16 0 16 2 16 4 16 6 16 8 17 0 17 2 17 4 17 6 17 8 18 0 18 2 18 4 18 6 18 8 19 0 19 2 19 4 19 6 19 8 200 202 204 DDR_M1_D16 DDR_M1_D18 DDR_M1_DRAMRST# DDR_M1_D20 DDR_M1_D22 ... VSS109 VSS 110 VSS 111 VSS 112 VSS 113 VSS 114 VSS 115 VSS 116 VSS 117 VSS 118 VSS 119 VSS120 VSS1 21 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS1 31 VSS132 APL_SOC VSS1 VSS2 VSS3 VSS4