1201t r2 unlocked

5 1201T BLOCK DIAGRAM AMD CPU Conesus D 18W CLK GEN Single Channel DDR2 DDR2 667 Page 29 SO-DIMM D Page ~ Page ~ FAN + SENSOR Page 50 Discharge HT LINK 800MHZ LVDS Page 46 Page 57 AMD RS780MN CRT LED Page 56 PCI-E Page 10 ~ 18 EC KB3310 Page 30 C LPC AR8132 SPI ROM Page 30 ~ 31 PCIE X4 MINICARD C KB/TOUCH PAD Page 30 AMD SB710 Debug Conn Page 44 3G Page 20 ~ 28 SATA USB AZALIA Page 62 B SATA HDD IO board Page 51 Codec ALC269 HP/MIC/LINE IN Card Reader AU6433 B Page 30 Page 36 Amp Page 30 in Card Reader USB 2.0 X1 Page 52 USB CCD Page 45 USB 2.0 X2 A A BT Module Title : Block Diagram ASUSTeK Computer INC Engineer: N/A Size Project Name Custom http://laptop-motherboard-schematic.blogspot.com/ Rev 2.0 1201T Date: Wednesday, October 14, 2009 Sheet 1 of 79 Reset IC AC mode: When AC in,+3VA and +Vsus power on BAT Mode: +3VA power on after press power button EC_RST# PWR_SW# D +1.2VSUS +3VSUS +0.9V +1.8V C AMD Conesus CPU LDTSTOP_L EC VSUS_ON SUS_PWRGD 8' A_RST# +5VA 18 SUSC_EC# 17 SLP_S5# +5V +12V PM_SUSC# LDT_PG +2.5_CPU_VDDA 19 SLP_S3# LDT_RST# SB710 (South Bridge) 9' 15 B 11 16 CPU_LDT_STOP# LDT_STP# LDTSTOP# B RS780MN RC_IN# 18 CPU_VRON A_RST# A_RST# SYSRESET# PM_PWROK +1.2V_CPU_NB_SB 12 10 A CPU_LDT_RST# KBRST# KBRST# +1.1V_NB +VCORE +VCC_NB CPU_PWRGD PM_SUSB# SUSB_EC# +3VS +5VS C EC +1.8VS D RESET_L +3VA_EC PM_PWRBTN# +3VA PM_RSMRST# AC_BAT_SYS PWROK Power On SWITCH +3VS POWER-UP (North Bridge) PWR_GOOD VRM_PWRGD 13 NB_PWRGD 14 NB_PWRGD POWERGOOD CLK GEN A VDDxxx Title : Power sequence ASUSTeK.Computer.INC http://laptop-motherboard-schematic.blogspot.com/ Size Custom Engineer: N/A Project Name Rev 1201T 2.0 Date: Wednesday, October 21, 2009 Sheet of 79 10 HT_CPU_RXD[0 15] HT_CPU_TXD[0 15] 10 10 HT_CPU_RXD#[0 15] HT_CPU_TXD#[0 15] 10 CPU_VLDT U0301A D AL4 AL3 AL2 AL1 VLDT_B1 VLDT_B2 VLDT_B3 VLDT_B4 HT_CPU_RXD15 HT_CPU_RXD#15 HT_CPU_RXD14 HT_CPU_RXD#14 HT_CPU_RXD13 HT_CPU_RXD#13 HT_CPU_RXD12 HT_CPU_RXD#12 HT_CPU_RXD11 HT_CPU_RXD#11 HT_CPU_RXD10 HT_CPU_RXD#10 HT_CPU_RXD9 HT_CPU_RXD#9 HT_CPU_RXD8 HT_CPU_RXD#8 HT_CPU_RXD7 HT_CPU_RXD#7 HT_CPU_RXD6 HT_CPU_RXD#6 HT_CPU_RXD5 HT_CPU_RXD#5 HT_CPU_RXD4 HT_CPU_RXD#4 HT_CPU_RXD3 HT_CPU_RXD#3 HT_CPU_RXD2 HT_CPU_RXD#2 HT_CPU_RXD1 HT_CPU_RXD#1 HT_CPU_RXD0 HT_CPU_RXD#0 Y6 Y5 W7 W6 U6 U5 R7 R6 M8 M7 L6 L5 J6 J5 H4 H3 T3 T4 T2 T1 P3 P4 P2 P1 M2 M1 K3 K4 K2 K1 H2 H1 L0_CADIN_H[15] L0_CADIN_L[15] L0_CADIN_H[14] L0_CADIN_L[14] L0_CADIN_H[13] L0_CADIN_L[13] L0_CADIN_H[12] L0_CADIN_L[12] L0_CADIN_H[11] L0_CADIN_L[11] L0_CADIN_H[10] L0_CADIN_L[10] L0_CADIN_H[9] L0_CADIN_L[9] L0_CADIN_H[8] L0_CADIN_L[8] L0_CADIN_H[7] L0_CADIN_L[7] L0_CADIN_H[6] L0_CADIN_L[6] L0_CADIN_H[5] L0_CADIN_L[5] L0_CADIN_H[4] L0_CADIN_L[4] L0_CADIN_H[3] L0_CADIN_L[3] L0_CADIN_H[2] L0_CADIN_L[2] L0_CADIN_H[1] L0_CADIN_L[1] L0_CADIN_H[0] L0_CADIN_L[0] HT_CPU_RX_CLK1 HT_CPU_RX_CLK#1 P6 P5 C 10 HT_CPU_RX_CLK1 10 HT_CPU_RX_CLK#1 10 HT_CPU_RX_CLK0 10 HT_CPU_RX_CLK#0 10 HT_CPU_RX_CTL1 10 HT_CPU_RX_CTL#1 10 HT_CPU_RX_CTL0 10 HT_CPU_RX_CTL#0 HT_CPU_RX_CLK0 HT_CPU_RX_CLK#0 M3 M4 HT_CPU_RX_CTL1 HT_CPU_RX_CTL#1 P8 P9 HT_CPU_RX_CTL0 HT_CPU_RX_CTL#0 V2 V1 VLDT_A1 VLDT_A2 VLDT_A3 VLDT_A4 L0_CADOUT_H[15] L0_CADOUT_L[15] L0_CADOUT_H[14] L0_CADOUT_L[14] L0_CADOUT_H[13] L0_CADOUT_L[13] L0_CADOUT_H[12] L0_CADOUT_L[12] L0_CADOUT_H[11] L0_CADOUT_L[11] L0_CADOUT_H[10] L0_CADOUT_L[10] L0_CADOUT_H[9] L0_CADOUT_L[9] L0_CADOUT_H[8] L0_CADOUT_L[8] L0_CADOUT_H[7] L0_CADOUT_L[7] L0_CADOUT_H[6] L0_CADOUT_L[6] L0_CADOUT_H[5] L0_CADOUT_L[5] L0_CADOUT_H[4] L0_CADOUT_L[4] L0_CADOUT_H[3] L0_CADOUT_L[3] L0_CADOUT_H[2] L0_CADOUT_L[2] L0_CADOUT_H[1] L0_CADOUT_L[1] L0_CADOUT_H[0] L0_CADOUT_L[0] F4 F3 F2 F1 Y9 Y8 AB6 AB5 AC7 AC6 AE6 AE5 AE9 AE8 AH3 AH4 AK3 AK4 AK1 AK2 Y1 Y2 Y4 Y3 AB1 AB2 AB4 AB3 AD4 AD3 AF1 AF2 AF4 AF3 AH1 AH2 D C0302 4.7uF/6.3V GND HT_CPU_TXD15 HT_CPU_TXD#15 HT_CPU_TXD14 HT_CPU_TXD#14 HT_CPU_TXD13 HT_CPU_TXD#13 HT_CPU_TXD12 HT_CPU_TXD#12 HT_CPU_TXD11 HT_CPU_TXD#11 HT_CPU_TXD10 HT_CPU_TXD#10 HT_CPU_TXD9 HT_CPU_TXD#9 HT_CPU_TXD8 HT_CPU_TXD#8 HT_CPU_TXD7 HT_CPU_TXD#7 HT_CPU_TXD6 HT_CPU_TXD#6 HT_CPU_TXD5 HT_CPU_TXD#5 HT_CPU_TXD4 HT_CPU_TXD#4 HT_CPU_TXD3 HT_CPU_TXD#3 HT_CPU_TXD2 HT_CPU_TXD#2 HT_CPU_TXD1 HT_CPU_TXD#1 HT_CPU_TXD0 HT_CPU_TXD#0 C L0_CLKOUT_H[1] L0_CLKOUT_L[1] AF6 HT_CPU_TX_CLK1 AF5 HT_CPU_TX_CLK#1 HT_CPU_TX_CLK1 10 HT_CPU_TX_CLK#1 10 L0_CLKIN_H[0] L0_CLKIN_L[0] L0_CLKOUT_H[0] L0_CLKOUT_L[0] AD1 HT_CPU_TX_CLK0 AD2 HT_CPU_TX_CLK#0 HT_CPU_TX_CLK0 10 HT_CPU_TX_CLK#0 10 L0_CTLIN_H[1] L0_CTLIN_L[1] L0_CTLOUT_H[1] L0_CTLOUT_L[1] AB8 HT_CPU_TX_CTL1 AB9 HT_CPU_TX_CTL#1 HT_CPU_TX_CTL1 10 HT_CPU_TX_CTL#1 10 L0_CTLOUT_H[0] L0_CTLOUT_L[0] V4 V3 L0_CLKIN_H[1] L0_CLKIN_L[1] L0_CTLIN_H[0] L0_CTLIN_L[0] HT_CPU_TX_CTL0 HT_CPU_TX_CTL#0 HT_CPU_TX_CTL0 10 HT_CPU_TX_CTL#0 10 AMGMV40OAX4DX DESIGN NOTE: VLDT must be routed as a pour or a trace at least 200 mils wide VLDT may be routed from the source to either ALx balls or Fx balls Choose whichever makes routing simpler These six capacitors must be placed very near the selected balls The "other" set of balls must be decoupled with a 4.7uF cap +1.2V_CPU_NB_SB 090407 CPU_VLDT L0301 30Ohm/100Mhz Irat=1A MLCC 180PF/50V (0402) NPO 5% C0307 1 C0308 180PF/50V C0306 0.22UF/6.3V 2 C0304 4.7uF/6.3V C0305 0.22UF/6.3V 1 C0303 4.7uF/6.3V @ B Change L0301 to Irat=1A B 180PF/50V MLCC 180PF/50V (0402) NPO 5% @ GND @ R1.1 A A L0302 +1.1V_NB CPU_VLDT 30Ohm/100Mhz Irat=1A Title : Conesus HT I/F N/A ASUSTeK.Computer.INC http://laptop-motherboard-schematic.blogspot.com/ Size Custom Engineer: N/A Project Name Rev 1201T 2.0 Date: Wednesday, October 14, 2009 Sheet of 79 MEM_MA_DATA[0 63] U0301C +0.9V U0301B AH17 AG17 E20 E19 AB27 AB26 AK18 MEM_MA0_CLK2_P AJ17 MEM_MA0_CLK2_N D18 MEM_MA0_CLK1_P F19 MEM_MA0_CLK1_N Y28 Y27 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 MB0_CLK_H[2] MB0_CLK_L[2] MB0_CLK_H[1] MB0_CLK_L[1] MB0_CLK_H[0] MB0_CLK_L[0] AN21 AM21 A22 A23 AB33 AB32 AN22 AM22 C22 B22 AA32 AA33 MB_CKE[1] MB_CKE[0] MA_CKE[1] MA_CKE[0] RSVD17 MB0_ODT[0] RSVD18 MA0_ODT[0] AH31 AH33 AF27 AG29 P30 M29 AG28 P28 T30 AC28 P27 R26 R27 U28 V30 U27 Y30 AB29 W29 AC26 MA_ADD[15] MA_ADD[14] MA_ADD[13] MA_ADD[12] MA_ADD[11] MA_ADD[10] MA_ADD[9] MA_ADD[8] MA_ADD[7] MA_ADD[6] MA_ADD[5] MA_ADD[4] MA_ADD[3] MA_ADD[2] MA_ADD[1] MA_ADD[0] MB_ADD[15] MB_ADD[14] MB_ADD[13] MB_ADD[12] MB_ADD[11] MB_ADD[10] MB_ADD[9] MB_ADD[8] MB_ADD[7] MB_ADD[6] MB_ADD[5] MB_ADD[4] MB_ADD[3] MB_ADD[2] MB_ADD[1] MB_ADD[0] P33 P31 AJ33 T32 T31 AD32 T33 V32 U33 V33 V31 W33 Y31 Y33 Y32 AC33 7,9 MEM_MA_BANK2 7,9 MEM_MA_BANK1 7,9 MEM_MA_BANK0 R29 AC29 AE28 MA_BANK[2] MA_BANK[1] MA_BANK[0] MB_BANK[2] MB_BANK[1] MB_BANK[0] R33 AD33 AE33 7,9 MEM_MA_RAS# 7,9 MEM_MA_CAS# 7,9 MEM_MA_WE# AC27 AF30 AE27 MA_RAS_L MA_CAS_L MA_WE_L MB_RAS_L MB_CAS_L MB_WE_L AF32 AH32 AG33 T0409 TPC28T CPU_M_VREF A11 R0440 39.2Ohm CPU_VTT_SUS_SENSE B10 AG9 AH9 VTT_SENSE M_ZN M_ZP M_ZN M_ZP M_VREF AH29 AE29 AH30 AF29 RSVD1 RSVD2 MA0_CS_L[1] MA0_CS_L[0] AK33 AF33 AJ32 AF31 RSVD3 RSVD4 MB0_CS_L[1] MB0_CS_L[0] R0441 39.2Ohm 7,9 MEM_MA0_CS#1 7,9 MEM_MA0_CS#0 LAYOUT NOTE: Keep trace to resistors less than 1.5" from CPU pin GND 7,9 MEM_MA_CKE1 7,9 MEM_MA_CKE0 7,9 MEM_MA_ADD[0 15] C N33 P32 M30 M28 MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0 place close to RROCESSOR within 1.5 inch MEM_MA0_CLK2_P MEM_MA0_CLK2_N MEM_MA0_CLK1_P MEM_MA0_CLK1_N 7 7 MEM_MA0_CLK1_P C0410 1.5PF/50V +1.8V MEM_MA0_CLK2_P RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 MA0_CLK_H[2] MA0_CLK_L[2] MA0_CLK_H[1] MA0_CLK_L[1] MA0_CLK_H[0] MA0_CLK_L[0] MLCC/+/-0.1PF MEM_MA0_CLK1_N C0409 1.5PF/50V VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 A12 B12 C12 D12 AK10 AN10 AL10 AM10 B11 D MLCC/+/-0.1PF MEM_MA0_CLK2_N MEM_MA0_ODT1 7,9 MEM_MA0_ODT0 7,9 AMGMV40OAX4DX +1.8V Mount R0405 , Un -Mount U0401 , C0401 , R0406, R0408, R0409 for cost down R0403 1KOhm change from 15ohm to 1Kohm CPU_M_VREF C0403 0.1UF/16V 1000PF/16V C0404 MEM_MA_DQS[0 7] 1000PF/16V MEM_MA_DQS#[0 7] @ @ R0403 & R0404 change to 15ohm 1% 1 C0402 2 R0404 1KOhm 2 B sensing point for op-amp feedback routed near CPU PLACE CLOSE TO CPU GND AN13 AL14 AL16 AN17 AN12 AM12 AM16 AN16 AL18 AN19 AM24 AN24 AM18 AN18 AL22 AN23 AM25 AL26 AN28 AL28 AL24 AN25 AN27 AM28 AM29 AL30 AL32 AL33 AK28 AN29 AM31 AM32 E33 D31 B31 A31 F33 F31 C32 B32 C30 A29 B26 A26 B30 A30 A27 C26 A24 B24 C18 A18 A25 C24 C20 A19 C16 A16 B14 A13 B18 A17 C14 A14 MB_DATA[63] MB_DATA[62] MB_DATA[61] MB_DATA[60] MB_DATA[59] MB_DATA[58] MB_DATA[57] MB_DATA[56] MB_DATA[55] MB_DATA[54] MB_DATA[53] MB_DATA[52] MB_DATA[51] MB_DATA[50] MB_DATA[49] MB_DATA[48] MB_DATA[47] MB_DATA[46] MB_DATA[45] MB_DATA[44] MB_DATA[43] MB_DATA[42] MB_DATA[41] MB_DATA[40] MB_DATA[39] MB_DATA[38] MB_DATA[37] MB_DATA[36] MB_DATA[35] MB_DATA[34] MB_DATA[33] MB_DATA[32] MB_DATA[31] MB_DATA[30] MB_DATA[29] MB_DATA[28] MB_DATA[27] MB_DATA[26] MB_DATA[25] MB_DATA[24] MB_DATA[23] MB_DATA[22] MB_DATA[21] MB_DATA[20] MB_DATA[19] MB_DATA[18] MB_DATA[17] MB_DATA[16] MB_DATA[15] MB_DATA[14] MB_DATA[13] MB_DATA[12] MB_DATA[11] MB_DATA[10] MB_DATA[9] MB_DATA[8] MB_DATA[7] MB_DATA[6] MB_DATA[5] MB_DATA[4] MB_DATA[3] MB_DATA[2] MB_DATA[1] MB_DATA[0] MA_DATA[63] MA_DATA[62] MA_DATA[61] MA_DATA[60] MA_DATA[59] MA_DATA[58] MA_DATA[57] MA_DATA[56] MA_DATA[55] MA_DATA[54] MA_DATA[53] MA_DATA[52] MA_DATA[51] MA_DATA[50] MA_DATA[49] MA_DATA[48] MA_DATA[47] MA_DATA[46] MA_DATA[45] MA_DATA[44] MA_DATA[43] MA_DATA[42] MA_DATA[41] MA_DATA[40] MA_DATA[39] MA_DATA[38] MA_DATA[37] MA_DATA[36] MA_DATA[35] MA_DATA[34] MA_DATA[33] MA_DATA[32] MA_DATA[31] MA_DATA[30] MA_DATA[29] MA_DATA[28] MA_DATA[27] MA_DATA[26] MA_DATA[25] MA_DATA[24] MA_DATA[23] MA_DATA[22] MA_DATA[21] MA_DATA[20] MA_DATA[19] MA_DATA[18] MA_DATA[17] MA_DATA[16] MA_DATA[15] MA_DATA[14] MA_DATA[13] MA_DATA[12] MA_DATA[11] MA_DATA[10] MA_DATA[9] MA_DATA[8] MA_DATA[7] MA_DATA[6] MA_DATA[5] MA_DATA[4] MA_DATA[3] MA_DATA[2] MA_DATA[1] MA_DATA[0] MEM_MA_DATA63 AG11 MEM_MA_DATA62 AH11 MEM_MA_DATA61 AJ12 MEM_MA_DATA60 AJ14 MEM_MA_DATA59 AF11 MEM_MA_DATA58 AF12 MEM_MA_DATA57 AG12 MEM_MA_DATA56 AH12 MEM_MA_DATA55 AK14 MEM_MA_DATA54 AF15 MEM_MA_DATA53 AH19 MEM_MA_DATA52 AK20 MEM_MA_DATA51 AF14 MEM_MA_DATA50 AG14 MEM_MA_DATA49 AF17 MEM_MA_DATA48 AG19 MEM_MA_DATA47 AG20 MEM_MA_DATA46 AJ20 MEM_MA_DATA45 AF22 MEM_MA_DATA44 AK24 MEM_MA_DATA43 AF19 MEM_MA_DATA42 AF20 MEM_MA_DATA41 AJ23 MEM_MA_DATA40 AG23 MEM_MA_DATA39 AF23 MEM_MA_DATA38 AF25 MEM_MA_DATA37 AH27 MEM_MA_DATA36 AK30 MEM_MA_DATA35 AJ25 MEM_MA_DATA34 AG25 MEM_MA_DATA33 AJ26 MEM_MA_DATA32 AJ28 D28MEM_MA_DATA31 G28MEM_MA_DATA30 D26MEM_MA_DATA29 E26MEM_MA_DATA28 F30MEM_MA_DATA27 E29MEM_MA_DATA26 F27MEM_MA_DATA25 H26MEM_MA_DATA24 MEM_MA_DATA23 H25 MEM_MA_DATA22 D24 MEM_MA_DATA21 H22 MEM_MA_DATA20 E22 MEM_MA_DATA19 F26 MEM_MA_DATA18 G26 MEM_MA_DATA17 D22 MEM_MA_DATA16 G23 G22MEM_MA_DATA15 G20MEM_MA_DATA14 MEM_MA_DATA13 G15 MEM_MA_DATA12 F15 D20MEM_MA_DATA11 F22MEM_MA_DATA10 D16MEM_MA_DATA9 E17MEM_MA_DATA8 MEM_MA_DATA7 H15 MEM_MA_DATA6 H14 MEM_MA_DATA5 G12 MEM_MA_DATA4 H12 MEM_MA_DATA3 E15 MEM_MA_DATA2 E14 MEM_MA_DATA1 E11 MEM_MA_DATA0 F11 K33 K31 G32 F32 L33 K32 H31 G33 MB_CHECK[7] MB_CHECK[6] MB_CHECK[5] MB_CHECK[4] MB_CHECK[3] MB_CHECK[2] MB_CHECK[1] MB_CHECK[0] MA_CHECK[7] MA_CHECK[6] MA_CHECK[5] MA_CHECK[4] MA_CHECK[3] MA_CHECK[2] MA_CHECK[1] MA_CHECK[0] K30 J29 G29 F29 L28 L29 H29 H27 H33 AN15 AN20 AK26 AN31 C33 C28 A20 D14 MB_DM[8] MB_DM[7] MB_DM[6] MB_DM[5] MB_DM[4] MB_DM[3] MB_DM[2] MB_DM[1] MB_DM[0] J33 H32 AM14 AN14 AL20 AM20 AN26 AM26 AN30 AM30 D33 D32 B28 A28 A21 B20 B16 A15 MB_DQS_H[8] MB_DQS_L[8] MB_DQS_H[7] MB_DQS_L[7] MB_DQS_H[6] MB_DQS_L[6] MB_DQS_H[5] MB_DQS_L[5] MB_DQS_H[4] MB_DQS_L[4] MB_DQS_H[3] MB_DQS_L[3] MB_DQS_H[2] MB_DQS_L[2] MB_DQS_H[1] MB_DQS_L[1] MB_DQS_H[0] MB_DQS_L[0] MA_DM[8] MA_DM[7] MA_DM[6] MA_DM[5] MA_DM[4] MA_DM[3] MA_DM[2] MA_DM[1] MA_DM[0] H30 AL12 AK16 AK22 AJ27 E27 E23 H19 G14 MA_DQS_H[8] MA_DQS_L[8] MA_DQS_H[7] MA_DQS_L[7] MA_DQS_H[6] MA_DQS_L[6] MA_DQS_H[5] MA_DQS_L[5] MA_DQS_H[4] MA_DQS_L[4] MA_DQS_H[3] MA_DQS_L[3] MA_DQS_H[2] MA_DQS_L[2] MA_DQS_H[1] MA_DQS_L[1] MA_DQS_H[0] MA_DQS_L[0] J27 J26 AJ11 AK12 AG15 AH15 AH22 AG22 AG26 AH26 E28 F28 E25 F25 G17 H17 E12 F12 D C MEM_MA_DM[0 7] MEM_MA_DM7 MEM_MA_DM6 MEM_MA_DM5 MEM_MA_DM4 MEM_MA_DM3 MEM_MA_DM2 MEM_MA_DM1 MEM_MA_DM0 B MEM_MA_DQS7 MEM_MA_DQS#7 MEM_MA_DQS6 MEM_MA_DQS#6 MEM_MA_DQS5 MEM_MA_DQS#5 MEM_MA_DQS4 MEM_MA_DQS#4 MEM_MA_DQS3 MEM_MA_DQS#3 MEM_MA_DQS2 MEM_MA_DQS#2 MEM_MA_DQS1 MEM_MA_DQS#1 MEM_MA_DQS0 MEM_MA_DQS#0 AMGMV40OAX4DX A A Title : Conesus DDR2 MEM I/F Engineer: ASUSTeK.Computer.INC http://laptop-motherboard-schematic.blogspot.com/ Size C Date: N/A Project Name Rev 1201T 2.0 Sheet Wednesday, October 14, 2009 of 79 NOTICE 30Ohm/100Mhz L0501 Irat=1A VDDA 1 C0505 4.7UF/6.3V 4.7UF/6.3V 0.22UF/6.3V 300Ohm 300Ohm C0504 C0506 open-drain driver, R0503 3300PF/50V +1.8V CPU_PWRGD U0301D CPU_LDT_RST# T0515 TPC28T CPU_LDT_RST# CPU_PWRGD LDT_STOP# JP0501 SGL_JUMP CPU_SIC 1 A8 B8 VDDA for warm reset R0513 R0514 CPU_VLDT GND @ PROCHOT R0512 169Ohm C0502 SRC_CPU_HT_CLKN 3900PF/50V MLCC/+/-10% 1% D CPU_VDD_FB_H CPU_VDD_FB_L E2 E1 T512 T513 TPC28T TPC28T 1 CPU_VDDIO_SUS_FB_H CPU_VDDIO_SUS_FB_L AM9 AK9 CPU_CLK_H_C CPU_CLK_L_C CPU_DBRDY EC to CPU/PWR THRO_CPU 30 G S TPC28T TPC28T TPC28T TPC28T TPC28T 1 1 NOTICE C0507 r0541 0.1UF/16V DBRDY TMS TCK TRST_L TDI B FORCE_OFF# 3 C E TDO AN7 FORCE_OFF# W27 W26 AJ29 P26 M26 AJ30 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 RSVD28 CPU_PROCHOT# CPU_VID5 CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 CPU_VID0 R0559 1KOhm PSI_L 20 1 T0527 T0528 1 T0529 T0530 CPU_VID3 CPU_VID2 72 72 +1.8V T0526 +1.8V CPU_DBREQ# 300OHM R0528B CPU_SIC 300OHM R0528C CPU_DBREQ# CPU_TDO CPU_TEST25_H R0562 E9 CPU_TEST29_H_FBCLKOUT_P D10CPU_TEST29_L_FBCLKOUT_N 510Ohm 300OHM Change 300 ohm to 4R8P CPU_TEST24 CPU_TEST23 CPU_TEST22 CPU_TEST21 CPU_TEST20 1 T0518 T0519 T0520 T0523 TEST28_H TEST28_L TEST27 TEST26 TEST10 TEST8 G11 H11 AJ8 AM4 D7 B5 CPU_TEST28_H CPU_TEST28_L 1 T0524 T0525 RSVD29 RSVD30 L27 B25 RSVD31 RSVD32 RSVD33 G6 A10 B7 RSVD34 RSVD35 E8 G5 CPU_TEST26 R0506 CPU_TEST22 300OHM R0528A CPU_TEST20 300OHM R0530A CPU_TEST21 300OHM R0530B CPU_TEST19 300OHM R0530C CPU_TEST18 300OHM R0530D 1KOhm GND GND GND B GND GND CPU_TEST25_L R0560 510Ohm GND GND +1.8V HDT J0500 +3VS CPU_LDT_RST# CPU_PWRGD R0515 10KOhm R0563 4.7KOhm 1 B CPU_LDT_RST# CPU_RESET C E @ 0Ohm R0516 /x 0Ohm R0517 CPU_DBREQ#/x CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO +1.8V Q0506 PMBS3904 @ 090405 GND G7 AB31 AB30 AK31 AD31 AD30 AK32 CPU_TEST24 AMGMV40OAX4DX @ C R0528D 80.6Ohm AH6 AG8 AN11 F9 AM7 TEST24 TEST23 TEST22 TEST21 TEST20 RSVD36 RSVD37 RSVD38 RSVD39 RSVD40 RSVD41 30,50 T0531 CPU_TEST26 RSVD19 RSVD20 RSVD21 RSVD22 1 R0561 M31 L32 M33 M32 G Q0505 T0514 TPC28T PMBS3904 N/A 20,30,33,41,46,50,53 BUF_PLT_RST# D S CPU_THRMTRIP# AM3 E4 AN9 TEST7 TEST6 THERMDC THERMDA TEST3 TEST2 2N7002 Q0507 B2 C2 C1 D2 D1 D3 DBREQ_L VSS B CPU_THRMTRIP# AJ6 AN6CPU_PROCHOT# PSI_L is a Power Status Indicator signal C6 AH7 AL6 AM5 AJ5 AJ7 10KOhm R0525 300Ohm CLKIN_H CLKIN_L TEST29_H TEST29_L 50 CPU_THRM_DC 50 CPU_THRM_DA R0541 PSI_L TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9 TEST17 TEST16 TEST15 TEST14 TEST12 CPU_PWRGD THRNTRIP VID[5] VID[4] VID[3] VID[2] VID[1] VID[0] A9 B9 A5 B6 AJ9 H8 J8 C8 D9 H7 AN3 CPU_TEST17 CPU_TEST16 CPU_TEST15 CPU_TEST14 CPU_TEST12 R0524 300Ohm VID5 is optional VDDIO_FB_H VDDIO_FB_L AN8 AK8 AL8 AM8 From EC GND THERMTRIP_L PROCHOT_L CPU_PRESENT_L VDD_FB_H VDD_FB_L AH8 CPU_TMS CPU_TCK CPU_TRST# CPU_TDI T0509 T0510 T0511 T0512 T0513 HTREF1 HTREF0 A6 A7 GND SIC SID 1 Q0504 2N7002 RB751V-40 AN4 AN5 CPU_HTREF0 V10 CPU_HTREF1 V9 CPU_TEST25_H CPU_TEST25_L CPU_TEST19 CPU_TEST18 @ D0501 RESET_L PWROK LDTSTOP_L TPC28T TPC28T CPU_PROCHOT# 30,79 PWRLIMIT# AK6 AM2 AM6 T510 T511 SRC_CPU_HT_CLKP SRC_CPU_HT_CLKN 29 SRC_CPU_HT_CLKP 29 SRC_CPU_HT_CLKN C C0501 SRC_CPU_HT_CLKP 3900PF/50V MLCC/+/-10% R0599 071204 261OHM 44.2Ohm 44.2Ohm 2 1 GND 1% 1 1% VDDA1 VDDA2 R0523 300Ohm CPU_LDT_RST# 20 CPU_LDT_RST# mount cap C0503 ǂAMD⪊ʊǂ power LDO എǵഫǂ⧠ǂǂǂǂ༨ǂǂ10uf cap LDT_STOP# 12,20 CPU_LDT_STOP# GND 20 CPU_PWRGD @ D @ C0503 If PWROK,RESET_L,LDTSTOP_L are driven by a 300 ohm pull up to VDDIO R0502 300Ohm D 1 1 R0501 +2.5V_CPU_VDDA +1.8VS 2 Debug ㅛ⮭ 11 13 15 17 19 21 23 NC GND1 DBREQ_L1 GND2 DBRDY1 GND3 DBREQ_L2 GND4 DBRDY2 GND5 DBREQ_L3 GND6 DBRDY3 GND7 DBREQ_L4 GND8 DBRDY4 DBRDY7 DBREQ_L5 DBREQ_L7 DBRDY5 DBRDY6 DBREQ_L6 GND9 GND10 ASP_68200_07_K25 /X 090405 10 12 14 16 18 20 22 24 26 CPU_RESET GND A A Title Conesus : CNT/DBG/THERM Engineer: ASUSTeK.Computer.INC http://laptop-motherboard-schematic.blogspot.com/ Size C Date: N/A Project Name Rev 1201T 2.0 Sheet Wednesday, October 14, 2009 of 79 +VCORE +VCORE D C U0301G U0301F VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 VDD55 VDD56 VDD57 VDD58 VDD59 VDD60 VDD61 VDD62 VDD63 VDD64 VDD65 VDD66 VDD67 VDD68 VDD69 VDD70 VDD71 VDD72 VDD73 VDD74 VDD75 VDD76 VDD77 VDD78 VDD79 VDD80 VDD81 VDD82 VDD83 VDD84 VDD85 VDD86 VDD87 VDD88 VDD89 VDD90 VDD91 VDD92 VDD93 VDD94 VDD95 +1.8V U0301E A3 A4 B3 B4 C3 C4 D4 D5 D6 E5 E6 E7 F5 F6 F7 F8 G8 G9 H9 J9 J10 J12 J14 J18 J20 J21 J23 K10 K12 K14 K18 K20 K21 K23 K25 L7 L9 L11 L13 M5 M10 M12 M25 N9 N11 N24 N25 P15 P18 P20 P24 P25 AA10 AA12 AA24 AA25 AB11 AB13 AC5 AC10 AC12 AC24 AC25 AD9 AD11 AD12 AD14 AD18 AD21 AD25 AE12 AE14 AE18 AE21 AE23 V25 V24 Y19 Y16 Y14 W20 W18 W15 W5 V19 V16 V14 T20 T18 T15 T10 R19 R16 R14 R5 Y29 U29 R28 P29 W32 W30 W28 U30 N30 U32 R32 R30 N32 U26 Y26 M27 AG32 AG30 AF28 AE30 AE26 AC32 AC30 AE32 AB28 AA30 A32 AA1 AA2 AA4 AA9 AA11 AA22 AA23 AB10 AB12 AB21 AB22 AB23 AB24 AB25 AC11 AC1 AC2 AC4 AC8 AC9 AC13 AC21 AC22 AC23 AD10 AD13 AD16 AD20 AD22 AD23 AD24 AE1 AE2 AE4 AE7 AE10 AE11 AE13 AE16 AE20 AE22 AE24 AE25 AF7 AF8 AF9 AF26 AG1 AG2 AG4 AG6 AG7 AG27 AH5 AH14 AH20 AH23 AH25 AH28 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 AMGMV40OAX4DX AMGMV40OAX4DX VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 U0301H G4 G2 G1 F23 F20 F14 E32 E30 D30 D29 D27 D25 D23 D21 D19 D17 D15 D13 D11 D8 C31 B33 B29 B27 B21 B19 B17 B15 B13 C10 AN32 AN2 AM33 AM27 AM23 AM19 AM17 AM15 AM13 AM11 AM1 AL31 AK29 AK27 AK25 AK23 AK21 AK19 AK17 AK15 AK13 AK11 AK7 AK5 AJ22 AJ19 AJ15 AJ4 AJ2 AJ1 G19 G25 G27 G30 H5 H6 H20 H23 H28 J1 J2 J4 J7 J11 J13 J16 J22 J24 J25 J28 J30 J32 K11 K13 K16 A2 K22 K24 K9 L1 L2 L4 L8 L10 L12 L21 L22 L23 L24 L25 L26 L30 M6 M9 M11 M13 M21 M22 M23 M24 N1 N2 N4 N10 N12 N22 N23 P7 P10 P14 P16 P19 AMGMV40OAX4DX VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 R1 R2 R4 R8 R15 R18 R20 T9 T14 T16 T19 T24 T25 V15 V18 V20 U1 U2 U4 U7 U8 W1 W2 W4 W8 W14 W16 W19 Y7 Y10 Y15 Y18 Y20 Y24 Y25 F17 AB7 AG5 B23 B1 D C GND AMGMV40OAX4DX GND GND GND 090406 LAYOUT NOTE: Decoupling between CPU and DIMMs, Place close to CPU as possible Bottom side decoupling C0626 4.7uF/6.3V 1 C0627 0.22UF/6.3V C0625 4.7uF/6.3V GND C0609 22UF/6.3V C0628 0.22UF/6.3V +1.8V C0608 22UF/6.3V C0607 22UF/6.3V 2 C0606 22UF/6.3V B NOTICE 1,8v cap placement 090410 C0605 22UF/6.3V 2 C0601 22UF/6.3V Remove C0602, C0603, C0604 +VCORE B +VCORE +1.8V 1 C0633 1000PF/16V C0636 180PF/50V C0631 0.22UF/6.3V 1 C0630 4.7uF/6.3V C0629 4.7uF/6.3V GND 180pFǂㅓ⫻⿟ǂɖNPOǂǂAMDǂᶤǂ C0613 180PF/50V C0612 0.01UF/16V 1 C0611 0.22UF/6.3V C0610 0.22UF/6.3V 2 GND +0.9V @ GND C0641 1000PF/16V C0643 180PF/50V A C0639 0.22UF/6.3V 1 C0638 4.7uF/6.3V C0637 4.7uF/6.3V @ C0623 180PF/50V C0622 180PF/50V 2 C0621 0.01UF/16V @ C0620 0.22UF/6.3V C0619 0.22UF/6.3V C0617 4.7uF/6.3V C0615 22UF/6.3V C0614 22UF/6.3V A 1 1 1 1 +0.9V @ GND GND Title : Conesus Power Engineer: ASUSTeK.Computer.INC http://laptop-motherboard-schematic.blogspot.com/ Size C Date: N/A Project Name Rev 1201T 2.0 Sheet Wednesday, October 14, 2009 of 79 D D MEM_MA_DATA[0 63] U0701A MEM_MA_DQS[0 7] MEM_MA_DQS#[0 7] B U0701B 2 C0705 2.2UF/10V C0707 0.1UF/16V C0708 0.1UF/16V +3VS +1.8V @ C0709 0.1UF/16V EMI R1.1 R0701 1KOhm 1% N/A VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 199 VDDSPD 83 120 50 69 163 NC1 NC2 NC3 NC4 NCTEST M_VREF_DIMM0 C0710 0.1UF/16V @ VREF 201 202 GND0 GND1 203 204 NP_NC1 NP_NC2 47 133 183 77 12 48 184 78 71 72 121 122 196 193 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 C0713 0.1UF/16V R0702 1KOhm 1% 112 111 117 96 95 118 81 82 87 103 88 104 C0712 2.2UF/6.3V N/A DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 C0711 0.1UF/16V 13 31 51 70 131 148 169 188 11 29 49 68 129 146 167 186 C0704 2.2UF/10V MEM_MA_DQS0 MEM_MA_DQS1 MEM_MA_DQS2 MEM_MA_DQS3 MEM_MA_DQS4 MEM_MA_DQS5 MEM_MA_DQS6 MEM_MA_DQS7 MEM_MA_DQS#0 MEM_MA_DQS#1 MEM_MA_DQS#2 MEM_MA_DQS#3 MEM_MA_DQS#4 MEM_MA_DQS#5 MEM_MA_DQS#6 MEM_MA_DQS#7 C0706 0.1UF/16V DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 10 26 52 67 130 147 170 185 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7 EMI R1.1 C0703 2.2UF/10V N/A ODT0 ODT1 @ C0702 2.2UF/10V 4,9 MEM_MA0_ODT0 4,9 MEM_MA0_ODT1 MEM_MA_DM[0 7] C0701 2.2UF/10V 114 119 21,29 SMBCLK_DRAM 21,29 SMBDATA_DRAM CE0701 470UF/2.5V @ C MEM_MA0_CLK1_P MEM_MA0_CLK1_N MEM_MA0_CLK2_P MEM_MA0_CLK2_N MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA_CAS# MEM_MA_RAS# MEM_MA_WE# + 4 4 4,9 4,9 4,9 4,9 4,9 +1.8V EMI R1.1 BA0 BA1 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA MEM_MA0_CS#0 MEM_MA0_CS#1 MEM_MA_DATA4 MEM_MA_DATA0 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA1 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA11 MEM_MA_DATA14 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA15 MEM_MA_DATA10 MEM_MA_DATA20 MEM_MA_DATA22 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA17 MEM_MA_DATA21 MEM_MA_DATA16 MEM_MA_DATA23 MEM_MA_DATA31 MEM_MA_DATA29 MEM_MA_DATA27 MEM_MA_DATA30 MEM_MA_DATA28 MEM_MA_DATA26 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA39 MEM_MA_DATA34 MEM_MA_DATA32 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA35 MEM_MA_DATA33 MEM_MA_DATA36 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA47 MEM_MA_DATA46 MEM_MA_DATA42 MEM_MA_DATA45 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA53 MEM_MA_DATA52 MEM_MA_DATA51 MEM_MA_DATA55 MEM_MA_DATA49 MEM_MA_DATA48 MEM_MA_DATA54 MEM_MA_DATA50 MEM_MA_DATA61 MEM_MA_DATA58 MEM_MA_DATA57 MEM_MA_DATA56 MEM_MA_DATA60 MEM_MA_DATA59 MEM_MA_DATA63 MEM_MA_DATA62 4,9 MEM_MA_BANK0 4,9 MEM_MA_BANK1 17 19 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 C0714 1000PF/16V 107 106 110 115 30 32 164 166 79 80 113 108 109 198 200 197 195 4,9 MEM_MA_BANK2 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16_BA2 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 85 4,9 MEM_MA0_CS#[0 1] MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 4,9 MEM_MA_ADD[0 15] @ GND VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 21 33 155 34 132 144 156 168 15 27 39 149 161 28 40 138 150 162 C B DDR_DIMM_200P 12G025122006 DDR_DIMM_200P 12G02533200D A A Title : DDR2 SO-DIMM0 ASUSTeK COMPUTER INC Size http://laptop-motherboard-schematic.blogspot.com/ Custom Engineer: Project Name Rev 1201T 2.0 Date: Wednesday, October 14, 2009 Sheet of 79 D D C C B B A A Title : DDR2 SO-DIMM1 ASUSTeK COMPUTER INC Size Custom http://laptop-motherboard-schematic.blogspot.com/ Engineer: Project Name Rev 1201T 2.0 Date: Wednesday, October 14, 2009 Sheet of 79 4,7 MEM_MA_ADD[0 15] D D change to 8R16P +0.9V Remove1.8V C0910,C0911 0.1uF MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0 4,7 MEM_MA_BANK2 4,7 MEM_MA_BANK1 4,7 MEM_MA_BANK0 090405 +0.9V 47OHM 0.1UF/16V +1.8V C0913 0.1UF/16V +1.8V 14 RN0905C 16 RN0905A 15 RN0905B C0914 0.1UF/16V +1.8V 47OHM 47OHM 14 RN0901C 16 RN0901A C0915 0.1UF/16V +1.8V 47OHM 12 RN0901E RN0909C 47Ohm MEM_MA_BANK2 RN0909D 47Ohm MEM_MA_ADD8 MEM_MA_ADD9 RN0909A 47Ohm RN0909B 47Ohm C GND +1.8V 0.1UF/16V C0933 @ @ 0.1UF/16V C0934 0.1UF/16V C0935 0.1UF/16V C0936 0.1UF/16V C0937 EMI R1.1 C0912 MEM_MA_BANK1 MEM_MA_ADD12 +1.8V 0.1UF/16V MEM_MA0_ODT0 MEM_MA_ADD13 47OHM 47OHM 47OHM 0.1UF/16V C0909 C0903 MEM_MA_CAS# MEM_MA0_ODT1 MEM_MA0_CS#1 +1.8V 0.1UF/16V C0908 10 RN0905G 12 RN0905E 15 RN0901B 0.1UF/16V 0.1UF/16V C0907 47OHM 47OHM 47OHM 0.1UF/16V C0906 0.1UF/16V C0905 MEM_MA_ADD3 MEM_MA_BANK0 MEM_MA0_CS#0 C0902 0.1UF/16V C0904 RN0905H RN0905D RN0905F RN0903C RN0903D RN0903G RN0903A RN0901D RN0903E RN0903H RN0903B +1.8V 13 11 14 13 10 16 13 12 15 0.1UF/16V 47OHM 47OHM 47OHM 47OHM 47OHM 47OHM 47OHM 47OHM 47OHM 47OHM 47OHM 8 2 MEM_MA_ADD5 MEM_MA_WE# MEM_MA_ADD1 MEM_MA_ADD11 MEM_MA_ADD7 MEM_MA_CKE0 MEM_MA_ADD6 MEM_MA_ADD2 MEM_MA_ADD15 MEM_MA_CKE1 MEM_MA_ADD4 C0901 090818 Swap for Layout RN0901H RN0901G RN0901F RN0903F MEM_MA0_CS#0 MEM_MA0_CS#1 4,7 MEM_MA0_CS#0 4,7 MEM_MA0_CS#1 10 11 11 C 47OHM 47OHM 47OHM MEM_MA_RAS# MEM_MA_CAS# MEM_MA_WE# 4,7 MEM_MA_RAS# 4,7 MEM_MA_CAS# 4,7 MEM_MA_WE# 6 MEM_MA_CKE0 MEM_MA_CKE1 4,7 MEM_MA_CKE0 4,7 MEM_MA_CKE1 MEM_MA_ADD10 MEM_MA_ADD0 MEM_MA_RAS# MEM_MA_ADD14 MEM_MA0_ODT0 MEM_MA0_ODT1 4,7 MEM_MA0_ODT0 4,7 MEM_MA0_ODT1 B 090405 N/A N/A N/A N/A 0.1UF/16V C0938 B C0916 0.1UF/16V GND PLACE CLOSE TO SOCKET( PER EMI/EMC) +1.8V A Title : DDR2_TERMINATIONS ASUSTeK COMPUTER INC Size Custom Engineer: Project Name Rev 1201T 2.0 Date: Wednesday, October 14, 2009 http://laptop-motherboard-schematic.blogspot.com/ Sheet of 79 A D D R1.11 080319 Change the NB Part number to RS780 (A13) U1001A C HT_CPU_TXD[0 15] HT_CPU_TXD8 HT_CPU_TXD#8 HT_CPU_TXD9 HT_CPU_TXD#9 HT_CPU_TXD10 HT_CPU_TXD#10 HT_CPU_TXD11 HT_CPU_TXD#11 HT_CPU_TXD12 HT_CPU_TXD#12 HT_CPU_TXD13 HT_CPU_TXD#13 HT_CPU_TXD14 HT_CPU_TXD#14 HT_CPU_TXD15 HT_CPU_TXD#15 HT_CPU_TXD#[0 15] B Signal RS740 RX780 RS780 1.21K 301R HT_RXCALP 49.9R (GND) HT_RXCALN 49.9R (VDDHT) 3 3 HT_CPU_TX_CLK0 HT_CPU_TX_CLK#0 HT_CPU_TX_CLK1 HT_CPU_TX_CLK#1 3 3 HT_CPU_TX_CTL0 HT_CPU_TX_CTL#0 HT_CPU_TX_CTL1 HT_CPU_TX_CTL#1 R1001 HT_TXCALP 100R 1.21K HT_CPU_TX_CLK0 HT_CPU_TX_CLK#0 HT_CPU_TX_CLK1 HT_CPU_TX_CLK#1 HT_CPU_TX_CTL0 HT_CPU_TX_CTL#0 HT_CPU_TX_CTL1 HT_CPU_TX_CTL#1 HT_RXCALP HT_RXCALN 301Ohm Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25 AC24 AC25 AB25 AB24 AA24 AA25 Y22 Y23 W21 W20 V21 V20 U20 U21 U19 U18 HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N PART OF HYPER TRANSPORT CPU I/F HT_CPU_TXD0 HT_CPU_TXD#0 HT_CPU_TXD1 HT_CPU_TXD#1 HT_CPU_TXD2 HT_CPU_TXD#2 HT_CPU_TXD3 HT_CPU_TXD#3 HT_CPU_TXD4 HT_CPU_TXD#4 HT_CPU_TXD5 HT_CPU_TXD#5 HT_CPU_TXD6 HT_CPU_TXD#6 HT_CPU_TXD7 HT_CPU_TXD#7 HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22 HT_CPU_RXD0 HT_CPU_RXD#0 HT_CPU_RXD1 HT_CPU_RXD#1 HT_CPU_RXD2 HT_CPU_RXD#2 HT_CPU_RXD3 HT_CPU_RXD#3 HT_CPU_RXD4 HT_CPU_RXD#4 HT_CPU_RXD5 HT_CPU_RXD#5 HT_CPU_RXD6 HT_CPU_RXD#6 HT_CPU_RXD7 HT_CPU_RXD#7 HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18 HT_CPU_RXD8 HT_CPU_RXD#8 HT_CPU_RXD9 HT_CPU_RXD#9 HT_CPU_RXD10 HT_CPU_RXD#10 HT_CPU_RXD11 HT_CPU_RXD#11 HT_CPU_RXD12 HT_CPU_RXD#12 HT_CPU_RXD13 HT_CPU_RXD#13 HT_CPU_RXD14 HT_CPU_RXD#14 HT_CPU_RXD15 HT_CPU_RXD#15 HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N H24 H25 L21 L20 HT_CPU_RX_CLK0 HT_CPU_RX_CLK#0 HT_CPU_RX_CLK1 HT_CPU_RX_CLK#1 HT_CPU_RX_CTL0 HT_CPU_RX_CTL#0 HT_CPU_RX_CTL1 HT_CPU_RX_CTL#1 T22 T23 AB23 AA22 HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N M22 M23 R21 R20 HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N M24 M25 P19 R18 C23 A24 HT_RXCALP HT_RXCALN HT_TXCALP HT_TXCALN B24 B25 C HT_CPU_RXD[0 15] HT_CPU_RXD#[0 15] B HT_CPU_RX_CLK0 HT_CPU_RX_CLK#0 HT_CPU_RX_CLK1 HT_CPU_RX_CLK#1 HT_CPU_RX_CTL0 HT_CPU_RX_CTL#0 HT_CPU_RX_CTL1 HT_CPU_RX_CTL#1 HT_TXCALP HT_TXCALN R1003 301Ohm RS780MN 301R HT_TXCALN 071119 change R1001 value 071119 change R1003 value A A Title : RS780M-HT LINK I/F ASUSTeK.Computer.INC Size Custom http://laptop-motherboard-schematic.blogspot.com/ N/A Project Name Rev 1201T Date: Wednesday, October 14, 2009 Engineer: 2.0 Sheet 10 of 79 R5705 R5709 330Ohm 330Ohm 330Ohm @ D @ D @ D Q5716 Q5717 R5701 100KOhm H2N7002 Q5705 G H2N7002 S G S H2N7002 G S H2N7002 2 S D @ D Q5703 G R5703 330Ohm R5702 +3VA +0.9V D +1.8V +5V +12V GND GND GND GND @ Q5701A UM6K1N 30,73,74 SUSC_ON +2.5V_CPU_VDDA +1.8VS +1.5VS +3VS +5VS Change net name GND 071120 C R5712 +3VA 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm @ D @ D @ D Q5709 1 Q5708 G R5719 100KOhm S H2N7002 @ D Q5707 G GND H2N7002 S GND R5711 R5710 R5708 R5707 071120 C @ D Q5706 Q5711 G S H2N7002 G S H2N7002 G GND H2N7002 S GND GND @ Change all MOS with ESD part Q5701B UM6K1N 30,76,77 SUSB_ON GND B 1 330Ohm @ D @ D Q5714 1 H2N7002 GND R5717 330Ohm R5716 330Ohm R5714 330Ohm Q5715 S +VCC_NB R5713 @ D G +VCORE +1.1V_NB +1.2V_CPU_NB_SB B @ D Q5713 Q5712 G S GND H2N7002 G S H2N7002 G GND S H2N7002 GND A A Title : DISCHARGE CKT ASUSTeK COMPUTER INC Size http://laptop-motherboard-schematic.blogspot.com/ Custom Engineer: Rev 1201T 2.0 Date: Wednesday, October 14, 2009 N/A Project Name Sheet 57 of 79 DC IN A/D_DOCK_IN T60 T61 T62 T63 70Ohm/100Mhz D3823 C3822 P4SMAJ20A 10UF/25V C137 0.1UF/25V C3823 1UF/25V C3824 0.1UF/25V DC_PWR_JACK_3P P_GND1 D 3 L3815 2 70Ohm/100Mhz 1 T69 T68 T71 T70 1 1 P_GND2 L3816 2 1 1 DC_PWR DC_JACK_IN D 12G14550103B 1 1 T64 T65 T66 T67 R2.0 GND GND C C BAT BATT_CON S_SMBCLK1 30,71 S_SMBDATA1 30,71 BAT_IN# 71 1 B Internal BAT C3832 100PF/50V C3833 100PF/50V C3831 100PF/50V ESD? V0402MHS03 /X/BAT 1 D24 GND V0402MHS03 /X/BAT D23 V0402MHS03 /X/BAT D25 T80 T81 T82 T83 1 1 120Ohm/100Mhz 120Ohm/100Mhz 120Ohm/100Mhz T84 T85 T86 12G20001092Q L3825 L3826 L3827 C3801 0.1UF/25V BATT_CON_9P B_SMB1_CLK_BAT2 B_SMB1_DATA_BAT2 B_BAT_TS P_GND2 11 T76 T77 T78 T79 B 1 1 1 10 P_GND1 GND A A Title : PWR Jack ASUSTek Computer INC Size A4 http://laptop-motherboard-schematic.blogspot.com/ Rev 1201T Date: Wednesday, October 14, 2009 N/A Engineer: Project Name 2.0 Sheet 60 of 79 For Thermal H155 H154 H153 Detail A H139 U5F-M-EXPREE NP_NC GND1 GND4 GND2 GND3 D U5F-M-EXPREE U5F-M-EXPREE D H138 H142 CRT236X264CBD87N GND s03549 /X NP_NC GND1 GND4 GND2 GND3 GND GND GND H150 CT268B158D138 H151 CT268B158D138 H152 CT268B158D138 GND GND C276D87N s03550 /X GND CRT236X264CBD87N GND s03549 /X H140 NP_NC GND1 GND4 GND2 GND3 R1.1 change hole For CPU Bracket GND GND GND CRT236X264CBD87N GND s03549 /X H145 GND GND C276D87N s03550 /X GND B H149 NP_NC GND1 GND4 GND2 GND3 GND GND H141 NP_NC GND1 GND4 GND2 GND3 C Detail F H17 NP_NC GND1 GND4 GND2 GND3 GND H6 O165X126DO165X126N C NP_NC GND1 GND4 GND2 GND3 GND NP_NC GND1 GND4 GND2 GND3 CRT236X264CBD87N GND s03549 /X H7 CRT236X264CBD87N GND s03549 /X NP_NC1GND5 NP_NC2GND4 GND2 GND3 B D87N&D126N GND GND C276D87N s03550 /X Detail D GND A A Title : Screw Hole Detail B ASUSTek Computer INC Size Detail C/Detail B Custom http://laptop-motherboard-schematic.blogspot.com/ Rev 1201T Date: Wednesday, October 14, 2009 N/A Engineer: Project Name 2.0 Sheet 65 of 79 A B C D E E E +3VSUS @ C6618 @ 0.1UF/16V c0402 C6603 N/A C6602 C6601 @ C6604 GND @ EMI R1.1 GND D 1 0.1UF/25V 0.1UF/25V0.1UF/25V0.1UF/25V 2 1 AC_BAT_SYS D C6630 N/A 0.1UF/16V c0402 2 +5VS_CRT C6619 N/A 0.1UF/16V c0402 A/D_DOCK_IN +0.9V C6638 N/A 0.1UF/16V c0402 EMI R1.1 GND C C 0.1UF/25V 2 C6629 C6639 @ 0.1UF/16V c0402 @ GND GND +5VS_USB +3VS B C6627 @ 0.1UF/16V c0402 1 B C6628 @ 0.1UF/16V c0402 GND GND Title : EMI A ASUSTeK COMPUTER INC Size Rev http://laptop-motherboard-schematic.blogspot.com/ Date: Wednesday, October 14, 2009 B C N/A 1201T Custom A Engineer: Project Name A D Sheet 2.0 66 E of 79 R1.0 8/14: change DC-in jack to 12G14550103B add 1.8VS power for sideport D D 8/17: Swap DDR address for layout request add 8/18: 8/19: cap for EMI request Swap DDR address for layout request P33 del CLK_25M_LAN P60 change L3815 to other parts,add L3816 add L1211 P50 change FAN CON and some related components P12 change LVDS BL enable singal LVDS_BACK_EN, del L_G_BKLT_CTRL C C R1.1 B R2.0 1.change 3G_CON to 3G_CON1 2.H150ˈH151ˈH152 no need NUT, and change hole size 3.OC15 OC16 change to 22pf 4.UF1 fuse change to 07G014150121 5.R4612ˈR4613 change to 120ohm/100Mhz bead for EA test 6.R2104 change to 8.87K 10G213887113030 for EA 7.mount C2913ˈC2917 ˈadd C2945, change R2938 to 22ohm; change R4534 to 100Ohm, R4533 to 49.9Ohm 8.change some parts for EMI request 9.VDDHTTX ϢCPU_VLDTߚ߿乘⬭0 ohmࠄ+1.1V_NB 10 CN3511-CN3516 change to 150pf array CAP 11.Unmount SW9ˈC115 12.change R2938 to 10ohm, 13.change R167 to 120Ohm/100Mhz bead for noise test 14.USB1 change Part Number to 12G13107004E 15 unmount L0301,mount L0302; unmount L1403,mount L1405; DMIC:AC41, AC42 change to 120pf CAP P45 CRT:C4601/C4603/C4605˖24PF/50V L4601/L4602/L4603˖75Ohm/100Mhz Bead C4602/C4604/C4606˖10PF/50V change D3823 to a TVS diode B A A Title : History ASUSTek Computer INC Size Date: Wednesday, October 14, 2009 Rev 1201T http://laptop-motherboard-schematic.blogspot.com/ N/A Project Name A Engineer: 2.0 Sheet 68 of 79 POWER CHARGER AC_BAT_SYS A/D_DOCK_IN EMB24B03G (SWITCH) (65W) AC_BAT_SYS MB39A132 (Controllor) EMB20P03G SWITCH BAT CHG_VCC CHG_EN D D AC_BAT_SYS (21.4A) RT8202A +CPU_CORE PH9030AL*2+RJK0349DPA*2 CPU_VRON +12V +5VA RT8206AGQW VSUS_ON (0.1A) +5VǂEMB20N03V+RJK0355 VSUS_ON +3VA UP7714 SUSB#_PWR +5V (3.55A) 3VSUS:EMB20N03V+EMB20N03V EMB20N03V EMB20N03V (SWITCH) (6.232A) +5VS (1.85A) +5VS_USB (SWITCH) +3VSUS +3VS(5.52A) SUSB_EC# +2.5V_CPU_VDDA (0.25A) UP7714 SUSB#_PWR C C UP7711 RT8202A +1.8V +0.9V (1.25A) (5.725A) +1.5VS UP7706 EMB20N03V+EMB20N03V (0.375A) SUSB_EC# SUSC_EC# EMB20N03V +1.8VS(1.5A) (SWITCH) SUSB_EC# B B +1.1V_NB (4A) (10.933A) RT8202A +1.2VSUS CPU_VRON RJK0355 SWITCH +VCC_NB (3A) EMB20N03V SWITCH RJK0355+RJK0355 VSUS_ON +1.2V_CPU_NB_SB (3.513A) CPU_VRON A A STD version :1.00g(08/05/09) Title : Power_ FLOW Engineer: ASUSTeK COMPUTER INC Size http://laptop-motherboard-schematic.blogspot.com/ Project Name Rev A2 2.0 Date: Thursday, October 15, 2009 Sheet 70 of 79 S PD1 BAT54CW PJP2 /X SHORT_PIN PR4 10KOhm 1 I/P Current: BAT I in = Vo*Io/( 0.8 * Vin) =1.64A PQ2 EMB20P03G PR5 2MOhm 2 2 D P_CHG_ACOK#_10 P_CHG_ACOK#_10 78 G CHG_ACOK# = 1, Battetry Mode P_CHG_VIN_S CHG_ACOK# = 0, Adaptor Mode D PQ5 EMB20N03V GND S 2 10UF/25V Rds(ON)= 23 mohm I cont = 6A I peak = 32 A PC12 10UF/25V P_CHG_CIRS+_5 P_CHG_CIRS-_5 PR11 1Ohm /X GND GND Rds(ON)= 23 mohm I cont = 6A I peak = 32 A GND (Vgs=5 V) (T =25 ǂ ) 2 C L-side MOSFET: EMB20N03V P_CHG_VBTT_10 1 PC18 0.1UF/16V (Vgs=5 V) (T =25 ǂ ) GND +3VA PR18 GND PR19 10KOhm PC21 /X 120PF/50V 1 PC24 0.1UF/16V P_CHG_INE3-_10 100KOhm P_CHG_CTL1_CTL2_10 2 PQ7A UM6K1N PC23 1000PF/50V 2 P_AC_APR_UC_10 TPC26T PT4 /X Controller GND PRN1B CHG_EN# 30 CHG_EN# = 0, Charger Enable CHG_EN# = 1, Charger Disable GND Voltage & Current: AC_OK 100KOhm 30 PQ8 D 2N7002 D S G S 2N7002 PR22 BAT_IN 100KOhm PQ7B UM6K1N 30 +5VA G 100KOhm PRN1C PC25 0.1UF/25V V = 2.9 V +3VA 60 BAT_IN# PRN1D PC26 Frequency: Soft start time: PR14=33KOHM, Fosc=17000/RT(Kohm)=515KHz OCP: Phase selection: POR: 8.Inrush Current: N/A 100KOhm 0.1UF/16V /X PU2 GND GND 30,60 S_SMBCLK1 30,60 S_SMBDATA1 GND VCC SCL OUT1 SDA OUT2 GND P_6268_VCC P_CHG_ADJCV_10 P_CHG_ADJCI_10 UP6268AMA6 GND B Tss=23ms Enable Voltage: +12.6V@2.5A GND 3 PQ9 B PC11 2 1 1 PJP5 /X SHORT_PIN 2 PJP4 /X SHORT_PIN PRN1A 100KOhm PC16 0.1UF/25V PC17 0.1UF/16V PC19 820PF/50V 10KOhm H-side MOSFET: EMB20N03V 25mOHM PJP3 /X SHORT_PIN 33 32 31 30 29 28 27 26 25 PC20 3300PF/50V GND 6.8UH PC10 1000PF/50V /X +3VA PR17 22KOhm PR21 Vmid MOSFET Spec: 2 P_CHG_VBTT_10 BAT GND GNDGND P_CHG_OUTC1_10 79 PC22 PR20 120PF/50V 1KOhm 2 PR14 33KOhm P_CHG_CIRS+_5 P_CHG_CIRS-_5 PR16 10KOhm P_CHG_LG_20 1 GND GND PC15 0.1UF/16V GND GND PU1A MB39A132 EMB20N03V PR8 BAT_LEARN = 1, Battery discharges P_CHG_RT_10 P_CHG_CS_10 P_CHG_ADJCV_10 P_CHG_VBTT_10 PC14 1UF/25V MB39A132_VREF P_CHG_VIN_10 P_CHG_CTL1_CTL2_10 24 23 22 21 20 19 18 17 VIN CTL1 GND1 VREF RT CS ADJ3 BATT PR13 59KOhm 10 11 12 13 P_CHG_ADJCI_10 14 P_CHG_COMPCI_10 15 P_CHG_COMPCV_10 16 1CHG_COMPAI_10 PC13 0.1UF/16V /X PR15 100KOhm /X2 2N7002 /X 2 S G 1 BAT_LEARN 0908 PR12 22KOhm PQ42 D VCC -INC1 +INC1 ACIN ACOK -INE3 ADJ1 COMP1 1 3 PQ6 G P_CHG_ACIN_10 P_CHG_ACOK#_10 P_CHG_INE3-_10 P_CHG_ADJAI_10 CHG_VCC GND S PR10 180KOhm GND2 CTL2 CB OUT1 LX VB OUT2 PGND CELLS GND D CHG_VCC ACIN C PC9 1UF/16V P_CHG_SNU_S 0908 PR9 220KOhm P_CHG_PHASE_S MB39A132_VREF PL3 GND -INE1 OUTC1 OUTC2 +INC2 -INC2 ADJ2 COMP2 COMP3 A/D_DOCK_IN PT3 TPC26T P_CHG_HG_20 GND GND 1 2 PC8 /X 0.01UF/25V P_CHG_BST_20 P_CHG_HG_20 P_CHG_PHASE_20 P_CHG_VL_20 P_CHG_LG_20 PC7 /X 0.01UF/25V I sat=8 A I dc =4.5A DCR=60mohm PC5 10UF/25V G PD2 BAT54CW GND PC4 10UF/25V P_CHG_PHASE_20 Inductor Spec: AC_BAT_SYS PL2 70Ohm/100Mhz 1 PC6 0.1UF/25V D I ripple =0.875A I spec=2A Ĵ1 pcs PL1 70Ohm/100Mhz GND 2N7002 S C6640 GND PQ4 S 2 Ripple Current: @ 2N7002 P_CHG_AIRS-_5 P_CHG_AIRS+_5 D G 0.1UF/25V 2 PJP1 /X SHORT_PIN D G 1 P_CHG_VIN_S PC2 0.1UF/25V D2 G2 P S2 Power stage D2 G1 2 D1 D1 P S1 PR7 100KOhm P_AC_APR_UC_10 MB39A132 PQ41 A/D_DOCK_IN GND3 GND4 GND5 GND6 GND PR2 10KOhm PR3 100KOhm GND 30 PU1B 34 35 36 37 AC_BAT_SYS PC3 0.1UF/25V PR6 1Ohm D Vmid P_ADIN_SNU_S 1 PQ1 EMB24B03G PC1 4700PF/50V PT1 PT2 TPC26T TPC26T PR1 15mOhm A/D_DOCK_IN GND PC27 C total =20uF I inrush= 0.01A POR Hysteresis =0.1V V on =7.5V 0.1UF/16V GND PQ10 PMBS3906 E 2 PR23 10KOhm CHG_VCC Battery Charging Current : Input Adaptor Max Current Limit : GND ACIN Threshold = 1.25V Ichg = (Vadj2-0.075)/(25*Rs) 0.1UF/25V B PC28 A C A/D_DOCK_IN PR24 10KOhm Ilimit_current = (Vadj1-0.075) / (25*Rs)=1.90A Adaptor > 13.75V, System Powered by Adaptor Adaptor Vbat = 4.2V /cell 3.9V>Vadj3>2.4V ==> Vbat = 4.35V/cell Vadj3 :GND ==> Vbat = 4.0V /cell 2.2V>Vadj3>1.1V ==> Vbat = 2*Vadj3 /cell VREF = 5.0V fosc(KHz) = 17000 / RT (KOhm) A Soft start: ts(s) = 0.23 * CS (uF) Battery Cell Selection : CELLS: VREF ==> Cells; CELLS: OPEN ==> Cells; CELLS: GND ==> Cells; Title : Charger Engineer: ASUSTek Computer INC Size http://laptop-motherboard-schematic.blogspot.com/ A2 Date: N/A Project Name Rev 1201T 2.0 Wednesday, October 21, 2009 Sheet 71 of 79 +5VS P_VCORE_IN_Shape PC29 10UF/25V 0908 G G RT8202APQW C 1 1 GND GND PCE4 470uF/2V /X PJP8 SHORT_PIN /X Controller Voltage & Current: VCORE: 18A Frequency: PC35 820PF/50V Ton=3.85p*Rt(on)*Vout/Vin-05=0.3us Frequency=Vout/(Vin*Ton) =500KHZ OCP: GND PR30 1014 0908 P_VCORE_FBPJP_10 10KOhm 2 PR31 174KOhm 1014 Soft start time: Soft-Start duration is 1.35ms GND CPU_VID3 1 0.1UF/25V PT5 TPC26T PR33 GND C SetPR28=6.34K Iocp=Rocp*20/Rds(on)=20*6.34/3.8=31.6A PC36 PR32 53.6KOhm GND + P_VCORE_LG_20 P_VCORE_FB_10 19 21 PJP7 SHORT_PIN /X PCE1 470uF/2V PR29 1Ohm GND GND4 GND6 + S S GND PU3B GND3 GND5 PQ14 RJK0349DPA-00-J0 PC32 1000PF/50V PQ13 RJK0349DPA-00-J0 0908 0.56UH PJP6 /X SHORT_PIN 1P_VCORE_SNU_S 2 3.65KOHM 1 PC34 1UF/16V 1 2.2Ohm r0603_h24 PR28 GND 18 20 +Vcore / 18A PL6 +5VS RT8202APQW 2P_VCORE_UG_20 12 11 10 UGATE PHASE OC VDDP +VCORE PR27 D 1014 D PC33 1UF/16V 3 VOUT VDD FB PGOOD S PH9030AL G GND 0.1UF/25V c0603 P_VCORE_HG_20 P_VCORE_PHASE_Shape P_VCORE_OCR_10 NC1 GND1 PGND LGATE 30,46 VRM_PWRGD GND2 TON EN/DEM NC2 BOOT +VCORE P_VCORE_VDD_20 PC31 17 16 15 14 13 PU3A GND S PH9030AL +5VS PR26 10KOhm D PQ12 D GND G PC30 10UF/25V PQ11 D AC_BAT_SYS +3VS PR25 649KOhm P_VCORE_BST_20 P_VCORE_TON_10 P_VCORE_IN_Shape PL5 70Ohm/100Mhz P_VCORE_EN_10mil 0908 PD3 BAT54CW D PL4 70Ohm/100Mhz 5.Inrush Current: C total =470UF I inrush=0.35A 47KOhm /X PT6 TPC26T PR34 PR35 2 CPU_VID2 62KOhm /X P_VCORE_EN_10mil PC37 4700PF/25V /X Power stage +5VA GND PR154 P_VCORE_OV_10 71.5KOhm Dynamic: 2N7002 PR155 1 PM_LEVELDOWN# 30,73,74,75,77 100KOhm PC156 0.1UF/16V PC123 0.01UF/25V UM6K1N Isat=40A Idc=25A DCR=1.6mohm MOSFET Spec: S0 Ipeak=18A ESR=9mohm V=162mV Inductor Spec: PQ15B PR120 10KOhm 30,76 CPU_VRON G GND S5 PT8 TPC26T +VCORE S3/S5 PT9 TPC26T PT10 TPC26T GND GND L-side MOSFET: RJK0353DPA-00-J0 Rds(on)max=7.6mOhm (Vgs=4.5V) Icont=35A (T=25) Ipeak=140A (Pause 13A Phase selection: POR: Vccrth =3.7~4.1V Vcchys=0.2V UVP: B /X 10.Inrush Current: C total = 100 uF I inrush= 0.15 A Vout*70% +1.8V +VTTDDR(1A) +5V +1.8V GND PL13 70Ohm/100Mhz VIN GND1 REFIN VOUT PU7B 10KOhm GND3 GND4 GND5 GND6 UP7711U8 PC76 0.1UF/25V A GND PC79 1UF/16V PR77 PC80 0.1UF/25V 10KOhm 2 PC78 10UF/6.3V 10 11 12 13 PR76 P_0.9VO_VCNTL_20 1 2 PC77 10UF/6.3V UP7711U8 A GND2 NC3 NC2 VCNTL NC1 1 25mil PU7A PT27 TPC26T +0.9V PT26 TPC26T Title : +1.8V&VTTDDR GND GND GND GND GND GND GND Size http://laptop-motherboard-schematic.blogspot.com/ Engineer: ASUSTek Computer INC N/A Project Name A2 1201T Date: Thursday, October 15, 2009 Rev 2.0 Sheet 74 of 79 P_+1.2VSUS_EN_10 +5VA PL14 P_+1.2VSUS_HG_20 P_1.2VSUS_PHASE_S P_+1.2VSUS_OC_10 12 11 10 2 Ripple Current: Iripple=3.73A P_+1.2VSUS_UG_20 (10.933A) PL16 0Ohm r0603_h24 +1.2VSUS 0.68UH 19 21 1014 D PQ26 RT8202APQW S RJK0355DPA-00-J0 C 1 PC89 PC88 Isat=25A Idc=15.5A DCR=5.5mohm MOSFET Spec: PCE5 100UF/2.5V 22UF/6.3V 22UF/6.3V 22UF/6.3V /X /X /X SHORT_PIN /X Ipeak=10.933 ESR=18mohm V=197mV Inductor Spec: H-side and L-side MOSFET: Rds(on)=16.5mOhm (Vgs=4.5V) Icont=30A (T=25) Ipeak=120A (Pause