1 ZC3 BLOCK DIAGRAM AMD K8/RX485/SB460 REV:B DDR II-SODIMM1 AMD S1 Turion 64 CPU THERMAL SENSOR Page 13 Page 7,8 Page 2X PCI-E 0,1 Page 32 Page 29 B ATI M56-P PCIE 16X NORTH BRIDGE RX485 1X PCI-E CPU CORE(MAX8774) Page 41 A +1.2V/+1.5V/+2.5V Page 42 Page 7,8 HyperThansport I/O BUS LINK 16X16 Mini Card/WLAN HOST 133/166MHz PCIE 100MHz VGA 96MHz USB 48MHz PCI 33MHz REF 14MHz DDR II-SODIMM2 Page 3,4,5,6 DOCKING PORT ICS951462 DDR II 533,667MHz (638 S1g1 socket) SYSTEM POWER MAX1999 Page 44 Clock GEN A BOM VRAM@ ->(Samsung,Infineon,Hynix) UC@ ->(ATMEL,SST) MEMID@ ->(Samsung,Infineon,Hynix) 2@ ->Add second source Page 18,19,20,21,22,24 465 FCBGA +1.8V / VGA_CORE R,G,B CRT port Page 26 Page 43,46 LCD LCD CONN Page 25 DISCHARGE CIRCUIT TV-OUT S-VIDEO Page 25 HDMI Page 34 TMDS Page 44 B 1X PCI-E Page 9,10,11,12 New Card PCI DEVICE IDSEL# REQ# / GNT# Interrupts CLOCK TI 7412 AD25 REQ0# / GNT0# INTE#,F#,G# PCICLK2 BCM5788M AD20 REQ2# / GNT2# INTH# PCICLK5 VRAM X4 Page 33 GDDR3 500MHZ USB 2.0 * 1(USB5) A-LINK Page 23 PCI/33MHz USB PORT X4 USB 2.0 * 4(USB0 ~ 3) Azalia Page 29 BLUETOOTH SOUTH BRIDGE SB460 USB 2.0 * 1(USB6) Page 29 AUDIO CODEC ALC883 MDC1.5 MODEM CARDBUS/1394/Card reader Giga LAN TI 7412 Broadcom BCM5788MG 549 BGA C 1.3M Camera Module Page 36 USB 2.0 * 1(USB7) Page 36 Page 30,31 Page 27 C Page 25 HP AMP Primary IDE HDD Page 35 LPC/33MHZ USB0: M/B IO USB1: M/B IO USB2: D/B IO USB3: D/B IO USB4: USB5: NEW CARD USB6: BLUETOOTH USB7: CAMERA Page 14,15,16,17 SATA ATA 66/100 Media bay CDROM Page 37 RTC Battery Page 14 SPK AMP PCMCIA RJ11 Page 37 Page 45 HP/ SPDIF INT SPK Line-in & MIC Page 37 Page 37 Page 37 1394 Page 31 Page 30 EZ4 Docking Connector PCIE1~2 , Lan Ser & Par Port Page 35 in Cardreader Page 31 RJ45 Page 28 PCI-Express X TV out / CRT Switch Page 25,26 Audio Switch Page 37 PS2 , VGA, DVI SPDIF,SM BUS SUPER I/O DVI Switch Page 34 Embedded Controller PC87383 NS 551 Page 32 D Page 38 10/100/1G Switch Page 39 Page 28 PROJECT : ZC3 Quanta Computer Inc FIR Page 38 BIOS Keyboard Page 39 Page 40 Touchpad SWITCH & LED Page 40 Page 40 FAN Size Document Number Custom BLOCK Page 13 Date: Thursday, June 08, 2006 Rev B2A DIAGRAM Sheet of 46 D +3V CLK_VDD L104 +3V BK1608HS600_6 L45 BK1608HS600_6 CLK_VDDA 22 ohm/1A C949 22U/10V_8 C582 1U_4 C618 1U_4 C620 1U_4 C619 1U_4 C621 1U_4 C583 1U_4 C585 1U_4 C584 1U_4 C570 1U_4 C560 22U/10V_8 D D +3V 1- PLACE ALL SERIAL TERMINATION RESISTORS CLOSE TO U800 L105 CLK_VDD BK1608HS600_6 CLK_VDD_USB 2- PUT DECOUPLING CAPS CLOSE TO Clock Gen.POWER PIN 300ohm/200mA C970 1U/10V_4 U49 C976 1U_4 +3V L106 BK1608HS600_6 CLK_VDD_REF 300ohm/200mA C977 1U/10V_4 C971 1U_4 Parallel Resonance Crystal C964 33P_4 CLK_VDD R685 *1M_4 C 10K_4 C939 33P_4 R376 CLK_XOUT_RR678 Y9 14.31818MHZ XIN 0_4 CLK_XOUT XOUT SRCCLKT0 SRCCLKC0 SRCCLKT1 SRCCLKC1 ATIGCLKT0 ATIGCLKC0 ATIGCLKT1 ATIGCLKC1 ATIGCLKT2 ATIGCLKC2 ATIGCLKT3 ATIGCLKC3 SRCCLKT2 SRCCLKC2 SRCCLKT3 SRCCLKC3 SRCCLKT4 SRCCLKC4 SRCCLKT5 SRCCLKC5 SRCCLKT6 SRCCLKC6 SRCCLKT7 SRCCLKC7 47 46 43 42 41 40 37 36 35 34 30 31 26 27 24 25 20 21 18 19 16 17 12 13 SBLINK_CLKP_R SBLINK_CLKN_R SBSRC_CLKP_R SBSRC_CLKN_R NBSRC_CLKP_R NBSRC_CLKN_R CLKREQA# CLKREQB# CLKREQC# 57 32 33 R646 R695 D3A:change NBSRC to ATIG GPP_CLK1P_R GPP_CLK1N_R GPP_CLK0P_R GPP_CLK0N_R R708 R707 R706 R705 GPP_CLK2P_R GPP_CLK2N_R GPP_CLK3P_R GPP_CLK3N_R GPP_CLK4P_R GPP_CLK4N_R R710 R709 R712 R711 R714 R713 33/F_4 33/F_4 33/F_4 33/F_4 T174 T175 NBSRC_CLKP 11 NBSRC_CLKN 11 CLK_PCIE_MINI_A 29 CLK_PCIE_MINI_A# 29 33/F_4 33/F_4 33/F_4 33/F_4 33/F_4 33/F_4 CLK_PCIE_NEW CLK_PCIE_NEW# CLK_PCIE_EZ1 CLK_PCIE_EZ1# CLK_PCIE_EZ2 CLK_PCIE_EZ2# 49.9/F_4 49.9/F_4 49.9/F_4 R629 49.9/F_4 R628 R625 49.9/F_4 49.9/F_4 49.9/F_4 R624 R721 49.9/F_4 R722 R724 R634 2.2K_4 R636 2.2K_4 R632 2.2K_4 SMBCK R391 C 33 33 32 32 32 32 CLK_VDD ICS951462 15,29,32,33 PCLK_SMB 49.9/F_4 CLKREQA# Controls SRC5,6,7 CLKREQB# Controls SRC2,3,4,ATIG3 CLKREQC# Controls SRC0,1,ATIG0,1,2 R723 T155 USBCLK 15 49.9/F_4 *33/F_4 33/F_4 R726 CLK_48M_1_R R731 CLK_48M_2_R R715 49.9/F_4 EZ_CLKREQ# 32,39 NEW_CLKREQ# 33 T148 R725 T176 T177 0_4 0_4 49.9/F_4 Q23 *2N7002E-LF SBLINK_CLKP 11 SBLINK_CLKN 11 SBSRCCLK 14 SBSRCCLK# 14 CLK_PCIE_M56 18 CLK_PCIE_M56# 18 R728 63 64 62 59 33/F_4 33/F_4 33/F_4 33/F_4 33/F_4 33/F_4 49.9/F_4 FS1/REF1 FS0/REF0 FS2/REF2 HTTCLK0 R645 R644 R643 R642 R641 R640 CPUCLK CPUCLK# R727 47/F_6 47/F_6 49.9/F_4 48MHz_1 48MHz_0 R639 R638 R730 CPUCLK_EXT_R CPUCLK#_EXT_R IREF R343 475/F_4 +3V 56 55 52 51 SBSRCCLK ->SB PCIE CLK SBLINK_CLKP ->NB A-Link clock NBSRC_CLKP ->NB PCI-E graphic clock 261/F_4 49.9/F_4 Voh = 0.71V @ 60 ohm CPUCLK8T0 CPUCLK8C0 CPUCLK8T1 CPUCLK8C1 R622 R729 0_4 CLK_VDDA 49.9/F_4 Ioh = * Iref (2.32mA) SMBCLK SMBDAT 50 49 R627 SMBCK SMBDT 48 SMBDT R735 7 R387 *10K_4 10 RESET_IN# NC VDDA GNDA R626 15,29,32,33 PDAT_SMB GND_CPU GND_SRC1 GND_SRC2 GND_SRC3 GND_SRC4 GND_48 GND_ATIG GND_REF GNDHTT 11 61 Q43 R704 *10K_4 53 15 22 29 45 38 58 B2A:Stuff R376 for RESET_IN# *2N7002E-LF VDDCPU VDD_SRC1 VDD_SRC2 VDD_SRC3 VDD_SRC4 VDD_48 VDD_ATIG VDD_REF VDDHTT CLK_XIN B2A:Delete SYS_RST# +3V 54 14 23 28 44 39 60 R650 R652 R648 0_4 B D3A:remove R820 , docking side already pull low 10K EXT CLK FREQUENCY SELECT TABLE(MHZ) FS2 FS1 FS0 CPU SRCCLK HTT [2:1] PCI R651 33/F_4 R653 33/F_4 NB_OSCIN_R R649 33/F_4 HTREFCLK_R R647 33/F_4 R633 R635 R631 +3V COMMENT USB SB_OSCIN_R 8.2K_4 8.2K_4 8.2K_4 R820 EZ_CLKREQ# 0 Hi-Z 100.00 Hi-Z Hi-Z 0 X 100.00 X/3 180.00 100.00 60.00 1 220.00 100.00 36.56 0 100.00 100.00 66.66 1 133.33 100.00 66.66 1 200.00 100.00 66.66 48.00 Reserved X/6 48.00 Reserved 30.00 48.00 Reserved 73.12 48.00 Reserved 33.33 48.00 Reserved 33.33 48.00 Reserved 33.33 48.00 Normal ATHLON64 operation B SB_OSCIN 11,15 14.318MHz SIO_14M 38 14.318MHz NB_OSC 11 14.318MHz HTREFCLK 11 *10K_4 *0_4 *0_4 *0_4 66MHz R630 R821 NEW_CLKREQ# 49.9/F_4 10K_4 C3A:pull up to +3V Check AMD clock A A PROJECT : ZC3 Quanta Computer Inc Size Document Number Rev 1A EXTERNAL CLOCK GENERATOR Date: Sheet Thursday, June 08, 2006 of 46 PROCESSOR HYPERTRANSPORT INTERFACE D D VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE VLDT_RUN C VLDT_RUN U43A D4 D3 D2 D1 VLDT_A3 VLDT_A2 VLDT_A1 VLDT_A0 AE5 AE4 AE3 AE2 L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0 T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1 HT_CADOUT15_P HT_CADOUT15_N HT_CADOUT14_P HT_CADOUT14_N HT_CADOUT13_P HT_CADOUT13_N HT_CADOUT12_P HT_CADOUT12_N HT_CADOUT11_P HT_CADOUT11_N HT_CADOUT10_P HT_CADOUT10_N HT_CADOUT9_P HT_CADOUT9_N HT_CADOUT8_P HT_CADOUT8_N HT_CADOUT7_P HT_CADOUT7_N HT_CADOUT6_P HT_CADOUT6_N HT_CADOUT5_P HT_CADOUT5_N HT_CADOUT4_P HT_CADOUT4_N HT_CADOUT3_P HT_CADOUT3_N HT_CADOUT2_P HT_CADOUT2_N HT_CADOUT1_P HT_CADOUT1_N HT_CADOUT0_P HT_CADOUT0_N HT_CLKOUT1_P HT_CLKOUT1_N HT_CLKOUT0_P HT_CLKOUT0_N 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 HT_CADIN15_P HT_CADIN15_N HT_CADIN14_P HT_CADIN14_N HT_CADIN13_P HT_CADIN13_N HT_CADIN12_P HT_CADIN12_N HT_CADIN11_P HT_CADIN11_N HT_CADIN10_P HT_CADIN10_N HT_CADIN9_P HT_CADIN9_N HT_CADIN8_P HT_CADIN8_N HT_CADIN7_P HT_CADIN7_N HT_CADIN6_P HT_CADIN6_N HT_CADIN5_P HT_CADIN5_N HT_CADIN4_P HT_CADIN4_N HT_CADIN3_P HT_CADIN3_N HT_CADIN2_P HT_CADIN2_N HT_CADIN1_P HT_CADIN1_N HT_CADIN0_P HT_CADIN0_N N5 P5 M3 M4 L5 M5 K3 K4 H3 H4 G5 H5 F3 F4 E5 F5 N3 N2 L1 M1 L3 L2 J1 K1 G1 H1 G3 G2 E1 F1 E3 E2 L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0 9 9 HT_CLKIN1_P HT_CLKIN1_N HT_CLKIN0_P HT_CLKIN0_N J5 K5 J3 J2 L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKOUT_H1 L0_CLKOUT_L1 L0_CLKOUT_H0 L0_CLKOUT_L0 Y4 Y3 Y1 W1 P3 P4 L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLOUT_H1 L0_CTLOUT_L1 T5 R5 L0_CTLOUT_H0 L0_CTLOUT_L0 R2 R3 R274 49.9/F_4 R272 49.9/F_4 HT_CTLIN1_P HT_CTLIN1_N N1 P1 HT_CTLIN0_P HT_CTLIN0_N B L0_CTLIN_H0 L0_CTLIN_L0 C495 VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0 4.7U/6.3V_6 HT_CPU_CTLOUT1_P HT_CPU_CTLOUT1_N C 9 9 T53 T44 HT_CTLOUT0_P HT_CTLOUT0_N B Athlon 64 S1 Processor Socket +1.2V VLDT_RUN L97 L98 FBJ3216HS800_1206 A1A:Change from 10pf to 180pf FBJ3216HS800_1206 80 ohm(4A) C845 C855 4.7U/6.3V_6 4.7U/6.3V_6 C853 22U/6V_4 C847 22U/6V_4 C852 180P_4 C846 180P_4 LAYOUT: Place bypass cap on topside of board NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY TO OTHER HT POWER PINS PLACE CLOSE TO VLDT0 POWER PINS A A PROJECT : ZC3 Quanta Computer Inc Size Document Number Rev 1A ATHLON64 HT I/F Date: Sheet Thursday, June 08, 2006 of 46 A B C D E +1.8VSUS VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE Processor DDR2 Memory Interface R279 2K/F_4 U43C C488 1U_4 M_B_DQ[0 63] C503 R282 1000p/50V_4 2K/F_4 +1.8VSUS +0.9V_VTER U43B R574 39.2F_4 W17 VTT_SENSE T56 AE10 AF10 MEMVREF VTT_SENSE MEMZN MEMZP M_ZN M_ZP Y10 D10 C10 B10 AD10 W10 AC10 AB10 AA10 A10 7,8 7,8 7,8 7,8 M_A_CS#3 M_A_CS#2 M_A_CS#1 M_A_CS#0 V19 J22 V22 T19 MA0_CS_L3 MA0_CS_L2 MA0_CS_L1 MA0_CS_L0 MA0_CLK_H2 MA0_CLK_L2 MA0_CLK_H1 MA0_CLK_L1 Y16 AA16 E16 F16 M_CLKOUT1 M_CLKOUT1# M_CLKOUT0 M_CLKOUT0# 7,8 7,8 7,8 7,8 M_B_CS#3 M_B_CS#2 M_B_CS#1 M_B_CS#0 Y26 J24 W24 U23 MB0_CS_L3 MB0_CS_L2 MB0_CS_L1 MB0_CS_L0 MB0_CLK_H2 MB0_CLK_L2 MB0_CLK_H1 MB0_CLK_L1 AF18 AF17 A17 A18 M_CLKOUT4 M_CLKOUT4# M_CLKOUT3 M_CLKOUT3# H26 J23 J20 J21 MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0 MB0_ODT1 MB0_ODT0 MA0_ODT1 MA0_ODT0 W23 W26 V20 U19 K19 K20 V24 K24 L20 R19 L19 L22 L21 M19 M20 M24 M22 N22 N21 R21 MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0 MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10 MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0 J25 J26 W25 L23 L25 U25 L24 M26 L26 N23 N24 N25 N26 P24 P26 T24 K22 R20 T22 MA_BANK2 MA_BANK1 MA_BANK0 MB_BANK2 MB_BANK1 MB_BANK0 K26 T26 U26 M_B_BS#2 7,8 M_B_BS#1 7,8 M_B_BS#0 7,8 T20 U20 U21 MA_RAS_L MA_CAS_L MA_WE_L MB_RAS_L MB_CAS_L MB_WE_L U24 V26 U22 M_B_RAS# 7,8 M_B_CAS# 7,8 M_B_WE# 7,8 PLACE THEM CLOSE TO CPU WITHIN 1" 7,8 7,8 M_CKE3 7,8 M_CKE2 7,8 M_CKE1 7,8 M_CKE0 M_A_A[0 15] 7,8 7,8 7,8 7,8 7,8 7,8 M_A_BS#2 M_A_BS#1 M_A_BS#0 M_A_RAS# M_A_CAS# M_A_WE# M_A_A15 M_A_A14 M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0 M_ODT3 M_ODT2 M_ODT1 M_ODT0 M_B_A15 M_B_A14 M_B_A13 M_B_A12 M_B_A11 M_B_A10 M_B_A9 M_B_A8 M_B_A7 M_B_A6 M_B_A5 M_B_A4 M_B_A3 M_B_A2 M_B_A1 M_B_A0 7,8 7,8 7,8 7,8 To SODIMM socket B (Far) R573 39.2F_4 VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 M_B_A[0 15] 7,8 M_B_DQ63 M_B_DQ62 M_B_DQ61 M_B_DQ60 M_B_DQ59 M_B_DQ58 M_B_DQ57 M_B_DQ56 M_B_DQ55 M_B_DQ54 M_B_DQ53 M_B_DQ52 M_B_DQ51 M_B_DQ50 M_B_DQ49 M_B_DQ48 M_B_DQ47 M_B_DQ46 M_B_DQ45 M_B_DQ44 M_B_DQ43 M_B_DQ42 M_B_DQ41 M_B_DQ40 M_B_DQ39 M_B_DQ38 M_B_DQ37 M_B_DQ36 M_B_DQ35 M_B_DQ34 M_B_DQ33 M_B_DQ32 M_B_DQ31 M_B_DQ30 M_B_DQ29 M_B_DQ28 M_B_DQ27 M_B_DQ26 M_B_DQ25 M_B_DQ24 M_B_DQ23 M_B_DQ22 M_B_DQ21 M_B_DQ20 M_B_DQ19 M_B_DQ18 M_B_DQ17 M_B_DQ16 M_B_DQ15 M_B_DQ14 M_B_DQ13 M_B_DQ12 M_B_DQ11 M_B_DQ10 M_B_DQ9 M_B_DQ8 M_B_DQ7 M_B_DQ6 M_B_DQ5 M_B_DQ4 M_B_DQ3 M_B_DQ2 M_B_DQ1 M_B_DQ0 DDR II: CMD/CTRL/CLK Athlon 64 S1 Processor Socket M_B_DM[0 7] +0.9V_VTER C517 4.7U/6.3V_6 C332 4.7U/6.3V_6 C512 VTT decoupling capacitor,place near CPU C330 4.7U/6.3V_6 4.7U/6.3V_6 C350 C485 C487 C338 C504 C335 C509 22U/6V_4 22U/6V_4 22U/6V_4 22U/6V_4 1000p/50V_4 1000p/50V_4 1000p/50V_4 C352 C339 1000p/50V_4 180P_4 C344 180P_4 C475 180P_4 C496 180P_4 M_B_DQS[0 7] M_B_DQS#[0 7] AD11 AF11 AF14 AE14 Y11 AB11 AC12 AF13 AF15 AF16 AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24 G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11 MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10 MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0 M_B_DM7 M_B_DM6 M_B_DM5 M_B_DM4 M_B_DM3 M_B_DM2 M_B_DM1 M_B_DM0 AD12 AC16 AE22 AB26 E25 A22 B16 A12 MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0 M_B_DQS7 M_B_DQS#7 M_B_DQS6 M_B_DQS#6 M_B_DQS5 M_B_DQS#5 M_B_DQS4 M_B_DQS#4 M_B_DQS3 M_B_DQS#3 M_B_DQS2 M_B_DQS#2 M_B_DQS1 M_B_DQS#1 M_B_DQS0 M_B_DQS#0 AF12 AE12 AE16 AD16 AF21 AF22 AC25 AC26 F26 E26 A24 A23 D16 C16 C12 B12 MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_A_DQ63 M_A_DQ62 M_A_DQ61 M_A_DQ60 M_A_DQ59 M_A_DQ58 M_A_DQ57 M_A_DQ56 M_A_DQ55 M_A_DQ54 M_A_DQ53 M_A_DQ52 M_A_DQ51 M_A_DQ50 M_A_DQ49 M_A_DQ48 M_A_DQ47 M_A_DQ46 M_A_DQ45 M_A_DQ44 M_A_DQ43 M_A_DQ42 M_A_DQ41 M_A_DQ40 M_A_DQ39 M_A_DQ38 M_A_DQ37 M_A_DQ36 M_A_DQ35 M_A_DQ34 M_A_DQ33 M_A_DQ32 M_A_DQ31 M_A_DQ30 M_A_DQ29 M_A_DQ28 M_A_DQ27 M_A_DQ26 M_A_DQ25 M_A_DQ24 M_A_DQ23 M_A_DQ22 M_A_DQ21 M_A_DQ20 M_A_DQ19 M_A_DQ18 M_A_DQ17 M_A_DQ16 M_A_DQ15 M_A_DQ14 M_A_DQ13 M_A_DQ12 M_A_DQ11 M_A_DQ10 M_A_DQ9 M_A_DQ8 M_A_DQ7 M_A_DQ6 M_A_DQ5 M_A_DQ4 M_A_DQ3 M_A_DQ2 M_A_DQ1 M_A_DQ0 MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10 MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0 AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12 MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0 Y13 AB16 Y19 AC24 F24 E19 C15 E12 M_A_DM7 M_A_DM6 M_A_DM5 M_A_DM4 M_A_DM3 M_A_DM2 M_A_DM1 M_A_DM0 MA_DQS_H7 MA_DQS_L7 MA_DQS_H6 MA_DQS_L6 MA_DQS_H5 MA_DQS_L5 MA_DQS_H4 MA_DQS_L4 MA_DQS_H3 MA_DQS_L3 MA_DQS_H2 MA_DQS_L2 MA_DQS_H1 MA_DQS_L1 MA_DQS_H0 MA_DQS_L0 W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13 M_A_DQS7 M_A_DQS#7 M_A_DQS6 M_A_DQS#6 M_A_DQS5 M_A_DQS#5 M_A_DQS4 M_A_DQS#4 M_A_DQS3 M_A_DQS#3 M_A_DQS2 M_A_DQS#2 M_A_DQS1 M_A_DQS#1 M_A_DQS0 M_A_DQS#0 DDR: DATA Athlon 64 S1 Processor Socket M_A_DQS[0 7] M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 M_A_DQS#[0 7] M_A_DQ[0 63] To SODIMM socket A (near) CPU_M_VREF M_A_DM[0 7] M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 1 PROJECT : ZC3 Quanta Computer Inc Size Document Number Rev 1A ATHLON64 DDRII MEMORY I/F Date: A B C D Thursday, June 08, 2006 Sheet E of 46 +1.8V 33 ohm(3000mA) L29 +2.5V R583 R584 *300_4 *300_4 R585 300_4 4.7U/6.3V_6 C351 22U/6V_4 Only VID1 need pullup to VDDIO R215 300_4 CPU_SIC_R CPU_SID_R CPU_VDDA_RUN D CPU_VDDA_RUN T106 T107 T31 C839 100U/6.3V_3528 C345 3300p/25V_4 F8 F9 CPU_HT_RESET# CPU_ALL_PWROK CPU_LDTSTOP# B7 A7 F10 CPU_SIC_R AF4 CPU_SID_R AF5 VLDT_RUN A1A:Change from 3900pf to 3300pf place them to CPU within 1" 10/5/5/5/10 C837 CPUCLK R276 44.2F_4 R277 44.2F_4 To Power 41 COREFB+V 41 COREFBT23 CPU_VDDIO_SUS_FB_H CPU_VDDIO_SUS_FB_L T58 T57 R563 CPU_CLKIN_SC_N CPUCLK# C838 +3V +1.8VSUS +1.8VSUS B2A:ati suggestion to avoid hynix ram s3 issue stuff R558,R560 del R561 R558 4.7K/F_4 R557 C840 VID5 VID4 VID3 VID2 VID1 VID0 SIC SID HT_REF1 HT_REF0 F6 E6 VDD_FB_H VDD_FB_L A9 A8 THERMTRIP_L PROCHOT_L RESET_L PWROK LDTSTOP_L CPU_PRESENT_L PSI_L G10 DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI AA9 AC9 AD9 AF9 TMS TCK TRST_L TDI E9 E8 G9 H10 AA7 C2 D7 E7 F7 C7 AC8 TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9 TEST17 TEST16 TEST15 TEST14 TEST12 CPU_TEST07_ANALOG_T CPU_TEST6_DIECRACKMON CPU_TEST5_THERMDC CPU_TEST4_THERMDA CPU_TEST3_GATE0 CPU_TEST2_DRAIN0 C3 AA6 W7 W8 Y6 AB6 TEST7 TEST6 TEST5 TEST4 TEST3 TEST2 CPU_RSVD_MA0_CLK3_P CPU_RSVD_MA0_CLK3_N CPU_RSVD_MA0_CLK0_P CPU_RSVD_MA0_CLK0_N P20 P19 N20 N19 RSVD0 RSVD1 RSVD2 RSVD3 R807 10K_4 CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1 Q47 MMBT3904 CPU_ALL_PWROK PSI_L# PSI# PSI# 41 U41 NC7SZ08P5X_NL T21 T32 C +1.8V +1.8VSUS R556 C331 T27 T60 1U_4 13 CPU_TEST5_THERMDC 13 CPU_TEST4_THERMDA T59 T64 300_4 11,14,15 LDT_STOP# VID5 VID4 VID3 VID2 VID1 VID0 CPU_TEST17_BP3 CPU_TEST16_BP2 CPU_TEST15_BP1 CPU_TEST14_BP0 CPU_TEST12_SCANSHIFTENB D 41 41 41 41 41 41 CPU_PRESENT# AC6 PSI_L# A3 T19 Power Status Indicator for the VDD Power Supply regulator This signal may be used by the regulator to improve effeciency when the processor is in low power states CLKIN_H CLKIN_L CPU_DBRDY +3V R806 10K_4 1U_4 A5 C6 A6 A4 C5 B5 VDDIO_FB_H VDDIO_FB_L 300_4 14,15 CPU_PWRGD AF6 H_THERMTRIP# AC7 H_PROCHOT# B2A:Add LEVEL-SHIFT circuit(R806,R807,Q47) on PSI# that between CPU and POWER 3900p/25V_4 SB460 only +1.8V VDDA2 VDDA1 P6 R6 W9 Y9 CPU_CLKIN_SC_P CPU_CLKIN_SC_N 169F_6 CPU_HTREF1 CPU_HTREF0 T22 CPU_CLKIN_SC_P 3900p/25V_4 +1.8VSUS U43D BLM18PG330SN1D C336 If AMD SI is not used, the SID pin can be left unconnected and SIC should have a 300-Ω (±5%) pulldown to VSS CPU_VDDA_RUN 50 mil ATHLON Control and Debug LAYOUT: ROUTE VDDA TRACE APPROX 50 mils WIDE (USE 2x25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG DBREQ_L E10 CPU_DBREQ# TDO AE9 CPU_TDO TEST29_H TEST29_L TEST24 TEST23 TEST22 TEST21 TEST20 TEST28_H TEST28_L TEST27 TEST26 TEST10 TEST8 C9 C8 CPU_TEST29_H_FBCLKOUT_P R220 CPU_TEST29_L_FBCLKOUT_N 80.6F_4 ROUTE AS 80 Ohm DIFFERENTIAL PAIR PLACE IT CLOSE TO CPU WITHIN 1" AE7 AD7 AE8 AB8 AF7 CPU_TEST24_SCANCLK1 CPU_TEST23_TSTUPD CPU_TEST22_SCANSHIFTEN CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 J7 H8 AF8 AE6 K8 C4 CPU_TEST28_H_PLLCHRZ_P CPU_TEST28_L_PLLCHRZ_N CPU_TEST27_SINGLECHAIN CPU_TEST26_BURNIN# CPU_TEST10_ANALOGOUT CPU_TEST08_DIG_T T137 C T54 T55 T52 T20 CPU_LDTSTOP# U21 NC7SZ08P5X_NL T49 T51 T42 T43 +1.8V +1.8VSUS R559 C841 1U_4 MISC 300_4 LDT_RST# 14,15,39 EC_PWRGD 11,39 NB_PWRGD R560 0_4 R561 *0_4 T46 T47 T48 T50 CPU_HT_RESET# 14 U42 NC7SZ08P5X_NL CPU_RSVD_MB0_CLK3_P CPU_RSVD_MB0_CLK3_N CPU_RSVD_MB0_CLK0_P CPU_RSVD_MB0_CLK0_N R26 R25 P22 R22 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 H16 B18 CPU_MA_RESET# CPU_MB_RESET# RSVD10 RSVD11 B3 C1 CPU_RSVD_VIDSTRB1 CPU_RSVD_VIDSTRB0 RSVD12 RSVD13 RSVD14 H6 G6 D5 CPU_RSVD_VDDNB_FB_P CPU_RSVD_VDDNB_FB_N CPU_RSVD_CORE_TYPE RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 R24 W18 R23 AA8 H18 H19 T25 T26 T18 T29 T40 T45 T24 AMD NPT S1 SOCKET Processor Socket B2A:AMD suggestion not stuff R577,R580,R581,R579,R292,R213,R209 B B +1.8VSUS SB_THERMTRIP# 15 +1.8V separated input voltage 0104 +1.8VSUS R310 H_PROCHOT# CPU_PROCHOT# 15 +1.8VSUS 300_4 Q20 MMBT3904 R303 H_THERMTRIP# THERM_SYS_PWR 44 CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1 R214 R208 R212 510/F_4 300_4 300_4 *220_4 39 *220_4 CPU_EC_PROCHOT# R300 *0_4 HDT CONNECTOR IF no use which Net need pull-up or down R211 300_4 300_4 *300_4 *300_4 *300_4 *300_4 *300_4 *300_4 *220_4 R293 R580 R581 R579 R292 R213 R209 R578 4.7K/F_4 CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST15_BP1 CPU_TEST14_BP0 *220_4 *330_4 R295 4.7K/F_4 *220_4 R305 R309 R296 Q19 MMBT3904 Q21 *MMBT3904 *300_4 300_4 1K/F_4 510/F_4 R575 +1.8V R577 R582 R294 R210 R576 R304 330_4 EC_PWRGD +1.8VSUS CPU_TEST27_SINGLECHAIN CPU_TEST26_BURNIN# CPU_PRESENT# CPU_TEST25_H_BYPASSCLK_H CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO LDT_RST# T28 T30 T136 T65 T133 T135 T134 T105 PUT CLOSE ON LAYOUT NOTE: HDT TERMINATION IS REQUIRED FOR REV Ax SILICON ONLY A A PROJECT : ZC3 Quanta Computer Inc Size Document Number Rev 1A ATHLON64 CTRL & DEBUG Date: Thursday, June 08, 2006 Sheet of 46 D D BOTTOMSIDE DECOUPLING U43F VCC_CORE AA4 AA11 AA13 AA15 AA17 AA19 AB2 AB7 AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21 AD6 AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23 B4 B6 B8 B9 B11 B13 B15 B17 B19 B21 B23 B25 D6 D8 D9 D11 D13 D15 D17 D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 VCC_CORE U43E C AC4 AD2 G4 H2 J9 J11 J13 K6 K10 K12 K14 L4 L7 L9 L11 L13 M2 M6 M8 M10 N7 N9 N11 P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 V6 V8 V10 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27 H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25 +1.8VSUS POWER Athlon 64 S1 Processor Socket B VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6 VCC_CORE C430 C467 C483 C480 C489 C492 C459 C471 C431 22U/10V_8 22U/10V_8 22U/10V_8 22U/10V_8 22U/10V_8 22U/10V_8 22U/10V_8 22U/10V_8 22U/10V_8 VCC_CORE C C444 C425 C454 C443 22U/6V_4 *.01U_4 180P_4 22U/6V_4 +1.8VSUS Under the CPU socket C449 C446 C437 C463 22U/10V_8 22U/6V_4 22U/10V_8 22U/6V_4 DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE +1.8VSUS Along the DDIO/VSS plane split C404 4.7U/6.3V_6 C410 4.7U/6.3V_6 C376 4.7U/6.3V_6 C415 4.7U/6.3V_6 C460 C407 C455 C456 C384 22U/6V_4 22U/6V_4 22U/6V_4 22U/6V_4 01U_4 C466 01U_4 C393 C844 180P_4 C862 180P_4 10P_4 B GROUND Athlon 64 S1 Processor Socket A1 A26 PROCESSOR POWER AND GROUND A A Athlon 64 S1g1 uPGA638 Top View PROJECT : ZC3 Quanta Computer Inc AF1 Size Document Number Rev 1A ATHLON64 PWR & GND Date: Thursday, June 08, 2006 Sheet of 46 A B C D E 15 +1.8VSUS 10 26 52 67 130 147 170 185 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 13 31 51 70 131 148 169 188 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 M_A_DQS[0 7] 11 29 49 68 129 146 167 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 M_A_DQS#[0 7] 30 32 164 166 M_CLKOUT0 M_CLKOUT0# M_CLKOUT1 M_CLKOUT1# M_CLKOUT0 C349 1.5P_4 M_CLKOUT0# M_CLKOUT1 C506 1.5P_4 M_CLKOUT1# 2 CKE0 CKE1 4,8 4,8 4,8 4,8 4,8 M_A_RAS# M_A_CAS# M_A_WE# M_A_CS#0 M_A_CS#1 108 113 109 110 115 RAS CAS WE S0 S1 4,8 4,8 M_ODT0 M_ODT1 114 119 ODT0 ODT1 198 200 SA0 SA1 195 197 SDA SCL 199 VDDspd C511 C300 1U_4 1U_4 MVREF_DIM VREF C292 C304 2.2U/10V/X5R_8 1U_4 (H=5.2) 59 60 65 66 71 72 77 78 121 122 127 128 132 C3A:change DDR conn form VSS0 VSS1 VSS2 VSS3 12 VSS4 15 VSS5 18 VSS6 21 VSS7 24 VSS8 27 VSS9 28 VSS10 33 VSS11 34 VSS12 39 VSS13 40 VSS14 41 VSS15 42 FOX47to VSS16 AMP VSS17 48 VSS18 53 VSS19 54 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 +1.8VSUS CK0 CK0 CK1 CK1 79 80 +3V 50 69 83 120 163 REVERSE M_CKE0 M_CKE1 SMBDT SMBCK NC1 NC2 NC3 NC4 NC/TEST CN27 4,8 4,8 SMbus address A0 17 19 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 M_A_DQ1 M_A_DQ5 M_A_DQ2 M_A_DQ3 M_A_DQ0 M_A_DQ4 M_A_DQ7 M_A_DQ6 M_A_DQ12 M_A_DQ8 M_A_DQ10 M_A_DQ14 M_A_DQ13 M_A_DQ9 M_A_DQ15 M_A_DQ11 M_A_DQ21 M_A_DQ17 M_A_DQ23 M_A_DQ18 M_A_DQ20 M_A_DQ19 M_A_DQ22 M_A_DQ16 M_A_DQ29 M_A_DQ28 M_A_DQ31 M_A_DQ26 M_A_DQ25 M_A_DQ24 M_A_DQ27 M_A_DQ30 M_A_DQ32 M_A_DQ36 M_A_DQ37 M_A_DQ35 M_A_DQ33 M_A_DQ38 M_A_DQ34 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ46 M_A_DQ44 M_A_DQ45 M_A_DQ43 M_A_DQ47 M_A_DQ55 M_A_DQ54 M_A_DQ50 M_A_DQ51 M_A_DQ53 M_A_DQ48 M_A_DQ49 M_A_DQ52 M_A_DQ56 M_A_DQ60 M_A_DQ59 M_A_DQ58 M_A_DQ57 M_A_DQ61 M_A_DQ63 M_A_DQ62 4,8 4,8 4,8 107 106 85 BA0 BA1 BA2 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 10 26 52 67 130 147 170 185 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 13 31 51 70 131 148 169 188 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 11 29 49 68 129 146 167 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 30 32 164 166 CK0 CK0 CK1 CK1 M_B_BS#0 M_B_BS#1 M_B_BS#2 M_B_DM[0 7] M_B_DQS[0 7] M_B_DQS#[0 7] 4 4 M_CLKOUT3 M_CLKOUT3# M_CLKOUT4 M_CLKOUT4# M_CLKOUT3 M_CLKOUT3# M_CLKOUT4 M_CLKOUT4# M_CLKOUT3 C334 1.5P_4 M_CLKOUT3# M_CLKOUT4 C507 1.5P_4 M_CLKOUT4# 4,8 4,8 M_CKE2 M_CKE3 79 80 CKE0 CKE1 4,8 4,8 4,8 4,8 4,8 M_B_RAS# M_B_CAS# M_B_WE# M_B_CS#0 M_B_CS#1 108 113 109 110 115 RAS CAS WE S0 S1 4,8 4,8 M_ODT2 M_ODT3 114 119 ODT0 ODT1 R289 R290 0_4 10K_4 198 200 SMBDT SMBCK 195 197 SDA SCL 199 VDDspd +3V SMbus address A4 M_A_CS#2 4,8 M_A_CS#3 4,8 +3V +1.8VSUS C295 C510 1U_4 1U_4 MVREF_DIM 17 19 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 NC1 NC2 NC3 NC4 NC/TEST 50 69 83 120 163 CN26 REVERSE SA0 SA1 VREF 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 SO-DIMM M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 M_B_DQ[0 63] DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133 +0.9V_REF C291 C299 2.2U/10V/X5R_8 1U_4 +1.8VSUS R186 *0_4 R179 1K/F_4 MVREF_DIM R189 C312 1U/10V_4 1K/F_4 (H=9.2) VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 M_A_DM[0 7] 4 4 BA0 BA1 BA2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 107 106 85 M_A_BS#0 M_A_BS#1 M_A_BS#2 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 M_B_DQ4 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ5 M_B_DQ0 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ15 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ11 M_B_DQ16 M_B_DQ21 M_B_DQ19 M_B_DQ23 M_B_DQ20 M_B_DQ17 M_B_DQ18 M_B_DQ22 M_B_DQ29 M_B_DQ28 M_B_DQ26 M_B_DQ27 M_B_DQ24 M_B_DQ25 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ36 M_B_DQ39 M_B_DQ35 M_B_DQ33 M_B_DQ37 M_B_DQ34 M_B_DQ38 M_B_DQ40 M_B_DQ41 M_B_DQ46 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ47 M_B_DQ42 M_B_DQ53 M_B_DQ49 M_B_DQ51 M_B_DQ50 M_B_DQ48 M_B_DQ52 M_B_DQ54 M_B_DQ55 M_B_DQ60 M_B_DQ57 M_B_DQ62 M_B_DQ59 M_B_DQ61 M_B_DQ56 M_B_DQ63 M_B_DQ58 +1.8VSUS DDRII_SODIMM_R C441 *10U/6.3V/X5R_8 C435 *10U/6.3V/X5R_8 C440 10U/10V/X5R_8 C439 10U/10V/X5R_8 C371 1U_4 C353 1U_4 C361 1U_4 C403 1U_4 C392 1U_4 C356 1U_4 C372 1U_4 C358 1U_4 C386 1U_4 C359 1U_4 C382 1U_4 C429 1U_4 C409 1U_4 C398 1U_4 C427 1U_4 C417 1U_4 C390 1U_4 C397 1U_4 C402 1U_4 C436 1U_4 M_B_CS#2 4,8 M_B_CS#3 4,8 196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133 PROJECT : ZC3 59 60 65 66 71 72 77 78 121 122 127 128 132 4,8 4,8 4,8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 SO-DIMM M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 M_B_A[0 15] M_A_DQ[0 63] VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 M_A_A[0 15] VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 81 82 87 88 95 96 103 104 111 112 117 118 4,8 4,8 81 82 87 88 95 96 103 104 111 112 117 118 +1.8VSUS Quanta Computer Inc DDRII_SODIMM_R Size Document Number Rev 1A 1.This part should not contain any substances which are specified in SS-00259-1 DDR-II SODIMM*2 2.Purchase ink, paint, wire rods and molding resins only from the business partners that Sony approvesDate: as Green Partners Thursday, June 08, 2006 A B C D Sheet E of 46 A1A:Change RTT termination from 56 to 47 ohm +0.9V_VTER A VTT is decoupled to VDDIO,VTT is decoupled to VSS +0.9V_VTER B C391 *10U/6.3V/X5R_8 C337 *10U/6.3V/X5R_8 C342 C401 C421 C413 C412 C341 C346 C385 C340 C418 C387 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 C419 C422 C426 C423 C408 C375 C424 C389 C343 C357 C406 C394 C405 C388 C420 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 1U_4 4,7 M_A_A[0 15] M_CKE0 M_CKE1 M_CKE2 M_CKE3 4,7 4,7 4,7 4,7 M_ODT0 M_ODT1 M_ODT2 M_ODT3 4,7 4,7 4,7 M_A_BS#0 M_A_BS#1 M_A_BS#2 4,7 4,7 4,7 M_A_WE# M_A_CAS# M_A_RAS# 4,7 4,7 4,7 M_B_BS#0 M_B_BS#1 M_B_BS#2 4,7 4,7 4,7 M_B_WE# M_B_CAS# M_B_RAS# 4,7 4,7 4,7 4,7 M_A_CS#0 M_A_CS#1 M_A_CS#2 M_A_CS#3 4,7 4,7 4,7 4,7 M_B_CS#0 M_B_CS#1 M_B_CS#2 M_B_CS#3 R216 R219 R218 R217 47_4 47_4 47_4 47_4 R255 R270 R257 R264 47_4 47_4 47_4 47_4 M_A_BS#0 M_A_BS#1 M_A_BS#2 R251 R239 R223 47_4 47_4 47_4 M_A_WE# M_A_CAS# M_A_RAS# R256 R262 R236 47_4 47_4 47_4 M_B_BS#0 M_B_BS#1 M_B_BS#2 R249 R240 R224 47_4 47_4 47_4 M_B_WE# M_B_CAS# M_B_RAS# R260 R254 R253 47_4 47_4 47_4 R261 R266 R221 R265 47_4 47_4 47_4 47_4 R263 R269 R222 R267 47_4 47_4 47_4 47_4 M_A_A13 M_A_A10 M_A_A0 M_A_A2 M_A_A4 M_A_A6 M_A_A7 M_A_A11 M_A_A12 M_A_A9 M_A_A3 M_A_A1 M_A_A8 M_A_A5 M_A_A14 M_A_A15 +1.8VSUS C decoupling capacitors from VTT (+0.9V_VTER) to VDDIO (+1.8VSUS) Which is (1) decoupling capacitor for every (4) signals terminated to VTT 4,7 4,7 4,7 4,7 4,7 M_B_A[0 15] R250 R226 RP16 RP12 RP8 RP9 RP19 RP14 RP6 M_B_A0 M_B_A2 M_B_A4 M_B_A6 M_B_A7 M_B_A11 M_B_A3 M_B_A1 M_B_A8 M_B_A5 M_B_A12 M_B_A9 M_B_A10 M_B_A13 M_B_A14 M_B_A15 RP18 RP15 RP11 RP17 RP13 RP10 R238 R271 RP7 A B 3 3 3 47_4 47_4 0404-47X2 0404-47X2 0404-47X2 0404-47X2 0404-47X2 0404-47X2 0404-47X2 3 3 3 4 4 4 C 0404-47X2 0404-47X2 0404-47X2 0404-47X2 0404-47X2 0404-47X2 47_4 47_4 0404-47X2 D D PROJECT : ZC3 Quanta Computer Inc Size Document Number Rev 1A DDR-II TERMINATION Date: Thursday, June 08, 2006 Sheet of 8 46 D D U44A VDDHT_PKG HT_CADOUT15_P HT_CADOUT15_N HT_CADOUT14_P HT_CADOUT14_N HT_CADOUT13_P HT_CADOUT13_N HT_CADOUT12_P HT_CADOUT12_N HT_CADOUT11_P HT_CADOUT11_N HT_CADOUT10_P HT_CADOUT10_N HT_CADOUT9_P HT_CADOUT9_N HT_CADOUT8_P HT_CADOUT8_N R19 R18 R21 R22 U22 U21 U18 U19 W19 W20 AC21 AB22 AB20 AA20 AA19 Y19 HT_RXCAD15P HT_RXCAD15N HT_RXCAD14P HT_RXCAD14N HT_RXCAD13P HT_RXCAD13N HT_RXCAD12P HT_RXCAD12N HT_RXCAD11P HT_RXCAD11N HT_RXCAD10P HT_RXCAD10N HT_RXCAD9P HT_RXCAD9N HT_RXCAD8P HT_RXCAD8N 3 3 3 3 3 3 3 3 HT_CADOUT7_P HT_CADOUT7_N HT_CADOUT6_P HT_CADOUT6_N HT_CADOUT5_P HT_CADOUT5_N HT_CADOUT4_P HT_CADOUT4_N HT_CADOUT3_P HT_CADOUT3_N HT_CADOUT2_P HT_CADOUT2_N HT_CADOUT1_P HT_CADOUT1_N HT_CADOUT0_P HT_CADOUT0_N T24 R25 U25 U24 V23 U23 V24 V25 AA25 AA24 AB23 AA23 AB24 AB25 AC24 AC25 HT_RXCAD7P HT_RXCAD7N HT_RXCAD6P HT_RXCAD6N HT_RXCAD5P HT_RXCAD5N HT_RXCAD4P HT_RXCAD4N HT_RXCAD3P HT_RXCAD3N HT_RXCAD2P HT_RXCAD2N HT_RXCAD1P HT_RXCAD1N HT_RXCAD0P HT_RXCAD0N HT_CLKOUT1_P HT_CLKOUT1_N W21 W22 HT_RXCLK1P HT_RXCLK1N HT_CLKOUT0_P HT_CLKOUT0_N Y24 W25 HT_RXCLK0P HT_RXCLK0N HT_CTLOUT0_P HT_CTLOUT0_N P24 P25 HT_RXCTLP HT_RXCTLN A24 C24 HT_RXCALP HT_RXCALN R570 49.9/F_4 HT_RXCALP R571 49.9/F_4 HT_RXCALN PART OF HYPER TRANSPORT CPU I/F C 3 3 3 3 3 3 3 3 HT_TXCAD15P HT_TXCAD15N HT_TXCAD14P HT_TXCAD14N HT_TXCAD13P HT_TXCAD13N HT_TXCAD12P HT_TXCAD12N HT_TXCAD11P HT_TXCAD11N HT_TXCAD10P HT_TXCAD10N HT_TXCAD9P HT_TXCAD9N HT_TXCAD8P HT_TXCAD8N P21 P22 P18 P19 M22 M21 M18 M19 L18 L19 G22 G21 J20 J21 F21 F22 HT_CADIN15_P HT_CADIN15_N HT_CADIN14_P HT_CADIN14_N HT_CADIN13_P HT_CADIN13_N HT_CADIN12_P HT_CADIN12_N HT_CADIN11_P HT_CADIN11_N HT_CADIN10_P HT_CADIN10_N HT_CADIN9_P HT_CADIN9_N HT_CADIN8_P HT_CADIN8_N 3 3 HT_TXCAD7P HT_TXCAD7N HT_TXCAD6P HT_TXCAD6N HT_TXCAD5P HT_TXCAD5N HT_TXCAD4P HT_TXCAD4N HT_TXCAD3P HT_TXCAD3N HT_TXCAD2P HT_TXCAD2N HT_TXCAD1P HT_TXCAD1N HT_TXCAD0P HT_TXCAD0N N24 N25 L25 M24 K25 K24 J23 K23 G25 H24 F25 F24 E23 F23 E24 E25 HT_CADIN7_P HT_CADIN7_N HT_CADIN6_P HT_CADIN6_N HT_CADIN5_P HT_CADIN5_N HT_CADIN4_P HT_CADIN4_N HT_CADIN3_P HT_CADIN3_N HT_CADIN2_P HT_CADIN2_N HT_CADIN1_P HT_CADIN1_N HT_CADIN0_P HT_CADIN0_N 3 3 3 3 3 3 3 3 HT_TXCLK1P HT_TXCLK1N L21 L22 HT_CLKIN1_P HT_CLKIN1_N HT_TXCLK0P HT_TXCLK0N J24 J25 HT_CLKIN0_P HT_CLKIN0_N HT_TXCTLP HT_TXCTLN N23 P23 HT_TXCALP HT_TXCALN C25 D24 3 3 3 3 3 3 C HT_CTLIN0_P HT_CTLIN0_N HT_TXCALP HT_TXCALN R258 100/F_4 RX485 A12 HT B B A A PROJECT : ZC3 Quanta Computer Inc Size Document Number Rev 1A RS485-HT LINK0 I/F Date: Sheet Thursday, June 08, 2006 of 46 Stiching capacitor VA +3V VA C146 1U_4 VIN C159 1U_4 +1.8V +1.8V C134 1U_4 VIN VIN C206 1U_4 VIN VIN C147 1U_4 +1.8V VIN C322 1U_4 +3V C959 1U_4 +3V +3V +1.8VSUS +5V +1.8V C311 1U_4 VCC_CORE C822 1U_4 VIN C360 1U_4 +1.2V +1.2V D D +3V C461 1U_4 C494 1U_4 VCC_CORE +5V +1.8VSUS VCC_CORE +5V C1039 1U_4 +3V C505 1U_4 VCC_CORE +5V C921 1U_4 +3V +1.8VSUS C908 1U_4 +3V +5V C26 1U_4 +3V +5V +3V C47 1U_4 VIN C662 1U_4 +1.2V_VPCIE +1.2V_VPCIE +5V C289 1U_4 +3V +3V C751 1U_4 +3V +1.2V_VPCIE +5V +3V C70 1U_4 VIN +3V +5V C919 1U_4 +3V +3V C842 1U_4 VIN +3V +1.8VSUS C518 1U_4 VIN +5V C400 1U_4 VIN +0.9V_VTER +5V C1044 1U_4 VIN +3V C468 1U_4 C553 1U_4 VIN C103 1U_4 C60 1U_4 C843 1U_4 C333 1U_4 +1.1V_VGA +3V +1.1V_VGA +1.8V +1.2V +1.8VSUS +3V +3V +3V +3V C514 1U_4 VCC_CORE C895 1U_4 VCC_CORE C906 1U_4 VCC_CORE +3VPCU C554 1U_4 +3VPCU C526 1U_4 +3VPCU C637 1U_4 VDDQ_3V C612 1U_4 PART OF C_PEG_TXP0 C866 C_PEG_TXN0 C863 C_PEG_TXP1 C865 C_PEG_TXN1 C864 C_PEG_TXP2 C867 C_PEG_TXN2 C869 C_PEG_TXP3 C870 C_PEG_TXN3 C868 C_PEG_TXP4 C871 C_PEG_TXN4 C873 C_PEG_TXP5 C874 C_PEG_TXN5 C872 C_PEG_TXP6 C875 C_PEG_TXN6 C877 C_PEG_TXP7 C878 C_PEG_TXN7 C876 C_PEG_TXP8 C879 C_PEG_TXN8 C881 C_PEG_TXP9 C882 C_PEG_TXN9 C880 C_PEG_TXP10 C883 C_PEG_TXN10 C885 C_PEG_TXP11 C886 C_PEG_TXN11 C884 C_PEG_TXP12 C887 C_PEG_TXN12 C889 C_PEG_TXP13 C890 C_PEG_TXN13 C888 C_PEG_TXP14 C891 C_PEG_TXN14 C893 C_PEG_TXP15 C894 C_PEG_TXN15 C892 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 J1 H2 K2 K1 K3 L3 L1 L2 N2 N1 P2 P1 P3 R3 R1 R2 T2 U1 V2 V1 V3 W3 W1 W2 Y2 AA1 AA2 AB2 AB1 AC1 AE3 AE4 GPP_TX0P GPP_TX0N AD8 AE8 GPP_TX0P_C GPP_TX0N_C C497 1U_4 C491 1U_4 GPP_TX1P GPP_TX1N AD7 AE7 GPP_TX1P_C GPP_TX1N_C C474 1U_4 C479 1U_4 PCIE_TXP1 32 PCIE_TXN1 32 EZ4 1U_4 C901 1U_4 PCIE_TXP2 33 PCIE_TXN2 33 New card 1U_4 C476 1U_4 PCIE_TXP3 29 PCIE_TXN3 29 WLAN 1U_4 C897 1U_4 A_TX0P A_TX0N 14 14 1U_4 C899 1U_4 A_TX1P A_TX1N 14 14 W11 W12 EZ4 32 32 PCIE_RXP1 PCIE_RXN1 GPP_RX1P GPP_RX1N 33 33 PCIE_RXP2 PCIE_RXN2 Y7 AA7 GPP_RX2P GPP_RX2N GPP_TX2P GPP_TX2N AD4 AE5 GPP_TX2P_C GPP_TX2N_C C902 New card PCIE_RXP3 PCIE_RXN3 AB9 AA9 GPP_RX3P GPP_RX3N GPP_TX3P GPP_TX3N AD5 AD6 GPP_TX3P_C GPP_TX3N_C C477 WLAN 29 29 SB_TX0P SB_TX0N AE9 AD10 A_TX0P_C A_TX0N_C C898 SB_TX1P SB_TX1N AC8 AD9 A_TX1P_C A_TX1N_C C900 GPP_RX0P GPP_RX0N 14 14 A_RX0P A_RX0N W14 W15 SB_RX0P SB_RX0N 14 14 A_RX1P A_RX1N AB12 AA12 SB_RX1P SB_RX1N R278 R281 10K_4 AA14 8.25K/F_6 AB14 R214: 10KOhm FOR RS485 1.47KOhm FOR R213: RS690 8.25KOhm FOR RS485 DNI FOR RS690 PCIE I/F GPP PCIE I/F SB PEG_TXP0 PEG_TXN0 PEG_TXP1 PEG_TXN1 PEG_TXP2 PEG_TXN2 PEG_TXP3 PEG_TXN3 PEG_TXP4 PEG_TXN4 PEG_TXP5 PEG_TXN5 PEG_TXP6 PEG_TXN6 PEG_TXP7 PEG_TXN7 PEG_TXP8 PEG_TXN8 PEG_TXP9 PEG_TXN9 PEG_TXP10 PEG_TXN10 PEG_TXP11 PEG_TXN11 PEG_TXP12 PEG_TXN12 PEG_TXP13 PEG_TXN13 PEG_TXP14 PEG_TXN14 PEG_TXP15 PEG_TXN15 GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N AA11 AB11 VDDQ_3V B GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N PCIE_RXP0 PCIE_RXN0 32 32 EZ4 C907 1U_4 PEG_RXP0 G5 PEG_RXN0 G4 PEG_RXP1 J8 PEG_RXN1 J7 PEG_RXP2 J4 PEG_RXN2 J5 PEG_RXP3 L8 PEG_RXN3 L7 PEG_RXP4 L4 PEG_RXN4 L5 PEG_RXP5 M8 PEG_RXN5 M7 PEG_RXP6 M4 PEG_RXN6 M5 PEG_RXP7 P8 PEG_RXN7 P7 PEG_RXP8 P4 PEG_RXN8 P5 PEG_RXP9 R4 PEG_RXN9 R5 PEG_RXP10 R7 PEG_RXN10 R8 PEG_RXP11 U4 PEG_RXN11 U5 PEG_RXP12 W4 PEG_RXN12 W5 PEG_RXP13 Y4 PEG_RXN13 Y5 PEG_RXP14 V9 PEG_RXN14 W9 PEG_RXP15 AB7 PEG_RXN15 AB6 PEG_RXP[15:0] 18 PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15 +3V C C784 1U_4 U44B PEG_RXN[15:0] 18 PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15 PCIE I/F GFX VCC_NB PCE_ISET(PCE_CALI) PCE_PCAL(PCE_CALRP) PCE_TXISET(NC) PCE_NCAL(PCE_CALRN) AD11 R572 AE11 R280 150/F_4 VDDA12_PKG2 100/F_4 C PCIE_TXP0 32 PCIE_TXN0 32 EZ4 B C3A:change footprint form c0402-c to c0402 R216: RX485 A12 HT 150 Ohm FOR RS485 562 Ohm FOR RS690 R215: Ward update to 100 Ohm FOR RS485 2KOhm FOR RS690 PEG_TXN[15:0] 18 PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15 A PEG_TXP[15:0] 18 PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15 Place these caps close to connector A PROJECT : ZC3 Quanta Computer Inc Size Document Number Rev 1A RS485-PCIE LINK I/F Date: Sheet Thursday, June 08, 2006 10 of 46 CN19-4 28 28 D 39 39 39 39 38 38 38 38 38 38 38 38 100MBPS# ACT# 0_4 31 33 LANLED_LINK LANLED_ACT GND33 SUSON_PR MAINON_PR DOCKPRG 55 56 85 SUSON MAINON BRG_PWROK KPCLK KPDATA MSCLK MSDATA 52 51 54 53 PS2KBCK PS2KBDT PS2MSCK PS2MSDT MDSR1# MRTS1# MCTS1# MRI1 MDCD1# MRXD1 MTXD1 MDTR1# 48 46 44 42 49 47 45 43 50 R2 KPCLK KPDATA MSCLK MSDATA MDSR1# MRTS1# MCTS1# MRI1 MDCD1# MRXD1 MTXD1 MDTR1# 34,36,37 SPDIF_OUT AUDGND1 R17 37 SPKR_SYS R16 37 SPKL_SYS R19 37 LINEINR_PR R18 37 LINEINL_PR R453 37 PR_MIC AUDGND1 36 PR_MIC_IN 36,37 HPSENCE_PR 41 72 SPKR_DOCK 74 SPKL_DOCK 75 LINEINR_DOCK 70 LINEINL_DOCK71 PR_MIC_DOCK73 76 69 40 0_4 0_4 0_4 0_4 0_4 124 L77 100 101 102 103 104 TV_COMP_PR TV_Y/G_PR TV_C/R_PR STRB# PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PE AFD# ERROR# INIT# SLIN# ACK# BUSY SLCT 11 13 15 17 18 19 20 21 24 10 12 14 16 22 23 25 STRB# PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PE AFD# ERROR# INIT# SLIN# ACK# BUSY SLCT GND58 GND77 GND110 58 77 110 GND100 TV_COMPS TV_LUMA TV_CRMA GND104 DSR# RTS# CTS# RI DCD# RXD# TXD# DTR# GND50 SPDIF_OUT AGND72 LINEOUT_R LINEOUT_L LINEIN_R LINEIN_L MICIN AGND76 PRMIC_DET HPSENSE_PR RESERVE32 RESERVE82 26 26 26 26 TV_COMP_PR 25 TV_Y/G_PR 25 TV_C/R_PR 25 STRB# HSYNC_EZ4 VSYNC_EZ4 DDCCLK_1 DDCDAT_1 G1 GND126 DDCCLK_1 DDCDAT_1 CN19-2 BLM18BA220SN1_6 PR_CRTHSYNC PR_CRTVSYNC BLM18BA220SN1_6 L76 BLM18BA220SN1_6 BLM18BA220SN1_6 BLM18BA220SN1_6 26 VGA_RED_PR 26 VGA_GRN_PR 26 VGA_BLU_PR 38 L80 L79 L78 PR_RED PR_GRN PR_BLU CLK_PCIE_EZ1 CLK_PCIE_EZ1# PD[0 7] PE AFD# ERROR# INIT# SLIN# ACK# BUSY SLCT 38 38 38 38 38 38 38 38 38 PCIE_TXP0 PCIE_TXN0 10 10 PCIE_RXP0 PCIE_RXN0 CLK_PCIE_EZ2 CLK_PCIE_EZ2# A1A:Change EZ2 to PCIE1 11,14,18,29,33,34,38,39 32 82 10 10 A1A:Change EZ1 to PCIE0 10 10 PCIE_TXP1 PCIE_TXN1 10 10 PCIE_RXP1 PCIE_RXN1 D4 ALINK_RST# +5V BAS316 2,15,29,33 PDAT_SMB 2,15,29,33 PCLK_SMB 2,39 EZ_CLKREQ# C16 G2 EZ4_Acer_define CN19-3 CN19-1 78 79 81 80 105 106 107 108 109 117 119 120 118 115 116 114 111 112 113 29 30 27 59 60 28 89 90 88 57 26 86 83 87 CRT_HS CRT_VS CRT_DDCK CRT_DDCDT GND105 VGA_R VGA_G VGA_B GND109 GND117 PCIE1_CLK+ PCIE1_CLKGND118 PCIE1_TP PCIE1_TN GND114 PCIE1_RP PCIE1_RN GND113 PCIE2_CLK+ PCIE2_CLKGND27 PCIE2_TP PCIE2_TN GND28 PCIE2_RP PCIE2_RN GND88 PCIERST PCIEWAKE PCIESMBDT PCIESMBCK PCIEREQ# 122 125 P2 GND125 DVI_HPD DVI_CLKDVI_CLK+ GND99 DVI_D0DVI_D0+ GND96 DVI_D1DVI_D1+ GND93 DVI_D2DVI_D2+ GND63 64 98 97 99 94 95 96 91 92 93 61 62 63 DVI_DDCCK DVI_DDCDT GND66 67 65 66 TX3P TX3N GND39 TX2P TX2N GND36 TX1P TX1N GND6 TX0P TX0N GND3 GND7 DOCK_IN# DOCKED# 37 38 39 34 35 36 68 84 R4 0_4 DVI_HPD 34 DVI_CLK- 34 DVI_CLK+ 34 R5 100K_4 DVI_TX0- 34 DVI_TX0+ 34 DVI_TX1- 34 DVI_TX1+ 34 DVI_TX2- 34 DVI_TX2+ 34 0_4 0_4 R454 R455 X-TX3P-PR X-TX3N-PR X-TX3P-PR 28 X-TX3N-PR 28 X-TX2P-PR X-TX2N-PR X-TX2P-PR 28 X-TX2N-PR 28 X-TX1P-PR X-TX1N-PR X-TX1P-PR 28 X-TX1N-PR 28 X-TX0P-PR X-TX0N-PR DOCKIN# R20 D DVI_DDCCLK DVI_DDCDATA X-TX0P-PR 28 X-TX0N-PR 28 1K_4 1U-10V_4 123 126 VA EZ4_Acer_define R15 +3V 0_4 121 P1 EZ4_Acer_define +5V VA EZ4_Acer_define C C AUDGND1 VA +3V_S5 +3V_S5 R459 *2.2K_4 R458 10K_4 C27 R22 C1 C4 1U-50V_6 1U-50V_6 Q33 1U-10V_4 FDV301N 3 PR_STS DOCKIN# 39 +3V U6 TC7SH08FU +5V R23 DOCKIN# B: CHANGE TO FDV301N DOCKIN DVI_DDCDATA 34 EZ4_DDCDATA DOCKPRG 10K_4 1M/F_4 SUSON_PR Q3 2N7002 R456 10K_4 R457 *2.2K_4 SUSON 39,43,44 U32B TC7W125FU Q32 DOCKIN# C737 C735 C738 C739 C740 C736 C734 DDCCLK_1 DDCDAT_1 X-TX1P-PR X-TX1N-PR X-TX0P-PR X-TX0N-PR X-TX3P-PR X-TX3N-PR X-TX2P-PR X-TX2N-PR C14 C15 C6 C5 C2 C3 C725 C724 C727 C726 *10P_4 *10P_4 *10P-50V_4 *10P-50V_4 *10P-50V_4 *10P_4 *10P_4 10P-50V_4 10P-50V_4 *10P-50V_4 *10P-50V_4 *10P-50V_4 *10P-50V_4 *10P-50V_4 *10P-50V_4 *10P-50V_4 *10P-50V_4 C733 C3A:remove C738~740 for CRT signal +5V PR_CRTHSYNC PR_CRTVSYNC PR_BLU PR_GRN PR_RED HSYNC_EZ4 VSYNC_EZ4 MAINON_PR 15,28,34 DOCKIN# 1U-10V_4 MAINON 39,42,43,44,46 +3V_S5 R30 U32A TC7W125FU 10K_4 PR_INSERT_5V 25,26,34 R36 A1A:Change footprint to SSOP8-4-65 C17 C18 C19 C20 C722 C721 C723 C11 C743 C741 C742 *100P-50V_6 *100P-50V_6 *100P-50V_6 *100P-50V_6 *100P-50V_6 220P-50V_4 220P-50V_4 220P-50V_4 220P-50V_4 47P-50V_4 47P-50V_4 1000P-50V_4 1000P-50V_4 10P-50V_4 10P-50V_4 10P-50V_4 +3V_S5 100K_4 DOCKIN# C37 1U-10V_4 Q2 2N7002 C731 C732 C729 C730 C728 B DVI_DDCCLK FDV301N A1A:Reserve 100pf for KPCLK,KPDATA,MSCLK,MSDATA KPCLK KPDATA MSCLK MSDATA SPDIF_OUT SPKL_SYS SPKR_SYS LINEINL_PR LINEINR_PR PR_MIC_IN PR_MIC 100MBPS# ACT# TV_COMP_PR TV_C/R_PR TV_Y/G_PR 34 EZ4_DDCCLK B A A PROJECT : ZC3 Quanta Computer Inc Size Document Number Rev 1A EZ4 CONN Date: Thursday, June 08, 2006 Sheet 32 of 46 +NEW_1.5V Max 650mA, Average 500mA +NEW_3V Max 1300mA, Average 1000mA A1A:Change New card to small type(130832-1) Reverse CN30 A1A:Change New card power sw to Oz27c10 +1.5V +3V +3VSUS 17 12 14 D +NEW_3VAUX U47 +NEW_3V +NEW_1.5V +NEW_3VAUX AUXIN 3.3VIN_0 3.3VIN_1 1.5VIN_0 1.5VIN_1 AUXOUT 3.3VOUT_0 3.3VOUT_1 1.5VOUT_0 1.5VOUT_1 15 11 13 Place near U20 C954 10 10 PCIE_TXP2 PCIE_TXN2 10 10 PCIE_RXP2 PCIE_RXN2 CLK_PCIE_NEW CLK_PCIE_NEW# 1U-10V_4 CPPE# NEW_CLKREQ# +3VSUS 11,14,18,29,32,34,38,39 ALINK_RST# ExpressSwitch 20 NC GND +NEW_3V PERST# CPPE# CPUSB# OC# 10 19 RCLKEN 18 21 22 23 24 25 16 SHDN# STBY# SYSRST# GND1 GND2 GND3 GND4 GND5 R671 100K_4 +NEW_3V +NEW_1.5V PERST# +NEW_3VAUX PERST# CPPE# CPPE# 15 C925 C957 +NEW_1.5V 1U-10V_4 1U-10V_4 NEW_SMDATA NEW_SMCLK B2A:remove R677, R674 2@R5538D001-TR-F/OZ27C10LN 1U-10V_4 PERP0 1U-10V_4 PERN0 C982 C985 CPPE# +NEW_3V 15 15 RP28 0_4P2R_S USBP5USBP5+ USBP5+_CARD USBP5-_CARD USBP5-_CARD USBP5+_CARD RP29 A1A:Reserve for EMI Place near U20 +3V 10K_4P2R +1.5V C942 1U-10V_4 C924 1U-10V_4 C923 1U-10V_4 C955 1U-10V_4 C956 1U-10V_4 2,15,29,32 PDAT_SMB Q42 +NEW_3VAUX D C Place near CN35 USBP5-_CARD USBP5+_CARD +3VSUS GND1 PETp0 PETn0 GND2 PERp0 PERn0 GND3 REFCLK+ REFCLKCPPE# CLKREQ# +3.3V1 +3.3V2 PERST# +3.3VAUX WAKE# +1.5V1 +1.5V2 SMB_DATA SMB_CLK RESERVED1 RESERVED2 CPUSB# USB_D+ USB_DGND4 130832-1_NEW CARD C 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 C961 1U-10V_4 NEW_SMDATA C922 C931 *22P_4 *22P_4 2N7002 +NEW_3V +NEW_1.5V +NEW_3V C966 PAD21 PAD8 PAD10 PAD11 *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD PAD15 PAD3 PAD19 *EMIPAD *EMIPAD *EMIPAD *EMIPAD PAD5 PAD9 PAD22 PAD28 PAD7 *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD PAD6 *EMIPAD PAD18 *EMIPAD PAD30 *EMIPAD PAD29 *EMIPAD PAD26 *EMIPAD HOLE20 *h-c276d118p2 PAD24 ADOGND ADOGND PAD23 PAD12 PAD4 ADOGND PAD2 *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD A PROJECT : ZC3 Quanta Computer Inc Size Document Number Rev 1A NEW CARD &HOLE Date: B 1 1 1 PAD27 1 PAD17 *EMIPAD *EMIPAD HOLE3 HOLE2 HOLE19 H-C236D146I226A226P2H-C236D146I226A226P2*h-c276d118p2 1 1 PAD16 PAD14 HOLE18 h-c276d146p2 PAD1 *EMIPAD *EMIPAD 1 1 1 1 A HOLE10 *H-C276D98I138P2 PAD13 B2A:MB-IR-SUP-BKT-ZC1 PAD25 HOLE16 h-c276d146p2 1U-10V_4 1 HOLE1 *h-c276d118p2 HOLE17 *h-c276d118p2 ADOGND HOLE7 *h-c276d142p2 C952 4.7U-10V_8 *EMIPAD *EMIPAD PAD20 HOLE21 *h-c276d118p2 1 1 1 1 HOLE23 HOLE6 HOLE24 HOLE13 *h-c276bc315d118p2 *h-c276bc315d118p2 *h-c276bc315d118p2 *h-c276d118p2 C946 PAD33 PAD32 PAD31 *EMIPAD HOLE22 *h-c276bc315d118p2 1U-10V_4 2N7002 HOLE12 *H-C276BC315D118P2 HOLE8 h-c236d146p2 HOLE9 h-c236d146p2 C969 1U-10V_4 HOLE15 H-C236D146I186P2 HOLE4 *h-c236d142p2 HOLE11 H-C236D146I186P2 HOLE5 h-c236d146p2 HOLE14 *H-C236BC276D98I138P2 C974 NEW_SMCLK Q40 B 1 2,15,29,32 PCLK_SMB B2A:update footprint to H-C236D146I186P2 B2A:update footprint to h-c236d146p2 4.7U-10V_8 Thursday, June 08, 2006 Sheet 33 of 46 +1.8V 67mA 13.5mA 30mA 323mA 133mA +3V C71 C76 C100 1U_4 1U_4 U33 Change from 1.8K to 4.7K +3V C764 1U_4 SPVCC C65 1U_4 C771 1U_4 19 19 TX0M_EX TX0P_EX 19 19 TXCP_EX TXCM_EX EXT_SWING 49 EXT_RES ACRX2ACRX2+ 52 51 Rx2Rx2+ ACRX1ACRX1+ 55 54 Rx1Rx1+ ACRX0ACRX0+ 58 57 Rx0Rx0+ ACRXC+ ACRXC- 60 61 RxC+ RxC- 46 47 SDI+ SDI- 44 SPDIF/SDI/SD2 R92 1K_4 Improve signal swing MCLK/BCLK 43 WS/SYNC 37 C768 1U_4 HDMITX1+_OB HDMITX1-_OB 23 22 HDMITX0+_OB HDMITX0-_OB TXC+ TXC- 20 19 HDMICLK+_OB HDMICLK-_OB L72 HDMICLK-_OB1 HDMICLK+_OB1 SCLDDC SDADDC 11 12 HDMI_DDCCLK_1930 HDMI_DDCDATA_1930 HDMITX2+_OB HDMITX2-_OB TDVI_SCL TDVI_SDA R73 R72 *WCM2012-90 3HDMICLK-_OB2 2HDMICLK+_OB2 HDMITX2+_OB2 HDMITX1-_OB2 HDMITX0+_OB2 HDMITX0-_OB2 HDMICLK+_OB2 HDMICLK-_OB2 HDMI_DDCCLK HDMI_DDCDATA HDMIC_5V HDMI_HP_A TMDS_DDCCLK 19 TMDS_DDCDATA 19 For SiI1930,should be openned For SiI1932,should be connected 14 13 LSDA LSCL LSDA LSCL LINT# LINT# TEST 40 19 18 17 16 15 14 13 12 11 10 HDMITX2-_OB2 HDMITX1+_OB2 swap DDCCLK DDCDATA *0_4 *0_4 *0_4 TMDS_DDCCLK *0_4 TMDS_DDCDATA R74 R77 4 BAS316 37 36 DVI_TX1- 32 DVI_TX1+ 32 HDMITX0-_OB HDMITX0+_OB A2 A3 6B1 7B1 32 31 DVI_TX2- 32 DVI_TX2+ 32 HDMITX1-_OB HDMITX1+_OB 11 12 A4 A5 8B1 9B1 22 23 HDMITX2-_OB HDMITX2+_OB 14 15 A6 A7 46 45 19 20 0B2 1B2 A8 A9 2B2 3B2 41 40 4B2 5B2 35 34 HDMITX1-_OB1 HDMITX1+_OB1 6B2 7B2 30 29 HDMITX2-_OB1 HDMITX2+_OB1 10K_4 CN18 swap *WCM2012-90 3HDMITX2-_OB2 2HDMITX2+_OB2 *WCM2012-90 3HDMITX1-_OB2 2HDMITX1+_OB2 *WCM2012-90 3HDMITX0-_OB2 2HDMITX0+_OB2 D27 15,28,32 DOCKIN# 20 SHELL1 D2+ D2 Shield D2D1+ D1 Shield D1D0+ D0 Shield D0CK+ CK Shield CKCE Remote NC DDC CLK DDC DATA GND +5V HP DET SHELL2 SDO/SD0 35 RST/SD1 GND GND GND GND 36 10 41 45 R69 10K_4 DVI_TX0- 32 DVI_TX0+ 32 4B1 5B1 B2A:Mirror CN18(HDMI connector) pin define to meet cable define 17 SEL 13 16 21 24 28 33 39 44 49 53 55 57 GND GND GND GND GND GND GND GND GND GND GND GND GND GND EPD 8B2 9B2 25 26 VCC VCC VCC VCC VCC VCC VCC 10 18 27 38 50 56 TO docking DVI EZ4_DDCDATA 32 EZ4_DDCCLK 32 HDMICLK-_OB1 HDMICLK+_OB1 +5V D HDMITX0-_OB1 HDMITX0+_OB1 R28 TO SYSTEM HDMI R21 +3V 1.82K_4 1.82K_4 HDMI_DDCDATA HDMI_DDCCLK +3V Q1 uPA672T_DUAL TS3DV520RHUR FUN SEL 21 H B2 L B1 C-CD012A1D HDMI PORT U3 HDMITX2+_OB2 HDMITX2-_OB2 HDMITX1+_OB2 HDMITX1-_OB2 HDMI_HP_A RClamp0514M_AG HDMITX2+_OB2 10 10 HDMITX2-_OB2 9 VCC GND HDMITX1+_OB2 7 HDMITX1-_OB2 6 +5V HDMICLK-_OB B2A:change R500~R503 from 300 to 175 for HDMI B2A:remove L72~L75 for HDMI signal DVI_CLK- 32 DVI_CLK+ 32 43 42 A0 A1 DDCDATA DDCCLK DDCDATA DDCCLK R463 DB "short" and reserve common mode choke pads for EMI final tune HDMI_HPD R44 SGND SGND EPD 174/F_4 HDMICLK+_OB HDMICLK+_OB2 HDMICLK-_OB2 0_4 0_4 swap 26 25 SCK/LA2 SPGND R503 HDMITX0-_OB C +3V TMDS_HPD DDCCLK DDCDATA A1 1U_4 PGND1 PGND2 C767 HDMITX0+_OB HDMITX0+_OB2 HDMITX0-_OB2 TX0+ TX0- 10K_4 R43 HDMITX0+_OB2 HDMITX0-_OB2 F1 SiI1930 TQFP or QFN package Place close to the connector C3A:change R44 to 10K to meet HDMI plug spec U2 10 GND 10 HDMIC_5V C HDMITX0+_OB2 HDMITX0-_OB2 HDMICLK+_OB2 HDMICLK-_OB2 RClamp0514M_AG ESD4,ESD5 may be removed if can pass the ESD test w/o BLM11A601S_6 L71 HDMIC_5V_1 C720 these chips U1 HDMI_DDCDATA HDMI_DDCCLK HDMIC_5V HDMI_HP_A C719 10U/10V_8 Mount R7086, keep R7087 NC at the beginning Remove R7086, mount R7087 after VBIOS add SW_RST# function VCC HDMICLK+_OB2 HDMICLK-_OB2 POLY_SWITCH_1.1A 10K_4 59 53 65 HDMITX1-_OB 174/F_4 29 28 SCLROM SDAROM 63 174/F_4 42 16 33 MCLK 1U_4 R502 TX2+ TX2- SDSCL SDSDA AGND AGND AGND SPDIF HDMITX1+_OB R501 39 HDMITX1+_OB2 HDMITX1-_OB2 0_4 0_4 TX1+ TX1- 1U_4 174/F_4 C766 HTPLG 0_4 0_4 HDMITX0+_OB1 R10 HDMITX0-_OB1 R9 HDMICLK+_OB1 R8 HDMICLK-_OB1 R7 L13 BLM11A601S_6 C121 50 56 SiI1930 18 24 30 R500 1U_4 HDMITX1+_OB1 R12 HDMITX1-_OB1 R11 L75 HDMITX2-_OB1 HDMITX2+_OB1 L74 HDMITX1-_OB1 HDMITX1+_OB1 L73 HDMITX0-_OB1 HDMITX0+_OB1 HDMITX2+_OB HDMITX2-_OB C112 1U_4 SVCC0 SVCC1 21 27 62 AVCC0 AVCC1 SPVCC 64 34 15 38 48 OTPVCC VCC0 VCC1 VCC2 VCC3 17 32 31 C114 C113 1U_4 1U_4 C116 C115 1U_4 1U_4 C118 C117 1U_4 C119 1U_4 C120 1U_4 1U_4 C765 RESET# OVCC PVCC1 PVCC2 R116 R117 49.9/F_4 R115 R112 R113 R110 R114 49.9/F_4 49.9/F_4 49.9/F_4 49.9/F_4 RST# 390_6 C111 0_4 0_4 48 47 2B1 3B1 TX1M_EX TX1P_EX 49.9/F_4 R111 19 19 49.9/F_4 49.9/F_4 TX2M_EX TX2P_EX +1.8V R14 R13 HDMITX2+_OB2 HDMITX2-_OB2 10U/10V_8 R60 19 19 L15 BLM11A601S_6 SVCC +3V U13 PVCC3.3V 1U_4 HDMICLK-_OB HDMICLK+_OB swap HDMITX2+_OB1 HDMITX2-_OB1 C104 AVCC3.3V D BLM11A601S_6 0B1 1B1 NC NC NC NC PVCC3.3V C772 0_6 C770 C769 1U_4 10U/10V_8 R59 C774 1U_4 10U/10V_8 PVCC3.3V 10U/10V_8 +3V L85 C773 R476 4.7K_4 51 52 54 AVCC3.3V R515 4.7K_4 1U_4 1U_4 S C72 1U_4 G C77 +3V D PVCC1 PVCC2 SPVCC SVCC VCC 1U-10V_4 VCC 10 GND 10 HDMI_DDCDATA HDMI_DDCCLK HDMIC_5V HDMI_HP_A *RClamp0514M_AG Layout note:Place close to HDMI Conn +3V +3V uC_VCC 1U_4 C759 uC_RST R479 R478 2.2K_4 2.2K_4 R480 A1 A2 OE1 OE2 TMDS_DDCCLK TMDS_DDCDATA 19 TMDS_DDCCLK 19 TMDS_DDCDATA SN74CBTD3305C Mount R7108, keep R7114 NC at the beginning Remove R7108, mount R7114 after VBIOS add PRGM# function BOM ATMEL open SST stuff P0.0/A0 P0.1/A1 P0.2/A2 P0.3/A3 P0.4/A4 P0.5/A5 P0.6/A6 P0.7/A7 40 41 42 43 44 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 UC@AT89C51IC2-RLTIL R486 R483 GPU_GPIO_PRGM# PRGM# 0_4 PSEN- 26 ALE/PROG- 27 EA-/VPP 29 P3.0/RxD P3.1/TxD P3.2/INT0P3.3/INT1P3.4/T0 P3.5/T1 P3.6/WRP3.7/RD- 10 11 12 13 RXD TXD INT0 R507 1930_INT P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 P2.7/A15 18 19 20 21 22 23 24 25 T98 T99 P4.0 P4.1 P4.2/INT3# P4.3/INT2# 17 28 39 0_4 T102 T101 INT0_L R96 10K_4 R513 2K_6 C94 HWSDA R509 T96 T93 T94 T91 +3V R82 C93 U11 INT0_L 75/F_4 U34 1TPI_SCL HWSCL R481 AT@0_4 TPI_SCL HWSDA R508 AT@0_4 TPI_SDA VQFP44 SN74LV1G00DCK R482 0_4 DVSS PDN SPDIF C88 AVDD R AVSS 10 R64 MCKO1 MCKO2 26 25 MCKO1 R65 RX6 RX5 RX4 RX3 DAUX BICK SDTO LRCK 24 23 22 21 12 RX2 INT1 INT0 17 20 11 RX1 I2C P/SN 19 18 V/TX LSDA LSCL 29 28 30 27 16 15 14 13 C101 1U_4 SDA/CDTI SCL/CCLK XTI XTO *.1U-10V_4 15K_4 CAD1/CDTO CAD0/CSN R97 I2C ADDRESS = 20h 1K_4 22_4 R66 MCLK 1K_4 B R67 22_4 AU_INT R68 4.7K_4 +3V AK4113VF TPI_SCL_GATE 19 SN74LV1G00DCK +3V B2A:Change U11,U34 pin to GND,pin to +3V C62 SEL FUNCTION LOW IN_B0 HIGH 1U-10V_4 IN_B1 U9 DOCKING 32 +3V DVI_HPD HDMI connector +3V VCC DVI_HPD IN_B1 HDMI_HPD +3V +3V SEL COM GND IN_B0 PR_INSERT_5V 25,26,32 TMDS_HPD R33 100K_4 NC7SB3157P6X R504 10K_4 0_4 BLM11A601S_6 R477 10K_4 BOM ATMEL stuff SST open uC ATMEL(AT89C51IC2-RLTIL) SST(SST89V54RD2-33-C-TQJE) DVDD TVDD 1U_4 +3V SST@0_4 Open if use Atmel uC +3V R491 SPDIF_IN 32,36,37 SPDIF_OUT BOM ATMEL open SST stuff R493 19 TMDS_HPD_M56 RST# 1K_4 NP D3A:stuff R483 for HDMI update F/W C102 1U_4 PRGM# R487 +3V PRGM# HP_CTRL TPI_SCL R496 SST@0_4 51_uCSCL TPI_SDA R55 SST@0_4 51_uCSDA 3V_HDMI_SCL 3V_HDMI_SDA Open if use LSCL Atmel uC LSDA +3V 10K_4 19 GPU_GPIO_PRGM# T97 T95 T92 DDC_CTRL RST GND B2 4.7K_4 37 36 35 34 33 32 31 30 X2 16 B1 GND DDCDATA VCC Q34 DDCCLK X1 +5V B U35 X1_8051 15 22P-50V_4 X2_8051 14 +3V C105 C762 1U_4 38 Y6 11.0592MHZ SN74LV1G00DCK RST# 22P-50V_4 3 SN74LV1G00DCK VCC 2 uC_RST 5 0_4 L14 AVDD_AK4113 U14 10U/10V_8 R98 C753 10U/10V_8 ALINK_RST# 19 GPU_SWRST# +3V C56 C757 U16 10U/10V_8 11,14,18,29,32,33,38,39 BLM11A601S_6 +3V U17 +3V L83 +3V 10K_4 R99 HP_CTRL P1.2,P1.3 : Software I2C (SST) P4.1,P4.3 : Hardware I2C (ATMEL) R56 R497 2.2K_4 2.2K_4 4.7K_4 R511 1930_INT R510 R506 *0_4 AU_INT R505 0_4 LINT# 2.2K_4 R494 *10K_4 19 TPI_SDA 19 TPI_SCL 2.2K_4 LSCL LSDA A A C3A:change footprint form c0402-c to c0402 +3V R512 R499 *2.2K_4 *2.2K_4 3V_HDMI_SDA 3V_HDMI_SCL DDCDATA DDCCLK PROJECT : ZC3 HDMI_SDA & HDMI_SCL capacitance MUST less than 50PF Quanta Computer Inc Size Custom Document Number Date: Thursday, June 08, 2006 Rev 1A AK4113-SiI1930-uP(HDMI) Sheet 34 of 46 SATA HDD CN28 +3.3VSATA R392 0_8 C616 4.7U-10V_8 C628 4.7U-10V_8 C611 1U-10V_4 A +3V L48 HDD_VDD HDD_VDD +5V BK2125HS121-T_8 C592 C555 C591 C590 1U-10V_4 10 11 12 13 14 15 16 17 18 19 20 21 22 +3.3VSATA SATA_RXN0 16 SATA_RXP0 16 1U-10V_4 3.3V 3.3V 3.3V GND GND GND 5V 5V 5V GND RSVD GND 12V 12V 12V SATA_TXP0 16 SATA_TXN0 16 150U-6.3V_7343 1U-10V_4 A GND1 RXP RXN GND2 TXN TXP GND3 C16654-122A4-L_Serial_ATA BAY ID STATUS From SB B PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PDIOR# PDIOW# PDDACK# IRQ14 PHDRDY PDDREQ PDD[0 15] RBAYID0/ LBAYID0 SATA_RXN2 SATA_TXN2 RST_RBAY# RST_RBAY# PDD7 PDD6 PDD5 PDD4 C156 PDD3 PDD2 PDD1 PDD0 PDIOW# PHDRDY 1U-10V_4 +3V PDIOR# PDIOW# PDDACK# IRQ14 PHDRDY PDDREQ 16 16 16,17 16 16 16 39 PDA[2:0] R180 10K_4 40 IDELED# -RBAYINS D7 IRQ14 PDA1 PDA0 PDCS1# ODDLED# -RBAYINS BAS316 16 +3V PDCS1# PDCS3# PDCS1# PDCS3# 16 16 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 52 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 53 54 SATA_RXP2 16 SATA_TXP2 16 PDD8 PDD9 PDD10 PDD11 B RBAYID1/ LBAYID1 0 CN24 16 16 15 +5V PDA0 PDA1 PDA2 C Media Bay Connector 16 STATUS FDD HDD CD/DVD RBAYVCC PDD12 PDD13 PDD14 PDD15 PDDREQ PDIOR# C290 C297 1000P-50V_4 1U-10V_4 PDDACK# PDA2 PDCS3# RBAYID0 RBAYID1 RCSEL RBAYID0 RBAYID1 RBAYVCC C293 C305 1U-10V_4 1U-10V_4 15 15 NC FOR SLAVE B_-PDIAG R187 +3V R192 *0_4 470_4 A1A:Remove R192 for RBAYID C BAYCON_50P C2A:Stuff R1266,set ODD to Master B_-PDIAG R167 10K_4 +5V +5V R531 LBAYON_HDD# +5V *10K_4 C157 C158 C787 C786 1U-10V_4 1U-10V_4 1U-10V_4 1U-10V_4 Q36 *PDTC143TT +5V RBAYVCC RBAYVCC ADD DISCHARGE CIRCUIT C2A:Remove R139,R145 for RBAYVCC(FDD) 22_8 *0_8 *0_8 R159 R536 R542 Q39 Q37 AO4414 D Z1422 10K_4 Q38 RBAYON# RBAYON# 2N7002 D R540 +15V 15 2 C794 1U-50V_8 C793 C790 C218 1000P-50V_4 150U-6.3V_7343 1U-10V_4 C217 C792 1U-10V_4 1U-10V_4 PROJECT : ZC3 Quanta Computer Inc 2N7002 Size Document Number Rev 1A HDD & MEDIA BAY Date: Sheet Thursday, June 08, 2006 35 of 46 Option of External Volume Control or Standby Mode/De-Pop System MIC Docking MIC INT MIC R428 39.2K/F_6 10K_4 +5V_ADO FRONT-L FRONT-R TO Headphone AMP 10U-25V_1206 AVDD1 21 MIC1-L 37 MIC1-L 37 SYSTEM MIC 44 SURR-VREFO-R MIC2-R 17 MIC2_INT_R 37 45 MIC2-VREFO-R MIC2-L 16 MIC2_INT_L 37 MIC3-R 37 MIC3-L 37 MIC1_JD 37 SPDIFI/EAPD LINE2-L 14 48 SPDIFO Sense A 13 5.1k 10k 20k 39.2k 5.1k 10k 20k 39.2k 1% 1% 1% 1% 1% 1% 1% 1% Front out(pin35.36) Line1(pin23.24) Mic1(pin21.22) Surr out(pin39.41) Side out(pin45.46) Cen/Lfe out(pin43.44) Mic2(pin16.17) Line2(pin14.15) SENSEA R760 20K/F_6 R759 10K/F-6 LINEIN_JD INT MIC Docking MIC C 37 12 11 10 A A A A B B B B ADOGND PCBEEP LINE2-R 47 RESET# LINE2-VREFO-R 15 SYNC 46 1U-10V_4 37 MIC1-R 1U-10V_4 DVDD1 D 25 26 27 VREF AVSS1 29 28 MIC1-VREFO-L 30 MIC2-VREFO LINE1-VREFO-L 32 31 LINE2-VREFO 34 36 35 33 DCVOL Sense B MIC1-VREFO-R MIC1-L LINE1-L 1U-10V_4 *100P_6 *100P_6 *0_6 *0_6 *0_6 MIC1-R C1032 CX5LL121007 +3V D3A:remove R791 +3V R775 10K_4 U56 ADOGND 37 883_AMP_MUTE# 883_AMP_MUTE# PCBEEP CODEC-BITCLK ADOGND C1043 1U-16V_6 BEEP_1 R767 D3A:change to 1u CODEC-RESET# AZ_SYNCA AZ_SYNCA CODEC-RESET# ACZ_SDIN0_R AZ_SDOUTA R784 *10K_4 CODEC-BITCLK Tied at one point only under the codec or near the codec C1040 C1048 C1052 1U-10V_4 *22P_4 *22P_4 10P_4 R773 0_4 R779 22_4 R782 0_4 BEEP PCMSPK PCSPK SN74LVC1G86DCKR R771 PCMSPK 30 PCSPK 15 1K_4 D3A:change to ADOGND ADOGND C683 10K_4 C1059 10U-10V_8 C1060 C1036 R764 R791 R765 LINE1-L 22 Sense Sense Sense Sense Sense Sense Sense Sense SYSTEM AND DOCKING LINE IN C1033 DVDD2 32,34,37 SPDIF_OUT R789 0_4 SPDIF_OUT_883 SPDIF_OUT 23 MIC1-R 37 19 C LINE1-L LINE1-R 18 SDATA-IN 10U-25V_1206 LINE1-R LINE1-R CD-R ALC883 DVSS2 C709 1U-10V_4 Change to SENSEA,when docking HP insert,system speaker can be mute ADOGND 24 CD-L 43 37 ADOGND SURR-VREFO-L AVSS2 LINE_JD 100K_4 20 SURR-R 42 C687 1U-10V_4 32,37 HPSENCE_PR CD-GND 41 5.1K/F_6 2N7002 R427 C1034 C710 JDREF/NC BIT-CLK ADOGND 40 SDATA-OUT SURR-R +3V SURR-L SURR-R AVDD2 39 37 20K/F_6 38 DVSS1 R790 LINE1-VREFO-R GPIO1 SURR-L SURR-L TO SPEAKER AMP 1U-10V_4 Q26 R431 37 37 ADOGND C694 FRONT-R 55mA(AVDD=5.0V) +5V_ADO Vo=1.2*(R371+R372)/R371= 4.8V PR_MIC_IN 10U-25V_1206 100K_4 ADOGND R425 12K_4 Reserved only 32 C685 2N7002 ADOGND U57 FRONT-L R423 36K_4 GPIO0 G961-18ADJTEU(SOT89-5) C664 VIN ADJ VOUT GND VEN SENSEB U29 D Q25 MIC1-VREFO-L 37 Change to 5.1K/F R432 Change to 39.2K/F R439 +5V_ADO R414 0_6 SENSEA MIC1-VREFO-R 37 MIC3-VREFO-L 37 MIC2-VREFO-L 37 +5V_ADO +5V SENSEB B2A: for audio noise del L55,C657,C661,C1063,C675,C679,C1064 stuff U29,R414,R423,R425,C664 AZ_RESET# 15,37 AZ_SYNCA 15 AZ_SDIN1 15 B B AZ_BITCLKA 15 AZ_SDOUTA 15 A1A:Change AZ_SDIN1 series resistor from 33 to 22 ohm Change from 1UF to 4.7UF to meet vista performance requirement +3V_S5 For MDC Module C3A:change to 4.7k to avoid noise Headphone Amplifier U30 CN9 15 CD_SDOUTA_MDC 15 CD_SYNC_MDC 15 CD_SDIN0 15 CD_RESET#_MDC CD_SDOUTA_MDC CD_SYNC_MDC CD_SDIN0 R687 CD_RESET#_MDC 22_4 CD_SDIN1 11 GND AC_SDO GND AC_SYNC AC_SDI AC_RST# C973 RSV RSV 3.3V GND GND AC_BCLK 10 12 C686 1U/16V_6 FRONT-R CD_BITCLKA_MDC R426 4.7K_4 INL_4411 13 INL R429 4.7K_4 AOUTR_R_HP INR_4411 15 INR AOUTR_L_HP FRONT-L 1U-10V_4 MDC MAX4411ETP+ C672 1U/16V_6 15 R716 C958 37 *22_4 *10P_4 C972 R437 MUTE# D3A:change to 1U 0_4 C678 1U/10V_4 *10P_4 A PVSS_4411 14 18 SHDNR SHDNL C1P_4411 C1P C1N_4411 C1N PVSS SVSS EP EP EP EP EP 21 22 23 24 25 OUTL OUTR NC1 NC2 NC3 NC4 NC5 NC6 SVDD PVDD PGND SGND 11 12 16 20 10 19 17 A1A:Per FAE recommend,keep exposed pad floating HPL HPR HPL HPR L54 37 37 D3A:change form BLM11A601S to BLM18PG181SN1D +3V BLM18PG181SN1D_6 VCC3_4411 A C663 C666 1U/10V_4 QFN20-4X4-5-25P C673 1U/10V_4 10U-10V_8 PROJECT : ZC3 ADOGND ADOGND ADOGND Quanta Computer Inc Size Custom Document Number Date: Thursday, June 08, 2006 Rev 1A ALC883 & MDC & HP AMP Sheet 36 of 46 +5V_ADO C1103 place near U7012(MAX9710) pin 12 R781 100K_4 R436 32,34,36 SPDIF_OUT 9710 MUTE SYSTEM LINE OUT/SPDIF If only provide power,led don't light(省 SPDIFO 0_4 ) +3V_SPD +5V_ADO Q46 Speaker Amplifier MAX9710 D3A:del L109 ,c1028 to avoid noise MUTE# C1037 LINEOUT_JD: HP not insert->H HP insert->L C3A:add R818,R819 to aviod noise 10U/10V/X5R_8 1U-10V_4 2N7002 R769 1U/10V_4 FRONT-L_1 ADOGND R762 15K/F_6 12 18 +5V_ADO R783 C1047 1U/10V_4 11 15 20 ADOGND 10K_4 15,36 AZ_RESET# D32 MTW355 39 EC_AMP_MUTE# D33 MTW355 36 883_AMP_MUTE# D31 MTW355 ADOGND MUTE# 9710 MUTE +5V_ADO 14 R778 0_4 36 36 36 MAX9710ETP+ INL OUTL+ OUTL- 19 17 EP EP EP EP EP EP 21 22 23 24 25 26 NC NC NC NC 16 13 10 VDD PVDD PVDD BIAS PGND PGND PGND PGND MUTE SHDN# OUTROUTR+ INR INSPKL+ INSPKL- HPL HPR HPL HPR 36 SURR-R R787 15K/F_6 R788 75/F_4 75/F_4 L62 L61 R438 R435 *1K_4 *1K_4 BK1608LL121_6 BK1608LL121_6 C695 470P-50V_4 T90 HPL_SYS HPR_SYS C696 10 SPDIFO 470P-50V_4 ADOGND LED Drive IC 2SJ-A001-103_SPDIF ADOGND Normal OPEN Jack ADOGND INSPKRINSPKR+ +5V D25 Q48 AO3403 LINEOUT_JD 1U/10V_4 FRONT-R_1 R818 R819 MAX9710 : QFN Pin21 Don"t forget ThermalPAD Over Vias to GND QFN20-5X5-65-26P C1062 D CN13 15K/F_6 U58 FRONT-L_2 BLACK 15K/F_6 +3V FRONT-R_2 C3A:for turn off spdif when no jack insert +3V_SPD Av = 2*(RF/RIN)=2 * (RF/15K) select R7143, R7147 according to the Gain *DA204U LINEOUT_JD C1042 SURR-L Pin5 connect to Pin3 on Jack LINEOUT_JD ADOGND 36 C704 1U-10V_4 Av = 2*(RF/RIN)=2 * (RF/15K) D C693 For ESD close to audio out connecter Reserved only,when performance can meet vista requirement,pls delete it C3A:stuff for EMI SPEAKER D3A:remove R794 CN12 INSPKR+ INSPKRINSPKL+ INSPKL- L57 L58 L59 L60 BK1608LL121_6 BK1608LL121_6 BK1608LL121_6 BK1608LL121_6 INSPKR+N INSPKR-N INSPKL+N INSPKL-N C703 25 36 C702 C701 C R794 R786 C1066 C1049 +5V_ADO LINE_JD *0_6 *0_6 1U-10V_4 1000P-50V_4 HPL_SYS R443 HPR_SYS R442 0_4 SPKL_SYS 0_4 SPKR_SYS SPKL_SYS 32 SPKR_SYS 32 C700 R809 10K_4 +5V_ADO Q49 ADOGND 47P-50V_4 47P-50V_4 47P-50V_4 47P-50V_4 LINE_JD 36 C 2N7002 R810 85204-04001_SPEAKER-CON 22K_4 Q50 2N7002 ADOGND LINEOUT_JD ADOGND ADOGND B B SYSTEM MIC 36 MIC1-VREFO-L SYSTEM LINE IN 36 BLUE 36 MIC1-VREFO-R CN15 36 36 LINE1-L LINE1-R C699 1U-16V_6 LINE1-L_1 L66 BK1608LL121_6 LINEINL_SYS C698 1U-16V_6 LINE1-R_1 L65 BK1608LL121_6 LINEINR_SYS C714 36 C715 LINEIN_JD MIC1-L 36 MIC1-R R445 C706 R444 C705 PINK 2.2K_4 CN16 1U-16V_6 MIC1_L1 L68 BK1608LL121_6 2.2K_4 MIC1_R1 L67 BK1608LL121_6 MIC1_R 36 1U-16V_6 C711 MIC1_JD 010164FR006G176JL C712 470P-50V_4 470P-50V_4 MIC1_L Normal OPEN Jack 470P-50V_4 010164FR006G176IL 470P-50V_4 ADOGND Normal OPEN Jack INT MIC ADOGND CN7 +5V D24 LINEIN_JD LINEINL_SYS L64 BK1608LL121_6 LINEINL_PR LINEINR_SYS L63 BK1608LL121_6 LINEINR_PR A C1073 C1074 1U-10V_4 1U-10V_4 LINEINL_PR 32 LINEINR_PR 32 MIC2_INT Docking LINE IN For ESD close to audio out connecter R288 85204-0200L_INT_MIC 36 MIC2_INT_L 36 MIC2_INT_R 36 MIC1_JD C3A:change to GND , remove R284, change c498 to 1u *DA204U For ESD close to audio out connecter MIC2-VREFO-L 1U-16V_6 1U-16V_6 1U-10V_4 *DA204U A ADOGND Docking MIC C3A:add c1073,c1074 to avoid noise 36 MIC3-VREFO-L ADOGND C501 C502 C498 ADOGND 36 MIC3-L 36 MIC3-R R433 2.2K_4 C1030 1U-16V_6 PR_MIC C1031 1U-16V_6 C1076 PR_MIC 32 PROJECT : ZC3 D3A:add 1u to avoid noise Quanta Computer Inc .1U-10V_4 ADOGND +5V D26 2.2K_4 Size C Document Number Date: Thursday, June 08, 2006 Rev 1A SPEAKER AMP / JACK Sheet 37 of 46 +3V C28 C45 *22_4 PCLK_SIO 14,29,39 LAD0/FWH0 14,29,39 LAD1/FWH1 14,29,39 LAD2/FWH2 14,29,39 LAD3/FWH3 14,17,29 PCLK_SIO +3V 14 14,17,29,39 LFRAME#/FWH4 R474 11,14,18,29,32,33,34,39 10K_4 ALINK_RST# 14,30,39 SERIRQ D29 15,30 SUS_STAT# LDRQ#0 14,30,39 CLKRUN# *BAS316 BADDR:0 ->Index-Data pair at 2Eh~2Fh(ZC3 setting) MDTR1# R27 10K_4 BADDR:1 ->Index-Data pair at 164Eh-164Fh(default) MRTS1# R32 *10K_4 B2A:Stuff R27,set PC87383 I/O to 2E/2F MTXD1 R31 *10K_4 C48 1U-10V_4 10U-10V_8 45 32 11 NC 17 NC STRAP PINS VDD *10P_4 VDD R40 VDD C52 D NC NC 18 1U-10V_4 U8 MDTR1# (PC87383's BADDR) LAD0/FWH0 42 LAD0 GPIO00 15 LAD1/FWH1 46 LAD1 GPIO01 16 LAD2/FWH2 51 LAD2 GPIO02 19 LAD3/FWH3 53 LAD3 GPIO20 23 PCLK_SIO 33 LCLK GPIO03 20 LDRQ#0 22 LDRQ/XOR_OUT GPIO04 21 LFRAME#/FWH4 38 LFRAME GPIO05 40 ALINK_RST# 35 LRESET GPIO06 SERIRQ 36 SERIRQ GPIO07 41 SUS_STAT_3V# 29 LPCPD/GPIO21 CLKRUN# 27 CLKRUN/GPO22 CLKIN 58 INIT# 56 INIT ERROR# 54 ERR NS PC87383 +5V C43 C46 C51 C29 C50 C49 C53 C44 C35 C752 C39 C749 C36 C34 C21 C42 C38 *180P_4 *180P_4 *180P_4 *180P_4 *180P_4 *180P_4 *180P_4 *180P_4 *180P_4 *180P_4 *180P_4 *180P_4 *180P_4 *180P_4 *180P_4 *180P_4 *180P_4 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 SLCT ERROR# SLIN# PE INIT# AFD# STRB# ACK# BUSY SIO_14M D SIO_14M RN1 R472 4.7K_4 SLIN# R464 4.7K_4 PE R468 4.7K_4 INIT# R461 4.7K_4 AFD# R24 4.7K_4 STRB# R471 4.7K_4 ACK# R470 4.7K_4 BUSY 32 32 PE ACK/GPO24 14 STB_WRITE/TEST SLIN# 55 SLIN_ASTRB CTS1/GPIO11 MCTS1# 32 SLCT 24 SLCT DCD1/GPIO16 59 MDCD1# 32 32 C PE 25 PE DSR1/GPIO15 60 MDSR1# PD7 30 PD7/PGIO23 RTS1/GPIO13 62 MRTS1# 32 PD6 34 PD6 SIN1/GPIO14 61 MRXD1 32 PD5 37 PD5 SOUT1/GPIO12 63 MTXD1 32 PD4 39 PD4 RI1/GPIO10 MRI1 32 PD3 PD3 DTR1_BOUT1/BADDR MDTR1# 32 PD2 43 PD2 PD1 50 PD1 PD0 52 PD0 PD[0 7] PC87383-VS NC ERROR# SLCT C748 *10P_4 64 4.7K_4 SLIN# 32 28 STRB# NC R473 32 IRMODE ACK# 49 SLCT ACK# STRB# 10 +3V AFD_DSTRB/TRIS IRRX2_IRSL0/GPIO17 R469 *22_4 10K_4 57 NC 4.7K_4 32 32 IRTXOUT AFD# 48 R34 AFD# IRRX BUSY_WAIT NC PD3 PD7 32 IRTX 26 47 4.7K_4 4.7K_4 BUSY VCORF 4.7K_4P2R_S R26 R475 32 IRRX1 BUSY VSS PD5 PD6 ERROR# 13 4.7K_4P2R_S RN3 C 32 R25 VSS PD2 PD4 INIT# 44 4.7K_4P2R_S RN2 32 31 PD0 PD1 VSS 12 C22 B B 1U-10V_4 FIR +3V U31 IRTXOUT IRRX IRMODE TXD RXD SD GND T = 20mil VCC MODE LED_C LED_A C1067 C1071 C1069 1U-10V_4 10U-10V_8 10U-10V_8 VISHAY_TFDU6102_8P +5V_FIR +3V T = 20mil R447 5.6_1206 R452 5.6_1206 A1A:Change to +3v,prevent FIR noise impact audio quality A C1070 A 10U-10V_8 PROJECT : ZC3 Quanta Computer Inc Size Document Number Date: Thursday, June 08, 2006 Rev 1A SIO (87383) Sheet 38 of 46 BADDR1-0 0 1 1 +3V R357 I/O Address Index Data 2E 2F 4E 4F (HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1 Reserved ZC3 setting 10K_4 HWPG_SYS D18 MTW355 43 HWPG_1.8V D17 MTW355 42 HWPG_1.2V D16 MTW355 D20 MTW355 D19 MTW355 44 +3VPCU LDRQ#(pin 8) internal is +3VPCU 14,30,38 SERIRQ LFRAME#/FWH4 LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 PCLK_591 14,17,29,38 LFRAME#/FWH4 14,29,38 LAD0/FWH0 14,29,38 LAD1/FWH1 470K_4 14,29,38 LAD2/FWH2 14,29,38 LAD3/FWH3 14,17 PCLK_591 R307 PCLK_591 15 15 R308 *22_4 C519 *10P_4 C 15 SCI# GATEA20 15 RCIN# 40 40 40 40 40 40 40 40 MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 D12 *MTW355 SCI# GATEA20 RCIN# D14 D13 BAS316 BAS316 15 14 13 10 18 19 22 23 SERIRQ LDRQ LFRAME LAD0 LAD1 LAD2 LAD3 LCLK LREST SMI PWUREQ 31 IOPD3/ECSCI GA20/IOPB5 KBRST/IOPB6 MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 71 72 73 74 77 78 79 80 KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7 MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68 KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15 AD Input 110 111 114 115 116 117 118 119 PSCLK1/IOPF0 PSDAT1/IOPF1 PSCLK2/IOPF2 PSDAT2/IOPF3 PSCLK3/IOPF4 PSDAT3/IOPF5 PSCLK4/IOPF6 PSDAT4/IOPF7 591_32KX1 158 32KX1/32KCLKOUT 591_32KX2 160 32KX2 RP21 JTAG debug port 32 32 32 32 40 40 40 40 MSCLK MSDATA KPCLK KPDATA TBCLK TBDATA CAPSLED# NUMLED# TBCLK TBDATA CAPSLED# NUMLED# B R331 20M_6 PS2 interface A1A:Per FAE recommend,change to 33K A1A:Per FAE recommend,change to 5.6p 29 RF_EN 29 BT_POWERON# 15 RSMRST# 25 CCD_POWERON# 41 VRON 32,42,43,44,46 MAINON 32,43,44 SUSON 43,44 S5_ON BT_POWERON# VRON MAINON SUSON S5_ON CS# PR_STS 62 63 69 70 75 76 IOPJ2/BST0 IOPJ3/BST1 IOPJ4/BST2 IOPJ5/PFS IOPJ6/PLI IOPJ7/BRKL_RSTO 148 149 155 156 27 28 IOPM0/D8 IOPM1/D9 IOPM2/D10 IOPM3/D11 IOPM4/D12 IOPM5/D13 IOPM6/D14 IOPM7/D15 IOPH0/A0/ENV0 IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1 IOPH4/A4/TRIS IOPH5/A5/SHBM IOPH6/A6 IOPH7/A7 124 125 126 127 128 131 132 133 ENV0 ENV1 BADDR0 BADDR1 TRIS SHBM A6 A7 PORTI IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7 138 139 140 141 144 145 146 147 D0 D1 D2 D3 D4 D5 D6 D7 PORTJ-1 IOPJ0/RD IOPJ1/WR0 150 151 RD# WR# SELIO 152 173 174 47 SEL0 SEL1 CLK LED5 330_4 ECPWRLED PC97551 PWRLED# 40 17 35 46 122 159 167 137 R586 PORTL GND1 GND2 GND3 GND4 GND5 GND6 GND7 A1A:Reserved for debug use +3VPCU PORTK A1A:Remove REFON pin ( DA3 pin 102 ) R315 R313 R312 R311 4.7K_4 4.7K_4 4.7K_4 4.7K_4 WIRELESS_SW# R658 4.7K_4 BLUETOOTH_SW# R663 ENV0 ENV1 BADDR0 BADDR1 TRIS SHBM A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 CRT_IN#_EC 26 CPU_EC_PROCHOT# LID591# 15,25,40 MBCLK 19,45 MBDATA 19,45 ALINK_RST# 11,14,18,29,32,33,34,38 LID591# MBCLK MBDATA ECCLK ECDATA FANSIG D15 EC_FPBACK# PWROK_1 R306 ECCLK 13 ECDATA 13 DNBSWON# 15 FANSIG 13 BAS316 A1A:Change EC_FPBACK# to IOPC6 EC_FPBACK# 25 EC_PWRGD 5,14,15 0_4 ACIN CLKRUN# A8 A9 A10 A11 A12 A13 A14 A15 IOPL0/A16 IOPL1/A17 IOPL2/A18 IOPL3/A19 IOPL4/WR1 113 112 104 103 48 A16 A17 A18 A19 45 21 20 19 18 17 16 15 14 36 40 13 37 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 22 24 CE# OE# WE# D0 D1 D2 D3 D4 D5 D6 D7 25 26 27 28 32 33 34 35 RESET#/NC RY/BY#/NC NC1 NC2 NC3 10 12 29 38 11 VCC VCC 31 30 GND GND 23 39 D0 D1 D2 D3 D4 D5 D6 D7 C VCC1_PWROK T143 +3VPCU SST39VF080-70-4C-EIE_1M BIOS ST Micro M29W008AB/AMD-29LV081B/SST39VF080 +3VPCU 14,30,38 R621 *10K_4 VCC1_PWROK C920 *.1U_4 B U45 M/A# CELL-SET D/C# BL/C# 143 142 135 134 130 129 121 120 SST 1MB BIOS (AKE35ZAKK17) NBSWON# 40 SUSB# 15 CLKRUN# IOPK0/A8 IOPK1/A9 IOPK2/A10 IOPK3/A11 IOPK4/A12 IOPK5/A13/BE0 IOPK6/A14/BE1 IOPK7/A15/CBRD CS# RD# WR# A1A:Change to EC_PWRGD ACIN 4.7K_4 U46 NB_PWRGD 5,11 -RBAYINS 35 EC_AMP_MUTE# 37 +1.2V_ON 42 NBSWON# SUSB# 41 42 54 55 CC-SET 45 CV-SET 45 CONTRAST 25 CPUFAN# 13 A1A:CRT detect pin(default disable) 44 24 25 PORTM 10K_4 R362 MBCLK MBDATA ECCLK ECDATA B2A:Change +1.2V_ON to IOPA7 IOPE4/SWIN IOPE5/EXWINT40 IOPE6/LPCPD/EXWIN45 IOPE7/CLKRUN/EXWINT46 IOPD4 IOPD5 IOPD6 IOPD7 *10K_4 SHBM SHBM=1: Enable shared memory with host BIOS +3VPCU WIRELESS_SW# 40 BLUETOOTH_SW# 40 SUSC# 15 -RBAYINS 26 29 30 PORTD-2 PORTJ-2 10K_4 BADDR1 R361 B2A:Stuff R360,set EC I/O to 4E/4F SOUTH BRIDGE T66 T67 D/C# BL/C# 45 45 CS# RD# WR# 12 11 10 27 26 23 25 28 29 30 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 22 24 31 CE# OE# WE# 13 14 15 17 18 19 20 21 D0 D1 D2 D3 D4 D5 D6 D7 VPP A18 VCC 32 GND 16 D0 D1 D2 D3 D4 D5 D6 D7 +3VPCU C947 1U-10V_4 *PLCC32_BIOS NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 C539 5.6P-50V_4 PWRLED# PR_STS USBON# SUSLED# AGND CHANGED FROM PR_INSERT# 40 32 29 40 40 BATLED0# C533 40 BATLED1# 5.6P-50V_4 10K_4 BIU configuration should match flash speed used 11 12 20 21 85 86 91 92 97 98 32.768KHZ 96 33K/F_6 EZ_CLKREQ_R# IOPD0/RI1/EXWINT20 IOPD1/RI2/EXWINT21 IOPD2/EXWINT24 PORTH 591_32KX3 32 33 36 37 38 39 40 43 R359 BADDR0 R360 50 mS +3V 168 169 170 171 172 175 176 R325 Y2 CC-SET CV-SET CONTRAST IOPC0 IOPC1/SCL2 IOPC2/SDA2 IOPC3/TA1 IOPC4/TB1/EXWINT22 IOPC5/TA2 IOPC6/TB2/EXWINT23 IOPC7/CLKOUT 4.7K_8P4R_S PORTE 99 100 101 102 D +3VPCU TEMP_MBAT 45 T72 WIRELESS_SW# BLUETOOTH_SW# SUSC# HWPG 153 154 162 163 164 165 PORTD-1 TINT TCK TDO TDI TMS 81 82 83 84 87 88 89 90 93 94 TEMP_MBAT TEMP_ABAT IOPB0/URXD IOPB1/UTXD IOPB2/USCLK IOPB3/SCL1 IOPB4/SDA1 IOPB7/RING/PFAIL PORTC 1U-10V_4 Should have a 0.1uF capacitor close to every GND-VCC pair + one larger cap on the supply NORTH BRIDGE IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7 PORTB C525 1U-10V_4 ENV1 DA0 DA1 DA2 DA3 Key matrix scan C535 1U-10V_4 HWPG DIRECTLY DA output PWM or PORTA C527 1U-10V_4 HWPG ===> NB_PWRGD ===> EC_PWRGD AD0 AD1 AD2 AD3 IOPE0AD4 IOPE1/AD5 IOPE2/AD6 IOPE3/AD7 DP/AD8 DN/AD9 Host interface 105 106 107 108 109 +5V KBSMI# KBSMI# SWI# 15 no use SERIRQ HWPG_VGA C564 10U-10V_8 U27 10U-10V_8 41,42 CPU_COREPG C605 C522 C530 1U_4 46 95 VCC GND 24LC08BT_SOIC C600 1U-10V_4 161 +3V VBAT C529 1U-10V_4 AVCC WP C524 1U-10V_4 A0 A1 A2 34 45 123 136 157 166 SCL SDA 0_6 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 16 MBCLK MBDATA R368 VDD D +3VPCU 591_AVCC +3VPCU U26 VCCRTC +3VPCU LED_G_LTST-C190KGKT A A C523 1U-16V_6 NBSWON# NBSWON# SW3 D3A:del R317 ,Q22, stuff R314 +3V +3VPCU PROJECT : ZC3 R314 40 FOR 97551 ONLY Quanta Computer Inc 4.7K_4 INTERNAL PULLUP IN SB 2,32 EZ_CLKREQ# Q22 *PDTC143TT Size EZ_CLKREQ_R# Document Number Rev 1A 97551 & FLASH Date: Sheet Thursday, June 08, 2006 39 of 46 INT K/B REVB CN4 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 D MY15 MY14 MY13 MY12 MY11 MY10 MY9 MY8 MY7 MY6 MY5 MY4 MY3 MX7 MX6 MY2 MX5 MX4 MX3 MX2 MY1 MY0 MX1 MX0 MY15 MY14 MY13 MY12 MY11 MY10 MY9 MY8 MY7 MY6 MY5 MY4 MY3 MX7 MX6 MY2 MX5 MX4 MX3 MX2 MY1 MY0 MX1 MX0 RP3 MX7 MX6 MX5 MY0 MY1 MY2 MX4 MY3 MY4 MY5 MY6 MY7 MY8 MX3 MY9 MX2 MX1 MY10 MY11 MX0 MY12 MY13 MY14 MY15 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 +3VPCU P/N&FT CHANGE MY0 MX5 MX6 MX7 10 MY2 MY1 MX4 MY3 MY1 MY2 MX4 MY3 MY12 MY13 MY14 MY15 MX1 MY10 MY11 MX0 CA2 220P-50V_8P4C CA3 220P-50V_8P4C MY7 MY6 MY5 MY4 CA6 220P-50V_8P4C CA4 220P-50V_8P4C MX2 MY9 MX3 MY8 220P-50V_8P4C CA1 220P-50V_8P4C MY0 MX5 MX6 MX7 10K_10P8R RP5 MX0 MY11 MY10 MX1 10 +3VPCU MY13 MY12 MY14 MY15 CA5 10K_10P8R RP4 MY7 MY6 MY5 MY4 10 MX3 MY8 MY9 MX2 D 10K_10P8R PTWO_KB TOUCH PAD 20 MIL SW2 L35 C380 1U-10V_4 WIRELESS_SW# 39 WIRELESS_SW# R228 10K_4 10K_4 BLUETOOTH_SW# 39 BLUETOOTH_SW# CONNECT TO TP/B CN5 L36 L37 TBDATA TBCLK TP_DATA TP_CLK LZA10-2ACB104MT_6 LZA10-2ACB104MT_6 C379 C378 *.1U_4 *.1U_4 SLIDE_SWITCH_BT 1U-10V_4 TOP CONTACT C 39 39 C718 SW1 C3A:change form low active to high Mini card WLAN LED low active(LED5) LED4 R449 330_4 LED_Y_LTST-C190KFKT +3VPCU CN1 BK2125HS330_8 R229 To BUTTON board SLIDE_SWITCH_WL +3VPCU +5V_TP +5V WIRELESS_LED TOP CONTACT 29 88264-04XX-4P-R_MB TO TP/B active 10 11 12 13 14 15 16 MX0 MX1 MX2 MX3 MY10 NBSWON# CAPSLED EMAIL_LED IDE_LED NUMLED PWRLED# LID591# MX0 MX1 MX2 MX3 MY10 NBSWON# 39 39 39 39 39 39 eManager Launch Manager Internet E-mail C Power PWRLED# 39 LID591# 15,25,39 88502-160N-16P-L_BUTTON +3V D3A:change 330 to 150 +5V 330_4 LED3 LED_B_LTST-C190TBKT BT_LED 29 R41 150_4 A1A:Change footprint to LEDLTST-C190TGKT R47 IDE_LED R448 10K_4 A1A:Change R49,R51from 220 to 150 increase LED brightness 35 IDELED# IDELED# 2N7002 Q4 +3V +3V B B R49 150_4 +3V SUSLED# PWRLED# SUSLED# 39 39 NUMLED# 2N7002 Q7 NUMLED# 2 R45 2N7002 Q5 10K_4 PWRLED# 39 1 330_4 R450 Q6 10K_4 LED1 +3VPCU R46 NUMLED LED_G/Y_LTST-S326KGJSKT 16 SATA_LED# 2N7002 LED2 330_4 BATLED1# BATLED0# +3V BATLED1# 39 BATLED0# 39 R451 R50 +3V 330_4 LED_G/Y_LTST-S326KGJSKT EMAIL_LED R51 A1A:Change LED footprint to ledltst-s326kgjskt-3p-zc1 15 EMAIL_LED# EMAIL_LED# 150_4 CAPSLED 2N7002 Q8 CAPSLED# CAPSLED# 2N7002 Q9 39 A A PROJECT : ZC3 Quanta Computer Inc Size Document Number Rev 1A SWITCH,LED,K/B,TP Date: Sheet Thursday, June 08, 2006 40 of 46 +5VPCU +5VPCU PR71 2 38 SHDN GND GND GND GND GND 45 44 43 42 41 GND 18 CSP1 CSP2 16 15 FB 11 0_4 PR60 0_4 8774SKIP# 39 8774DL1 PR42 20K/F_6 PC27 SKIP 470P_50V_4 CCI PC28 470P_50V_4 8774CCV CCV PR52 1.5K/F_6 GNDS 12 PC33 1000p/50V_4 8774DH2 8774BST2 20 PR75 0_6 PR56 100K/F_4 VRHOT# PQ26 AOL1414 VRHOT POUT LX2 22 DL2 24 CSP2 CSN2 13 14 PGND2 23 8774LX2 + + + B 12/2 MODIFY 10K/F_6 THRM PR82 1.62K/F PL14 0.36UH PR83 3.01K/F PR85 NTC 10K_6-B4.25K PR45 8774CSN1 8774CSN2 PQ27 AOL1412 PC30 470P_50V_4 10K/F_6 THRM PC35 PR54 POUT + PC43 22U/25V_6 +5VPCU 8774VCC + PC108 PC106 PC111 PC109 PC113 PC112 560U/2.5V 560U/2.5V 560U/2.5V 560U/2.5V 560U/2.5V 560U/2.5V BST2 + PC110 470U/25V PC24 470P_50V_4 0_6 PC104 10U/25V_12 PQ11 2N7002E PR76 PC105 10U/25V_12 OFS PC102 1U/50V_6 PD6 RB500 21 VCC_CORE VIN_8774 PC103 2200P/50V_4 PSI# PR61 10/F_6 +5VPCU PR43 301K/F_6 DH2 PC107 COREFB+V COREFB- 10/F_6 PR51 8774OFS PC29 1000p/50V_4 + REF 31.6K/F_4 B VCC_CORE PR41 10/F_6 8774GNDS C3A:change form 169K to 301K *1000P_4 1U/50V_6 8774REF 10 22U/25V_6 C 22U/25V_6 PR55 PC26 PC25 8774CSP1 8774CSP2 TIME PR84 NTC 10K_6-B4.25K PC38 71.5K/F_6 8774TIME PR80 3.01K/F 4/21 change PC50 *2200P_4 PR47 *1.5K/F_6 PR48 PR81 1.62K/F 27 26 PGND1 DL1 IC D5 40 PL15 0.36UH D4 36 PR63 35 PQ28 AOL1412 VCC_CORE D3 PSI# 34 VRON PC44 22U/25V_6 39 8774LX1 0_6 28 PC48 0_6 PR66 LX1 PC52 PR68 D5 D2 PQ29 AOL1414 D4 33 30 C D3 0_6 BST1 VID5 0_6 PR70 D1 VID4 PR72 D0 32 8774DH1 D2 31 PR78 0_6 8774BST1 VID3 0_6 PR77 0_6 PC46 PL1 HI0805R800R-00_8 5 0_6 PR74 29 PC47 VID2 PR79 D1 DH1 PC51 D0 PWRGD 10U/25V_12 VID1 TON D VIN 10U/25V_12 VID0 PHASEG PL2 HI0805R800R-00_8 VIN_8774 10U/25V_12 TWO-PH 17 4.7U/10V/X5R_8 1U/50V_6 0_6 37 PC45 2200P/50V_4 PR49 39,42 CPU_COREPG 25 19 PR40 10K/F_6 B2A:Stuff PR40 for CPU PWRGD PD7 RB500 PR50 200K/F_4 VDD 100K/F_4 10/F_6 PC42 2.2U/10V/X5R_8 VCC PR65 0_6 PR73 +3V D 8774VCC 22U/25V_6 MAX8774 PU5 PC49 *2200P_4 4/21 change PR44 *NTC 10K_6-B4.25K A A PROJECT : ZC3 Quanta Computer Inc Size Document Number Rev 1A CPU CORE MAX8760 Date: Thursday, June 08, 2006 Sheet 41 of 46 VIN-1.2V PL9 VIN HI0805R800R-00_8 PC83 FBK PGOOD ILIM VSSA PGND NC TPAD 17 14 NC 18 + + DL-1.2V B2A:Change PC79 footprint to RC0603 PR103 14K/F_6 PC79 *33p/50V_6 1.2V_FB PC100 *470u/2.5V_7343 PC101 560U/2.5V 3/27 DEL PR104 10K/F_6 PC18 10U/6.3V_6 21 PC75 +1.2V 22K_6 GND GND DL B2A:Remove JP3,4 LX-1.2V PR11 10 VDDP B2A:Change PL13 from 1.5uH to 2.5 uH PL13 2.5uH-MSCDR1-104R VCCA DH-1.2V 2 PC76 PC80 1 0_6 11 GND HWPG_1.2V LX 20 PR105 39 DH VOUT GND PR13 10K/F_6 VIN 12 PL12 *3R3UH 1 13 PQ25 FDS6900AS 16 PC77 1U/50V_6 BST EN/PSV 19 +3V PU8 SC411MLTRT 15 *10K_4 10U/25V_1206 D 4.7U/6.3V_6 PR9 10U/25V_1206 PC74 SW1010C PD12 *.1u/25V_6 G1 0_4 1U/50V_6 PC11 S1/D2 39,41 CPU_COREPG PR8 PC82 PC89 D1 +1.2V_ON G2 10/F_6 PR101 1M_6 39 D1 S2 AMD power sequence: VDDIO (+1.8VSUS), VTT (+0.9V_VTER), VDD (CPU core power), and VLDT (+1.2V) D +5V_S5 PR10 VOUT=(1+R2/R3)*0.5 1U/50V_6 1000p/50V_4 47u/10V_6 C C VIN +1.2V PR20 1M/F_4 PR35 22_8 +3V PR57 +1.8VSUS PR69 A1A:Add PR69 for G966_VIN,change source to +1.8VSUS 1.2V_ON_G 0_6 3 100K/F_4 +5V +1.2V_VPCIE +1.2V_VPCIE PU4 46 VDDCPG 32,39,43,44,46 MAINON PCIEVDDRPG PQ9 2N7002E 0_4 *0_4 G966_VIN 1 1M/F_4 PQ3 DTC144EUA PR59 PR62 PC37 PC39 PC36 B VPP VIN VEN POK G966 VO ADJ NC GND PR64 PR58 1U-10V_4 10U-10V_8 *.1U-10V_4 45.3K/F_4 PC41 10U-10V_8 B 91K_4 3/27 Change to +3V MAINON PR91 Max Power Consumption 1.6W PU3 PR53 *0_6 +3VSUS PC31 1U_6 A PC32 10U-10V_8 GND0 VO EN VO VIN GND1 VIN GND2 AT815 PC34 1U-50V_6 0.8V GND0 VO EN VO VIN GND1 VIN GND2 AT815 PC59 1U/50V_6 PC60 10U/10V/X5R_8 PC21 1U-50V_6 PR90 10K/F_6 R2 R1 3/27 Change P/N +1.5V PC63 1U/50V_6 PC61 22U/6.3V_8 VPCIE-ADJ PR38 10.2K/F_4 R2 PU7 R1 PR92 2.15K/F_6 A Vout=1.24*[1+(R1/R2)] 3/27 Change P/N Vout=1.24*[1+(R1/R2)] PROJECT : ZC3 Quanta Computer Inc A1A:Change PU3 p/n CS33242FB19 PR37 10K/F_4 PC58 1U/50V_6 +2.5V PC22 22U/6.3V_8 VTT-ADJ 10K_6 +3V A1A:Remove JP2 for +2.5V ADJ 32,39,43,44,46 MAINON 10K_4 PCIEVDDRPG R206 PC40 1U-10V_4 ADJ PR21 GND +1.2V_ON 39 Size Document Number Custom Rev A1A +1.2V/+1.5V/+2.5V Date: Thursday, June 08, 2006 Sheet 42 of 46 +5V_S5 PR114 10/F_6 D PC128 1U/16V_6 +3VSUS VIN_480 PC120 VIN PD17 HI0805R800R-00_8 VTTIN PR126 0_6 VIN_480 VTT VTTS TON 1M_6 17 25 26 27 VDDQS + PQ30 PC127 FB + PD16 AOL1412 *EC10QS04 PC125 PR120 *CAP *2.15K/F-6 C +5V_S5 PR122 PC114 PC118 560U/2.5V 560U/2.5V 4/21 change PC115 10U/10V-8 0_6 PR119 *10K/F-6 1U/16V_6 PR112 0_6 PR125 3/27 Change to Vin_480 PGND1 GND GND GND REF 24 B2A:Remove JP7 29 28 18 PGND2 PC131 10U/10V-1206 PC126 1U/50V_6 19 3/27 Change OCP 4/21 Change OCP +1.8_DL +0.9V_VTER DL GND GND PGND1 NC B2A:Remove JP5,6 +1.8 LX 16 ILIM VSSA C PC123 10U/10V-1206 +1.8VSUS PL16 1.5uH_PCMC104T_1R5MN PR115 PC124 10U/10V-1206 AOL1414 20 10K/F_6 PC122 1U/50V_6 23 +1.8_DH PC121 1U/25_8 LX 10U/25V_1206 VTTEN 10U/25V_1206 PQ31 EN/PSV 10 21 1U/50V_6 11 *0_6 0_6 DH PC117 VDDP VDDP 0_6 22 PC116 PR118 PR117 32,39,42,44,46 MAINON 32,39,44 SUSON +1.8VSUS PGD NC BST SUSON PR116 SUSON 15 VCCA 13 12 HWPG_1.8V 32,39,44 PC119 PU10 SC488MLTRT 100K/F_4 39 14 RB500 PR113 D PL17 4.7U/6.3V_6 +1.8VSUS PR124 1000P/50V_6 10/F_6 PC129 +1.8V_ON PQ49 AO6402 +0.9V_REF PC130 1U/16V_6 +1.8V PC167 1U/50V_6 +3VPCU S5_ON S5_ON PR160 Vin GND 0_6 SD Vout BP B2A:add RC delay +1.8V_ON PR87 5.1K/F_6 PR161 PC53 10U/10V-8 SI9183-AD PC168 *.1U_6 B +1.8VSUS PU6 B2A:add RC delay 39,44 B2A:Add PQ49,PC167 to fix SB460 +1.8V drop out issue TYPE SVPC +1.8V_S5 B +3V_S5 PC54 1U_6 +15V PQ10 NTMS4706NR2G 0_6 PC169 *.1U_6 PR88 10K/F-6 PR34 PR36 100K/F_4 +1.8V 100K/F_4 +2.5V MAIND 44 2 PQ5 2N7002E PQ8 2N7002E A *0_4 A R178 PC23 1U/25_6 PROJECT : ZC3 Quanta Computer Inc Size Custom Document Number Date: Thursday, June 08, 2006 Rev 1A 1.8V&DDRII Sheet 43 of 46 +5VPCU VIN1999 VIN1999-3 PL18 7 1999LX3 +5V_S5 +3VPCU 3.8UH-MSCDR1-104R 100K/F_6 + PC140 1U/50V_6 MAIND PC163 1U/50V_6 + 1999DL3 +5V 1999DH3 PC153 D PL19 PR140 PR139 47/F_6 G1 3/27 Change INDUCTOR PQ43 AO4812 S1/D2 PC139 10U/25V_1210 G2 PQ37 FDS6900AS 0_6 1U/50V_6 D1 S2 PR142 THERM_SYS_PWR D VL VIN PC143 1U/50V_6 PC144 *10U/25V_1206 PC159 22U/25V_6 HI0805R800R-00_8 PC164 PC158 1U/50V_6 PC148 1U/50V_6 D1 PR138 12K-LF_6 PR137 4.7-LF_1206 ZD5.6V PR151 0_6 PD20 PR159 *6.81K/F_6 PC165 *100P_6 PC149 1U/50V_6 S5D PC157 1U/50V_6 1U/16V_6 DH3 26 FB5 SHDN ON3 V+ 20 PR157 100K/F_6 5VON PR153 ON5 LDO5 18 23 GND PRO 10 12 SKIP DL5 19 BST5 14 1999BST5 LX5 15 1999LX5 DH5 16 1999DH5 OUT5 21 PR145 100K/F_6 1999VCC PR150 39 PR144 HWPG_SYS 3/27 del 0_6 *0_4 B2A:Remove PR150 PC56 C 1U/16V_6 PGOOD N.C 25 LDO3 PR148 1999VCC 13 0_6 TON PD8 PC145 FDS6612A PC162 10U/25V_1210 PC151 4.7U/10V/X5R_8 PC55 1U/50V_6 PL20 PC152 10U/25V_1210 PQ38 AO4812 3/27 Change INDUCTOR +5VPCU 2.5UH-MSCDR1-104R + 1999DL5 PQ41 100K_6 3 PC147 1U/50V_6 SUSD PC150 330U/6.3V_6X5.7 PQ50 2N7002E PQ51 2N7002E MAIND PC146 330U/6.3V_6X5.7 *0_4 PC141 1U/50V_6 PC160 10U/10V/X5R_8 43 +3V MAIND PR162 PC161 1U/50V_6 FDS6690AS PR152 +5VPCU C +3VSUS + SKIP_SEL 4/21 change circuit 1U/50V_6 PU11 MAX1999-LF B2A:Enable PWM mode during system working,remove PR150 PC156 1U/50V_6 PQ45 DAP202U PR156 100K/F_6 VL VIN1999 +3VPCU VIN 0_4 HI0805R800R-00_8 3VON PL21 1999BST3 DL3 24 FB3 28 27 BST3 LX3 ILIM5 ILIM3 11 0_4 PR154 PC142 10U/10V/X5R_8 VIN1999-5 VL REF PC154 *330U/6.3V_6X5.7 +3VPCU PC138 330U/6.3V_6X5.7 ILIM5 22 ILIM3 OUT3 PR158 154K/F_6 VCC ILIM5 PR155 47K/F-6 17 REF2V PC166 1U/16V_6 ILIM3 1999VCC REF2V PD18 +3VPCU CHN217 0_6 +5VPCU PR130 1999DL3 S5D VIN 10V-1 1U/50V_6 +1.8VSUS +3VSUS PQ40 AO6402 +15V PC137 B PC135 1U/16V_6 PR121 1M_6 PR86 15_8 PR136 22_8 PC155 1U/50V_6 SUSD 3 SUSD SUS_ON_G B +3V_S5 PR127 1M_6 PD19 CHN217 +15V PC136 1U/50V_6 2 32,39,43 SUSON PQ32 DTC144EUA PC132 *2200P_6 PR123 1M_6 PQ15 2N7002E PQ42 2N7002E 0_6 0_6 PR129 PR133 1999DL3 PQ33 2N7002E C3A:change to 15 ohm for 541 PC134 1U/16V_6 VIN VIN +3V_S5 +5V_S5 +1.8V_S5 +1.2V_VPCIE +1.8V +2.5V +3V +5V +1.5V +1.1V_VGA +15V +15V PR131 1M_6 PR67 22_8 PR39 15_8 PR46 22_8 PR134 15_8 PR146 22_8 PR1 22_8 PR4 22_8 PR128 1M_6 RUN_ON_G 32,39,42,43,46 PQ46 2N7002E PQ39 2N7002E 3 3 3 2 2 2 PC133 *2200P_6 PQ44 2N7002E PQ1 2N7002E PQ2 2N7002E PQ36 2N7002E PQ13 2N7002E PQ12 2N7002E PQ14 2N7002E A PQ16 2N7002E PR132 1M_6 PQ35 DTC144EUA 3 43 PQ34 2N7002E PQ48 2N7002E PQ47 DTC144EUA 2 PR143 1M_6 S5_ON 39,43 MAINON S5D 3 S5D S5_ON_G A MAIND PR149 1M_6 PR89 22_8 PR147 1M_6 PR135 22_8 PR141 22_8 PROJECT : ZC3 Quanta Computer Inc Size Document Number Custom SYSTEM Date: Thursday, June 08, 2006 Rev POWER MAX1999 Sheet 44 1A of 46 +3VPCU D D PR106 100K/F_6 D3A:change from BCPL1040Z18 to BCSBM104Z19 (EOL issue) CELLR-SET A1A:Change PJ1 footprint to pin VA HI0805R800R-00_8 PL10 PJ1 PR16 0_6 8724CELLS PR15 2200P/50V_4 100K/F_6 1 PD14 PC13 PC15 SPL1040PT PC14 1U/25_8 1U/25_8 PL11 HI0805R800R-00_8 PC98 1U/25_8 PR107 0.01_3720_1W 1P PC93 *.1u/50V_6 2P PC91 *.1u/50V_6 2 20277-044L_POWER_CONN PC92 1U/25_8 VH PD2 SW1010C VAD HI0805R800R-00_8 PC81 2 PC19 PC10 CC-SET 47K_6 PC86 PC87 1000p/50V_4 1000p/50V_4 - 8724LDO REFIN LX 23 ACOK DLO 21 ICHG PGND 20 28 IINP CSIP CSIN 19 18 CSIP CSIN BATT PR31 CCV 0_6 PR25 10K/F_6 CCI CCS OSC 200KHz PQ21 FDS6690AS 16 BAT-V REF 8724REF 1U/50V_6 01U/50V_6 01U/50V_6 PC78 10U/25V_1206 CLS PR19 B 8.25K/F_6 TEMP_MBAT 39 CN23 PC12 1U/16V_6 PC96 PC9 10U/25V_1206 PR22 14K/F_6 PC95 PC72 01U/50V_6 8724DL 1K/F_6 PC99 MBAT 14 29 PR110 220p_4 BAT-V 3.8uH-MSCDR1-104R 8724LX 22K_6 PC17 8724DH ICTL SHDN PC73 10U/25V_1206 SW1010C 11 1U/25_8 12 PR108 PR102 0.01 PL7 GND GND B DHI 25 VCTL 13 47K_6 PU2A LM393 24 8724BST PC88 CURRNT LIMIT POINT = 4.74A HI0805R800R-00_8 PL5 MBAT+ TEMP_MBAT SUYIN_BATTERY VIN MBAT 15 PD13 22 BST PC6 PC7 47P_4 PR7 330_4 47P_4 *0_6 DLOV ACIN 2P 39 10 PC85 1U/16V_6 1P PR17 CV-SET 0_6 PC97 1U/16V_6 17 28724LDO 39 LDO PL6 HI0805R800R-00_8 PC71 +3VPCU PR5 1U/50V_6 10K/F_6 PR6 330_4 VL A + - ACIN PR32 6.8K/F_6 220K_6 TEMP_MBAT PC8 01U/50V_6 PD4 VAD A ZD12V PR30 10K/F_6 D/C# 180K/F_6 19,39 PD11 ZD5.6V VAON PQ6 DTC144EU PR28 10K/F_6 LM393 PR24 39 22K_6 PU2B +3VPCU PD10 ZD5.6V PR29 PR27 220K_6 19,39 PR23 MBCLK MBDATA 1 MBDATA BL/C# D/C# 39 BL/C# 39 PROJECT : ZC3 PQ4 2N7002E Quanta Computer Inc 1U/25_8 PQ22 FDS4435 4/28 for meet acer request 0.8c , change 0.15 to 0.01 VIN PR18 CELLS 8724LDO VAD PQ23 FDS6612A PC90 1U/50V_6 + 33_6 DCIN 27 26 PU9 MAX8724 PR109 1U/25_8 PR111 VIN PC84 USE DEFAULT 4.2V/CELL 1U/25_8 1U/25_8 PC16 PD3 PR26 PQ24 AO4414L CELLR-SET VH CSSP CSSN +3VPCU PC20 4.7K/F_6 FOR 4S 01U/50V_6 PQ7 IMZ2 IMD RB500 PR12 C PC94 1U/16V_6 PD15 RB500 PR14 47K_6 VAON PR33 10K/F_6 CSSP CSSN 10U/25V_12 + PD5 DA204U C PL8 Size C Document Number Date: Thursday, June 08, 2006 Rev 1A BATTERY CHARGER Sheet 45 of 46 VGA VIN5 PL3 VIN +5V_S5 HI0805R800R-00_8 PR98 PC65 1U/50V_8 PD1 PR3 HWPG_VGA VIN DH 13 VOUT LX 12 ILIM 11 VDDP 10 VCCA FBK PGOOD GND DL PGND DH-VGA PL4 1.0uH_PCMC104T_1R0MN PR99 8.25K/F_6 PQ20 4/21 change DL-VGA + PD9 AOL1412 15A +1.1V_VGA 14 *EC10QS04 + 39 PC4 1U/50V_8 BST PR2 10K_6 EN/PSV +3V 0_6 PR100 PQ19 AOL1414 4.7U/10V/X5R_8 PU1 SC470 32,39,42,43,44 MAINON 10U/25V_1206 PR2 PR94 12K/F_6 PR3 PR95 12K/F_6 1M_6 10U/25V_1206 D PC2 SW1010C *.1U_6 PC66 PC1 10_6 D PC67 PC62 1000P/50V_6 PC64 1000P/50V_6 47U/10V_6 PC5 PC69 560U/2.5V 4/21 change PC3 1U/25_6 VGA_CORE_FB C PC70 PC68 560U/2.5V 10U/10V/X5R_8 HI >VOUT=(1+R2/R3)*0.5 LO >VOUT=(1+R2/(R3//R4))*0.5 M52P(G) +5V_S5 PR4 PR97 29.4K/F_4 VGA_CORE_FB PR93 3.24K/F_6 PQ18 C PR2 : 10K PR3 : 11K PR4 : 110K 2N7002E R161 220_4 VDDCPG 42 M54P *.1U-10V_4 PR96 1 A1A:Add for M56 power sequence 22U/25V_6 PR2 : 12K PR3 : 12K PR4 : 60.4K 100/F_4 PC57 C791 B PQ17 M56P 2N7002E B VGA_PWR_SW 19 PR2 : 12K PR3 : 12K PR4 : 29.4K Power Play Mode VGA_PWR_SW VGA_CORE 0.95V M52P(G) HI 1.0V M54P 1.0V M56P Default LO 1.0V M52P(G) 1.1V M54P 1.2V M56P A A PROJECT : ZC3 Quanta Computer Inc Size Document Number Rev 1A VGA CORE Date: Thursday, June 08, 2006 Sheet 46 of 46 ... DVI_DDCDATA X-TX0P-PR 28 X-TX0N-PR 28 1K_4 1U-10V_4 123 126 VA EZ4 _Acer_ define R15 +3V 0_4 121 P1 EZ4 _Acer_ define +5V VA EZ4 _Acer_ define C C AUDGND1 VA +3V_S5 +3V_S5 R459 *2.2K_4 R458 10K_4 C27... *AFN300-N2G1Z_DEBUG 80mil +5V_S5 MB USB PORT(REAR) 80mil A1A:Change CN3 pin to +5V_S5 U39 D3A:for acer request B +3.3V:1000mA 3.3Vaux:330mA +1.5V:500mA C811 1U-10V_4 USBON# R546 0_4 GND IN IN OUT... PCIE_RXN1 D4 ALINK_RST# +5V BAS316 2,15,29,33 PDAT_SMB 2,15,29,33 PCLK_SMB 2,39 EZ_CLKREQ# C16 G2 EZ4 _Acer_ define CN19-3 CN19-1 78 79 81 80 105 106 107 108 109 117 119 120 118 115 116 114 111 112 113